cpu.h revision 1.37
11.37Sdsl/*	$NetBSD: cpu.h,v 1.37 2007/12/22 18:35:00 dsl Exp $	*/
21.1Sfvdl
31.1Sfvdl/*-
41.1Sfvdl * Copyright (c) 1990 The Regents of the University of California.
51.1Sfvdl * All rights reserved.
61.1Sfvdl *
71.1Sfvdl * This code is derived from software contributed to Berkeley by
81.1Sfvdl * William Jolitz.
91.1Sfvdl *
101.1Sfvdl * Redistribution and use in source and binary forms, with or without
111.1Sfvdl * modification, are permitted provided that the following conditions
121.1Sfvdl * are met:
131.1Sfvdl * 1. Redistributions of source code must retain the above copyright
141.1Sfvdl *    notice, this list of conditions and the following disclaimer.
151.1Sfvdl * 2. Redistributions in binary form must reproduce the above copyright
161.1Sfvdl *    notice, this list of conditions and the following disclaimer in the
171.1Sfvdl *    documentation and/or other materials provided with the distribution.
181.2Sagc * 3. Neither the name of the University nor the names of its contributors
191.1Sfvdl *    may be used to endorse or promote products derived from this software
201.1Sfvdl *    without specific prior written permission.
211.1Sfvdl *
221.1Sfvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
231.1Sfvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
241.1Sfvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
251.1Sfvdl * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
261.1Sfvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
271.1Sfvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
281.1Sfvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
291.1Sfvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
301.1Sfvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
311.1Sfvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
321.1Sfvdl * SUCH DAMAGE.
331.1Sfvdl *
341.1Sfvdl *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
351.1Sfvdl */
361.1Sfvdl
371.1Sfvdl#ifndef _AMD64_CPU_H_
381.1Sfvdl#define _AMD64_CPU_H_
391.1Sfvdl
401.6Syamt#if defined(_KERNEL)
411.1Sfvdl#if defined(_KERNEL_OPT)
421.1Sfvdl#include "opt_multiprocessor.h"
431.1Sfvdl#include "opt_lockdebug.h"
441.33Sbouyer#include "opt_xen.h"
451.1Sfvdl#endif
461.1Sfvdl
471.1Sfvdl/*
481.1Sfvdl * Definitions unique to x86-64 cpu support.
491.1Sfvdl */
501.1Sfvdl#include <machine/frame.h>
511.1Sfvdl#include <machine/segments.h>
521.1Sfvdl#include <machine/tss.h>
531.1Sfvdl#include <machine/intrdefs.h>
541.1Sfvdl#include <x86/cacheinfo.h>
551.1Sfvdl
561.1Sfvdl#include <sys/device.h>
571.17Sad#include <sys/simplelock.h>
581.4Syamt#include <sys/cpu_data.h>
591.4Syamt#include <sys/cc_microtime.h>
601.1Sfvdl
611.29Syamtstruct pmap;
621.29Syamt
631.1Sfvdlstruct cpu_info {
641.1Sfvdl	struct device *ci_dev;
651.1Sfvdl	struct cpu_info *ci_self;
661.25Sad
671.25Sad	/*
681.25Sad	 * Will be accessed by other CPUs.
691.25Sad	 */
701.1Sfvdl	struct cpu_info *ci_next;
711.1Sfvdl	struct lwp *ci_curlwp;
721.25Sad	struct pmap_cpu *ci_pmap_cpu;
731.25Sad	struct lwp *ci_fpcurlwp;
741.25Sad	int ci_fpsaving;
751.1Sfvdl	u_int ci_cpuid;
761.25Sad	int ci_cpumask;			/* (1 << CPU ID) */
771.1Sfvdl	u_int ci_apicid;
781.25Sad	struct cpu_data ci_data;	/* MI per-cpu data */
791.25Sad	struct cc_microtime_state ci_cc;/* cc_microtime state */
801.1Sfvdl
811.25Sad	/*
821.25Sad	 * Private members.
831.25Sad	 */
841.25Sad	struct evcnt ci_tlb_evcnt;	/* tlb shootdown counter */
851.29Syamt	struct pmap *ci_pmap;		/* current pmap */
861.25Sad	int ci_need_tlbwait;		/* need to wait for TLB invalidations */
871.29Syamt	int ci_want_pmapload;		/* pmap_load() is needed */
881.31Sad	volatile int ci_tlbstate;	/* one of TLBSTATE_ states. see below */
891.29Syamt#define	TLBSTATE_VALID	0	/* all user tlbs are valid */
901.29Syamt#define	TLBSTATE_LAZY	1	/* tlbs are valid but won't be kept uptodate */
911.29Syamt#define	TLBSTATE_STALE	2	/* we might have stale user tlbs */
921.1Sfvdl	u_int64_t ci_scratch;
931.33Sbouyer#ifdef XEN
941.33Sbouyer	struct iplsource *ci_isources[NIPL];
951.33Sbouyer#else
961.1Sfvdl	struct intrsource *ci_isources[MAX_INTR_SOURCES];
971.33Sbouyer#endif
981.13Sad	volatile int	ci_mtx_count;	/* Negative count of spin mutexes */
991.13Sad	volatile int	ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
1001.13Sad
1011.13Sad	/* The following must be aligned for cmpxchg8b. */
1021.13Sad	struct {
1031.13Sad		uint32_t	ipending;
1041.13Sad		int		ilevel;
1051.13Sad	} ci_istate __aligned(8);
1061.13Sad#define ci_ipending	ci_istate.ipending
1071.13Sad#define	ci_ilevel	ci_istate.ilevel
1081.13Sad
1091.1Sfvdl	int		ci_idepth;
1101.1Sfvdl	u_int32_t	ci_imask[NIPL];
1111.1Sfvdl	u_int32_t	ci_iunmask[NIPL];
1121.1Sfvdl
1131.1Sfvdl	paddr_t 	ci_idle_pcb_paddr;
1141.1Sfvdl	u_int		ci_flags;
1151.1Sfvdl	u_int32_t	ci_ipis;
1161.1Sfvdl
1171.25Sad	int32_t		ci_cpuid_level;
1181.25Sad	uint32_t	ci_signature;
1191.25Sad	uint32_t	ci_feature_flags;
1201.19Sxtraeme	uint32_t	ci_feature2_flags;
1211.25Sad	uint32_t	ci_vendor[4];	 /* vendor string */
1221.1Sfvdl	u_int64_t	ci_tsc_freq;
1231.34Sjoerg	volatile uint32_t	ci_lapic_counter;
1241.1Sfvdl
1251.16Sdrochner	const struct cpu_functions *ci_func;
1261.18Sxtraeme	void (*cpu_setup)(struct cpu_info *);
1271.18Sxtraeme	void (*ci_info)(struct cpu_info *);
1281.1Sfvdl
1291.1Sfvdl	int		ci_want_resched;
1301.1Sfvdl	struct trapframe *ci_ddb_regs;
1311.1Sfvdl
1321.1Sfvdl	struct x86_cache_info ci_cinfo[CAI_COUNT];
1331.1Sfvdl
1341.1Sfvdl	char		*ci_gdt;
1351.1Sfvdl
1361.1Sfvdl	struct x86_64_tss	ci_doubleflt_tss;
1371.1Sfvdl	struct x86_64_tss	ci_ddbipi_tss;
1381.1Sfvdl
1391.1Sfvdl	char *ci_doubleflt_stack;
1401.1Sfvdl	char *ci_ddbipi_stack;
1411.1Sfvdl
1421.1Sfvdl	struct evcnt ci_ipi_events[X86_NIPI];
1431.36Sjoerg
1441.36Sjoerg	/*
1451.36Sjoerg	 * The following two are actually region_descriptors,
1461.36Sjoerg	 * but that would pollute the namespace.
1471.36Sjoerg	 */
1481.36Sjoerg	uint64_t	ci_suspend_gdt;
1491.36Sjoerg	uint16_t	ci_suspend_gdt_padding;
1501.36Sjoerg	uint64_t	ci_suspend_idt;
1511.36Sjoerg	uint16_t	ci_suspend_idt_padding;
1521.36Sjoerg
1531.36Sjoerg	uint16_t	ci_suspend_tr;
1541.36Sjoerg	uint16_t	ci_suspend_ldt;
1551.36Sjoerg	uint32_t	ci_suspend_fs_base_l;
1561.36Sjoerg	uint32_t	ci_suspend_fs_base_h;
1571.36Sjoerg	uint32_t	ci_suspend_gs_base_l;
1581.36Sjoerg	uint32_t	ci_suspend_gs_base_h;
1591.36Sjoerg	uint32_t	ci_suspend_gs_kernelbase_l;
1601.36Sjoerg	uint32_t	ci_suspend_gs_kernelbase_h;
1611.36Sjoerg	uint32_t	ci_suspend_msr_efer;
1621.36Sjoerg	uint64_t	ci_suspend_rbx;
1631.36Sjoerg	uint64_t	ci_suspend_rbp;
1641.36Sjoerg	uint64_t	ci_suspend_rsp;
1651.36Sjoerg	uint64_t	ci_suspend_r12;
1661.36Sjoerg	uint64_t	ci_suspend_r13;
1671.36Sjoerg	uint64_t	ci_suspend_r14;
1681.36Sjoerg	uint64_t	ci_suspend_r15;
1691.36Sjoerg	uint64_t	ci_suspend_rfl;
1701.36Sjoerg	uint64_t	ci_suspend_cr0;
1711.36Sjoerg	uint64_t	ci_suspend_cr2;
1721.36Sjoerg	uint64_t	ci_suspend_cr3;
1731.36Sjoerg	uint64_t	ci_suspend_cr4;
1741.36Sjoerg	uint64_t	ci_suspend_cr8;
1751.1Sfvdl};
1761.1Sfvdl
1771.1Sfvdl#define CPUF_BSP	0x0001		/* CPU is the original BSP */
1781.1Sfvdl#define CPUF_AP		0x0002		/* CPU is an AP */
1791.1Sfvdl#define CPUF_SP		0x0004		/* CPU is only processor */
1801.1Sfvdl#define CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
1811.1Sfvdl
1821.1Sfvdl#define CPUF_PRESENT	0x1000		/* CPU is present */
1831.1Sfvdl#define CPUF_RUNNING	0x2000		/* CPU is running */
1841.1Sfvdl#define CPUF_PAUSE	0x4000		/* CPU is paused in DDB */
1851.1Sfvdl#define CPUF_GO		0x8000		/* CPU should start running */
1861.1Sfvdl
1871.1Sfvdl
1881.1Sfvdlextern struct cpu_info cpu_info_primary;
1891.1Sfvdlextern struct cpu_info *cpu_info_list;
1901.1Sfvdl
1911.1Sfvdl#define CPU_INFO_ITERATOR		int
1921.1Sfvdl#define CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpu_info_list; \
1931.1Sfvdl					ci != NULL; ci = ci->ci_next
1941.1Sfvdl
1951.1Sfvdl#define X86_MAXPROCS		32	/* bitmask; can be bumped to 64 */
1961.1Sfvdl
1971.36Sjoerg#define CPU_STARTUP(_ci, _target)	((_ci)->ci_func->start(_ci, _target))
1981.36Sjoerg#define CPU_STOP(_ci)			((_ci)->ci_func->stop(_ci))
1991.36Sjoerg#define CPU_START_CLEANUP(_ci)		((_ci)->ci_func->cleanup(_ci))
2001.1Sfvdl
2011.27Sad#if defined(__GNUC__) && defined(_KERNEL)
2021.27Sadstatic struct cpu_info *x86_curcpu(void);
2031.27Sadstatic lwp_t *x86_curlwp(void);
2041.27Sad
2051.27Sad__inline static struct cpu_info * __attribute__((__unused__))
2061.27Sadx86_curcpu(void)
2071.27Sad{
2081.27Sad	struct cpu_info *ci;
2091.27Sad
2101.27Sad	__asm volatile("movq %%gs:%1, %0" :
2111.27Sad	    "=r" (ci) :
2121.27Sad	    "m"
2131.27Sad	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self)));
2141.27Sad	return ci;
2151.27Sad}
2161.27Sad
2171.27Sad__inline static lwp_t * __attribute__((__unused__))
2181.27Sadx86_curlwp(void)
2191.27Sad{
2201.27Sad	lwp_t *l;
2211.27Sad
2221.27Sad	__asm volatile("movq %%gs:%1, %0" :
2231.27Sad	    "=r" (l) :
2241.27Sad	    "m"
2251.27Sad	    (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp)));
2261.27Sad	return l;
2271.27Sad}
2281.27Sad#else	/* __GNUC__ && _KERNEL */
2291.27Sad/* For non-GCC and LKMs */
2301.27Sadstruct cpu_info	*x86_curcpu(void);
2311.27Sadlwp_t	*x86_curlwp(void);
2321.27Sad#endif	/* __GNUC__ && _KERNEL */
2331.27Sad
2341.1Sfvdl#define cpu_number()	(curcpu()->ci_cpuid)
2351.1Sfvdl
2361.1Sfvdl#define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
2371.1Sfvdl
2381.1Sfvdlextern struct cpu_info *cpu_info[X86_MAXPROCS];
2391.1Sfvdl
2401.18Sxtraemevoid cpu_boot_secondary_processors(void);
2411.23Syamtvoid cpu_init_idle_lwps(void);
2421.1Sfvdl
2431.13Sad#define aston(l)	((l)->l_md.md_astpending = 1)
2441.1Sfvdl
2451.1Sfvdlextern u_int32_t cpus_attached;
2461.1Sfvdl
2471.27Sad#define curcpu()	x86_curcpu()
2481.27Sad#define curlwp		x86_curlwp()
2491.23Syamt#define curpcb		(&curlwp->l_addr->u_pcb)
2501.1Sfvdl
2511.1Sfvdl/*
2521.1Sfvdl * Arguments to hardclock, softclock and statclock
2531.1Sfvdl * encapsulate the previous machine state in an opaque
2541.1Sfvdl * clockframe; for now, use generic intrframe.
2551.1Sfvdl */
2561.7Scubestruct clockframe {
2571.7Scube	struct intrframe cf_if;
2581.7Scube};
2591.1Sfvdl
2601.37Sdsl#define	CLKF_USERMODE(frame)	USERMODE((frame)->cf_if.if_tf.tf_cs, \
2611.37Sdsl				    (frame)->cf_if.if_tf.tf_rflags)
2621.37Sdsl#define CLKF_PC(frame)		((frame)->cf_if.if_tf.tf_rip)
2631.25Sad#define CLKF_INTR(frame)	(curcpu()->ci_idepth > 0)
2641.1Sfvdl
2651.1Sfvdl/*
2661.1Sfvdl * This is used during profiling to integrate system time.  It can safely
2671.1Sfvdl * assume that the process is resident.
2681.1Sfvdl */
2691.1Sfvdl#define LWP_PC(l)		((l)->l_md.md_regs->tf_rip)
2701.1Sfvdl
2711.1Sfvdl/*
2721.1Sfvdl * Give a profiling tick to the current process when the user profiling
2731.1Sfvdl * buffer pages are invalid.  On the i386, request an ast to send us
2741.1Sfvdl * through trap(), marking the proc as needing a profiling tick.
2751.1Sfvdl */
2761.13Sadextern void cpu_need_proftick(struct lwp *);
2771.1Sfvdl
2781.1Sfvdl/*
2791.13Sad * Notify an LWP that it has a signal pending, process as soon as possible.
2801.1Sfvdl */
2811.13Sadextern void cpu_signotify(struct lwp *);
2821.1Sfvdl
2831.1Sfvdl/*
2841.1Sfvdl * We need a machine-independent name for this.
2851.1Sfvdl */
2861.30Sjoergextern void (*delay_func)(unsigned int);
2871.1Sfvdl
2881.1Sfvdl#define DELAY(x)		(*delay_func)(x)
2891.1Sfvdl#define delay(x)		(*delay_func)(x)
2901.1Sfvdl
2911.1Sfvdl
2921.1Sfvdl/*
2931.1Sfvdl * pull in #defines for kinds of processors
2941.1Sfvdl */
2951.1Sfvdl
2961.1Sfvdlextern int biosbasemem;
2971.1Sfvdlextern int biosextmem;
2981.1Sfvdlextern int cpu;
2991.1Sfvdlextern int cpu_feature;
3001.25Sadextern int cpu_feature2;
3011.1Sfvdlextern int cpu_id;
3021.1Sfvdlextern int cpuid_level;
3031.32Sadextern char cpu_vendorname[];
3041.1Sfvdl
3051.1Sfvdl/* identcpu.c */
3061.1Sfvdl
3071.18Sxtraemevoid	identifycpu(struct cpu_info *);
3081.18Sxtraemevoid cpu_probe_features(struct cpu_info *);
3091.1Sfvdl
3101.1Sfvdl/* machdep.c */
3111.18Sxtraemevoid	dumpconf(void);
3121.18Sxtraemeint	cpu_maxproc(void);
3131.18Sxtraemevoid	cpu_reset(void);
3141.18Sxtraemevoid	x86_64_proc0_tss_ldt_init(void);
3151.18Sxtraemevoid	x86_64_init_pcb_tss_ldt(struct cpu_info *);
3161.18Sxtraemevoid	cpu_proc_fork(struct proc *, struct proc *);
3171.1Sfvdl
3181.1Sfvdlstruct region_descriptor;
3191.18Sxtraemevoid	lgdt(struct region_descriptor *);
3201.33Sbouyer#ifdef XEN
3211.33Sbouyervoid	lgdt_finish(void);
3221.33Sbouyer#endif
3231.18Sxtraemevoid	fillw(short, void *, size_t);
3241.1Sfvdl
3251.1Sfvdlstruct pcb;
3261.18Sxtraemevoid	savectx(struct pcb *);
3271.23Syamtvoid	lwp_trampoline(void);
3281.18Sxtraemevoid	child_trampoline(void);
3291.1Sfvdl
3301.33Sbouyer#ifdef XEN
3311.33Sbouyervoid	startrtclock(void);
3321.33Sbouyervoid	xen_delay(unsigned int);
3331.33Sbouyervoid	xen_initclocks(void);
3341.33Sbouyer#else
3351.1Sfvdl/* clock.c */
3361.18Sxtraemevoid	initrtclock(u_long);
3371.18Sxtraemevoid	startrtclock(void);
3381.30Sjoergvoid	i8254_delay(unsigned int);
3391.18Sxtraemevoid	i8254_microtime(struct timeval *);
3401.18Sxtraemevoid	i8254_initclocks(void);
3411.33Sbouyer#endif
3421.1Sfvdl
3431.35Sjmcneillvoid cpu_init_msrs(struct cpu_info *, bool);
3441.1Sfvdl
3451.1Sfvdl
3461.1Sfvdl/* vm_machdep.c */
3471.18Sxtraemeint kvtop(void *);
3481.1Sfvdl
3491.1Sfvdl/* trap.c */
3501.18Sxtraemevoid	child_return(void *);
3511.1Sfvdl
3521.1Sfvdl/* consinit.c */
3531.18Sxtraemevoid kgdb_port_init(void);
3541.1Sfvdl
3551.1Sfvdl/* bus_machdep.c */
3561.18Sxtraemevoid x86_bus_space_init(void);
3571.18Sxtraemevoid x86_bus_space_mallocok(void);
3581.12Sxtraeme
3591.1Sfvdl#endif /* _KERNEL */
3601.1Sfvdl
3611.1Sfvdl#include <machine/psl.h>
3621.1Sfvdl
3631.1Sfvdl/*
3641.1Sfvdl * CTL_MACHDEP definitions.
3651.1Sfvdl */
3661.1Sfvdl#define	CPU_CONSDEV		1	/* dev_t: console terminal device */
3671.1Sfvdl#define	CPU_BIOSBASEMEM		2	/* int: bios-reported base mem (K) */
3681.1Sfvdl#define	CPU_BIOSEXTMEM		3	/* int: bios-reported ext. mem (K) */
3691.1Sfvdl#define	CPU_NKPDE		4	/* int: number of kernel PDEs */
3701.1Sfvdl#define	CPU_BOOTED_KERNEL	5	/* string: booted kernel name */
3711.1Sfvdl#define CPU_DISKINFO		6	/* disk geometry information */
3721.1Sfvdl#define CPU_FPU_PRESENT		7	/* FPU is present */
3731.1Sfvdl#define	CPU_MAXID		8	/* number of valid machdep ids */
3741.1Sfvdl
3751.1Sfvdl#define	CTL_MACHDEP_NAMES { \
3761.1Sfvdl	{ 0, 0 }, \
3771.1Sfvdl	{ "console_device", CTLTYPE_STRUCT }, \
3781.1Sfvdl	{ "biosbasemem", CTLTYPE_INT }, \
3791.1Sfvdl	{ "biosextmem", CTLTYPE_INT }, \
3801.1Sfvdl	{ "nkpde", CTLTYPE_INT }, \
3811.1Sfvdl	{ "booted_kernel", CTLTYPE_STRING }, \
3821.1Sfvdl	{ "diskinfo", CTLTYPE_STRUCT }, \
3831.1Sfvdl	{ "fpu_present", CTLTYPE_INT }, \
3841.1Sfvdl}
3851.1Sfvdl
3861.1Sfvdl
3871.1Sfvdl/*
3881.1Sfvdl * Structure for CPU_DISKINFO sysctl call.
3891.1Sfvdl * XXX this should be somewhere else.
3901.1Sfvdl */
3911.1Sfvdl#define MAX_BIOSDISKS	16
3921.1Sfvdl
3931.1Sfvdlstruct disklist {
3941.1Sfvdl	int dl_nbiosdisks;			   /* number of bios disks */
3951.1Sfvdl	struct biosdisk_info {
3961.1Sfvdl		int bi_dev;			   /* BIOS device # (0x80 ..) */
3971.1Sfvdl		int bi_cyl;			   /* cylinders on disk */
3981.1Sfvdl		int bi_head;			   /* heads per track */
3991.1Sfvdl		int bi_sec;			   /* sectors per track */
4001.1Sfvdl		u_int64_t bi_lbasecs;		   /* total sec. (iff ext13) */
4011.1Sfvdl#define BIFLAG_INVALID		0x01
4021.1Sfvdl#define BIFLAG_EXTINT13		0x02
4031.1Sfvdl		int bi_flags;
4041.1Sfvdl	} dl_biosdisks[MAX_BIOSDISKS];
4051.1Sfvdl
4061.1Sfvdl	int dl_nnativedisks;			   /* number of native disks */
4071.1Sfvdl	struct nativedisk_info {
4081.1Sfvdl		char ni_devname[16];		   /* native device name */
4091.1Sfvdl		int ni_nmatches; 		   /* # of matches w/ BIOS */
4101.1Sfvdl		int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
4111.1Sfvdl	} dl_nativedisks[1];			   /* actually longer */
4121.1Sfvdl};
4131.1Sfvdl
4141.1Sfvdl#endif /* !_AMD64_CPU_H_ */
415