cpu.h revision 1.47
1/* $NetBSD: cpu.h,v 1.47 2008/04/21 15:15:33 cegger Exp $ */ 2 3/*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37#ifndef _AMD64_CPU_H_ 38#define _AMD64_CPU_H_ 39 40#if defined(_KERNEL) 41#if defined(_KERNEL_OPT) 42#include "opt_multiprocessor.h" 43#include "opt_lockdebug.h" 44#include "opt_xen.h" 45#endif 46 47/* 48 * Definitions unique to x86-64 cpu support. 49 */ 50#include <machine/frame.h> 51#include <machine/segments.h> 52#include <machine/tss.h> 53#include <machine/intrdefs.h> 54#include <x86/cacheinfo.h> 55 56#include <sys/device.h> 57#include <sys/simplelock.h> 58#include <sys/cpu_data.h> 59#include <sys/cc_microtime.h> 60 61struct pmap; 62 63struct cpu_info { 64 struct device *ci_dev; 65 struct cpu_info *ci_self; 66 67#ifdef XEN 68 volatile struct vcpu_info *ci_vcpu; 69#endif 70 71 /* 72 * Will be accessed by other CPUs. 73 */ 74 struct cpu_info *ci_next; 75 struct lwp *ci_curlwp; 76 struct pmap_cpu *ci_pmap_cpu; 77 struct lwp *ci_fpcurlwp; 78 int ci_fpsaving; 79 u_int ci_cpuid; 80 int ci_cpumask; /* (1 << CPU ID) */ 81 u_int ci_apicid; 82 uint8_t ci_initapicid; /* our intitial APIC ID */ 83 uint8_t ci_packageid; 84 uint8_t ci_coreid; 85 uint8_t ci_smtid; 86 struct cpu_data ci_data; /* MI per-cpu data */ 87 struct cc_microtime_state ci_cc;/* cc_microtime state */ 88 89 /* 90 * Private members. 91 */ 92 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 93 struct pmap *ci_pmap; /* current pmap */ 94 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 95 int ci_want_pmapload; /* pmap_load() is needed */ 96 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 97#define TLBSTATE_VALID 0 /* all user tlbs are valid */ 98#define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 99#define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 100 uint64_t ci_scratch; 101#ifdef XEN 102 struct iplsource *ci_isources[NIPL]; 103#else 104 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 105#endif 106 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 107 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 108 109 /* The following must be aligned for cmpxchg8b. */ 110 struct { 111 uint32_t ipending; 112 int ilevel; 113 } ci_istate __aligned(8); 114#define ci_ipending ci_istate.ipending 115#define ci_ilevel ci_istate.ilevel 116 117 int ci_idepth; 118 void * ci_intrstack; 119 uint32_t ci_imask[NIPL]; 120 uint32_t ci_iunmask[NIPL]; 121 122 u_int ci_flags; 123 uint32_t ci_ipis; 124 125 int32_t ci_cpuid_level; 126 uint32_t ci_signature; 127 uint32_t ci_feature_flags; 128 uint32_t ci_feature2_flags; 129 uint32_t ci_vendor[4]; /* vendor string */ 130 uint64_t ci_tsc_freq; 131 volatile uint32_t ci_lapic_counter; 132 133 const struct cpu_functions *ci_func; 134 void (*cpu_setup)(struct cpu_info *); 135 void (*ci_info)(struct cpu_info *); 136 137 int ci_want_resched; 138 struct trapframe *ci_ddb_regs; 139 140 struct x86_cache_info ci_cinfo[CAI_COUNT]; 141 142 char *ci_gdt; 143 144 struct evcnt ci_ipi_events[X86_NIPI]; 145 146 struct x86_64_tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 147 int ci_tss_sel; /* TSS selector of this cpu */ 148 149 /* 150 * The following two are actually region_descriptors, 151 * but that would pollute the namespace. 152 */ 153 uint64_t ci_suspend_gdt; 154 uint16_t ci_suspend_gdt_padding; 155 uint64_t ci_suspend_idt; 156 uint16_t ci_suspend_idt_padding; 157 158 uint16_t ci_suspend_tr; 159 uint16_t ci_suspend_ldt; 160 uint32_t ci_suspend_fs_base_l; 161 uint32_t ci_suspend_fs_base_h; 162 uint32_t ci_suspend_gs_base_l; 163 uint32_t ci_suspend_gs_base_h; 164 uint32_t ci_suspend_gs_kernelbase_l; 165 uint32_t ci_suspend_gs_kernelbase_h; 166 uint32_t ci_suspend_msr_efer; 167 uint64_t ci_suspend_rbx; 168 uint64_t ci_suspend_rbp; 169 uint64_t ci_suspend_rsp; 170 uint64_t ci_suspend_r12; 171 uint64_t ci_suspend_r13; 172 uint64_t ci_suspend_r14; 173 uint64_t ci_suspend_r15; 174 uint64_t ci_suspend_rfl; 175 uint64_t ci_suspend_cr0; 176 uint64_t ci_suspend_cr2; 177 uint64_t ci_suspend_cr3; 178 uint64_t ci_suspend_cr4; 179 uint64_t ci_suspend_cr8; 180}; 181 182#define CPUF_BSP 0x0001 /* CPU is the original BSP */ 183#define CPUF_AP 0x0002 /* CPU is an AP */ 184#define CPUF_SP 0x0004 /* CPU is only processor */ 185#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 186 187#define CPUF_PRESENT 0x1000 /* CPU is present */ 188#define CPUF_RUNNING 0x2000 /* CPU is running */ 189#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 190#define CPUF_GO 0x8000 /* CPU should start running */ 191 192 193extern struct cpu_info cpu_info_primary; 194extern struct cpu_info *cpu_info_list; 195 196#define CPU_INFO_ITERATOR int 197#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 198 ci != NULL; ci = ci->ci_next 199 200#define X86_MAXPROCS 32 /* bitmask; can be bumped to 64 */ 201 202#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 203#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 204#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 205 206#if defined(__GNUC__) && defined(_KERNEL) 207static struct cpu_info *x86_curcpu(void); 208static lwp_t *x86_curlwp(void); 209 210__inline static struct cpu_info * __unused 211x86_curcpu(void) 212{ 213 struct cpu_info *ci; 214 215 __asm volatile("movq %%gs:%1, %0" : 216 "=r" (ci) : 217 "m" 218 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 219 return ci; 220} 221 222__inline static lwp_t * __unused 223x86_curlwp(void) 224{ 225 lwp_t *l; 226 227 __asm volatile("movq %%gs:%1, %0" : 228 "=r" (l) : 229 "m" 230 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); 231 return l; 232} 233#else /* __GNUC__ && _KERNEL */ 234/* For non-GCC and LKMs */ 235struct cpu_info *x86_curcpu(void); 236lwp_t *x86_curlwp(void); 237#endif /* __GNUC__ && _KERNEL */ 238 239#define cpu_number() (curcpu()->ci_cpuid) 240 241#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 242 243extern struct cpu_info *cpu_info[X86_MAXPROCS]; 244 245void cpu_boot_secondary_processors(void); 246void cpu_init_idle_lwps(void); 247 248#define aston(l) ((l)->l_md.md_astpending = 1) 249 250extern uint32_t cpus_attached; 251 252#define curcpu() x86_curcpu() 253#define curlwp x86_curlwp() 254#define curpcb (&curlwp->l_addr->u_pcb) 255 256/* 257 * Arguments to hardclock, softclock and statclock 258 * encapsulate the previous machine state in an opaque 259 * clockframe; for now, use generic intrframe. 260 */ 261struct clockframe { 262 struct intrframe cf_if; 263}; 264 265#define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_tf.tf_cs, \ 266 (frame)->cf_if.if_tf.tf_rflags) 267#define CLKF_PC(frame) ((frame)->cf_if.if_tf.tf_rip) 268#define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 269 270/* 271 * This is used during profiling to integrate system time. It can safely 272 * assume that the process is resident. 273 */ 274#define LWP_PC(l) ((l)->l_md.md_regs->tf_rip) 275 276/* 277 * Give a profiling tick to the current process when the user profiling 278 * buffer pages are invalid. On the i386, request an ast to send us 279 * through trap(), marking the proc as needing a profiling tick. 280 */ 281extern void cpu_need_proftick(struct lwp *); 282 283/* 284 * Notify an LWP that it has a signal pending, process as soon as possible. 285 */ 286extern void cpu_signotify(struct lwp *); 287 288/* 289 * We need a machine-independent name for this. 290 */ 291extern void (*delay_func)(unsigned int); 292 293#define DELAY(x) (*delay_func)(x) 294#define delay(x) (*delay_func)(x) 295 296 297/* 298 * pull in #defines for kinds of processors 299 */ 300 301extern int biosbasemem; 302extern int biosextmem; 303extern int cpu; 304extern int cpu_feature; 305extern int cpu_feature2; 306extern int cpu_id; 307extern int cpuid_level; 308extern char cpu_vendorname[]; 309 310/* identcpu.c */ 311 312void identifycpu(struct cpu_info *); 313void cpu_probe_features(struct cpu_info *); 314 315/* machdep.c */ 316void dumpconf(void); 317void cpu_reset(void); 318void x86_64_proc0_tss_ldt_init(void); 319void x86_64_init_pcb_tss_ldt(struct cpu_info *); 320void cpu_proc_fork(struct proc *, struct proc *); 321 322struct region_descriptor; 323void lgdt(struct region_descriptor *); 324#ifdef XEN 325void lgdt_finish(void); 326#endif 327void fillw(short, void *, size_t); 328 329struct pcb; 330void savectx(struct pcb *); 331void lwp_trampoline(void); 332void child_trampoline(void); 333 334#ifdef XEN 335void startrtclock(void); 336void xen_delay(unsigned int); 337void xen_initclocks(void); 338#else 339/* clock.c */ 340void initrtclock(u_long); 341void startrtclock(void); 342void i8254_delay(unsigned int); 343void i8254_initclocks(void); 344#endif 345 346void cpu_init_msrs(struct cpu_info *, bool); 347 348 349/* vm_machdep.c */ 350int kvtop(void *); 351 352/* trap.c */ 353void child_return(void *); 354 355/* consinit.c */ 356void kgdb_port_init(void); 357 358/* bus_machdep.c */ 359void x86_bus_space_init(void); 360void x86_bus_space_mallocok(void); 361 362#endif /* _KERNEL */ 363 364#include <machine/psl.h> 365 366/* 367 * CTL_MACHDEP definitions. 368 */ 369#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 370#define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 371#define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 372#define CPU_NKPDE 4 /* int: number of kernel PDEs */ 373#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 374#define CPU_DISKINFO 6 /* disk geometry information */ 375#define CPU_FPU_PRESENT 7 /* FPU is present */ 376#define CPU_MAXID 8 /* number of valid machdep ids */ 377 378 379/* 380 * Structure for CPU_DISKINFO sysctl call. 381 * XXX this should be somewhere else. 382 */ 383#define MAX_BIOSDISKS 16 384 385struct disklist { 386 int dl_nbiosdisks; /* number of bios disks */ 387 struct biosdisk_info { 388 int bi_dev; /* BIOS device # (0x80 ..) */ 389 int bi_cyl; /* cylinders on disk */ 390 int bi_head; /* heads per track */ 391 int bi_sec; /* sectors per track */ 392 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 393#define BIFLAG_INVALID 0x01 394#define BIFLAG_EXTINT13 0x02 395 int bi_flags; 396 } dl_biosdisks[MAX_BIOSDISKS]; 397 398 int dl_nnativedisks; /* number of native disks */ 399 struct nativedisk_info { 400 char ni_devname[16]; /* native device name */ 401 int ni_nmatches; /* # of matches w/ BIOS */ 402 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 403 } dl_nativedisks[1]; /* actually longer */ 404}; 405 406#endif /* !_AMD64_CPU_H_ */ 407