cpu.h revision 1.48
1/* $NetBSD: cpu.h,v 1.48 2008/04/23 15:57:38 he Exp $ */ 2 3/*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37#ifndef _AMD64_CPU_H_ 38#define _AMD64_CPU_H_ 39 40#if defined(_KERNEL) 41#if defined(_KERNEL_OPT) 42#include "opt_multiprocessor.h" 43#include "opt_lockdebug.h" 44#include "opt_xen.h" 45#endif 46 47/* 48 * Definitions unique to x86-64 cpu support. 49 */ 50#include <machine/frame.h> 51#include <machine/segments.h> 52#include <machine/tss.h> 53#include <machine/intrdefs.h> 54#include <x86/cacheinfo.h> 55 56#include <sys/device.h> 57#include <sys/simplelock.h> 58#include <sys/cpu_data.h> 59#include <sys/cc_microtime.h> 60#include <sys/systm.h> 61 62struct pmap; 63 64struct cpu_info { 65 struct device *ci_dev; 66 struct cpu_info *ci_self; 67 68#ifdef XEN 69 volatile struct vcpu_info *ci_vcpu; 70#endif 71 72 /* 73 * Will be accessed by other CPUs. 74 */ 75 struct cpu_info *ci_next; 76 struct lwp *ci_curlwp; 77 struct pmap_cpu *ci_pmap_cpu; 78 struct lwp *ci_fpcurlwp; 79 int ci_fpsaving; 80 u_int ci_cpuid; 81 int ci_cpumask; /* (1 << CPU ID) */ 82 u_int ci_apicid; 83 uint8_t ci_initapicid; /* our intitial APIC ID */ 84 uint8_t ci_packageid; 85 uint8_t ci_coreid; 86 uint8_t ci_smtid; 87 struct cpu_data ci_data; /* MI per-cpu data */ 88 struct cc_microtime_state ci_cc;/* cc_microtime state */ 89 90 /* 91 * Private members. 92 */ 93 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 94 struct pmap *ci_pmap; /* current pmap */ 95 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 96 int ci_want_pmapload; /* pmap_load() is needed */ 97 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 98#define TLBSTATE_VALID 0 /* all user tlbs are valid */ 99#define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 100#define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 101 uint64_t ci_scratch; 102#ifdef XEN 103 struct iplsource *ci_isources[NIPL]; 104#else 105 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 106#endif 107 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 108 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 109 110 /* The following must be aligned for cmpxchg8b. */ 111 struct { 112 uint32_t ipending; 113 int ilevel; 114 } ci_istate __aligned(8); 115#define ci_ipending ci_istate.ipending 116#define ci_ilevel ci_istate.ilevel 117 118 int ci_idepth; 119 void * ci_intrstack; 120 uint32_t ci_imask[NIPL]; 121 uint32_t ci_iunmask[NIPL]; 122 123 u_int ci_flags; 124 uint32_t ci_ipis; 125 126 int32_t ci_cpuid_level; 127 uint32_t ci_signature; 128 uint32_t ci_feature_flags; 129 uint32_t ci_feature2_flags; 130 uint32_t ci_vendor[4]; /* vendor string */ 131 uint64_t ci_tsc_freq; 132 volatile uint32_t ci_lapic_counter; 133 134 const struct cpu_functions *ci_func; 135 void (*cpu_setup)(struct cpu_info *); 136 void (*ci_info)(struct cpu_info *); 137 138 int ci_want_resched; 139 struct trapframe *ci_ddb_regs; 140 141 struct x86_cache_info ci_cinfo[CAI_COUNT]; 142 143 char *ci_gdt; 144 145 struct evcnt ci_ipi_events[X86_NIPI]; 146 147 struct x86_64_tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 148 int ci_tss_sel; /* TSS selector of this cpu */ 149 150 /* 151 * The following two are actually region_descriptors, 152 * but that would pollute the namespace. 153 */ 154 uint64_t ci_suspend_gdt; 155 uint16_t ci_suspend_gdt_padding; 156 uint64_t ci_suspend_idt; 157 uint16_t ci_suspend_idt_padding; 158 159 uint16_t ci_suspend_tr; 160 uint16_t ci_suspend_ldt; 161 uint32_t ci_suspend_fs_base_l; 162 uint32_t ci_suspend_fs_base_h; 163 uint32_t ci_suspend_gs_base_l; 164 uint32_t ci_suspend_gs_base_h; 165 uint32_t ci_suspend_gs_kernelbase_l; 166 uint32_t ci_suspend_gs_kernelbase_h; 167 uint32_t ci_suspend_msr_efer; 168 uint64_t ci_suspend_rbx; 169 uint64_t ci_suspend_rbp; 170 uint64_t ci_suspend_rsp; 171 uint64_t ci_suspend_r12; 172 uint64_t ci_suspend_r13; 173 uint64_t ci_suspend_r14; 174 uint64_t ci_suspend_r15; 175 uint64_t ci_suspend_rfl; 176 uint64_t ci_suspend_cr0; 177 uint64_t ci_suspend_cr2; 178 uint64_t ci_suspend_cr3; 179 uint64_t ci_suspend_cr4; 180 uint64_t ci_suspend_cr8; 181}; 182 183#define CPUF_BSP 0x0001 /* CPU is the original BSP */ 184#define CPUF_AP 0x0002 /* CPU is an AP */ 185#define CPUF_SP 0x0004 /* CPU is only processor */ 186#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 187 188#define CPUF_PRESENT 0x1000 /* CPU is present */ 189#define CPUF_RUNNING 0x2000 /* CPU is running */ 190#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 191#define CPUF_GO 0x8000 /* CPU should start running */ 192 193 194extern struct cpu_info cpu_info_primary; 195extern struct cpu_info *cpu_info_list; 196 197#define CPU_INFO_ITERATOR int 198#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 199 ci != NULL; ci = ci->ci_next 200 201#define X86_MAXPROCS 32 /* bitmask; can be bumped to 64 */ 202 203#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 204#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 205#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 206 207#if defined(__GNUC__) && defined(_KERNEL) 208static struct cpu_info *x86_curcpu(void); 209static lwp_t *x86_curlwp(void); 210 211__inline static struct cpu_info * __unused 212x86_curcpu(void) 213{ 214 struct cpu_info *ci; 215 216 __asm volatile("movq %%gs:%1, %0" : 217 "=r" (ci) : 218 "m" 219 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 220 return ci; 221} 222 223__inline static lwp_t * __unused 224x86_curlwp(void) 225{ 226 lwp_t *l; 227 228 __asm volatile("movq %%gs:%1, %0" : 229 "=r" (l) : 230 "m" 231 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); 232 return l; 233} 234#else /* __GNUC__ && _KERNEL */ 235/* For non-GCC and LKMs */ 236struct cpu_info *x86_curcpu(void); 237lwp_t *x86_curlwp(void); 238#endif /* __GNUC__ && _KERNEL */ 239 240#define cpu_number() (curcpu()->ci_cpuid) 241 242#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 243 244extern struct cpu_info *cpu_info[X86_MAXPROCS]; 245 246void cpu_boot_secondary_processors(void); 247void cpu_init_idle_lwps(void); 248 249#define aston(l) ((l)->l_md.md_astpending = 1) 250 251extern uint32_t cpus_attached; 252 253#define curcpu() x86_curcpu() 254#define curlwp x86_curlwp() 255#define curpcb (&curlwp->l_addr->u_pcb) 256 257/* 258 * Arguments to hardclock, softclock and statclock 259 * encapsulate the previous machine state in an opaque 260 * clockframe; for now, use generic intrframe. 261 */ 262struct clockframe { 263 struct intrframe cf_if; 264}; 265 266#define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_tf.tf_cs, \ 267 (frame)->cf_if.if_tf.tf_rflags) 268#define CLKF_PC(frame) ((frame)->cf_if.if_tf.tf_rip) 269#define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 270 271/* 272 * This is used during profiling to integrate system time. It can safely 273 * assume that the process is resident. 274 */ 275#define LWP_PC(l) ((l)->l_md.md_regs->tf_rip) 276 277/* 278 * Give a profiling tick to the current process when the user profiling 279 * buffer pages are invalid. On the i386, request an ast to send us 280 * through trap(), marking the proc as needing a profiling tick. 281 */ 282extern void cpu_need_proftick(struct lwp *); 283 284/* 285 * Notify an LWP that it has a signal pending, process as soon as possible. 286 */ 287extern void cpu_signotify(struct lwp *); 288 289/* 290 * We need a machine-independent name for this. 291 */ 292extern void (*delay_func)(unsigned int); 293 294#define DELAY(x) (*delay_func)(x) 295#define delay(x) (*delay_func)(x) 296 297 298/* 299 * pull in #defines for kinds of processors 300 */ 301 302extern int biosbasemem; 303extern int biosextmem; 304extern int cpu; 305extern int cpu_feature; 306extern int cpu_feature2; 307extern int cpu_id; 308extern int cpuid_level; 309extern char cpu_vendorname[]; 310 311/* identcpu.c */ 312 313void identifycpu(struct cpu_info *); 314void cpu_probe_features(struct cpu_info *); 315 316/* machdep.c */ 317void dumpconf(void); 318void cpu_reset(void); 319void x86_64_proc0_tss_ldt_init(void); 320void x86_64_init_pcb_tss_ldt(struct cpu_info *); 321void cpu_proc_fork(struct proc *, struct proc *); 322 323struct region_descriptor; 324void lgdt(struct region_descriptor *); 325#ifdef XEN 326void lgdt_finish(void); 327#endif 328void fillw(short, void *, size_t); 329 330struct pcb; 331void savectx(struct pcb *); 332void lwp_trampoline(void); 333void child_trampoline(void); 334 335#ifdef XEN 336void startrtclock(void); 337void xen_delay(unsigned int); 338void xen_initclocks(void); 339#else 340/* clock.c */ 341void initrtclock(u_long); 342void startrtclock(void); 343void i8254_delay(unsigned int); 344void i8254_initclocks(void); 345#endif 346 347void cpu_init_msrs(struct cpu_info *, bool); 348 349 350/* vm_machdep.c */ 351int kvtop(void *); 352 353/* trap.c */ 354void child_return(void *); 355 356/* consinit.c */ 357void kgdb_port_init(void); 358 359/* bus_machdep.c */ 360void x86_bus_space_init(void); 361void x86_bus_space_mallocok(void); 362 363#endif /* _KERNEL */ 364 365#include <machine/psl.h> 366 367/* 368 * CTL_MACHDEP definitions. 369 */ 370#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 371#define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 372#define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 373#define CPU_NKPDE 4 /* int: number of kernel PDEs */ 374#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 375#define CPU_DISKINFO 6 /* disk geometry information */ 376#define CPU_FPU_PRESENT 7 /* FPU is present */ 377#define CPU_MAXID 8 /* number of valid machdep ids */ 378 379 380/* 381 * Structure for CPU_DISKINFO sysctl call. 382 * XXX this should be somewhere else. 383 */ 384#define MAX_BIOSDISKS 16 385 386struct disklist { 387 int dl_nbiosdisks; /* number of bios disks */ 388 struct biosdisk_info { 389 int bi_dev; /* BIOS device # (0x80 ..) */ 390 int bi_cyl; /* cylinders on disk */ 391 int bi_head; /* heads per track */ 392 int bi_sec; /* sectors per track */ 393 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 394#define BIFLAG_INVALID 0x01 395#define BIFLAG_EXTINT13 0x02 396 int bi_flags; 397 } dl_biosdisks[MAX_BIOSDISKS]; 398 399 int dl_nnativedisks; /* number of native disks */ 400 struct nativedisk_info { 401 char ni_devname[16]; /* native device name */ 402 int ni_nmatches; /* # of matches w/ BIOS */ 403 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 404 } dl_nativedisks[1]; /* actually longer */ 405}; 406 407#endif /* !_AMD64_CPU_H_ */ 408