cpu.h revision 1.52
1/* $NetBSD: cpu.h,v 1.52 2008/05/09 18:11:28 joerg Exp $ */ 2 3/*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37#ifndef _AMD64_CPU_H_ 38#define _AMD64_CPU_H_ 39 40#if defined(_KERNEL) 41#if defined(_KERNEL_OPT) 42#include "opt_multiprocessor.h" 43#include "opt_lockdebug.h" 44#include "opt_xen.h" 45#endif 46 47/* 48 * Definitions unique to x86-64 cpu support. 49 */ 50#include <machine/frame.h> 51#include <machine/segments.h> 52#include <machine/tss.h> 53#include <machine/intrdefs.h> 54#include <x86/cacheinfo.h> 55 56#include <sys/device.h> 57#include <sys/simplelock.h> 58#include <sys/cpu_data.h> 59#include <sys/cc_microtime.h> 60#include <sys/systm.h> 61 62struct pmap; 63 64struct cpu_info { 65 struct device *ci_dev; 66 struct cpu_info *ci_self; 67 68#ifdef XEN 69 volatile struct vcpu_info *ci_vcpu; 70#endif 71 72 /* 73 * Will be accessed by other CPUs. 74 */ 75 struct cpu_info *ci_next; 76 struct lwp *ci_curlwp; 77 struct pmap_cpu *ci_pmap_cpu; 78 struct lwp *ci_fpcurlwp; 79 int ci_fpsaving; 80 u_int ci_cpuid; 81 int ci_cpumask; /* (1 << CPU ID) */ 82 u_int ci_apicid; 83 uint8_t ci_initapicid; /* our intitial APIC ID */ 84 uint8_t ci_packageid; 85 uint8_t ci_coreid; 86 uint8_t ci_smtid; 87 struct cpu_data ci_data; /* MI per-cpu data */ 88 89 /* 90 * Private members. 91 */ 92 struct cc_microtime_state ci_cc __aligned(64);/* cc_microtime state */ 93 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 94 struct pmap *ci_pmap; /* current pmap */ 95 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 96 int ci_want_pmapload; /* pmap_load() is needed */ 97 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 98#define TLBSTATE_VALID 0 /* all user tlbs are valid */ 99#define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 100#define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 101 uint64_t ci_scratch; 102#ifdef XEN 103 struct iplsource *ci_isources[NIPL]; 104#else 105 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 106#endif 107 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 108 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 109 110 /* The following must be aligned for cmpxchg8b. */ 111 struct { 112 uint32_t ipending; 113 int ilevel; 114 } ci_istate __aligned(8); 115#define ci_ipending ci_istate.ipending 116#define ci_ilevel ci_istate.ilevel 117 118 int ci_idepth; 119 void * ci_intrstack; 120 uint32_t ci_imask[NIPL]; 121 uint32_t ci_iunmask[NIPL]; 122 123 u_int ci_flags; 124 uint32_t ci_ipis; 125 126 int32_t ci_cpuid_level; 127 uint32_t ci_signature; 128 uint32_t ci_feature_flags; 129 uint32_t ci_feature2_flags; 130 uint32_t ci_vendor[4]; /* vendor string */ 131 uint64_t ci_tsc_freq; 132 volatile uint32_t ci_lapic_counter; 133 134 const struct cpu_functions *ci_func; 135 void (*cpu_setup)(struct cpu_info *); 136 void (*ci_info)(struct cpu_info *); 137 138 struct trapframe *ci_ddb_regs; 139 140 struct x86_cache_info ci_cinfo[CAI_COUNT]; 141 142 char *ci_gdt; 143 144 struct evcnt ci_ipi_events[X86_NIPI]; 145 146 struct x86_64_tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 147 int ci_tss_sel; /* TSS selector of this cpu */ 148 149 /* 150 * The following two are actually region_descriptors, 151 * but that would pollute the namespace. 152 */ 153 uint64_t ci_suspend_gdt; 154 uint16_t ci_suspend_gdt_padding; 155 uint64_t ci_suspend_idt; 156 uint16_t ci_suspend_idt_padding; 157 158 uint16_t ci_suspend_tr; 159 uint16_t ci_suspend_ldt; 160 uint32_t ci_suspend_fs_base_l; 161 uint32_t ci_suspend_fs_base_h; 162 uint32_t ci_suspend_gs_base_l; 163 uint32_t ci_suspend_gs_base_h; 164 uint32_t ci_suspend_gs_kernelbase_l; 165 uint32_t ci_suspend_gs_kernelbase_h; 166 uint32_t ci_suspend_msr_efer; 167 uint64_t ci_suspend_rbx; 168 uint64_t ci_suspend_rbp; 169 uint64_t ci_suspend_rsp; 170 uint64_t ci_suspend_r12; 171 uint64_t ci_suspend_r13; 172 uint64_t ci_suspend_r14; 173 uint64_t ci_suspend_r15; 174 uint64_t ci_suspend_rfl; 175 uint64_t ci_suspend_cr0; 176 uint64_t ci_suspend_cr2; 177 uint64_t ci_suspend_cr3; 178 uint64_t ci_suspend_cr4; 179 uint64_t ci_suspend_cr8; 180 181 /* The following must be in a single cache line. */ 182 int ci_want_resched __aligned(64); 183 int ci_padout __aligned(64); 184}; 185 186#define CPUF_BSP 0x0001 /* CPU is the original BSP */ 187#define CPUF_AP 0x0002 /* CPU is an AP */ 188#define CPUF_SP 0x0004 /* CPU is only processor */ 189#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 190 191#define CPUF_PRESENT 0x1000 /* CPU is present */ 192#define CPUF_RUNNING 0x2000 /* CPU is running */ 193#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 194#define CPUF_GO 0x8000 /* CPU should start running */ 195 196 197extern struct cpu_info cpu_info_primary; 198extern struct cpu_info *cpu_info_list; 199 200#define CPU_INFO_ITERATOR int 201#define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 202 ci != NULL; ci = ci->ci_next 203 204#define X86_MAXPROCS 32 /* bitmask; can be bumped to 64 */ 205 206#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 207#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 208#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 209 210#if defined(__GNUC__) && !defined(_LKM) 211static struct cpu_info *x86_curcpu(void); 212static lwp_t *x86_curlwp(void); 213 214__inline static struct cpu_info * __unused 215x86_curcpu(void) 216{ 217 struct cpu_info *ci; 218 219 __asm volatile("movq %%gs:%1, %0" : 220 "=r" (ci) : 221 "m" 222 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); 223 return ci; 224} 225 226__inline static lwp_t * __unused 227x86_curlwp(void) 228{ 229 lwp_t *l; 230 231 __asm volatile("movq %%gs:%1, %0" : 232 "=r" (l) : 233 "m" 234 (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); 235 return l; 236} 237 238__inline static void __unused 239cpu_set_curpri(int pri) 240{ 241 242 __asm volatile( 243 "movl %1, %%gs:%0" : 244 "=m" (*(struct cpu_info *)offsetof(struct cpu_info, ci_schedstate.spc_curpriority)) : 245 "r" (pri) 246 ); 247} 248#else /* __GNUC__ && !_LKM */ 249/* For non-GCC and LKMs */ 250struct cpu_info *x86_curcpu(void); 251lwp_t *x86_curlwp(void); 252void cpu_set_curpri(int); 253#endif /* __GNUC__ && !_LKM */ 254 255#define cpu_number() (curcpu()->ci_cpuid) 256 257#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 258 259extern struct cpu_info *cpu_info[X86_MAXPROCS]; 260 261void cpu_boot_secondary_processors(void); 262void cpu_init_idle_lwps(void); 263 264#define X86_AST_GENERIC 0x01 265#define X86_AST_PREEMPT 0x02 266 267#define aston(l, why) ((l)->l_md.md_astpending |= (why)) 268#define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 269 270extern uint32_t cpus_attached; 271 272#define curcpu() x86_curcpu() 273#define curlwp x86_curlwp() 274#define curpcb (&curlwp->l_addr->u_pcb) 275 276/* 277 * Arguments to hardclock, softclock and statclock 278 * encapsulate the previous machine state in an opaque 279 * clockframe; for now, use generic intrframe. 280 */ 281struct clockframe { 282 struct intrframe cf_if; 283}; 284 285#define CLKF_USERMODE(frame) USERMODE((frame)->cf_if.if_tf.tf_cs, \ 286 (frame)->cf_if.if_tf.tf_rflags) 287#define CLKF_PC(frame) ((frame)->cf_if.if_tf.tf_rip) 288#define CLKF_INTR(frame) (curcpu()->ci_idepth > 0) 289 290/* 291 * This is used during profiling to integrate system time. It can safely 292 * assume that the process is resident. 293 */ 294#define LWP_PC(l) ((l)->l_md.md_regs->tf_rip) 295 296/* 297 * Give a profiling tick to the current process when the user profiling 298 * buffer pages are invalid. On the i386, request an ast to send us 299 * through trap(), marking the proc as needing a profiling tick. 300 */ 301extern void cpu_need_proftick(struct lwp *); 302 303/* 304 * Notify an LWP that it has a signal pending, process as soon as possible. 305 */ 306extern void cpu_signotify(struct lwp *); 307 308/* 309 * We need a machine-independent name for this. 310 */ 311extern void (*delay_func)(unsigned int); 312 313#define DELAY(x) (*delay_func)(x) 314#define delay(x) (*delay_func)(x) 315 316 317/* 318 * pull in #defines for kinds of processors 319 */ 320 321extern int biosbasemem; 322extern int biosextmem; 323extern int cpu; 324extern int cpu_feature; 325extern int cpu_feature2; 326extern int cpu_id; 327extern int cpuid_level; 328extern char cpu_vendorname[]; 329 330extern void (*x86_cpu_idle)(void); 331#define cpu_idle() (*x86_cpu_idle)() 332 333/* identcpu.c */ 334 335void identifycpu(struct cpu_info *); 336void cpu_probe_features(struct cpu_info *); 337 338/* machdep.c */ 339void dumpconf(void); 340void cpu_reset(void); 341void x86_64_proc0_tss_ldt_init(void); 342void x86_64_init_pcb_tss_ldt(struct cpu_info *); 343void cpu_proc_fork(struct proc *, struct proc *); 344 345struct region_descriptor; 346void lgdt(struct region_descriptor *); 347#ifdef XEN 348void lgdt_finish(void); 349#endif 350void fillw(short, void *, size_t); 351 352struct pcb; 353void savectx(struct pcb *); 354void lwp_trampoline(void); 355void child_trampoline(void); 356 357#ifdef XEN 358void startrtclock(void); 359void xen_delay(unsigned int); 360void xen_initclocks(void); 361#else 362/* clock.c */ 363void initrtclock(u_long); 364void startrtclock(void); 365void i8254_delay(unsigned int); 366void i8254_initclocks(void); 367#endif 368 369void cpu_init_msrs(struct cpu_info *, bool); 370 371 372/* vm_machdep.c */ 373int kvtop(void *); 374 375/* trap.c */ 376void child_return(void *); 377 378/* consinit.c */ 379void kgdb_port_init(void); 380 381/* bus_machdep.c */ 382void x86_bus_space_init(void); 383void x86_bus_space_mallocok(void); 384 385#endif /* _KERNEL */ 386 387#include <machine/psl.h> 388 389/* 390 * CTL_MACHDEP definitions. 391 */ 392#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 393#define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 394#define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 395#define CPU_NKPDE 4 /* int: number of kernel PDEs */ 396#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 397#define CPU_DISKINFO 6 /* disk geometry information */ 398#define CPU_FPU_PRESENT 7 /* FPU is present */ 399#define CPU_MAXID 8 /* number of valid machdep ids */ 400 401 402/* 403 * Structure for CPU_DISKINFO sysctl call. 404 * XXX this should be somewhere else. 405 */ 406#define MAX_BIOSDISKS 16 407 408struct disklist { 409 int dl_nbiosdisks; /* number of bios disks */ 410 struct biosdisk_info { 411 int bi_dev; /* BIOS device # (0x80 ..) */ 412 int bi_cyl; /* cylinders on disk */ 413 int bi_head; /* heads per track */ 414 int bi_sec; /* sectors per track */ 415 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 416#define BIFLAG_INVALID 0x01 417#define BIFLAG_EXTINT13 0x02 418 int bi_flags; 419 } dl_biosdisks[MAX_BIOSDISKS]; 420 421 int dl_nnativedisks; /* number of native disks */ 422 struct nativedisk_info { 423 char ni_devname[16]; /* native device name */ 424 int ni_nmatches; /* # of matches w/ BIOS */ 425 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 426 } dl_nativedisks[1]; /* actually longer */ 427}; 428 429#endif /* !_AMD64_CPU_H_ */ 430