frameasm.h revision 1.7 1 1.7 ad /* $NetBSD: frameasm.h,v 1.7 2007/11/14 11:09:49 ad Exp $ */
2 1.1 fvdl
3 1.1 fvdl #ifndef _AMD64_MACHINE_FRAMEASM_H
4 1.1 fvdl #define _AMD64_MACHINE_FRAMEASM_H
5 1.1 fvdl
6 1.1 fvdl /*
7 1.1 fvdl * Macros to define pushing/popping frames for interrupts, traps
8 1.1 fvdl * and system calls. Currently all the same; will diverge later.
9 1.1 fvdl */
10 1.1 fvdl
11 1.1 fvdl /*
12 1.1 fvdl * These are used on interrupt or trap entry or exit.
13 1.1 fvdl */
14 1.1 fvdl #define INTR_SAVE_GPRS \
15 1.1 fvdl subq $120,%rsp ; \
16 1.1 fvdl movq %r15,TF_R15(%rsp) ; \
17 1.1 fvdl movq %r14,TF_R14(%rsp) ; \
18 1.1 fvdl movq %r13,TF_R13(%rsp) ; \
19 1.1 fvdl movq %r12,TF_R12(%rsp) ; \
20 1.1 fvdl movq %r11,TF_R11(%rsp) ; \
21 1.1 fvdl movq %r10,TF_R10(%rsp) ; \
22 1.1 fvdl movq %r9,TF_R9(%rsp) ; \
23 1.1 fvdl movq %r8,TF_R8(%rsp) ; \
24 1.1 fvdl movq %rdi,TF_RDI(%rsp) ; \
25 1.1 fvdl movq %rsi,TF_RSI(%rsp) ; \
26 1.1 fvdl movq %rbp,TF_RBP(%rsp) ; \
27 1.1 fvdl movq %rbx,TF_RBX(%rsp) ; \
28 1.1 fvdl movq %rdx,TF_RDX(%rsp) ; \
29 1.1 fvdl movq %rcx,TF_RCX(%rsp) ; \
30 1.7 ad movq %rax,TF_RAX(%rsp) ; \
31 1.7 ad cld
32 1.1 fvdl
33 1.1 fvdl #define INTR_RESTORE_GPRS \
34 1.1 fvdl movq TF_R15(%rsp),%r15 ; \
35 1.1 fvdl movq TF_R14(%rsp),%r14 ; \
36 1.1 fvdl movq TF_R13(%rsp),%r13 ; \
37 1.1 fvdl movq TF_R12(%rsp),%r12 ; \
38 1.1 fvdl movq TF_R11(%rsp),%r11 ; \
39 1.1 fvdl movq TF_R10(%rsp),%r10 ; \
40 1.1 fvdl movq TF_R9(%rsp),%r9 ; \
41 1.1 fvdl movq TF_R8(%rsp),%r8 ; \
42 1.1 fvdl movq TF_RDI(%rsp),%rdi ; \
43 1.1 fvdl movq TF_RSI(%rsp),%rsi ; \
44 1.1 fvdl movq TF_RBP(%rsp),%rbp ; \
45 1.1 fvdl movq TF_RBX(%rsp),%rbx ; \
46 1.1 fvdl movq TF_RDX(%rsp),%rdx ; \
47 1.1 fvdl movq TF_RCX(%rsp),%rcx ; \
48 1.1 fvdl movq TF_RAX(%rsp),%rax ; \
49 1.1 fvdl addq $120,%rsp
50 1.1 fvdl
51 1.1 fvdl #define INTRENTRY \
52 1.1 fvdl subq $32,%rsp ; \
53 1.1 fvdl testq $SEL_UPL,56(%rsp) ; \
54 1.1 fvdl je 98f ; \
55 1.1 fvdl swapgs ; \
56 1.4 fvdl movw %gs,0(%rsp) ; \
57 1.4 fvdl movw %fs,8(%rsp) ; \
58 1.1 fvdl movw %es,16(%rsp) ; \
59 1.1 fvdl movw %ds,24(%rsp) ; \
60 1.1 fvdl 98: INTR_SAVE_GPRS
61 1.1 fvdl
62 1.1 fvdl #define INTRFASTEXIT \
63 1.1 fvdl INTR_RESTORE_GPRS ; \
64 1.1 fvdl testq $SEL_UPL,56(%rsp) ; \
65 1.1 fvdl je 99f ; \
66 1.1 fvdl cli ; \
67 1.1 fvdl swapgs ; \
68 1.4 fvdl movw 0(%rsp),%gs ; \
69 1.4 fvdl movw 8(%rsp),%fs ; \
70 1.1 fvdl movw 16(%rsp),%es ; \
71 1.1 fvdl movw 24(%rsp),%ds ; \
72 1.1 fvdl 99: addq $48,%rsp ; \
73 1.1 fvdl iretq
74 1.1 fvdl
75 1.1 fvdl #define INTR_RECURSE_HWFRAME \
76 1.1 fvdl movq %rsp,%r10 ; \
77 1.1 fvdl movl %ss,%r11d ; \
78 1.1 fvdl pushq %r11 ; \
79 1.1 fvdl pushq %r10 ; \
80 1.1 fvdl pushfq ; \
81 1.1 fvdl movl %cs,%r11d ; \
82 1.1 fvdl pushq %r11 ; \
83 1.1 fvdl pushq %r13 ;
84 1.1 fvdl
85 1.6 yamt #define DO_DEFERRED_SWITCH \
86 1.6 yamt cmpq $0, CPUVAR(WANT_PMAPLOAD) ; \
87 1.6 yamt jz 1f ; \
88 1.6 yamt call _C_LABEL(do_pmap_load) ; \
89 1.6 yamt 1:
90 1.6 yamt
91 1.6 yamt #define CHECK_DEFERRED_SWITCH \
92 1.6 yamt cmpq $0, CPUVAR(WANT_PMAPLOAD)
93 1.1 fvdl
94 1.2 ad #define CHECK_ASTPENDING(reg) cmpq $0, reg ; \
95 1.1 fvdl je 99f ; \
96 1.2 ad cmpl $0, L_MD_ASTPENDING(reg) ; \
97 1.1 fvdl 99:
98 1.1 fvdl
99 1.2 ad #define CLEAR_ASTPENDING(reg) movl $0, L_MD_ASTPENDING(reg)
100 1.1 fvdl
101 1.1 fvdl #endif /* _AMD64_MACHINE_FRAMEASM_H */
102