frameasm.h revision 1.8 1 1.8 bouyer /* $NetBSD: frameasm.h,v 1.8 2007/11/22 16:16:45 bouyer Exp $ */
2 1.1 fvdl
3 1.1 fvdl #ifndef _AMD64_MACHINE_FRAMEASM_H
4 1.1 fvdl #define _AMD64_MACHINE_FRAMEASM_H
5 1.8 bouyer #include "opt_xen.h"
6 1.1 fvdl
7 1.1 fvdl /*
8 1.1 fvdl * Macros to define pushing/popping frames for interrupts, traps
9 1.1 fvdl * and system calls. Currently all the same; will diverge later.
10 1.1 fvdl */
11 1.1 fvdl
12 1.8 bouyer #ifdef XEN
13 1.8 bouyer #define HYPERVISOR_iret hypercall_page + (__HYPERVISOR_iret * 32)
14 1.8 bouyer /* Xen do not need swapgs, done by hypervisor */
15 1.8 bouyer #define swapgs
16 1.8 bouyer #define iretq pushq $0 ; jmp HYPERVISOR_iret
17 1.8 bouyer #endif
18 1.8 bouyer
19 1.1 fvdl /*
20 1.1 fvdl * These are used on interrupt or trap entry or exit.
21 1.1 fvdl */
22 1.1 fvdl #define INTR_SAVE_GPRS \
23 1.1 fvdl subq $120,%rsp ; \
24 1.1 fvdl movq %r15,TF_R15(%rsp) ; \
25 1.1 fvdl movq %r14,TF_R14(%rsp) ; \
26 1.1 fvdl movq %r13,TF_R13(%rsp) ; \
27 1.1 fvdl movq %r12,TF_R12(%rsp) ; \
28 1.1 fvdl movq %r11,TF_R11(%rsp) ; \
29 1.1 fvdl movq %r10,TF_R10(%rsp) ; \
30 1.1 fvdl movq %r9,TF_R9(%rsp) ; \
31 1.1 fvdl movq %r8,TF_R8(%rsp) ; \
32 1.1 fvdl movq %rdi,TF_RDI(%rsp) ; \
33 1.1 fvdl movq %rsi,TF_RSI(%rsp) ; \
34 1.1 fvdl movq %rbp,TF_RBP(%rsp) ; \
35 1.1 fvdl movq %rbx,TF_RBX(%rsp) ; \
36 1.1 fvdl movq %rdx,TF_RDX(%rsp) ; \
37 1.1 fvdl movq %rcx,TF_RCX(%rsp) ; \
38 1.7 ad movq %rax,TF_RAX(%rsp) ; \
39 1.7 ad cld
40 1.1 fvdl
41 1.1 fvdl #define INTR_RESTORE_GPRS \
42 1.1 fvdl movq TF_R15(%rsp),%r15 ; \
43 1.1 fvdl movq TF_R14(%rsp),%r14 ; \
44 1.1 fvdl movq TF_R13(%rsp),%r13 ; \
45 1.1 fvdl movq TF_R12(%rsp),%r12 ; \
46 1.1 fvdl movq TF_R11(%rsp),%r11 ; \
47 1.1 fvdl movq TF_R10(%rsp),%r10 ; \
48 1.1 fvdl movq TF_R9(%rsp),%r9 ; \
49 1.1 fvdl movq TF_R8(%rsp),%r8 ; \
50 1.1 fvdl movq TF_RDI(%rsp),%rdi ; \
51 1.1 fvdl movq TF_RSI(%rsp),%rsi ; \
52 1.1 fvdl movq TF_RBP(%rsp),%rbp ; \
53 1.1 fvdl movq TF_RBX(%rsp),%rbx ; \
54 1.1 fvdl movq TF_RDX(%rsp),%rdx ; \
55 1.1 fvdl movq TF_RCX(%rsp),%rcx ; \
56 1.1 fvdl movq TF_RAX(%rsp),%rax ; \
57 1.1 fvdl addq $120,%rsp
58 1.1 fvdl
59 1.1 fvdl #define INTRENTRY \
60 1.1 fvdl subq $32,%rsp ; \
61 1.1 fvdl testq $SEL_UPL,56(%rsp) ; \
62 1.1 fvdl je 98f ; \
63 1.1 fvdl swapgs ; \
64 1.4 fvdl movw %gs,0(%rsp) ; \
65 1.4 fvdl movw %fs,8(%rsp) ; \
66 1.1 fvdl movw %es,16(%rsp) ; \
67 1.1 fvdl movw %ds,24(%rsp) ; \
68 1.1 fvdl 98: INTR_SAVE_GPRS
69 1.1 fvdl
70 1.8 bouyer #ifndef XEN
71 1.1 fvdl #define INTRFASTEXIT \
72 1.1 fvdl INTR_RESTORE_GPRS ; \
73 1.1 fvdl testq $SEL_UPL,56(%rsp) ; \
74 1.1 fvdl je 99f ; \
75 1.1 fvdl cli ; \
76 1.1 fvdl swapgs ; \
77 1.4 fvdl movw 0(%rsp),%gs ; \
78 1.4 fvdl movw 8(%rsp),%fs ; \
79 1.1 fvdl movw 16(%rsp),%es ; \
80 1.1 fvdl movw 24(%rsp),%ds ; \
81 1.1 fvdl 99: addq $48,%rsp ; \
82 1.1 fvdl iretq
83 1.1 fvdl
84 1.1 fvdl #define INTR_RECURSE_HWFRAME \
85 1.1 fvdl movq %rsp,%r10 ; \
86 1.1 fvdl movl %ss,%r11d ; \
87 1.1 fvdl pushq %r11 ; \
88 1.1 fvdl pushq %r10 ; \
89 1.1 fvdl pushfq ; \
90 1.1 fvdl movl %cs,%r11d ; \
91 1.1 fvdl pushq %r11 ; \
92 1.1 fvdl pushq %r13 ;
93 1.1 fvdl
94 1.8 bouyer #else /* !XEN */
95 1.8 bouyer /*
96 1.8 bouyer * Disabling events before going to user mode sounds like a BAD idea
97 1.8 bouyer * do no restore gs either, HYPERVISOR_iret will do a swapgs
98 1.8 bouyer */
99 1.8 bouyer #define INTRFASTEXIT \
100 1.8 bouyer INTR_RESTORE_GPRS ; \
101 1.8 bouyer testq $SEL_UPL,56(%rsp) ; \
102 1.8 bouyer je 99f ; \
103 1.8 bouyer movw 8(%rsp),%fs ; \
104 1.8 bouyer movw 16(%rsp),%es ; \
105 1.8 bouyer movw 24(%rsp),%ds ; \
106 1.8 bouyer 99: addq $48,%rsp ; \
107 1.8 bouyer iretq
108 1.8 bouyer
109 1.8 bouyer /* We must fixup CS, as even kernel mode runs at CPL 3 */
110 1.8 bouyer #define INTR_RECURSE_HWFRAME \
111 1.8 bouyer movq %rsp,%r10 ; \
112 1.8 bouyer movl %ss,%r11d ; \
113 1.8 bouyer pushq %r11 ; \
114 1.8 bouyer pushq %r10 ; \
115 1.8 bouyer pushfq ; \
116 1.8 bouyer movl %cs,%r11d ; \
117 1.8 bouyer pushq %r11 ; \
118 1.8 bouyer andb $0xfc,(%rsp) ; \
119 1.8 bouyer pushq %r13 ;
120 1.8 bouyer
121 1.8 bouyer #endif /* !XEN */
122 1.8 bouyer
123 1.6 yamt #define DO_DEFERRED_SWITCH \
124 1.6 yamt cmpq $0, CPUVAR(WANT_PMAPLOAD) ; \
125 1.6 yamt jz 1f ; \
126 1.6 yamt call _C_LABEL(do_pmap_load) ; \
127 1.6 yamt 1:
128 1.6 yamt
129 1.6 yamt #define CHECK_DEFERRED_SWITCH \
130 1.6 yamt cmpq $0, CPUVAR(WANT_PMAPLOAD)
131 1.1 fvdl
132 1.2 ad #define CHECK_ASTPENDING(reg) cmpq $0, reg ; \
133 1.1 fvdl je 99f ; \
134 1.2 ad cmpl $0, L_MD_ASTPENDING(reg) ; \
135 1.1 fvdl 99:
136 1.1 fvdl
137 1.2 ad #define CLEAR_ASTPENDING(reg) movl $0, L_MD_ASTPENDING(reg)
138 1.1 fvdl
139 1.8 bouyer #ifdef XEN
140 1.8 bouyer #define CLI(reg1,reg2) \
141 1.8 bouyer movl CPUVAR(CPUID),%e/**/reg1 ; \
142 1.8 bouyer shlq $6,%r/**/reg1 ; \
143 1.8 bouyer movq _C_LABEL(HYPERVISOR_shared_info),%r/**/reg2 ; \
144 1.8 bouyer addq %r/**/reg1,%r/**/reg2 ; \
145 1.8 bouyer movb $1,EVTCHN_UPCALL_MASK(%r/**/reg2)
146 1.8 bouyer #define STI(reg1,reg2) \
147 1.8 bouyer movl CPUVAR(CPUID),%e/**/reg1 ; \
148 1.8 bouyer shlq $6,%r/**/reg1 ; \
149 1.8 bouyer movq _C_LABEL(HYPERVISOR_shared_info),%r/**/reg2 ; \
150 1.8 bouyer addq %r/**/reg1,%r/**/reg2 ; \
151 1.8 bouyer movb $0,EVTCHN_UPCALL_MASK(%r/**/reg2)
152 1.8 bouyer #else /* XEN */
153 1.8 bouyer #define CLI(reg1,reg2) cli
154 1.8 bouyer #define STI(reg1,reg2) sti
155 1.8 bouyer #endif /* XEN */
156 1.8 bouyer
157 1.1 fvdl #endif /* _AMD64_MACHINE_FRAMEASM_H */
158