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frameasm.h revision 1.12.14.1 
      1 /*	$NetBSD: frameasm.h,v 1.12.14.1 2012/06/12 20:43:59 riz Exp $	*/
      2 
      3 #ifndef _AMD64_MACHINE_FRAMEASM_H
      4 #define _AMD64_MACHINE_FRAMEASM_H
      5 #include "opt_xen.h"
      6 
      7 /*
      8  * Macros to define pushing/popping frames for interrupts, traps
      9  * and system calls. Currently all the same; will diverge later.
     10  */
     11 
     12 #ifdef XEN
     13 #define HYPERVISOR_iret hypercall_page + (__HYPERVISOR_iret * 32)
     14 /* Xen do not need swapgs, done by hypervisor */
     15 #define swapgs
     16 #define iretq	pushq $0 ; jmp HYPERVISOR_iret
     17 #endif
     18 
     19 /*
     20  * These are used on interrupt or trap entry or exit.
     21  */
     22 #define INTR_SAVE_GPRS \
     23 	movq	%rdi,TF_RDI(%rsp)	; \
     24 	movq	%rsi,TF_RSI(%rsp)	; \
     25 	movq	%rdx,TF_RDX(%rsp)	; \
     26 	movq	%rcx,TF_RCX(%rsp)	; \
     27 	movq	%r8,TF_R8(%rsp)		; \
     28 	movq	%r9,TF_R9(%rsp)		; \
     29 	movq	%r10,TF_R10(%rsp)	; \
     30 	movq	%r11,TF_R11(%rsp)	; \
     31 	movq	%r12,TF_R12(%rsp)	; \
     32 	movq	%r13,TF_R13(%rsp)	; \
     33 	movq	%r14,TF_R14(%rsp)	; \
     34 	movq	%r15,TF_R15(%rsp)	; \
     35 	movq	%rbp,TF_RBP(%rsp)	; \
     36 	movq	%rbx,TF_RBX(%rsp)	; \
     37 	movq	%rax,TF_RAX(%rsp)	; \
     38 	cld
     39 
     40 #define	INTR_RESTORE_GPRS \
     41 	movq	TF_RDI(%rsp),%rdi	; \
     42 	movq	TF_RSI(%rsp),%rsi	; \
     43 	movq	TF_RDX(%rsp),%rdx	; \
     44 	movq	TF_RCX(%rsp),%rcx	; \
     45 	movq	TF_R8(%rsp),%r8		; \
     46 	movq	TF_R9(%rsp),%r9		; \
     47 	movq	TF_R10(%rsp),%r10	; \
     48 	movq	TF_R11(%rsp),%r11	; \
     49 	movq	TF_R12(%rsp),%r12	; \
     50 	movq	TF_R13(%rsp),%r13	; \
     51 	movq	TF_R14(%rsp),%r14	; \
     52 	movq	TF_R15(%rsp),%r15	; \
     53 	movq	TF_RBP(%rsp),%rbp	; \
     54 	movq	TF_RBX(%rsp),%rbx	; \
     55 	movq	TF_RAX(%rsp),%rax
     56 
     57 
     58 #define	INTRENTRY_L(kernel_trap, usertrap) \
     59 	subq	$TF_REGSIZE,%rsp	; \
     60 	INTR_SAVE_GPRS			; \
     61 	testb	$SEL_UPL,TF_CS(%rsp)	; \
     62 	je	kernel_trap		; \
     63 usertrap				; \
     64 	swapgs				; \
     65 	movw	%gs,TF_GS(%rsp)		; \
     66 	movw	%fs,TF_FS(%rsp)		; \
     67 	movw	%es,TF_ES(%rsp)		; \
     68 	movw	%ds,TF_DS(%rsp)
     69 
     70 #define	INTRENTRY \
     71 	INTRENTRY_L(98f,)		; \
     72 98:
     73 
     74 #ifndef XEN
     75 #define INTRFASTEXIT \
     76 	INTR_RESTORE_GPRS 		; \
     77 	testq	$SEL_UPL,TF_CS(%rsp)	/* Interrupted %cs */ ; \
     78 	je	99f			; \
     79 	cli				; \
     80 	movw	TF_FS(%rsp),%fs		; \
     81 	movw	TF_ES(%rsp),%es		; \
     82 	movw	TF_DS(%rsp),%ds		; \
     83 	swapgs				; \
     84 	movw	TF_GS(%rsp),%gs		; /* can fault */ \
     85 99:	addq	$TF_REGSIZE+16,%rsp	/* + T_xxx and error code */ ; \
     86 	iretq
     87 
     88 #define INTR_RECURSE_HWFRAME \
     89 	movq	%rsp,%r10		; \
     90 	movl	%ss,%r11d		; \
     91 	pushq	%r11			; \
     92 	pushq	%r10			; \
     93 	pushfq				; \
     94 	movl	%cs,%r11d		; \
     95 	pushq	%r11			; \
     96 	pushq	%r13			;
     97 
     98 #else	/* !XEN */
     99 /*
    100  * Disabling events before going to user mode sounds like a BAD idea
    101  * do no restore gs either, HYPERVISOR_iret will do a swapgs
    102  */
    103 #define INTRFASTEXIT \
    104  	INTR_RESTORE_GPRS 		; \
    105  	testq	$SEL_UPL,TF_CS(%rsp)	; \
    106  	je	99f			; \
    107  	movw	TF_FS(%rsp),%fs		; \
    108  	movw	TF_ES(%rsp),%es		; \
    109  	movw	TF_DS(%rsp),%ds		; \
    110 99:	addq	$TF_REGSIZE+16,%rsp	/* + T_xxx and error code */ ; \
    111  	iretq
    112 
    113 /* We must fixup CS, as even kernel mode runs at CPL 3 */
    114 #define INTR_RECURSE_HWFRAME \
    115  	movq	%rsp,%r10		; \
    116  	movl	%ss,%r11d		; \
    117  	pushq	%r11			; \
    118  	pushq	%r10			; \
    119  	pushfq				; \
    120  	movl	%cs,%r11d		; \
    121  	pushq	%r11			; \
    122  	andb	$0xfc,(%rsp)		; \
    123  	pushq	%r13			;
    124 
    125 #endif	/* !XEN */
    126 
    127 #define	DO_DEFERRED_SWITCH \
    128 	cmpq	$0, CPUVAR(WANT_PMAPLOAD)		; \
    129 	jz	1f					; \
    130 	call	_C_LABEL(do_pmap_load)			; \
    131 	1:
    132 
    133 #define	CHECK_DEFERRED_SWITCH \
    134 	cmpq	$0, CPUVAR(WANT_PMAPLOAD)
    135 
    136 #define CHECK_ASTPENDING(reg)	cmpl	$0, L_MD_ASTPENDING(reg)
    137 #define CLEAR_ASTPENDING(reg)	movl	$0, L_MD_ASTPENDING(reg)
    138 
    139 #ifdef XEN
    140 #define CLI(temp_reg) \
    141  	movl CPUVAR(CPUID),%e/**/temp_reg ;			\
    142  	shlq $6,%r/**/temp_reg ;				\
    143  	addq CPUVAR(VCPU),%r/**/temp_reg ;			\
    144  	movb $1,EVTCHN_UPCALL_MASK(%r/**/temp_reg)
    145 #define STI(temp_reg) \
    146  	movl CPUVAR(CPUID),%e/**/temp_reg ;			\
    147  	shlq $6,%r/**/temp_reg ;				\
    148  	addq CPUVAR(VCPU),%r/**/temp_reg ;			\
    149  	movb $0,EVTCHN_UPCALL_MASK(%r/**/temp_reg)
    150 #else /* XEN */
    151 #define CLI(temp_reg) cli
    152 #define STI(temp_reg) sti
    153 #endif	/* XEN */
    154 
    155 #endif /* _AMD64_MACHINE_FRAMEASM_H */
    156