frameasm.h revision 1.18 1 /* $NetBSD: frameasm.h,v 1.18 2012/05/07 21:04:09 dsl Exp $ */
2
3 #ifndef _AMD64_MACHINE_FRAMEASM_H
4 #define _AMD64_MACHINE_FRAMEASM_H
5
6 #ifdef _KERNEL_OPT
7 #include "opt_xen.h"
8 #endif
9
10 /*
11 * Macros to define pushing/popping frames for interrupts, traps
12 * and system calls. Currently all the same; will diverge later.
13 */
14
15 #ifdef XEN
16 #define HYPERVISOR_iret hypercall_page + (__HYPERVISOR_iret * 32)
17 /* Xen do not need swapgs, done by hypervisor */
18 #define swapgs
19 #define iretq pushq $0 ; jmp HYPERVISOR_iret
20 #define XEN_ONLY2(x,y) x,y
21 #define NOT_XEN(x)
22
23 #define CLI(temp_reg) \
24 movq CPUVAR(VCPU),%r ## temp_reg ; \
25 movb $1,EVTCHN_UPCALL_MASK(%r ## temp_reg);
26
27 #define STI(temp_reg) \
28 movq CPUVAR(VCPU),%r ## temp_reg ; \
29 movb $0,EVTCHN_UPCALL_MASK(%r ## temp_reg);
30
31 #else /* XEN */
32 #define XEN_ONLY2(x,y)
33 #define NOT_XEN(x) x
34 #define CLI(temp_reg) cli
35 #define STI(temp_reg) sti
36 #endif /* XEN */
37
38 /*
39 * These are used on interrupt or trap entry or exit.
40 */
41 #define INTR_SAVE_GPRS \
42 movq %rdi,TF_RDI(%rsp) ; \
43 movq %rsi,TF_RSI(%rsp) ; \
44 movq %rdx,TF_RDX(%rsp) ; \
45 movq %rcx,TF_RCX(%rsp) ; \
46 movq %r8,TF_R8(%rsp) ; \
47 movq %r9,TF_R9(%rsp) ; \
48 movq %r10,TF_R10(%rsp) ; \
49 movq %r11,TF_R11(%rsp) ; \
50 movq %r12,TF_R12(%rsp) ; \
51 movq %r13,TF_R13(%rsp) ; \
52 movq %r14,TF_R14(%rsp) ; \
53 movq %r15,TF_R15(%rsp) ; \
54 movq %rbp,TF_RBP(%rsp) ; \
55 movq %rbx,TF_RBX(%rsp) ; \
56 movq %rax,TF_RAX(%rsp) ; \
57 cld
58
59 #define INTR_RESTORE_GPRS \
60 movq TF_RDI(%rsp),%rdi ; \
61 movq TF_RSI(%rsp),%rsi ; \
62 movq TF_RDX(%rsp),%rdx ; \
63 movq TF_RCX(%rsp),%rcx ; \
64 movq TF_R8(%rsp),%r8 ; \
65 movq TF_R9(%rsp),%r9 ; \
66 movq TF_R10(%rsp),%r10 ; \
67 movq TF_R11(%rsp),%r11 ; \
68 movq TF_R12(%rsp),%r12 ; \
69 movq TF_R13(%rsp),%r13 ; \
70 movq TF_R14(%rsp),%r14 ; \
71 movq TF_R15(%rsp),%r15 ; \
72 movq TF_RBP(%rsp),%rbp ; \
73 movq TF_RBX(%rsp),%rbx ; \
74 movq TF_RAX(%rsp),%rax
75
76 #define INTRENTRY_L(kernel_trap) \
77 subq $TF_REGSIZE,%rsp ; \
78 INTR_SAVE_GPRS ; \
79 testb $SEL_UPL,TF_CS(%rsp) ; \
80 je kernel_trap ; \
81 swapgs ; \
82 movw %gs,TF_GS(%rsp) ; \
83 movw %fs,TF_FS(%rsp) ; \
84 movw %es,TF_ES(%rsp) ; \
85 movw %ds,TF_DS(%rsp)
86
87 #define INTRENTRY \
88 INTRENTRY_L(98f) ; \
89 98:
90
91 #define INTRFASTEXIT \
92 INTR_RESTORE_GPRS ; \
93 testq $SEL_UPL,TF_CS(%rsp) /* Interrupted %cs */ ; \
94 je 99f ; \
95 /* XEN: Disabling events before going to user mode sounds like a BAD idea */ \
96 NOT_XEN(cli;) \
97 movw TF_ES(%rsp),%es ; \
98 movw TF_DS(%rsp),%ds ; \
99 swapgs ; \
100 99: addq $TF_REGSIZE+16,%rsp /* + T_xxx and error code */ ; \
101 iretq
102
103 #define INTR_RECURSE_HWFRAME \
104 movq %rsp,%r10 ; \
105 movl %ss,%r11d ; \
106 pushq %r11 ; \
107 pushq %r10 ; \
108 pushfq ; \
109 movl %cs,%r11d ; \
110 pushq %r11 ; \
111 /* XEN: We must fixup CS, as even kernel mode runs at CPL 3 */ \
112 XEN_ONLY2(andb $0xfc,(%rsp);) \
113 pushq %r13 ;
114
115 #define DO_DEFERRED_SWITCH \
116 cmpl $0, CPUVAR(WANT_PMAPLOAD) ; \
117 jz 1f ; \
118 call _C_LABEL(do_pmap_load) ; \
119 1:
120
121 #define CHECK_DEFERRED_SWITCH \
122 cmpl $0, CPUVAR(WANT_PMAPLOAD)
123
124 #define CHECK_ASTPENDING(reg) cmpl $0, L_MD_ASTPENDING(reg)
125 #define CLEAR_ASTPENDING(reg) movl $0, L_MD_ASTPENDING(reg)
126
127 #endif /* _AMD64_MACHINE_FRAMEASM_H */
128