Home | History | Annotate | Line # | Download | only in include
frameasm.h revision 1.23 
      1 /*	$NetBSD: frameasm.h,v 1.23 2017/10/17 07:33:44 maxv Exp $	*/
      2 
      3 #ifndef _AMD64_MACHINE_FRAMEASM_H
      4 #define _AMD64_MACHINE_FRAMEASM_H
      5 
      6 #ifdef _KERNEL_OPT
      7 #include "opt_xen.h"
      8 #endif
      9 
     10 /*
     11  * Macros to define pushing/popping frames for interrupts, traps
     12  * and system calls. Currently all the same; will diverge later.
     13  */
     14 
     15 #ifdef XEN
     16 #define HYPERVISOR_iret hypercall_page + (__HYPERVISOR_iret * 32)
     17 /* Xen do not need swapgs, done by hypervisor */
     18 #define swapgs
     19 #define iretq	pushq $0 ; jmp HYPERVISOR_iret
     20 #define	XEN_ONLY2(x,y)	x,y
     21 #define	NOT_XEN(x)
     22 
     23 #define CLI(temp_reg) \
     24  	movq CPUVAR(VCPU),%r ## temp_reg ;			\
     25 	movb $1,EVTCHN_UPCALL_MASK(%r ## temp_reg);
     26 
     27 #define STI(temp_reg) \
     28  	movq CPUVAR(VCPU),%r ## temp_reg ;			\
     29 	movb $0,EVTCHN_UPCALL_MASK(%r ## temp_reg);
     30 
     31 #else /* XEN */
     32 #define	XEN_ONLY2(x,y)
     33 #define	NOT_XEN(x)	x
     34 #define CLI(temp_reg) cli
     35 #define STI(temp_reg) sti
     36 #endif	/* XEN */
     37 
     38 #define	SWAPGS	NOT_XEN(swapgs)
     39 
     40 /*
     41  * These are used on interrupt or trap entry or exit.
     42  */
     43 #define INTR_SAVE_GPRS \
     44 	movq	%rdi,TF_RDI(%rsp)	; \
     45 	movq	%rsi,TF_RSI(%rsp)	; \
     46 	movq	%rdx,TF_RDX(%rsp)	; \
     47 	movq	%rcx,TF_RCX(%rsp)	; \
     48 	movq	%r8,TF_R8(%rsp)		; \
     49 	movq	%r9,TF_R9(%rsp)		; \
     50 	movq	%r10,TF_R10(%rsp)	; \
     51 	movq	%r11,TF_R11(%rsp)	; \
     52 	movq	%r12,TF_R12(%rsp)	; \
     53 	movq	%r13,TF_R13(%rsp)	; \
     54 	movq	%r14,TF_R14(%rsp)	; \
     55 	movq	%r15,TF_R15(%rsp)	; \
     56 	movq	%rbp,TF_RBP(%rsp)	; \
     57 	movq	%rbx,TF_RBX(%rsp)	; \
     58 	movq	%rax,TF_RAX(%rsp)
     59 
     60 #define	INTR_RESTORE_GPRS \
     61 	movq	TF_RDI(%rsp),%rdi	; \
     62 	movq	TF_RSI(%rsp),%rsi	; \
     63 	movq	TF_RDX(%rsp),%rdx	; \
     64 	movq	TF_RCX(%rsp),%rcx	; \
     65 	movq	TF_R8(%rsp),%r8		; \
     66 	movq	TF_R9(%rsp),%r9		; \
     67 	movq	TF_R10(%rsp),%r10	; \
     68 	movq	TF_R11(%rsp),%r11	; \
     69 	movq	TF_R12(%rsp),%r12	; \
     70 	movq	TF_R13(%rsp),%r13	; \
     71 	movq	TF_R14(%rsp),%r14	; \
     72 	movq	TF_R15(%rsp),%r15	; \
     73 	movq	TF_RBP(%rsp),%rbp	; \
     74 	movq	TF_RBX(%rsp),%rbx	; \
     75 	movq	TF_RAX(%rsp),%rax
     76 
     77 #define	INTRENTRY_L(kernel_trap, usertrap) \
     78 	subq	$TF_REGSIZE,%rsp	; \
     79 	INTR_SAVE_GPRS			; \
     80 	cld				; \
     81 	callq	smap_enable		; \
     82 	testb	$SEL_UPL,TF_CS(%rsp)	; \
     83 	je	kernel_trap		; \
     84 usertrap				; \
     85 	SWAPGS				; \
     86 	movw	%gs,TF_GS(%rsp)		; \
     87 	movw	%fs,TF_FS(%rsp)		; \
     88 	movw	%es,TF_ES(%rsp)		; \
     89 	movw	%ds,TF_DS(%rsp)
     90 
     91 #define	INTRENTRY \
     92 	INTRENTRY_L(98f,)		; \
     93 98:
     94 
     95 #define INTRFASTEXIT \
     96 	jmp	intrfastexit
     97 
     98 #define INTR_RECURSE_HWFRAME \
     99 	movq	%rsp,%r10		; \
    100 	movl	%ss,%r11d		; \
    101 	pushq	%r11			; \
    102 	pushq	%r10			; \
    103 	pushfq				; \
    104 	movl	%cs,%r11d		; \
    105 	pushq	%r11			; \
    106 /* XEN: We must fixup CS, as even kernel mode runs at CPL 3 */ \
    107  	XEN_ONLY2(andb	$0xfc,(%rsp);)	  \
    108 	pushq	%r13			;
    109 
    110 #define	DO_DEFERRED_SWITCH \
    111 	cmpl	$0, CPUVAR(WANT_PMAPLOAD)		; \
    112 	jz	1f					; \
    113 	call	_C_LABEL(do_pmap_load)			; \
    114 1:
    115 
    116 #define	CHECK_DEFERRED_SWITCH \
    117 	cmpl	$0, CPUVAR(WANT_PMAPLOAD)
    118 
    119 #define CHECK_ASTPENDING(reg)	cmpl	$0, L_MD_ASTPENDING(reg)
    120 #define CLEAR_ASTPENDING(reg)	movl	$0, L_MD_ASTPENDING(reg)
    121 
    122 #endif /* _AMD64_MACHINE_FRAMEASM_H */
    123