frameasm.h revision 1.26 1 /* $NetBSD: frameasm.h,v 1.26 2018/01/07 13:43:23 maxv Exp $ */
2
3 #ifndef _AMD64_MACHINE_FRAMEASM_H
4 #define _AMD64_MACHINE_FRAMEASM_H
5
6 #ifdef _KERNEL_OPT
7 #include "opt_xen.h"
8 #endif
9
10 /*
11 * Macros to define pushing/popping frames for interrupts, traps
12 * and system calls. Currently all the same; will diverge later.
13 */
14
15 #ifdef XEN
16 #define HYPERVISOR_iret hypercall_page + (__HYPERVISOR_iret * 32)
17 /* Xen do not need swapgs, done by hypervisor */
18 #define swapgs
19 #define iretq pushq $0 ; jmp HYPERVISOR_iret
20 #define XEN_ONLY2(x,y) x,y
21 #define NOT_XEN(x)
22
23 #define CLI(temp_reg) \
24 movq CPUVAR(VCPU),%r ## temp_reg ; \
25 movb $1,EVTCHN_UPCALL_MASK(%r ## temp_reg);
26
27 #define STI(temp_reg) \
28 movq CPUVAR(VCPU),%r ## temp_reg ; \
29 movb $0,EVTCHN_UPCALL_MASK(%r ## temp_reg);
30
31 #else /* XEN */
32 #define XEN_ONLY2(x,y)
33 #define NOT_XEN(x) x
34 #define CLI(temp_reg) cli
35 #define STI(temp_reg) sti
36 #endif /* XEN */
37
38 #define HP_NAME_CLAC 1
39 #define HP_NAME_STAC 2
40 #define HP_NAME_NOLOCK 3
41 #define HP_NAME_RETFENCE 4
42
43 #define HOTPATCH(name, size) \
44 123: ; \
45 .section .rodata.hotpatch, "a" ; \
46 .byte name ; \
47 .byte size ; \
48 .quad 123b ; \
49 .previous
50
51 #define SMAP_ENABLE \
52 HOTPATCH(HP_NAME_CLAC, 3) ; \
53 .byte 0x0F, 0x1F, 0x00 ; \
54
55 #define SMAP_DISABLE \
56 HOTPATCH(HP_NAME_STAC, 3) ; \
57 .byte 0x0F, 0x1F, 0x00 ; \
58
59 #define SWAPGS NOT_XEN(swapgs)
60
61 /*
62 * These are used on interrupt or trap entry or exit.
63 */
64 #define INTR_SAVE_GPRS \
65 movq %rdi,TF_RDI(%rsp) ; \
66 movq %rsi,TF_RSI(%rsp) ; \
67 movq %rdx,TF_RDX(%rsp) ; \
68 movq %rcx,TF_RCX(%rsp) ; \
69 movq %r8,TF_R8(%rsp) ; \
70 movq %r9,TF_R9(%rsp) ; \
71 movq %r10,TF_R10(%rsp) ; \
72 movq %r11,TF_R11(%rsp) ; \
73 movq %r12,TF_R12(%rsp) ; \
74 movq %r13,TF_R13(%rsp) ; \
75 movq %r14,TF_R14(%rsp) ; \
76 movq %r15,TF_R15(%rsp) ; \
77 movq %rbp,TF_RBP(%rsp) ; \
78 movq %rbx,TF_RBX(%rsp) ; \
79 movq %rax,TF_RAX(%rsp)
80
81 #define INTR_RESTORE_GPRS \
82 movq TF_RDI(%rsp),%rdi ; \
83 movq TF_RSI(%rsp),%rsi ; \
84 movq TF_RDX(%rsp),%rdx ; \
85 movq TF_RCX(%rsp),%rcx ; \
86 movq TF_R8(%rsp),%r8 ; \
87 movq TF_R9(%rsp),%r9 ; \
88 movq TF_R10(%rsp),%r10 ; \
89 movq TF_R11(%rsp),%r11 ; \
90 movq TF_R12(%rsp),%r12 ; \
91 movq TF_R13(%rsp),%r13 ; \
92 movq TF_R14(%rsp),%r14 ; \
93 movq TF_R15(%rsp),%r15 ; \
94 movq TF_RBP(%rsp),%rbp ; \
95 movq TF_RBX(%rsp),%rbx ; \
96 movq TF_RAX(%rsp),%rax
97
98 #define INTRENTRY_L(kernel_trap, usertrap) \
99 subq $TF_REGSIZE,%rsp ; \
100 INTR_SAVE_GPRS ; \
101 cld ; \
102 SMAP_ENABLE ; \
103 testb $SEL_UPL,TF_CS(%rsp) ; \
104 je kernel_trap ; \
105 usertrap ; \
106 SWAPGS ; \
107 movw %gs,TF_GS(%rsp) ; \
108 movw %fs,TF_FS(%rsp) ; \
109 movw %es,TF_ES(%rsp) ; \
110 movw %ds,TF_DS(%rsp)
111
112 #define INTRENTRY \
113 INTRENTRY_L(98f,) ; \
114 98:
115
116 #define INTRFASTEXIT \
117 jmp intrfastexit
118
119 #define INTR_RECURSE_HWFRAME \
120 movq %rsp,%r10 ; \
121 movl %ss,%r11d ; \
122 pushq %r11 ; \
123 pushq %r10 ; \
124 pushfq ; \
125 movl %cs,%r11d ; \
126 pushq %r11 ; \
127 /* XEN: We must fixup CS, as even kernel mode runs at CPL 3 */ \
128 XEN_ONLY2(andb $0xfc,(%rsp);) \
129 pushq %r13 ;
130
131 #define DO_DEFERRED_SWITCH \
132 cmpl $0, CPUVAR(WANT_PMAPLOAD) ; \
133 jz 1f ; \
134 call _C_LABEL(do_pmap_load) ; \
135 1:
136
137 #define CHECK_DEFERRED_SWITCH \
138 cmpl $0, CPUVAR(WANT_PMAPLOAD)
139
140 #define CHECK_ASTPENDING(reg) cmpl $0, L_MD_ASTPENDING(reg)
141 #define CLEAR_ASTPENDING(reg) movl $0, L_MD_ASTPENDING(reg)
142
143 #endif /* _AMD64_MACHINE_FRAMEASM_H */
144