frameasm.h revision 1.4.14.1
1 /* $NetBSD: frameasm.h,v 1.4.14.1 2007/10/17 21:38:17 bouyer Exp $ */ 2 3 #ifndef _AMD64_MACHINE_FRAMEASM_H 4 #define _AMD64_MACHINE_FRAMEASM_H 5 #include "opt_xen.h" 6 7 /* 8 * Macros to define pushing/popping frames for interrupts, traps 9 * and system calls. Currently all the same; will diverge later. 10 */ 11 12 #ifdef XEN 13 #define HYPERVISOR_iret hypercall_page + (__HYPERVISOR_iret * 32) 14 /* Xen do not need swapgs, done by hypervisor */ 15 #define swapgs 16 #define iretq subq $8,%rsp ; jmp HYPERVISOR_iret 17 #endif 18 19 /* 20 * These are used on interrupt or trap entry or exit. 21 */ 22 #define INTR_SAVE_GPRS \ 23 subq $120,%rsp ; \ 24 movq %r15,TF_R15(%rsp) ; \ 25 movq %r14,TF_R14(%rsp) ; \ 26 movq %r13,TF_R13(%rsp) ; \ 27 movq %r12,TF_R12(%rsp) ; \ 28 movq %r11,TF_R11(%rsp) ; \ 29 movq %r10,TF_R10(%rsp) ; \ 30 movq %r9,TF_R9(%rsp) ; \ 31 movq %r8,TF_R8(%rsp) ; \ 32 movq %rdi,TF_RDI(%rsp) ; \ 33 movq %rsi,TF_RSI(%rsp) ; \ 34 movq %rbp,TF_RBP(%rsp) ; \ 35 movq %rbx,TF_RBX(%rsp) ; \ 36 movq %rdx,TF_RDX(%rsp) ; \ 37 movq %rcx,TF_RCX(%rsp) ; \ 38 movq %rax,TF_RAX(%rsp) 39 40 #define INTR_RESTORE_GPRS \ 41 movq TF_R15(%rsp),%r15 ; \ 42 movq TF_R14(%rsp),%r14 ; \ 43 movq TF_R13(%rsp),%r13 ; \ 44 movq TF_R12(%rsp),%r12 ; \ 45 movq TF_R11(%rsp),%r11 ; \ 46 movq TF_R10(%rsp),%r10 ; \ 47 movq TF_R9(%rsp),%r9 ; \ 48 movq TF_R8(%rsp),%r8 ; \ 49 movq TF_RDI(%rsp),%rdi ; \ 50 movq TF_RSI(%rsp),%rsi ; \ 51 movq TF_RBP(%rsp),%rbp ; \ 52 movq TF_RBX(%rsp),%rbx ; \ 53 movq TF_RDX(%rsp),%rdx ; \ 54 movq TF_RCX(%rsp),%rcx ; \ 55 movq TF_RAX(%rsp),%rax ; \ 56 addq $120,%rsp 57 58 #define INTRENTRY \ 59 subq $32,%rsp ; \ 60 testq $SEL_UPL,56(%rsp) ; \ 61 je 98f ; \ 62 swapgs ; \ 63 movw %gs,0(%rsp) ; \ 64 movw %fs,8(%rsp) ; \ 65 movw %es,16(%rsp) ; \ 66 movw %ds,24(%rsp) ; \ 67 98: INTR_SAVE_GPRS 68 69 #ifndef XEN 70 #define INTRFASTEXIT \ 71 INTR_RESTORE_GPRS ; \ 72 testq $SEL_UPL,56(%rsp) ; \ 73 je 99f ; \ 74 cli ; \ 75 swapgs ; \ 76 movw 0(%rsp),%gs ; \ 77 movw 8(%rsp),%fs ; \ 78 movw 16(%rsp),%es ; \ 79 movw 24(%rsp),%ds ; \ 80 99: addq $48,%rsp ; \ 81 iretq 82 83 #define INTR_RECURSE_HWFRAME \ 84 movq %rsp,%r10 ; \ 85 movl %ss,%r11d ; \ 86 pushq %r11 ; \ 87 pushq %r10 ; \ 88 pushfq ; \ 89 movl %cs,%r11d ; \ 90 pushq %r11 ; \ 91 pushq %r13 ; 92 93 #else /* !XEN */ 94 /* 95 * Disabling events before going to user mode sounds like a BAD idea 96 * do no restore gs either, HYPERVISOR_iret will do a swapgs 97 */ 98 #define INTRFASTEXIT \ 99 INTR_RESTORE_GPRS ; \ 100 testq $SEL_UPL,56(%rsp) ; \ 101 je 99f ; \ 102 movw 8(%rsp),%fs ; \ 103 movw 16(%rsp),%es ; \ 104 movw 24(%rsp),%ds ; \ 105 99: addq $48,%rsp ; \ 106 iretq 107 108 /* We must fixup CS, as even kernel mode runs at CPL 3 */ 109 #define INTR_RECURSE_HWFRAME \ 110 movq %rsp,%r10 ; \ 111 movl %ss,%r11d ; \ 112 pushq %r11 ; \ 113 pushq %r10 ; \ 114 pushfq ; \ 115 movl %cs,%r11d ; \ 116 pushq %r11 ; \ 117 andb $0xfc,(%rsp) ; \ 118 pushq %r13 ; 119 120 #endif /* !XEN */ 121 122 123 #define CHECK_ASTPENDING(reg) cmpq $0, reg ; \ 124 je 99f ; \ 125 cmpl $0, L_MD_ASTPENDING(reg) ; \ 126 99: 127 128 #define CLEAR_ASTPENDING(reg) movl $0, L_MD_ASTPENDING(reg) 129 130 #ifdef XEN 131 #define CLI(reg1,reg2) \ 132 movq CPUVAR(CPUID),reg1 ; \ 133 shlq $6,reg1 ; \ 134 movq _C_LABEL(HYPERVISOR_shared_info),reg2 ; \ 135 addq reg1,reg2 ; \ 136 movb $1,EVTCHN_UPCALL_MASK(reg2) 137 #define STI(reg1,reg2) \ 138 movq CPUVAR(CPUID),reg1 ; \ 139 shlq $6,reg1 ; \ 140 movq _C_LABEL(HYPERVISOR_shared_info),reg2 ; \ 141 addq reg1,reg2 ; \ 142 movb $0,EVTCHN_UPCALL_MASK(reg2) 143 #else /* XEN */ 144 #define CLI(reg1,reg2) cli 145 #define STI(reg1,reg2) sti 146 #endif /* XEN */ 147 #endif /* _AMD64_MACHINE_FRAMEASM_H */ 148
Indexes created Thu Oct 02 14:10:14 GMT 2025