1 1.10 rillig /* $NetBSD: i82093reg.h,v 1.10 2021/04/17 20:12:55 rillig Exp $ */ 2 1.1 fvdl 3 1.1 fvdl #include <x86/i82093reg.h> 4 1.1 fvdl 5 1.2 fvdl #ifdef _KERNEL 6 1.2 fvdl 7 1.2 fvdl #if defined(_KERNEL_OPT) 8 1.2 fvdl #include "opt_multiprocessor.h" 9 1.2 fvdl #endif 10 1.2 fvdl 11 1.1 fvdl #define ioapic_asm_ack(num) \ 12 1.7 maxv movq _C_LABEL(local_apic_va),%rax ; \ 13 1.7 maxv movl $0,LAPIC_EOI(%rax) 14 1.2 fvdl 15 1.8 nonaka #define x2apic_asm_ack(num) \ 16 1.8 nonaka movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx ; \ 17 1.8 nonaka xorl %eax,%eax ; \ 18 1.8 nonaka xorl %edx,%edx ; \ 19 1.8 nonaka wrmsr 20 1.8 nonaka 21 1.2 fvdl #ifdef MULTIPROCESSOR 22 1.2 fvdl 23 1.4 skd #define ioapic_asm_lock(num) \ 24 1.4 skd movb $1,%bl ; \ 25 1.4 skd 76: \ 26 1.4 skd xchgb %bl,PIC_LOCK(%rdi) ; \ 27 1.4 skd testb %bl,%bl ; \ 28 1.4 skd jz 78f ; \ 29 1.4 skd 77: \ 30 1.4 skd pause ; \ 31 1.4 skd nop ; \ 32 1.4 skd nop ; \ 33 1.4 skd cmpb $0,PIC_LOCK(%rdi) ; \ 34 1.4 skd jne 77b ; \ 35 1.4 skd jmp 76b ; \ 36 1.4 skd 78: 37 1.2 fvdl 38 1.2 fvdl #define ioapic_asm_unlock(num) \ 39 1.4 skd movb $0,PIC_LOCK(%rdi) 40 1.10 rillig 41 1.2 fvdl #else 42 1.2 fvdl 43 1.2 fvdl #define ioapic_asm_lock(num) 44 1.2 fvdl #define ioapic_asm_unlock(num) 45 1.2 fvdl 46 1.2 fvdl #endif /* MULTIPROCESSOR */ 47 1.2 fvdl 48 1.2 fvdl 49 1.2 fvdl #define ioapic_mask(num) \ 50 1.2 fvdl movq IS_PIC(%r14),%rdi ;\ 51 1.2 fvdl ioapic_asm_lock(num) ;\ 52 1.2 fvdl movl IS_PIN(%r14),%esi ;\ 53 1.2 fvdl leaq 0x10(%rsi,%rsi,1),%rsi ;\ 54 1.5 drochner movq PIC_IOAPIC(%rdi),%rdi ;\ 55 1.2 fvdl movq IOAPIC_SC_REG(%rdi),%r15 ;\ 56 1.2 fvdl movl %esi, (%r15) ;\ 57 1.2 fvdl movq IOAPIC_SC_DATA(%rdi),%r15 ;\ 58 1.2 fvdl movl (%r15),%esi ;\ 59 1.2 fvdl orl $IOAPIC_REDLO_MASK,%esi ;\ 60 1.9 nakayama andl $~IOAPIC_REDLO_RIRR,%esi ;\ 61 1.2 fvdl movl %esi,(%r15) ;\ 62 1.5 drochner movq IS_PIC(%r14),%rdi ;\ 63 1.2 fvdl ioapic_asm_unlock(num) 64 1.2 fvdl 65 1.2 fvdl #define ioapic_unmask(num) \ 66 1.2 fvdl cmpq $IREENT_MAGIC,(TF_ERR+8)(%rsp) ;\ 67 1.2 fvdl jne 79f ;\ 68 1.2 fvdl movq IS_PIC(%r14),%rdi ;\ 69 1.2 fvdl ioapic_asm_lock(num) ;\ 70 1.2 fvdl movl IS_PIN(%r14),%esi ;\ 71 1.2 fvdl leaq 0x10(%rsi,%rsi,1),%rsi ;\ 72 1.5 drochner movq PIC_IOAPIC(%rdi),%rdi ;\ 73 1.2 fvdl movq IOAPIC_SC_REG(%rdi),%r15 ;\ 74 1.3 fvdl movq IOAPIC_SC_DATA(%rdi),%r13 ;\ 75 1.2 fvdl movl %esi, (%r15) ;\ 76 1.3 fvdl movl (%r13),%r12d ;\ 77 1.9 nakayama andl $~(IOAPIC_REDLO_MASK|IOAPIC_REDLO_RIRR),%r12d ;\ 78 1.2 fvdl movl %esi,(%r15) ;\ 79 1.3 fvdl movl %r12d,(%r13) ;\ 80 1.5 drochner movq IS_PIC(%r14),%rdi ;\ 81 1.2 fvdl ioapic_asm_unlock(num) ;\ 82 1.2 fvdl 79: 83 1.2 fvdl 84 1.2 fvdl #endif 85