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i82093reg.h revision 1.7 
      1  1.7      maxv /*	 $NetBSD: i82093reg.h,v 1.7 2016/11/25 14:12:55 maxv Exp $ */
      2  1.1      fvdl 
      3  1.1      fvdl #include <x86/i82093reg.h>
      4  1.1      fvdl 
      5  1.2      fvdl #ifdef _KERNEL
      6  1.2      fvdl 
      7  1.2      fvdl #if defined(_KERNEL_OPT)
      8  1.2      fvdl #include "opt_multiprocessor.h"
      9  1.2      fvdl #endif
     10  1.2      fvdl 
     11  1.1      fvdl #define ioapic_asm_ack(num) \
     12  1.7      maxv 	movq	_C_LABEL(local_apic_va),%rax	; \
     13  1.7      maxv 	movl	$0,LAPIC_EOI(%rax)
     14  1.2      fvdl 
     15  1.2      fvdl #ifdef MULTIPROCESSOR
     16  1.2      fvdl 
     17  1.4       skd #define ioapic_asm_lock(num) 			        \
     18  1.4       skd 	movb	$1,%bl				;	\
     19  1.4       skd 76:							\
     20  1.4       skd         xchgb	%bl,PIC_LOCK(%rdi)		;	\
     21  1.4       skd 	testb	%bl,%bl				;	\
     22  1.4       skd 	jz	78f				;	\
     23  1.4       skd 77:							\
     24  1.4       skd 	pause					;	\
     25  1.4       skd 	nop					;	\
     26  1.4       skd 	nop					;	\
     27  1.4       skd 	cmpb	$0,PIC_LOCK(%rdi)		;	\
     28  1.4       skd 	jne	77b				;	\
     29  1.4       skd 	jmp	76b				;	\
     30  1.4       skd 78:
     31  1.2      fvdl 
     32  1.2      fvdl #define ioapic_asm_unlock(num) \
     33  1.4       skd 	movb	$0,PIC_LOCK(%rdi)
     34  1.2      fvdl 
     35  1.2      fvdl #else
     36  1.2      fvdl 
     37  1.2      fvdl #define ioapic_asm_lock(num)
     38  1.2      fvdl #define ioapic_asm_unlock(num)
     39  1.2      fvdl 
     40  1.2      fvdl #endif	/* MULTIPROCESSOR */
     41  1.2      fvdl 
     42  1.2      fvdl 
     43  1.2      fvdl #define ioapic_mask(num) \
     44  1.2      fvdl 	movq	IS_PIC(%r14),%rdi				;\
     45  1.2      fvdl 	ioapic_asm_lock(num)					;\
     46  1.2      fvdl 	movl	IS_PIN(%r14),%esi				;\
     47  1.2      fvdl 	leaq	0x10(%rsi,%rsi,1),%rsi				;\
     48  1.5  drochner 	movq	PIC_IOAPIC(%rdi),%rdi				;\
     49  1.2      fvdl 	movq	IOAPIC_SC_REG(%rdi),%r15			;\
     50  1.2      fvdl 	movl	%esi, (%r15)					;\
     51  1.2      fvdl 	movq	IOAPIC_SC_DATA(%rdi),%r15			;\
     52  1.2      fvdl 	movl	(%r15),%esi					;\
     53  1.2      fvdl 	orl	$IOAPIC_REDLO_MASK,%esi				;\
     54  1.2      fvdl 	movl	%esi,(%r15)					;\
     55  1.5  drochner 	movq	IS_PIC(%r14),%rdi				;\
     56  1.2      fvdl 	ioapic_asm_unlock(num)
     57  1.2      fvdl 
     58  1.2      fvdl #define ioapic_unmask(num) \
     59  1.2      fvdl 	cmpq	$IREENT_MAGIC,(TF_ERR+8)(%rsp)			;\
     60  1.2      fvdl 	jne	79f						;\
     61  1.2      fvdl 	movq	IS_PIC(%r14),%rdi				;\
     62  1.2      fvdl 	ioapic_asm_lock(num)					;\
     63  1.2      fvdl 	movl	IS_PIN(%r14),%esi				;\
     64  1.2      fvdl 	leaq	0x10(%rsi,%rsi,1),%rsi				;\
     65  1.5  drochner 	movq	PIC_IOAPIC(%rdi),%rdi				;\
     66  1.2      fvdl 	movq	IOAPIC_SC_REG(%rdi),%r15			;\
     67  1.3      fvdl 	movq	IOAPIC_SC_DATA(%rdi),%r13			;\
     68  1.2      fvdl 	movl	%esi, (%r15)					;\
     69  1.3      fvdl 	movl	(%r13),%r12d					;\
     70  1.3      fvdl 	andl	$~IOAPIC_REDLO_MASK,%r12d			;\
     71  1.2      fvdl 	movl	%esi,(%r15)					;\
     72  1.3      fvdl 	movl	%r12d,(%r13)					;\
     73  1.5  drochner 	movq	IS_PIC(%r14),%rdi				;\
     74  1.2      fvdl 	ioapic_asm_unlock(num)					;\
     75  1.2      fvdl 79:
     76  1.2      fvdl 
     77  1.2      fvdl #endif
     78