1 1.8 mlelstv /* $NetBSD: pdir.h,v 1.8 2022/08/21 14:05:52 mlelstv Exp $ */ 2 1.1 maxv 3 1.1 maxv /* 4 1.7 maxv * Copyright (c) 2017-2020 The NetBSD Foundation, Inc. All rights reserved. 5 1.1 maxv * 6 1.1 maxv * This code is derived from software contributed to The NetBSD Foundation 7 1.1 maxv * by Maxime Villard. 8 1.1 maxv * 9 1.1 maxv * Redistribution and use in source and binary forms, with or without 10 1.1 maxv * modification, are permitted provided that the following conditions 11 1.1 maxv * are met: 12 1.1 maxv * 1. Redistributions of source code must retain the above copyright 13 1.1 maxv * notice, this list of conditions and the following disclaimer. 14 1.1 maxv * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 maxv * notice, this list of conditions and the following disclaimer in the 16 1.1 maxv * documentation and/or other materials provided with the distribution. 17 1.1 maxv * 18 1.1 maxv * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.1 maxv * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.1 maxv * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.1 maxv * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.1 maxv * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.1 maxv * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.1 maxv * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.1 maxv * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.1 maxv * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.1 maxv * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.1 maxv * POSSIBILITY OF SUCH DAMAGE. 29 1.1 maxv */ 30 1.1 maxv 31 1.3 maxv #define PREKERNBASE 0x0 32 1.1 maxv #define PREKERNTEXTOFF (PREKERNBASE + 0x100000) 33 1.1 maxv 34 1.1 maxv #define L4_SLOT_PREKERN 0 /* pl4_i(PREKERNBASE) */ 35 1.5 maxv #define L4_SLOT_PTE 509 36 1.1 maxv 37 1.1 maxv #define PDIR_SLOT_KERN L4_SLOT_PREKERN 38 1.1 maxv #define PDIR_SLOT_PTE L4_SLOT_PTE 39 1.1 maxv 40 1.5 maxv #define PTE_BASE ((pt_entry_t *)VA_SIGN_NEG((L4_SLOT_PTE * NBPD_L4))) 41 1.1 maxv 42 1.1 maxv #define L1_BASE PTE_BASE 43 1.1 maxv #define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L4_SLOT_PTE * NBPD_L3)) 44 1.1 maxv #define L3_BASE ((pd_entry_t *)((char *)L2_BASE + L4_SLOT_PTE * NBPD_L2)) 45 1.1 maxv #define L4_BASE ((pd_entry_t *)((char *)L3_BASE + L4_SLOT_PTE * NBPD_L1)) 46 1.1 maxv 47 1.1 maxv #define NKL4_KIMG_ENTRIES 1 48 1.1 maxv #define NKL3_KIMG_ENTRIES 1 49 1.4 maxv #define NKL2_KIMG_ENTRIES 48 50 1.1 maxv 51 1.1 maxv #define L1_SHIFT 12 52 1.1 maxv #define L2_SHIFT 21 53 1.1 maxv #define L3_SHIFT 30 54 1.1 maxv #define L4_SHIFT 39 55 1.1 maxv #define NBPD_L1 (1UL << L1_SHIFT) /* # bytes mapped by L1 ent (4K) */ 56 1.1 maxv #define NBPD_L2 (1UL << L2_SHIFT) /* # bytes mapped by L2 ent (2MB) */ 57 1.1 maxv #define NBPD_L3 (1UL << L3_SHIFT) /* # bytes mapped by L3 ent (1G) */ 58 1.1 maxv #define NBPD_L4 (1UL << L4_SHIFT) /* # bytes mapped by L4 ent (512G) */ 59 1.1 maxv 60 1.1 maxv #define L4_MASK 0x0000ff8000000000 61 1.1 maxv #define L3_MASK 0x0000007fc0000000 62 1.1 maxv #define L2_MASK 0x000000003fe00000 63 1.1 maxv #define L1_MASK 0x00000000001ff000 64 1.1 maxv 65 1.1 maxv #define L4_FRAME L4_MASK 66 1.1 maxv #define L3_FRAME (L4_FRAME|L3_MASK) 67 1.1 maxv #define L2_FRAME (L3_FRAME|L2_MASK) 68 1.1 maxv #define L1_FRAME (L2_FRAME|L1_MASK) 69 1.1 maxv 70 1.1 maxv #define VA_SIGN_MASK 0xffff000000000000 71 1.1 maxv #define VA_SIGN_NEG(va) ((va) | VA_SIGN_MASK) 72 1.1 maxv 73