ahsc.c revision 1.12 1 /* $NetBSD: ahsc.c,v 1.12 1996/04/21 21:10:49 veego Exp $ */
2
3 /*
4 * Copyright (c) 1994 Christian E. Hopps
5 * Copyright (c) 1982, 1990 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * @(#)dma.c
37 */
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/device.h>
42 #include <scsi/scsi_all.h>
43 #include <scsi/scsiconf.h>
44 #include <amiga/amiga/custom.h>
45 #include <amiga/amiga/cc.h>
46 #include <amiga/amiga/device.h>
47 #include <amiga/amiga/isr.h>
48 #include <amiga/dev/dmavar.h>
49 #include <amiga/dev/sbicreg.h>
50 #include <amiga/dev/sbicvar.h>
51 #include <amiga/dev/ahscreg.h>
52 #include <amiga/dev/zbusvar.h>
53
54 int ahscprint __P((void *auxp, char *));
55 void ahscattach __P((struct device *, struct device *, void *));
56 int ahscmatch __P((struct device *, void *, void *));
57
58 void ahsc_enintr __P((struct sbic_softc *));
59 void ahsc_dmastop __P((struct sbic_softc *));
60 int ahsc_dmanext __P((struct sbic_softc *));
61 int ahsc_dmaintr __P((void *));
62 int ahsc_dmago __P((struct sbic_softc *, char *, int, int));
63
64 #ifdef DEBUG
65 void ahsc_dump __P((void));
66 #endif
67
68 struct scsi_adapter ahsc_scsiswitch = {
69 sbic_scsicmd,
70 sbic_minphys,
71 0, /* no lun support */
72 0, /* no lun support */
73 };
74
75 struct scsi_device ahsc_scsidev = {
76 NULL, /* use default error handler */
77 NULL, /* do not have a start functio */
78 NULL, /* have no async handler */
79 NULL, /* Use default done routine */
80 };
81
82
83 #ifdef DEBUG
84 int ahsc_dmadebug = 0;
85 #endif
86
87 struct cfattach ahsc_ca = {
88 sizeof(struct sbic_softc), ahscmatch, ahscattach
89 };
90
91 struct cfdriver ahsc_cd = {
92 NULL, "ahsc", DV_DULL, NULL, 0
93 };
94
95 /*
96 * if we are an A3000 we are here.
97 */
98 int
99 ahscmatch(pdp, match, auxp)
100 struct device *pdp;
101 void *match, *auxp;
102 {
103 char *mbusstr;
104
105 mbusstr = auxp;
106 if (is_a3000() && matchname(auxp, "ahsc"))
107 return(1);
108 return(0);
109 }
110
111 void
112 ahscattach(pdp, dp, auxp)
113 struct device *pdp, *dp;
114 void *auxp;
115 {
116 volatile struct sdmac *rp;
117 struct sbic_softc *sc;
118
119 printf("\n");
120
121 sc = (struct sbic_softc *)dp;
122 sc->sc_cregs = rp = ztwomap(0xdd0000);
123 /*
124 * disable ints and reset bank register
125 */
126 rp->CNTR = CNTR_PDMD;
127 rp->DAWR = DAWR_AHSC;
128 sc->sc_enintr = ahsc_enintr;
129 sc->sc_dmago = ahsc_dmago;
130 sc->sc_dmanext = ahsc_dmanext;
131 sc->sc_dmastop = ahsc_dmastop;
132 sc->sc_dmacmd = 0;
133
134 /*
135 * eveything is a valid dma address
136 */
137 sc->sc_dmamask = 0;
138 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x41);
139 sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 143;
140
141 sc->sc_link.adapter_softc = sc;
142 sc->sc_link.adapter_target = 7;
143 sc->sc_link.adapter = &ahsc_scsiswitch;
144 sc->sc_link.device = &ahsc_scsidev;
145 sc->sc_link.openings = 2;
146
147 sbicinit(sc);
148
149 sc->sc_isr.isr_intr = ahsc_dmaintr;
150 sc->sc_isr.isr_arg = sc;
151 sc->sc_isr.isr_ipl = 2;
152 add_isr (&sc->sc_isr);
153
154 /*
155 * attach all scsi units on us
156 */
157 config_found(dp, &sc->sc_link, ahscprint);
158 }
159
160 /*
161 * print diag if pnp is NULL else just extra
162 */
163 int
164 ahscprint(auxp, pnp)
165 void *auxp;
166 char *pnp;
167 {
168 if (pnp == NULL)
169 return(UNCONF);
170 return(QUIET);
171 }
172
173
174 void
175 ahsc_enintr(dev)
176 struct sbic_softc *dev;
177 {
178 volatile struct sdmac *sdp;
179
180 sdp = dev->sc_cregs;
181
182 dev->sc_flags |= SBICF_INTR;
183 sdp->CNTR = CNTR_PDMD | CNTR_INTEN;
184 }
185
186 int
187 ahsc_dmago(dev, addr, count, flags)
188 struct sbic_softc *dev;
189 char *addr;
190 int count, flags;
191 {
192 volatile struct sdmac *sdp;
193
194 sdp = dev->sc_cregs;
195 /*
196 * Set up the command word based on flags
197 */
198 dev->sc_dmacmd = CNTR_PDMD | CNTR_INTEN;
199 if ((flags & DMAGO_READ) == 0)
200 dev->sc_dmacmd |= CNTR_DDIR;
201 #ifdef DEBUG
202 if (ahsc_dmadebug & DDB_IO)
203 printf("ahsc_dmago: cmd %x\n", dev->sc_dmacmd);
204 #endif
205
206 dev->sc_flags |= SBICF_INTR;
207 sdp->CNTR = dev->sc_dmacmd;
208 sdp->ACR = (u_int) dev->sc_cur->dc_addr;
209 sdp->ST_DMA = 1;
210
211 return(dev->sc_tcnt);
212 }
213
214 void
215 ahsc_dmastop(dev)
216 struct sbic_softc *dev;
217 {
218 volatile struct sdmac *sdp;
219 int s;
220
221 sdp = dev->sc_cregs;
222
223 #ifdef DEBUG
224 if (ahsc_dmadebug & DDB_FOLLOW)
225 printf("ahsc_dmastop()\n");
226 #endif
227 if (dev->sc_dmacmd) {
228 s = splbio();
229 if ((dev->sc_dmacmd & (CNTR_TCEN | CNTR_DDIR)) == 0) {
230 /*
231 * only FLUSH if terminal count not enabled,
232 * and reading from peripheral
233 */
234 sdp->FLUSH = 1;
235 while ((sdp->ISTR & ISTR_FE_FLG) == 0)
236 ;
237 }
238 /*
239 * clear possible interrupt and stop dma
240 */
241 sdp->CINT = 1;
242 sdp->SP_DMA = 1;
243 dev->sc_dmacmd = 0;
244 splx(s);
245 }
246 }
247
248 int
249 ahsc_dmaintr(arg)
250 void *arg;
251 {
252 struct sbic_softc *dev = arg;
253 volatile struct sdmac *sdp;
254 int stat, found;
255
256 sdp = dev->sc_cregs;
257 stat = sdp->ISTR;
258
259 if ((stat & (ISTR_INT_F|ISTR_INT_P)) == 0)
260 return (0);
261
262 #ifdef DEBUG
263 if (ahsc_dmadebug & DDB_FOLLOW)
264 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat);
265 #endif
266
267 /*
268 * both, SCSI and DMA interrupts arrive here. I chose
269 * arbitrarily that DMA interrupts should have higher
270 * precedence than SCSI interrupts.
271 */
272 found = 0;
273 if (stat & ISTR_E_INT) {
274 ++found;
275
276 sdp->CINT = 1; /* clear possible interrupt */
277
278 /*
279 * check for SCSI ints in the same go and
280 * eventually save an interrupt
281 */
282 }
283
284 if (dev->sc_flags & SBICF_INTR && stat & ISTR_INTS)
285 found += sbicintr(dev);
286 return(found);
287 }
288
289
290 int
291 ahsc_dmanext(dev)
292 struct sbic_softc *dev;
293 {
294 volatile struct sdmac *sdp;
295
296 sdp = dev->sc_cregs;
297
298 if (dev->sc_cur > dev->sc_last) {
299 /* shouldn't happen !! */
300 printf("ahsc_dmanext at end !!!\n");
301 ahsc_dmastop(dev);
302 return(0);
303 }
304 if ((dev->sc_dmacmd & (CNTR_TCEN | CNTR_DDIR)) == 0) {
305 /*
306 * only FLUSH if terminal count not enabled,
307 * and reading from peripheral
308 */
309 sdp->FLUSH = 1;
310 while ((sdp->ISTR & ISTR_FE_FLG) == 0)
311 ;
312 }
313 /*
314 * clear possible interrupt and stop dma
315 */
316 sdp->CINT = 1; /* clear possible interrupt */
317 sdp->SP_DMA = 1; /* stop dma */
318 sdp->CNTR = dev->sc_dmacmd;
319 sdp->ACR = (u_int)dev->sc_cur->dc_addr;
320 sdp->ST_DMA = 1;
321
322 dev->sc_tcnt = dev->sc_cur->dc_count << 1;
323 return(dev->sc_tcnt);
324 }
325
326 #ifdef DEBUG
327 void
328 ahsc_dump()
329 {
330 int i;
331
332 for (i = 0; i < ahsc_cd.cd_ndevs; ++i)
333 if (ahsc_cd.cd_devs[i])
334 sbic_dump(ahsc_cd.cd_devs[i]);
335 }
336 #endif
337