ahsc.c revision 1.27 1 /* $NetBSD: ahsc.c,v 1.27 2001/04/25 17:53:06 bouyer Exp $ */
2
3 /*
4 * Copyright (c) 1994 Christian E. Hopps
5 * Copyright (c) 1982, 1990 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * @(#)dma.c
37 */
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/device.h>
42 #include <dev/scsipi/scsi_all.h>
43 #include <dev/scsipi/scsipi_all.h>
44 #include <dev/scsipi/scsiconf.h>
45 #include <amiga/amiga/custom.h>
46 #include <amiga/amiga/cc.h>
47 #include <amiga/amiga/cfdev.h>
48 #include <amiga/amiga/device.h>
49 #include <amiga/amiga/isr.h>
50 #include <amiga/dev/dmavar.h>
51 #include <amiga/dev/sbicreg.h>
52 #include <amiga/dev/sbicvar.h>
53 #include <amiga/dev/ahscreg.h>
54 #include <amiga/dev/zbusvar.h>
55
56 #include <machine/cpu.h>
57
58 void ahscattach __P((struct device *, struct device *, void *));
59 int ahscmatch __P((struct device *, struct cfdata *, void *));
60
61 void ahsc_enintr __P((struct sbic_softc *));
62 void ahsc_dmastop __P((struct sbic_softc *));
63 int ahsc_dmanext __P((struct sbic_softc *));
64 int ahsc_dmaintr __P((void *));
65 int ahsc_dmago __P((struct sbic_softc *, char *, int, int));
66
67 #ifdef DEBUG
68 void ahsc_dump __P((void));
69 #endif
70
71 #ifdef DEBUG
72 int ahsc_dmadebug = 0;
73 #endif
74
75 struct cfattach ahsc_ca = {
76 sizeof(struct sbic_softc), ahscmatch, ahscattach
77 };
78
79 /*
80 * if we are an A3000 we are here.
81 */
82 int
83 ahscmatch(pdp, cfp, auxp)
84 struct device *pdp;
85 struct cfdata *cfp;
86 void *auxp;
87 {
88 char *mbusstr;
89
90 mbusstr = auxp;
91 if (is_a3000() && matchname(auxp, "ahsc"))
92 return(1);
93 return(0);
94 }
95
96 void
97 ahscattach(pdp, dp, auxp)
98 struct device *pdp, *dp;
99 void *auxp;
100 {
101 volatile struct sdmac *rp;
102 struct sbic_softc *sc = (struct sbic_softc *)dp;
103 struct cfdev *cdp, *ecdp;
104 struct scsipi_adapter *adapt = &sc->sc_adapter;
105 struct scsipi_channel *chan = &sc->sc_channel;
106
107 ecdp = &cfdev[ncfdev];
108
109 for (cdp = cfdev; cdp < ecdp; cdp++) {
110 if (cdp->rom.manid == 8738 &&
111 cdp->rom.prodid == 35)
112 break;
113 }
114
115 sc->sc_cregs = rp = ztwomap(0xdd0000);
116 /*
117 * disable ints and reset bank register
118 */
119 rp->CNTR = CNTR_PDMD;
120 rp->DAWR = DAWR_AHSC;
121 sc->sc_enintr = ahsc_enintr;
122 sc->sc_dmago = ahsc_dmago;
123 sc->sc_dmanext = ahsc_dmanext;
124 sc->sc_dmastop = ahsc_dmastop;
125 sc->sc_dmacmd = 0;
126
127 /*
128 * eveything is a valid dma address
129 */
130 sc->sc_dmamask = 0;
131
132 if (cdp < ecdp) {
133 sc->sc_sbic.sbic_asr_p = ((vu_char *)rp + 0x43);
134 sc->sc_sbic.sbic_value_p = ((vu_char *)rp + 0x47);
135 printf(": modified for Apollo cpu board\n");
136 } else {
137 sc->sc_sbic.sbic_asr_p = ((vu_char *)rp + 0x41);
138 sc->sc_sbic.sbic_value_p = ((vu_char *)rp + 0x43);
139 printf("\n");
140 }
141
142 sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 143;
143
144 /*
145 * Fill in the scsipi_adapter.
146 */
147 memset(adapt, 0, sizeof(*adapt));
148 adapt->adapt_dev = &sc->sc_dev;
149 adapt->adapt_nchannels = 1;
150 adapt->adapt_openings = 7;
151 adapt->adapt_max_periph = 1;
152 adapt->adapt_request = sbic_scsipi_request;
153 adapt->adapt_minphys = sbic_minphys;
154
155 /*
156 * Fill in the scsipi_channel.
157 */
158 memset(chan, 0, sizeof(*chan));
159 chan->chan_adapter = adapt;
160 chan->chan_bustype = &scsi_bustype;
161 chan->chan_channel = 0;
162 chan->chan_ntargets = 8;
163 chan->chan_nluns = 8;
164 chan->chan_id = 7;
165
166 sbicinit(sc);
167
168 sc->sc_isr.isr_intr = ahsc_dmaintr;
169 sc->sc_isr.isr_arg = sc;
170 sc->sc_isr.isr_ipl = 2;
171 add_isr (&sc->sc_isr);
172
173 /*
174 * attach all scsi units on us
175 */
176 config_found(dp, chan, scsiprint);
177 }
178
179 void
180 ahsc_enintr(dev)
181 struct sbic_softc *dev;
182 {
183 volatile struct sdmac *sdp;
184
185 sdp = dev->sc_cregs;
186
187 dev->sc_flags |= SBICF_INTR;
188 sdp->CNTR = CNTR_PDMD | CNTR_INTEN;
189 }
190
191 int
192 ahsc_dmago(dev, addr, count, flags)
193 struct sbic_softc *dev;
194 char *addr;
195 int count, flags;
196 {
197 volatile struct sdmac *sdp;
198
199 sdp = dev->sc_cregs;
200 /*
201 * Set up the command word based on flags
202 */
203 dev->sc_dmacmd = CNTR_PDMD | CNTR_INTEN;
204 if ((flags & DMAGO_READ) == 0)
205 dev->sc_dmacmd |= CNTR_DDIR;
206 #ifdef DEBUG
207 if (ahsc_dmadebug & DDB_IO)
208 printf("ahsc_dmago: cmd %x\n", dev->sc_dmacmd);
209 #endif
210
211 dev->sc_flags |= SBICF_INTR;
212 sdp->CNTR = dev->sc_dmacmd;
213 sdp->ACR = (u_int) dev->sc_cur->dc_addr;
214 sdp->ST_DMA = 1;
215
216 return(dev->sc_tcnt);
217 }
218
219 void
220 ahsc_dmastop(dev)
221 struct sbic_softc *dev;
222 {
223 volatile struct sdmac *sdp;
224 int s;
225
226 sdp = dev->sc_cregs;
227
228 #ifdef DEBUG
229 if (ahsc_dmadebug & DDB_FOLLOW)
230 printf("ahsc_dmastop()\n");
231 #endif
232 if (dev->sc_dmacmd) {
233 s = splbio();
234 if ((dev->sc_dmacmd & (CNTR_TCEN | CNTR_DDIR)) == 0) {
235 /*
236 * only FLUSH if terminal count not enabled,
237 * and reading from peripheral
238 */
239 sdp->FLUSH = 1;
240 while ((sdp->ISTR & ISTR_FE_FLG) == 0)
241 ;
242 }
243 /*
244 * clear possible interrupt and stop dma
245 */
246 sdp->CINT = 1;
247 sdp->SP_DMA = 1;
248 dev->sc_dmacmd = 0;
249 splx(s);
250 }
251 }
252
253 int
254 ahsc_dmaintr(arg)
255 void *arg;
256 {
257 struct sbic_softc *dev = arg;
258 volatile struct sdmac *sdp;
259 int stat, found;
260
261 sdp = dev->sc_cregs;
262 stat = sdp->ISTR;
263
264 if ((stat & (ISTR_INT_F|ISTR_INT_P)) == 0)
265 return (0);
266
267 #ifdef DEBUG
268 if (ahsc_dmadebug & DDB_FOLLOW)
269 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat);
270 #endif
271
272 /*
273 * both, SCSI and DMA interrupts arrive here. I chose
274 * arbitrarily that DMA interrupts should have higher
275 * precedence than SCSI interrupts.
276 */
277 found = 0;
278 if (stat & ISTR_E_INT) {
279 ++found;
280
281 sdp->CINT = 1; /* clear possible interrupt */
282
283 /*
284 * check for SCSI ints in the same go and
285 * eventually save an interrupt
286 */
287 }
288
289 if (dev->sc_flags & SBICF_INTR && stat & ISTR_INTS)
290 found += sbicintr(dev);
291 return(found);
292 }
293
294
295 int
296 ahsc_dmanext(dev)
297 struct sbic_softc *dev;
298 {
299 volatile struct sdmac *sdp;
300
301 sdp = dev->sc_cregs;
302
303 if (dev->sc_cur > dev->sc_last) {
304 /* shouldn't happen !! */
305 printf("ahsc_dmanext at end !!!\n");
306 ahsc_dmastop(dev);
307 return(0);
308 }
309 if ((dev->sc_dmacmd & (CNTR_TCEN | CNTR_DDIR)) == 0) {
310 /*
311 * only FLUSH if terminal count not enabled,
312 * and reading from peripheral
313 */
314 sdp->FLUSH = 1;
315 while ((sdp->ISTR & ISTR_FE_FLG) == 0)
316 ;
317 }
318 /*
319 * clear possible interrupt and stop dma
320 */
321 sdp->CINT = 1; /* clear possible interrupt */
322 sdp->SP_DMA = 1; /* stop dma */
323 sdp->CNTR = dev->sc_dmacmd;
324 sdp->ACR = (u_int)dev->sc_cur->dc_addr;
325 sdp->ST_DMA = 1;
326
327 dev->sc_tcnt = dev->sc_cur->dc_count << 1;
328 return(dev->sc_tcnt);
329 }
330
331 #ifdef DEBUG
332 void
333 ahsc_dump()
334 {
335 extern struct cfdriver ahsc_cd;
336 int i;
337
338 for (i = 0; i < ahsc_cd.cd_ndevs; ++i)
339 if (ahsc_cd.cd_devs[i])
340 sbic_dump(ahsc_cd.cd_devs[i]);
341 }
342 #endif
343