atzsc.c revision 1.29.8.3 1 1.29.8.3 nathanw /* $NetBSD: atzsc.c,v 1.29.8.3 2002/10/18 02:34:46 nathanw Exp $ */
2 1.29.8.2 nathanw
3 1.29.8.2 nathanw /*
4 1.29.8.2 nathanw * Copyright (c) 1994 Christian E. Hopps
5 1.29.8.2 nathanw * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.29.8.2 nathanw * All rights reserved.
7 1.29.8.2 nathanw *
8 1.29.8.2 nathanw * Redistribution and use in source and binary forms, with or without
9 1.29.8.2 nathanw * modification, are permitted provided that the following conditions
10 1.29.8.2 nathanw * are met:
11 1.29.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
12 1.29.8.2 nathanw * notice, this list of conditions and the following disclaimer.
13 1.29.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
14 1.29.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
15 1.29.8.2 nathanw * documentation and/or other materials provided with the distribution.
16 1.29.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
17 1.29.8.2 nathanw * must display the following acknowledgement:
18 1.29.8.2 nathanw * This product includes software developed by the University of
19 1.29.8.2 nathanw * California, Berkeley and its contributors.
20 1.29.8.2 nathanw * 4. Neither the name of the University nor the names of its contributors
21 1.29.8.2 nathanw * may be used to endorse or promote products derived from this software
22 1.29.8.2 nathanw * without specific prior written permission.
23 1.29.8.2 nathanw *
24 1.29.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.29.8.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.29.8.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.29.8.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.29.8.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.29.8.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.29.8.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.29.8.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.29.8.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.29.8.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.29.8.2 nathanw * SUCH DAMAGE.
35 1.29.8.2 nathanw *
36 1.29.8.2 nathanw * @(#)dma.c
37 1.29.8.2 nathanw */
38 1.29.8.2 nathanw
39 1.29.8.2 nathanw #include <sys/cdefs.h>
40 1.29.8.3 nathanw __KERNEL_RCSID(0, "$NetBSD: atzsc.c,v 1.29.8.3 2002/10/18 02:34:46 nathanw Exp $");
41 1.29.8.2 nathanw
42 1.29.8.2 nathanw #include <sys/param.h>
43 1.29.8.2 nathanw #include <sys/systm.h>
44 1.29.8.2 nathanw #include <sys/kernel.h>
45 1.29.8.2 nathanw #include <sys/device.h>
46 1.29.8.2 nathanw #include <dev/scsipi/scsi_all.h>
47 1.29.8.2 nathanw #include <dev/scsipi/scsipi_all.h>
48 1.29.8.2 nathanw #include <dev/scsipi/scsiconf.h>
49 1.29.8.2 nathanw #include <amiga/amiga/custom.h>
50 1.29.8.2 nathanw #include <amiga/amiga/cc.h>
51 1.29.8.2 nathanw #include <amiga/amiga/device.h>
52 1.29.8.2 nathanw #include <amiga/amiga/isr.h>
53 1.29.8.2 nathanw #include <amiga/dev/dmavar.h>
54 1.29.8.2 nathanw #include <amiga/dev/sbicreg.h>
55 1.29.8.2 nathanw #include <amiga/dev/sbicvar.h>
56 1.29.8.2 nathanw #include <amiga/dev/atzscreg.h>
57 1.29.8.2 nathanw #include <amiga/dev/zbusvar.h>
58 1.29.8.2 nathanw
59 1.29.8.2 nathanw void atzscattach(struct device *, struct device *, void *);
60 1.29.8.2 nathanw int atzscmatch(struct device *, struct cfdata *, void *);
61 1.29.8.2 nathanw
62 1.29.8.2 nathanw void atzsc_enintr(struct sbic_softc *);
63 1.29.8.2 nathanw void atzsc_dmastop(struct sbic_softc *);
64 1.29.8.2 nathanw int atzsc_dmanext(struct sbic_softc *);
65 1.29.8.2 nathanw int atzsc_dmaintr(void *);
66 1.29.8.2 nathanw int atzsc_dmago(struct sbic_softc *, char *, int, int);
67 1.29.8.2 nathanw
68 1.29.8.2 nathanw #ifdef DEBUG
69 1.29.8.2 nathanw void atzsc_dump(void);
70 1.29.8.2 nathanw #endif
71 1.29.8.2 nathanw
72 1.29.8.2 nathanw #ifdef DEBUG
73 1.29.8.2 nathanw int atzsc_dmadebug = 0;
74 1.29.8.2 nathanw #endif
75 1.29.8.2 nathanw
76 1.29.8.3 nathanw CFATTACH_DECL(atzsc, sizeof(struct sbic_softc),
77 1.29.8.3 nathanw atzscmatch, atzscattach, NULL, NULL);
78 1.29.8.2 nathanw
79 1.29.8.2 nathanw /*
80 1.29.8.2 nathanw * if we are an A3000 we are here.
81 1.29.8.2 nathanw */
82 1.29.8.2 nathanw int
83 1.29.8.2 nathanw atzscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
84 1.29.8.2 nathanw {
85 1.29.8.2 nathanw struct zbus_args *zap;
86 1.29.8.2 nathanw
87 1.29.8.2 nathanw zap = auxp;
88 1.29.8.2 nathanw
89 1.29.8.2 nathanw /*
90 1.29.8.2 nathanw * Check manufacturer and product id.
91 1.29.8.2 nathanw * I was informed that older boards can be 2 also.
92 1.29.8.2 nathanw */
93 1.29.8.2 nathanw if (zap->manid == 514 && (zap->prodid == 3 || zap->prodid == 2))
94 1.29.8.2 nathanw return(1);
95 1.29.8.2 nathanw else
96 1.29.8.2 nathanw return(0);
97 1.29.8.2 nathanw }
98 1.29.8.2 nathanw
99 1.29.8.2 nathanw void
100 1.29.8.2 nathanw atzscattach(struct device *pdp, struct device *dp, void *auxp)
101 1.29.8.2 nathanw {
102 1.29.8.2 nathanw volatile struct sdmac *rp;
103 1.29.8.2 nathanw struct sbic_softc *sc = (struct sbic_softc *)dp;
104 1.29.8.2 nathanw struct zbus_args *zap;
105 1.29.8.2 nathanw struct scsipi_adapter *adapt = &sc->sc_adapter;
106 1.29.8.2 nathanw struct scsipi_channel *chan = &sc->sc_channel;
107 1.29.8.2 nathanw
108 1.29.8.2 nathanw zap = auxp;
109 1.29.8.2 nathanw
110 1.29.8.2 nathanw sc->sc_cregs = rp = zap->va;
111 1.29.8.2 nathanw /*
112 1.29.8.2 nathanw * disable ints and reset bank register
113 1.29.8.2 nathanw */
114 1.29.8.2 nathanw rp->CNTR = CNTR_PDMD;
115 1.29.8.2 nathanw rp->DAWR = DAWR_ATZSC;
116 1.29.8.2 nathanw sc->sc_enintr = atzsc_enintr;
117 1.29.8.2 nathanw sc->sc_dmago = atzsc_dmago;
118 1.29.8.2 nathanw sc->sc_dmanext = atzsc_dmanext;
119 1.29.8.2 nathanw sc->sc_dmastop = atzsc_dmastop;
120 1.29.8.2 nathanw sc->sc_dmacmd = 0;
121 1.29.8.2 nathanw
122 1.29.8.2 nathanw /*
123 1.29.8.2 nathanw * only 24 bit mem.
124 1.29.8.2 nathanw */
125 1.29.8.2 nathanw sc->sc_flags |= SBICF_BADDMA;
126 1.29.8.2 nathanw sc->sc_dmamask = ~0x00ffffff;
127 1.29.8.2 nathanw #if 0
128 1.29.8.2 nathanw /*
129 1.29.8.2 nathanw * If the users kva space is not ztwo try and allocate a bounce buffer.
130 1.29.8.2 nathanw * XXX this needs to change if we move to multiple memory segments.
131 1.29.8.2 nathanw */
132 1.29.8.2 nathanw if (kvtop(sc) & sc->sc_dmamask) {
133 1.29.8.2 nathanw sc->sc_dmabuffer = (char *)alloc_z2mem(MAXPHYS * 8); /* XXX */
134 1.29.8.2 nathanw if (isztwomem(sc->sc_dmabuffer))
135 1.29.8.2 nathanw printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer));
136 1.29.8.2 nathanw else if (sc->sc_dmabuffer)
137 1.29.8.2 nathanw printf(" bounce pa 0x%x",
138 1.29.8.2 nathanw PREP_DMA_MEM(sc->sc_dmabuffer));
139 1.29.8.2 nathanw }
140 1.29.8.2 nathanw #endif
141 1.29.8.2 nathanw sc->sc_sbic.sbic_asr_p = (volatile unsigned char *)rp + 0x91;
142 1.29.8.2 nathanw sc->sc_sbic.sbic_value_p = (volatile unsigned char *)rp + 0x93;
143 1.29.8.2 nathanw
144 1.29.8.2 nathanw sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77;
145 1.29.8.2 nathanw
146 1.29.8.2 nathanw printf(": dmamask 0x%lx\n", ~sc->sc_dmamask);
147 1.29.8.2 nathanw
148 1.29.8.2 nathanw /*
149 1.29.8.2 nathanw * Fill in the scsipi_adapter.
150 1.29.8.2 nathanw */
151 1.29.8.2 nathanw memset(adapt, 0, sizeof(*adapt));
152 1.29.8.2 nathanw adapt->adapt_dev = &sc->sc_dev;
153 1.29.8.2 nathanw adapt->adapt_nchannels = 1;
154 1.29.8.2 nathanw adapt->adapt_openings = 7;
155 1.29.8.2 nathanw adapt->adapt_max_periph = 1;
156 1.29.8.2 nathanw adapt->adapt_request = sbic_scsipi_request;
157 1.29.8.2 nathanw adapt->adapt_minphys = sbic_minphys;
158 1.29.8.2 nathanw
159 1.29.8.2 nathanw /*
160 1.29.8.2 nathanw * Fill in the scsipi_channel.
161 1.29.8.2 nathanw */
162 1.29.8.2 nathanw memset(chan, 0, sizeof(*chan));
163 1.29.8.2 nathanw chan->chan_adapter = adapt;
164 1.29.8.2 nathanw chan->chan_bustype = &scsi_bustype;
165 1.29.8.2 nathanw chan->chan_channel = 0;
166 1.29.8.2 nathanw chan->chan_ntargets = 8;
167 1.29.8.2 nathanw chan->chan_nluns = 8;
168 1.29.8.2 nathanw chan->chan_id = 7;
169 1.29.8.2 nathanw
170 1.29.8.2 nathanw sbicinit(sc);
171 1.29.8.2 nathanw
172 1.29.8.2 nathanw sc->sc_isr.isr_intr = atzsc_dmaintr;
173 1.29.8.2 nathanw sc->sc_isr.isr_arg = sc;
174 1.29.8.2 nathanw sc->sc_isr.isr_ipl = 2;
175 1.29.8.2 nathanw add_isr (&sc->sc_isr);
176 1.29.8.2 nathanw
177 1.29.8.2 nathanw /*
178 1.29.8.2 nathanw * attach all scsi units on us
179 1.29.8.2 nathanw */
180 1.29.8.2 nathanw config_found(dp, chan, scsiprint);
181 1.29.8.2 nathanw }
182 1.29.8.2 nathanw
183 1.29.8.2 nathanw void
184 1.29.8.2 nathanw atzsc_enintr(struct sbic_softc *dev)
185 1.29.8.2 nathanw {
186 1.29.8.2 nathanw volatile struct sdmac *sdp;
187 1.29.8.2 nathanw
188 1.29.8.2 nathanw sdp = dev->sc_cregs;
189 1.29.8.2 nathanw
190 1.29.8.2 nathanw dev->sc_flags |= SBICF_INTR;
191 1.29.8.2 nathanw sdp->CNTR = CNTR_PDMD | CNTR_INTEN;
192 1.29.8.2 nathanw }
193 1.29.8.2 nathanw
194 1.29.8.2 nathanw int
195 1.29.8.2 nathanw atzsc_dmago(struct sbic_softc *dev, char *addr, int count, int flags)
196 1.29.8.2 nathanw {
197 1.29.8.2 nathanw volatile struct sdmac *sdp;
198 1.29.8.2 nathanw
199 1.29.8.2 nathanw sdp = dev->sc_cregs;
200 1.29.8.2 nathanw /*
201 1.29.8.2 nathanw * Set up the command word based on flags
202 1.29.8.2 nathanw */
203 1.29.8.2 nathanw dev->sc_dmacmd = CNTR_PDMD | CNTR_INTEN;
204 1.29.8.2 nathanw if ((flags & DMAGO_READ) == 0)
205 1.29.8.2 nathanw dev->sc_dmacmd |= CNTR_DDIR;
206 1.29.8.2 nathanw #ifdef DEBUG
207 1.29.8.2 nathanw if (atzsc_dmadebug & DDB_IO)
208 1.29.8.2 nathanw printf("atzsc_dmago: cmd %x\n", dev->sc_dmacmd);
209 1.29.8.2 nathanw #endif
210 1.29.8.2 nathanw
211 1.29.8.2 nathanw dev->sc_flags |= SBICF_INTR;
212 1.29.8.2 nathanw sdp->CNTR = dev->sc_dmacmd;
213 1.29.8.2 nathanw sdp->ACR = (u_int) dev->sc_cur->dc_addr;
214 1.29.8.2 nathanw sdp->ST_DMA = 1;
215 1.29.8.2 nathanw
216 1.29.8.2 nathanw return(dev->sc_tcnt);
217 1.29.8.2 nathanw }
218 1.29.8.2 nathanw
219 1.29.8.2 nathanw void
220 1.29.8.2 nathanw atzsc_dmastop(struct sbic_softc *dev)
221 1.29.8.2 nathanw {
222 1.29.8.2 nathanw volatile struct sdmac *sdp;
223 1.29.8.2 nathanw int s;
224 1.29.8.2 nathanw
225 1.29.8.2 nathanw sdp = dev->sc_cregs;
226 1.29.8.2 nathanw
227 1.29.8.2 nathanw #ifdef DEBUG
228 1.29.8.2 nathanw if (atzsc_dmadebug & DDB_FOLLOW)
229 1.29.8.2 nathanw printf("atzsc_dmastop()\n");
230 1.29.8.2 nathanw #endif
231 1.29.8.2 nathanw if (dev->sc_dmacmd) {
232 1.29.8.2 nathanw s = splbio();
233 1.29.8.2 nathanw if ((dev->sc_dmacmd & (CNTR_TCEN | CNTR_DDIR)) == 0) {
234 1.29.8.2 nathanw /*
235 1.29.8.2 nathanw * only FLUSH if terminal count not enabled,
236 1.29.8.2 nathanw * and reading from peripheral
237 1.29.8.2 nathanw */
238 1.29.8.2 nathanw sdp->FLUSH = 1;
239 1.29.8.2 nathanw while ((sdp->ISTR & ISTR_FE_FLG) == 0)
240 1.29.8.2 nathanw ;
241 1.29.8.2 nathanw }
242 1.29.8.2 nathanw /*
243 1.29.8.2 nathanw * clear possible interrupt and stop dma
244 1.29.8.2 nathanw */
245 1.29.8.2 nathanw sdp->CINT = 1;
246 1.29.8.2 nathanw sdp->SP_DMA = 1;
247 1.29.8.2 nathanw dev->sc_dmacmd = 0;
248 1.29.8.2 nathanw splx(s);
249 1.29.8.2 nathanw }
250 1.29.8.2 nathanw }
251 1.29.8.2 nathanw
252 1.29.8.2 nathanw int
253 1.29.8.2 nathanw atzsc_dmaintr(void *arg)
254 1.29.8.2 nathanw {
255 1.29.8.2 nathanw struct sbic_softc *dev = arg;
256 1.29.8.2 nathanw volatile struct sdmac *sdp;
257 1.29.8.2 nathanw int stat, found;
258 1.29.8.2 nathanw
259 1.29.8.2 nathanw sdp = dev->sc_cregs;
260 1.29.8.2 nathanw stat = sdp->ISTR;
261 1.29.8.2 nathanw
262 1.29.8.2 nathanw if ((stat & (ISTR_INT_F|ISTR_INT_P)) == 0)
263 1.29.8.2 nathanw return (0);
264 1.29.8.2 nathanw
265 1.29.8.2 nathanw #ifdef DEBUG
266 1.29.8.2 nathanw if (atzsc_dmadebug & DDB_FOLLOW)
267 1.29.8.2 nathanw printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat);
268 1.29.8.2 nathanw #endif
269 1.29.8.2 nathanw
270 1.29.8.2 nathanw /*
271 1.29.8.2 nathanw * both, SCSI and DMA interrupts arrive here. I chose
272 1.29.8.2 nathanw * arbitrarily that DMA interrupts should have higher
273 1.29.8.2 nathanw * precedence than SCSI interrupts.
274 1.29.8.2 nathanw */
275 1.29.8.2 nathanw found = 0;
276 1.29.8.2 nathanw if (stat & ISTR_E_INT) {
277 1.29.8.2 nathanw found++;
278 1.29.8.2 nathanw
279 1.29.8.2 nathanw sdp->CINT = 1; /* clear possible interrupt */
280 1.29.8.2 nathanw
281 1.29.8.2 nathanw /*
282 1.29.8.2 nathanw * check for SCSI ints in the same go and
283 1.29.8.2 nathanw * eventually save an interrupt
284 1.29.8.2 nathanw */
285 1.29.8.2 nathanw }
286 1.29.8.2 nathanw
287 1.29.8.2 nathanw if (dev->sc_flags & SBICF_INTR && stat & ISTR_INTS)
288 1.29.8.2 nathanw found += sbicintr(dev);
289 1.29.8.2 nathanw return(found);
290 1.29.8.2 nathanw }
291 1.29.8.2 nathanw
292 1.29.8.2 nathanw
293 1.29.8.2 nathanw int
294 1.29.8.2 nathanw atzsc_dmanext(struct sbic_softc *dev)
295 1.29.8.2 nathanw {
296 1.29.8.2 nathanw volatile struct sdmac *sdp;
297 1.29.8.2 nathanw
298 1.29.8.2 nathanw sdp = dev->sc_cregs;
299 1.29.8.2 nathanw
300 1.29.8.2 nathanw if (dev->sc_cur > dev->sc_last) {
301 1.29.8.2 nathanw /* shouldn't happen !! */
302 1.29.8.2 nathanw printf("atzsc_dmanext at end !!!\n");
303 1.29.8.2 nathanw atzsc_dmastop(dev);
304 1.29.8.2 nathanw return(0);
305 1.29.8.2 nathanw }
306 1.29.8.2 nathanw if ((dev->sc_dmacmd & (CNTR_TCEN | CNTR_DDIR)) == 0) {
307 1.29.8.2 nathanw /*
308 1.29.8.2 nathanw * only FLUSH if terminal count not enabled,
309 1.29.8.2 nathanw * and reading from peripheral
310 1.29.8.2 nathanw */
311 1.29.8.2 nathanw sdp->FLUSH = 1;
312 1.29.8.2 nathanw while ((sdp->ISTR & ISTR_FE_FLG) == 0)
313 1.29.8.2 nathanw ;
314 1.29.8.2 nathanw }
315 1.29.8.2 nathanw /*
316 1.29.8.2 nathanw * clear possible interrupt and stop dma
317 1.29.8.2 nathanw */
318 1.29.8.2 nathanw sdp->CINT = 1; /* clear possible interrupt */
319 1.29.8.2 nathanw sdp->SP_DMA = 1; /* stop dma */
320 1.29.8.2 nathanw sdp->CNTR = dev->sc_dmacmd;
321 1.29.8.2 nathanw sdp->ACR = (u_int)dev->sc_cur->dc_addr;
322 1.29.8.2 nathanw sdp->ST_DMA = 1;
323 1.29.8.2 nathanw
324 1.29.8.2 nathanw dev->sc_tcnt = dev->sc_cur->dc_count << 1;
325 1.29.8.2 nathanw return(dev->sc_tcnt);
326 1.29.8.2 nathanw }
327 1.29.8.2 nathanw
328 1.29.8.2 nathanw #ifdef DEBUG
329 1.29.8.2 nathanw void
330 1.29.8.2 nathanw atzsc_dump(void)
331 1.29.8.2 nathanw {
332 1.29.8.2 nathanw extern struct cfdriver atzsc_cd;
333 1.29.8.2 nathanw int i;
334 1.29.8.2 nathanw
335 1.29.8.2 nathanw for (i = 0; i < atzsc_cd.cd_ndevs; ++i)
336 1.29.8.2 nathanw if (atzsc_cd.cd_devs[i])
337 1.29.8.2 nathanw sbic_dump(atzsc_cd.cd_devs[i]);
338 1.29.8.2 nathanw }
339 1.29.8.2 nathanw #endif
340