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atzscreg.h revision 1.3
      1  1.3  aymeric /*	$NetBSD: atzscreg.h,v 1.3 2002/01/26 13:40:53 aymeric Exp $	*/
      2  1.2      cgd 
      3  1.1   chopps /*
      4  1.1   chopps  * Copyright (c) 1994 Christian E. Hopps
      5  1.1   chopps  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6  1.1   chopps  * All rights reserved.
      7  1.1   chopps  *
      8  1.1   chopps  * Redistribution and use in source and binary forms, with or without
      9  1.1   chopps  * modification, are permitted provided that the following conditions
     10  1.1   chopps  * are met:
     11  1.1   chopps  * 1. Redistributions of source code must retain the above copyright
     12  1.1   chopps  *    notice, this list of conditions and the following disclaimer.
     13  1.1   chopps  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.1   chopps  *    notice, this list of conditions and the following disclaimer in the
     15  1.1   chopps  *    documentation and/or other materials provided with the distribution.
     16  1.1   chopps  * 3. All advertising materials mentioning features or use of this software
     17  1.1   chopps  *    must display the following acknowledgement:
     18  1.1   chopps  *	This product includes software developed by the University of
     19  1.1   chopps  *	California, Berkeley and its contributors.
     20  1.1   chopps  * 4. Neither the name of the University nor the names of its contributors
     21  1.1   chopps  *    may be used to endorse or promote products derived from this software
     22  1.1   chopps  *    without specific prior written permission.
     23  1.1   chopps  *
     24  1.1   chopps  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  1.1   chopps  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  1.1   chopps  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  1.1   chopps  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  1.1   chopps  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  1.1   chopps  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  1.1   chopps  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  1.1   chopps  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  1.1   chopps  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  1.1   chopps  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  1.1   chopps  * SUCH DAMAGE.
     35  1.1   chopps  *
     36  1.1   chopps  *	@(#)dmareg.h
     37  1.1   chopps  */
     38  1.1   chopps #ifndef _AMIGA_DEV_ATZSCREG_H_
     39  1.1   chopps #define _AMIGA_DEV_ATZSCREG_H_
     40  1.1   chopps 
     41  1.1   chopps /*
     42  1.1   chopps  * Hardware layout of the A2091 SDMAC. This also contains the
     43  1.1   chopps  * registers for the sbic chip, but in favor of separating DMA and
     44  1.1   chopps  * scsi, the scsi-driver doesn't make use of this dependency
     45  1.1   chopps  */
     46  1.1   chopps 
     47  1.1   chopps #define v_char		volatile char
     48  1.1   chopps #define	v_int		volatile int
     49  1.1   chopps #define vu_char		volatile u_char
     50  1.1   chopps #define vu_short	volatile u_short
     51  1.1   chopps #define vu_int		volatile u_int
     52  1.1   chopps 
     53  1.1   chopps /* This chip definition only defines the registers also present on the
     54  1.1   chopps    A3000 SDMAC. */
     55  1.1   chopps 
     56  1.1   chopps struct sdmac {
     57  1.1   chopps 	short		pad0[0x20];
     58  1.1   chopps 	vu_short ISTR;		/* Interrupt Status Register RO */
     59  1.1   chopps 	vu_short CNTR;		/* Control Register RW */
     60  1.1   chopps 	short		pad1[0x1e];
     61  1.1   chopps 	vu_int   WTC;		/* Word Transfer Count Register RW */
     62  1.1   chopps 	vu_int   ACR;		/* Address Count Register RW */
     63  1.1   chopps 	short		pad2[0x03];
     64  1.1   chopps 	vu_short DAWR;		/* DACK Width Register WO */
     65  1.1   chopps 	char		pad3;
     66  1.1   chopps 	vu_char  SASR;		/* sbic asr */
     67  1.1   chopps 	char		pad4;
     68  1.1   chopps 	vu_char	 SCMD;		/* sbic data */
     69  1.1   chopps 	short		pad5[0x26];
     70  1.1   chopps 	vu_short ST_DMA;	/* Start DMA Transfers RW-Strobe */
     71  1.1   chopps 	vu_short SP_DMA;	/* Stop DMA Transfers RW-Strobe */
     72  1.1   chopps 	vu_short CINT;		/* Clear Interrupts RW-Strobe */
     73  1.1   chopps 	short		pad6;
     74  1.1   chopps 	vu_short FLUSH;		/* Flush FIFO RW-Strobe */
     75  1.1   chopps };
     76  1.3  aymeric 
     77  1.1   chopps /*
     78  1.1   chopps  * value to go into DAWR
     79  1.1   chopps  */
     80  1.1   chopps #define DAWR_ATZSC	3	/* according to A3000T service-manual */
     81  1.1   chopps 
     82  1.1   chopps /*
     83  1.1   chopps  * bits defined for CNTR
     84  1.1   chopps  */
     85  1.1   chopps #define CNTR_TCEN	(1<<7)	/* Terminal Count Enable */
     86  1.1   chopps #define CNTR_PREST	(1<<6)	/* Perp Reset (not implemented :-((( ) */
     87  1.1   chopps #define CNTR_PDMD	(1<<5)  /* Perp Device Mode Select (1=SCSI,0=XT/AT) */
     88  1.1   chopps #define CNTR_INTEN	(1<<4)	/* Interrupt Enable */
     89  1.1   chopps #define CNTR_DDIR	(1<<3)	/* Device Direction. 1==rd host, wr to perp */
     90  1.1   chopps 
     91  1.1   chopps /*
     92  1.1   chopps  * bits defined for ISTR
     93  1.1   chopps  */
     94  1.1   chopps #define ISTR_INTX	(1<<8)	/* XT/AT Interrupt pending */
     95  1.1   chopps #define ISTR_INT_F	(1<<7)	/* Interrupt Follow */
     96  1.1   chopps #define ISTR_INTS	(1<<6)	/* SCSI Peripheral Interrupt */
     97  1.1   chopps #define ISTR_E_INT	(1<<5)	/* End-Of-Process Interrupt */
     98  1.1   chopps #define ISTR_INT_P	(1<<4)	/* Interrupt Pending */
     99  1.1   chopps #define ISTR_UE_INT	(1<<3)	/* Under-Run FIFO Error Interrupt */
    100  1.1   chopps #define ISTR_OE_INT	(1<<2)	/* Over-Run FIFO Error Interrupt */
    101  1.1   chopps #define ISTR_FF_FLG	(1<<1)	/* FIFO-Full Flag */
    102  1.1   chopps #define ISTR_FE_FLG	(1<<0)	/* FIFO-Empty Flag */
    103  1.1   chopps 
    104  1.1   chopps #endif /* _AMIGA_DEV_ATZSCREG_H_ */
    105