clock.c revision 1.32 1 /* $NetBSD: clock.c,v 1.32 1998/01/12 10:39:18 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: clock.c 1.18 91/01/21$
41 *
42 * @(#)clock.c 7.6 (Berkeley) 5/7/91
43 */
44
45 #include <sys/param.h>
46 #include <sys/kernel.h>
47 #include <sys/device.h>
48 #include <sys/systm.h>
49 #include <machine/psl.h>
50 #include <machine/cpu.h>
51 #include <amiga/amiga/device.h>
52 #include <amiga/amiga/custom.h>
53 #include <amiga/amiga/cia.h>
54 #ifdef DRACO
55 #include <amiga/amiga/drcustom.h>
56 #endif
57 #include <amiga/dev/rtc.h>
58 #include <amiga/dev/zbusvar.h>
59
60 #if defined(PROF) && defined(PROFTIMER)
61 #include <sys/PROF.h>
62 #endif
63
64 /* the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz.
65 We're using a 100 Hz clock. */
66
67 #define CLK_INTERVAL amiga_clk_interval
68 int amiga_clk_interval;
69 int eclockfreq;
70 struct CIA *clockcia;
71
72 /*
73 * Machine-dependent clock routines.
74 *
75 * Startrtclock restarts the real-time clock, which provides
76 * hardclock interrupts to kern_clock.c.
77 *
78 * Inittodr initializes the time of day hardware which provides
79 * date functions.
80 *
81 * Resettodr restores the time of day hardware after a time change.
82 *
83 * A note on the real-time clock:
84 * We actually load the clock with CLK_INTERVAL-1 instead of CLK_INTERVAL.
85 * This is because the counter decrements to zero after N+1 enabled clock
86 * periods where N is the value loaded into the counter.
87 */
88
89 int clockmatch __P((struct device *, struct cfdata *, void *));
90 void clockattach __P((struct device *, struct device *, void *));
91 void cpu_initclocks __P((void));
92 void calibrate_delay __P((struct device *));
93
94 struct cfattach clock_ca = {
95 sizeof(struct device), clockmatch, clockattach
96 };
97
98 int
99 clockmatch(pdp, cfp, auxp)
100 struct device *pdp;
101 struct cfdata *cfp;
102 void *auxp;
103 {
104 if (matchname("clock", auxp))
105 return(1);
106 return(0);
107 }
108
109 /*
110 * Start the real-time clock.
111 */
112 void
113 clockattach(pdp, dp, auxp)
114 struct device *pdp, *dp;
115 void *auxp;
116 {
117 char *clockchip;
118 unsigned short interval;
119 #ifdef DRACO
120 u_char dracorev;
121 #endif
122
123 if (eclockfreq == 0)
124 eclockfreq = 715909; /* guess NTSC */
125
126 CLK_INTERVAL = (eclockfreq / 100);
127
128 #ifdef DRACO
129 dracorev = is_draco();
130 if (dracorev >= 4) {
131 CLK_INTERVAL = (eclockfreq / 700);
132 clockchip = "QuickLogic";
133 } else if (dracorev) {
134 clockcia = (struct CIA *)CIAAbase;
135 clockchip = "CIA A";
136 } else
137 #endif
138 {
139 clockcia = (struct CIA *)CIABbase;
140 clockchip = "CIA B";
141 }
142
143 if (dp)
144 printf(": %s system hz %d hardware hz %d\n", clockchip, hz,
145 #ifdef DRACO
146 dracorev >= 4 ? eclockfreq / 7 : eclockfreq);
147 #else
148 eclockfreq);
149 #endif
150
151 #ifdef DRACO
152 if (dracorev >= 4) {
153 /*
154 * can't preload anything beforehand, timer is free_running;
155 * but need this for delay calibration.
156 */
157
158 draco_ioct->io_timerlo = CLK_INTERVAL & 0xff;
159 draco_ioct->io_timerhi = CLK_INTERVAL >> 8;
160
161 calibrate_delay(dp);
162
163 return;
164 }
165 #endif
166 /*
167 * stop timer A
168 */
169 clockcia->cra = clockcia->cra & 0xc0;
170 clockcia->icr = 1 << 0; /* disable timer A interrupt */
171 interval = clockcia->icr; /* and make sure it's clear */
172
173 /*
174 * load interval into registers.
175 * the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz
176 * supprort for PAL WHEN?!?! XXX
177 */
178 interval = CLK_INTERVAL - 1;
179
180 /*
181 * order of setting is important !
182 */
183 clockcia->talo = interval & 0xff;
184 clockcia->tahi = interval >> 8;
185 /*
186 * start timer A in continuous mode
187 */
188 clockcia->cra = (clockcia->cra & 0xc0) | 1;
189
190 calibrate_delay(dp);
191 }
192
193 /*
194 * Calibrate delay loop.
195 * We use two iterations because we don't have enough bits to do a factor of
196 * 8 with better than 1%.
197 *
198 * XXX Note that we MUST stay below 1 tick if using clkread(), even for
199 * underestimated values of delaydivisor.
200 *
201 * XXX the "ns" below is only correct for a shift of 10 bits, and even then
202 * off by 2.4%
203 */
204
205 void calibrate_delay(dp)
206 struct device *dp;
207 {
208 unsigned long t1, t2;
209 extern u_int32_t delaydivisor;
210 /* XXX this should be defined elsewhere */
211
212 if (dp)
213 printf("Calibrating delay loop... ");
214
215 do {
216 t1 = clkread();
217 delay(1024);
218 t2 = clkread();
219 } while (t2 <= t1);
220 t2 -= t1;
221 delaydivisor = (delaydivisor * t2 + 1023) >> 10;
222 #ifdef DEBUG
223 if (dp)
224 printf("\ndiff %ld us, new divisor %u/1024 us\n", t2,
225 delaydivisor);
226 do {
227 t1 = clkread();
228 delay(1024);
229 t2 = clkread();
230 } while (t2 <= t1);
231 t2 -= t1;
232 delaydivisor = (delaydivisor * t2 + 1023) >> 10;
233 if (dp)
234 printf("diff %ld us, new divisor %u/1024 us\n", t2,
235 delaydivisor);
236 #endif
237 do {
238 t1 = clkread();
239 delay(1024);
240 t2 = clkread();
241 } while (t2 <= t1);
242 t2 -= t1;
243 delaydivisor = (delaydivisor * t2 + 1023) >> 10;
244 #ifdef DEBUG
245 if (dp)
246 printf("diff %ld us, new divisor ", t2);
247 #endif
248 if (dp)
249 printf("%u/1024 us\n", delaydivisor);
250 }
251
252 void
253 cpu_initclocks()
254 {
255 #ifdef DRACO
256 unsigned char dracorev;
257 dracorev = is_draco();
258 if (dracorev >= 4) {
259 draco_ioct->io_timerlo = CLK_INTERVAL & 0xFF;
260 draco_ioct->io_timerhi = CLK_INTERVAL >> 8;
261 draco_ioct->io_timerrst = 0; /* any value resets */
262 draco_ioct->io_status2 |= DRSTAT2_TMRINTENA;
263
264 return;
265 }
266 #endif
267 /*
268 * enable interrupts for timer A
269 */
270 clockcia->icr = (1<<7) | (1<<0);
271
272 /*
273 * start timer A in continuous shot mode
274 */
275 clockcia->cra = (clockcia->cra & 0xc0) | 1;
276
277 /*
278 * and globally enable interrupts for ciab
279 */
280 #ifdef DRACO
281 if (dracorev) /* we use cia a on DraCo */
282 *draco_intena |= DRIRQ_INT2;
283 else
284 #endif
285 custom.intena = INTF_SETCLR | INTF_EXTER;
286
287 }
288
289 void
290 setstatclockrate(hz)
291 int hz;
292 {
293 }
294
295 /*
296 * Returns number of usec since last recorded clock "tick"
297 * (i.e. clock interrupt).
298 */
299 u_long
300 clkread()
301 {
302 u_int interval;
303 u_char hi, hi2, lo;
304
305 #ifdef DRACO
306 if (is_draco() >= 4) {
307 hi2 = draco_ioct->io_chiprev; /* latch timer */
308 hi = draco_ioct->io_timerhi;
309 lo = draco_ioct->io_timerlo;
310 interval = ((hi<<8) | lo);
311 if (interval > CLK_INTERVAL) /* timer underflow */
312 interval = 65536 + CLK_INTERVAL - interval;
313 else
314 interval = CLK_INTERVAL - interval;
315
316 } else
317 #endif
318 {
319 hi = clockcia->tahi;
320 lo = clockcia->talo;
321 hi2 = clockcia->tahi;
322 if (hi != hi2) {
323 lo = clockcia->talo;
324 hi = hi2;
325 }
326
327 interval = (CLK_INTERVAL - 1) - ((hi<<8) | lo);
328
329 /*
330 * should read ICR and if there's an int pending, adjust
331 * interval. However, since reading ICR clears the interrupt,
332 * we'd lose a hardclock int, and this is not tolerable.
333 */
334 }
335
336 return((interval * tick) / CLK_INTERVAL);
337 }
338
339 #if notyet
340
341 /* implement this later. I'd suggest using both timers in CIA-A, they're
342 not yet used. */
343
344 #include "clock.h"
345 #if NCLOCK > 0
346 /*
347 * /dev/clock: mappable high resolution timer.
348 *
349 * This code implements a 32-bit recycling counter (with a 4 usec period)
350 * using timers 2 & 3 on the 6840 clock chip. The counter can be mapped
351 * RO into a user's address space to achieve low overhead (no system calls),
352 * high-precision timing.
353 *
354 * Note that timer 3 is also used for the high precision profiling timer
355 * (PROFTIMER code above). Care should be taken when both uses are
356 * configured as only a token effort is made to avoid conflicting use.
357 */
358 #include <sys/proc.h>
359 #include <sys/resourcevar.h>
360 #include <sys/ioctl.h>
361 #include <sys/malloc.h>
362 #include <vm/vm.h>
363 #include <amiga/amiga/clockioctl.h>
364 #include <sys/specdev.h>
365 #include <sys/vnode.h>
366 #include <sys/mman.h>
367
368 int clockon = 0; /* non-zero if high-res timer enabled */
369 #ifdef PROFTIMER
370 int profprocs = 0; /* # of procs using profiling timer */
371 #endif
372 #ifdef DEBUG
373 int clockdebug = 0;
374 #endif
375
376 /*ARGSUSED*/
377 clockopen(dev, flags)
378 dev_t dev;
379 {
380 #ifdef PROFTIMER
381 #ifdef PROF
382 /*
383 * Kernel profiling enabled, give up.
384 */
385 if (profiling)
386 return(EBUSY);
387 #endif
388 /*
389 * If any user processes are profiling, give up.
390 */
391 if (profprocs)
392 return(EBUSY);
393 #endif
394 if (!clockon) {
395 startclock();
396 clockon++;
397 }
398 return(0);
399 }
400
401 /*ARGSUSED*/
402 clockclose(dev, flags)
403 dev_t dev;
404 {
405 (void) clockunmmap(dev, (caddr_t)0, curproc); /* XXX */
406 stopclock();
407 clockon = 0;
408 return(0);
409 }
410
411 /*ARGSUSED*/
412 clockioctl(dev, cmd, data, flag, p)
413 dev_t dev;
414 u_long cmd;
415 caddr_t data;
416 struct proc *p;
417 {
418 int error = 0;
419
420 switch (cmd) {
421
422 case CLOCKMAP:
423 error = clockmmap(dev, (caddr_t *)data, p);
424 break;
425
426 case CLOCKUNMAP:
427 error = clockunmmap(dev, *(caddr_t *)data, p);
428 break;
429
430 case CLOCKGETRES:
431 *(int *)data = CLK_RESOLUTION;
432 break;
433
434 default:
435 error = EINVAL;
436 break;
437 }
438 return(error);
439 }
440
441 /*ARGSUSED*/
442 clockmap(dev, off, prot)
443 dev_t dev;
444 {
445 return((off + (INTIOBASE+CLKBASE+CLKSR-1)) >> PGSHIFT);
446 }
447
448 clockmmap(dev, addrp, p)
449 dev_t dev;
450 caddr_t *addrp;
451 struct proc *p;
452 {
453 int error;
454 struct vnode vn;
455 struct specinfo si;
456 int flags;
457
458 flags = MAP_FILE|MAP_SHARED;
459 if (*addrp)
460 flags |= MAP_FIXED;
461 else
462 *addrp = (caddr_t)0x1000000; /* XXX */
463 vn.v_type = VCHR; /* XXX */
464 vn.v_specinfo = &si; /* XXX */
465 vn.v_rdev = dev; /* XXX */
466 error = vm_mmap(&p->p_vmspace->vm_map, (vm_offset_t *)addrp,
467 PAGE_SIZE, VM_PROT_ALL, flags, (caddr_t)&vn, 0);
468 return(error);
469 }
470
471 clockunmmap(dev, addr, p)
472 dev_t dev;
473 caddr_t addr;
474 struct proc *p;
475 {
476 int rv;
477
478 if (addr == 0)
479 return(EINVAL); /* XXX: how do we deal with this? */
480 rv = vm_deallocate(p->p_vmspace->vm_map, (vm_offset_t)addr, PAGE_SIZE);
481 return(rv == KERN_SUCCESS ? 0 : EINVAL);
482 }
483
484 startclock()
485 {
486 register struct clkreg *clk = (struct clkreg *)clkstd[0];
487
488 clk->clk_msb2 = -1; clk->clk_lsb2 = -1;
489 clk->clk_msb3 = -1; clk->clk_lsb3 = -1;
490
491 clk->clk_cr2 = CLK_CR3;
492 clk->clk_cr3 = CLK_OENAB|CLK_8BIT;
493 clk->clk_cr2 = CLK_CR1;
494 clk->clk_cr1 = CLK_IENAB;
495 }
496
497 stopclock()
498 {
499 register struct clkreg *clk = (struct clkreg *)clkstd[0];
500
501 clk->clk_cr2 = CLK_CR3;
502 clk->clk_cr3 = 0;
503 clk->clk_cr2 = CLK_CR1;
504 clk->clk_cr1 = CLK_IENAB;
505 }
506 #endif
507
508 #endif
509
510
511 #ifdef PROFTIMER
512 /*
513 * This code allows the amiga kernel to use one of the extra timers on
514 * the clock chip for profiling, instead of the regular system timer.
515 * The advantage of this is that the profiling timer can be turned up to
516 * a higher interrupt rate, giving finer resolution timing. The profclock
517 * routine is called from the lev6intr in locore, and is a specialized
518 * routine that calls addupc. The overhead then is far less than if
519 * hardclock/softclock was called. Further, the context switch code in
520 * locore has been changed to turn the profile clock on/off when switching
521 * into/out of a process that is profiling (startprofclock/stopprofclock).
522 * This reduces the impact of the profiling clock on other users, and might
523 * possibly increase the accuracy of the profiling.
524 */
525 int profint = PRF_INTERVAL; /* Clock ticks between interrupts */
526 int profscale = 0; /* Scale factor from sys clock to prof clock */
527 char profon = 0; /* Is profiling clock on? */
528
529 /* profon values - do not change, locore.s assumes these values */
530 #define PRF_NONE 0x00
531 #define PRF_USER 0x01
532 #define PRF_KERNEL 0x80
533
534 initprofclock()
535 {
536 #if NCLOCK > 0
537 struct proc *p = curproc; /* XXX */
538
539 /*
540 * If the high-res timer is running, force profiling off.
541 * Unfortunately, this gets reflected back to the user not as
542 * an error but as a lack of results.
543 */
544 if (clockon) {
545 p->p_stats->p_prof.pr_scale = 0;
546 return;
547 }
548 /*
549 * Keep track of the number of user processes that are profiling
550 * by checking the scale value.
551 *
552 * XXX: this all assumes that the profiling code is well behaved;
553 * i.e. profil() is called once per process with pcscale non-zero
554 * to turn it on, and once with pcscale zero to turn it off.
555 * Also assumes you don't do any forks or execs. Oh well, there
556 * is always adb...
557 */
558 if (p->p_stats->p_prof.pr_scale)
559 profprocs++;
560 else
561 profprocs--;
562 #endif
563 /*
564 * The profile interrupt interval must be an even divisor
565 * of the CLK_INTERVAL so that scaling from a system clock
566 * tick to a profile clock tick is possible using integer math.
567 */
568 if (profint > CLK_INTERVAL || (CLK_INTERVAL % profint) != 0)
569 profint = CLK_INTERVAL;
570 profscale = CLK_INTERVAL / profint;
571 }
572
573 startprofclock()
574 {
575 unsigned short interval;
576
577 /* stop timer B */
578 clockcia->crb = clockcia->crb & 0xc0;
579
580 /* load interval into registers.
581 the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz */
582
583 interval = profint - 1;
584
585 /* order of setting is important ! */
586 clockcia->tblo = interval & 0xff;
587 clockcia->tbhi = interval >> 8;
588
589 /* enable interrupts for timer B */
590 clockcia->icr = (1<<7) | (1<<1);
591
592 /* start timer B in continuous shot mode */
593 clockcia->crb = (clockcia->crb & 0xc0) | 1;
594 }
595
596 stopprofclock()
597 {
598 /* stop timer B */
599 clockcia->crb = clockcia->crb & 0xc0;
600 }
601
602 #ifdef PROF
603 /*
604 * profclock() is expanded in line in lev6intr() unless profiling kernel.
605 * Assumes it is called with clock interrupts blocked.
606 */
607 profclock(pc, ps)
608 caddr_t pc;
609 int ps;
610 {
611 /*
612 * Came from user mode.
613 * If this process is being profiled record the tick.
614 */
615 if (USERMODE(ps)) {
616 if (p->p_stats.p_prof.pr_scale)
617 addupc(pc, &curproc->p_stats.p_prof, 1);
618 }
619 /*
620 * Came from kernel (supervisor) mode.
621 * If we are profiling the kernel, record the tick.
622 */
623 else if (profiling < 2) {
624 register int s = pc - s_lowpc;
625
626 if (s < s_textsize)
627 kcount[s / (HISTFRACTION * sizeof (*kcount))]++;
628 }
629 /*
630 * Kernel profiling was on but has been disabled.
631 * Mark as no longer profiling kernel and if all profiling done,
632 * disable the clock.
633 */
634 if (profiling && (profon & PRF_KERNEL)) {
635 profon &= ~PRF_KERNEL;
636 if (profon == PRF_NONE)
637 stopprofclock();
638 }
639 }
640 #endif
641 #endif
642
643 /*
644 * Initialize the time of day register, based on the time base which is, e.g.
645 * from a filesystem.
646 */
647 void
648 inittodr(base)
649 time_t base;
650 {
651 time_t timbuf = base; /* assume no battery clock exists */
652
653 if (gettod == NULL)
654 printf("WARNING: no battery clock\n");
655 else
656 timbuf = gettod() + rtc_offset * 60;
657
658 if (timbuf < base) {
659 printf("WARNING: bad date in battery clock\n");
660 timbuf = base;
661 }
662
663 /* Battery clock does not store usec's, so forget about it. */
664 time.tv_sec = timbuf;
665 }
666
667 void
668 resettodr()
669 {
670 if (settod && settod(time.tv_sec - rtc_offset * 60) == 0)
671 printf("Cannot set battery backed clock\n");
672 }
673