Home | History | Annotate | Line # | Download | only in dev
drsc.c revision 1.26
      1  1.25        is /*	$NetBSD: drsc.c,v 1.26 2004/03/25 11:12:08 is Exp $ */
      2  1.24       agc 
      3  1.24       agc /*
      4  1.25        is  * Copyright (c) 1996 Ignatios Souvatzis
      5  1.24       agc  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6  1.24       agc  * All rights reserved.
      7  1.24       agc  *
      8  1.24       agc  * Redistribution and use in source and binary forms, with or without
      9  1.24       agc  * modification, are permitted provided that the following conditions
     10  1.24       agc  * are met:
     11  1.24       agc  * 1. Redistributions of source code must retain the above copyright
     12  1.24       agc  *    notice, this list of conditions and the following disclaimer.
     13  1.24       agc  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.24       agc  *    notice, this list of conditions and the following disclaimer in the
     15  1.24       agc  *    documentation and/or other materials provided with the distribution.
     16  1.24       agc  * 3. Neither the name of the University nor the names of its contributors
     17  1.24       agc  *    may be used to endorse or promote products derived from this software
     18  1.24       agc  *    without specific prior written permission.
     19  1.24       agc  *
     20  1.24       agc  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     21  1.24       agc  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22  1.24       agc  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23  1.24       agc  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     24  1.24       agc  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25  1.24       agc  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26  1.24       agc  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  1.24       agc  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  1.24       agc  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  1.24       agc  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  1.24       agc  * SUCH DAMAGE.
     31  1.24       agc  *
     32  1.24       agc  *	@(#)dma.c
     33  1.24       agc  */
     34   1.1        is 
     35  1.26        is /*
     36  1.26        is  * Copyright (c) 1994 Michael L. Hitch
     37  1.26        is  *
     38  1.26        is  * Redistribution and use in source and binary forms, with or without
     39  1.26        is  * modification, are permitted provided that the following conditions
     40  1.26        is  * are met:
     41  1.26        is  * 1. Redistributions of source code must retain the above copyright
     42  1.26        is  *    notice, this list of conditions and the following disclaimer.
     43  1.26        is  * 2. Redistributions in binary form must reproduce the above copyright
     44  1.26        is  *    notice, this list of conditions and the following disclaimer in the
     45  1.26        is  *    documentation and/or other materials provided with the distribution.
     46  1.26        is  * 3. All advertising materials mentioning features or use of this software
     47  1.26        is  *    must display the following acknowledgement:
     48  1.26        is  *	This product includes software developed by the University of
     49  1.26        is  *	California, Berkeley and its contributors.
     50  1.26        is  * 4. Neither the name of the University nor the names of its contributors
     51  1.26        is  *    may be used to endorse or promote products derived from this software
     52  1.26        is  *    without specific prior written permission.
     53  1.26        is  *
     54  1.26        is  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     55  1.26        is  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     56  1.26        is  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     57  1.26        is  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     58  1.26        is  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     59  1.26        is  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     60  1.26        is  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     61  1.26        is  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     62  1.26        is  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     63  1.26        is  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     64  1.26        is  * SUCH DAMAGE.
     65  1.26        is  *
     66  1.26        is  *	@(#)dma.c
     67  1.26        is  */
     68  1.26        is 
     69  1.20   aymeric #include <sys/cdefs.h>
     70  1.25        is __KERNEL_RCSID(0, "$NetBSD: drsc.c,v 1.26 2004/03/25 11:12:08 is Exp $");
     71   1.1        is 
     72   1.1        is #include <sys/param.h>
     73   1.1        is #include <sys/systm.h>
     74   1.1        is #include <sys/kernel.h>
     75   1.1        is #include <sys/device.h>
     76  1.23   thorpej 
     77  1.23   thorpej #include <uvm/uvm_extern.h>
     78  1.23   thorpej 
     79  1.10    bouyer #include <dev/scsipi/scsi_all.h>
     80  1.10    bouyer #include <dev/scsipi/scsipi_all.h>
     81  1.10    bouyer #include <dev/scsipi/scsiconf.h>
     82   1.1        is #include <amiga/amiga/custom.h>
     83   1.1        is #include <amiga/amiga/cc.h>
     84   1.1        is #include <amiga/amiga/device.h>
     85   1.1        is #include <amiga/amiga/isr.h>
     86   1.1        is #include <amiga/dev/siopreg.h>
     87   1.1        is #include <amiga/dev/siopvar.h>
     88   1.1        is #include <amiga/amiga/drcustom.h>
     89  1.16        is 
     90  1.16        is #include <machine/cpu.h>	/* is_xxx(), */
     91   1.1        is 
     92  1.19   aymeric void drscattach(struct device *, struct device *, void *);
     93  1.19   aymeric int drscmatch(struct device *, struct cfdata *, void *);
     94  1.19   aymeric int drsc_dmaintr(struct siop_softc *);
     95   1.2        is #ifdef DEBUG
     96  1.19   aymeric void drsc_dump(void);
     97   1.2        is #endif
     98   1.1        is 
     99   1.1        is #ifdef DEBUG
    100   1.1        is #endif
    101   1.1        is 
    102  1.22   thorpej CFATTACH_DECL(drsc, sizeof(struct siop_softc),
    103  1.22   thorpej     drscmatch, drscattach, NULL, NULL);
    104   1.1        is 
    105   1.1        is static struct siop_softc *drsc_softc;
    106   1.1        is 
    107   1.1        is /*
    108  1.19   aymeric  * One of us is on every DraCo motherboard,
    109   1.1        is  */
    110   1.1        is int
    111  1.19   aymeric drscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
    112   1.1        is {
    113  1.17    kleink 	static int drsc_matched = 0;
    114  1.17    kleink 
    115  1.17    kleink 	/* Allow only one instance. */
    116  1.17    kleink 	if (!is_draco() || !matchname(auxp, "drsc") || drsc_matched)
    117  1.17    kleink 		return (0);
    118  1.17    kleink 
    119  1.17    kleink 	drsc_matched = 1;
    120  1.17    kleink 	return(1);
    121   1.1        is }
    122   1.1        is 
    123   1.1        is void
    124  1.19   aymeric drscattach(struct device *pdp, struct device *dp, void *auxp)
    125   1.1        is {
    126  1.18    bouyer 	struct siop_softc *sc = (struct siop_softc *)dp;
    127   1.1        is 	struct zbus_args *zap;
    128   1.1        is 	siop_regmap_p rp;
    129  1.18    bouyer 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    130  1.18    bouyer 	struct scsipi_channel *chan = &sc->sc_channel;
    131   1.1        is 
    132   1.6  christos 	printf("\n");
    133   1.1        is 
    134   1.1        is 	zap = auxp;
    135   1.1        is 
    136  1.23   thorpej 	sc->sc_siopp = rp = (siop_regmap_p)(DRCCADDR+PAGE_SIZE*DRSCSIPG);
    137   1.1        is 
    138   1.1        is 	/*
    139   1.1        is 	 * CTEST7 = TT1
    140   1.1        is 	 */
    141   1.1        is 	sc->sc_clock_freq = 50;		/* Clock = 50MHz */
    142   1.1        is 	sc->sc_ctest7 = 0x02;
    143   1.1        is 
    144   1.1        is 	alloc_sicallback();
    145   1.1        is 
    146  1.18    bouyer 	/*
    147  1.18    bouyer 	 * Fill in the scsipi_adapter.
    148  1.18    bouyer 	 */
    149  1.18    bouyer 	memset(adapt, 0, sizeof(*adapt));
    150  1.18    bouyer 	adapt->adapt_dev = &sc->sc_dev;
    151  1.18    bouyer 	adapt->adapt_nchannels = 1;
    152  1.18    bouyer 	adapt->adapt_openings = 7;
    153  1.18    bouyer 	adapt->adapt_max_periph = 1;
    154  1.18    bouyer 	adapt->adapt_request = siop_scsipi_request;
    155  1.18    bouyer 	adapt->adapt_minphys = siop_minphys;
    156  1.14   thorpej 
    157  1.18    bouyer 	/*
    158  1.18    bouyer 	 * Fill in the scsipi_channel.
    159  1.18    bouyer 	 */
    160  1.18    bouyer 	memset(chan, 0, sizeof(*chan));
    161  1.18    bouyer 	chan->chan_adapter = adapt;
    162  1.18    bouyer 	chan->chan_bustype = &scsi_bustype;
    163  1.18    bouyer 	chan->chan_channel = 0;
    164  1.18    bouyer 	chan->chan_ntargets = 8;
    165  1.18    bouyer 	chan->chan_nluns = 8;
    166  1.18    bouyer 	chan->chan_id = 7;
    167   1.1        is 
    168   1.1        is 	siopinitialize(sc);
    169   1.1        is 
    170   1.1        is #if 0
    171   1.1        is 	sc->sc_isr.isr_intr = drsc_dmaintr;
    172   1.1        is 	sc->sc_isr.isr_arg = sc;
    173   1.1        is 	sc->sc_isr.isr_ipl = 4;
    174   1.1        is 	add_isr(&sc->sc_isr);
    175   1.1        is #else
    176   1.1        is 	drsc_softc = sc;
    177  1.12        is 	single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI);
    178  1.12        is 	single_inst_bset_b(*draco_intena, DRIRQ_SCSI);
    179   1.1        is #endif
    180   1.1        is 	/*
    181   1.1        is 	 * attach all scsi units on us
    182   1.1        is 	 */
    183  1.18    bouyer 	config_found(dp, chan, scsiprint);
    184   1.1        is }
    185   1.1        is 
    186   1.1        is /*
    187   1.1        is  * Level 4 interrupt processing for the MacroSystem DraCo mainboard
    188   1.1        is  * SCSI.  Because the level 4 interrupt is above splbio, the
    189   1.1        is  * interrupt status is saved and an sicallback to the level 2 interrupt
    190   1.1        is  * handler scheduled.  This way, the actual processing of the interrupt
    191   1.1        is  * can be deferred until splbio is unblocked.
    192   1.1        is  */
    193   1.1        is 
    194   1.1        is void
    195  1.19   aymeric drsc_handler(void)
    196   1.1        is {
    197   1.1        is 	struct siop_softc *sc = drsc_softc;
    198   1.1        is 
    199   1.1        is 	siop_regmap_p rp;
    200   1.1        is 	int istat;
    201   1.1        is 
    202   1.1        is 	if (sc->sc_flags & SIOP_INTSOFF)
    203   1.1        is 		return;		/* interrupts are not active */
    204   1.1        is 
    205   1.1        is 	rp = sc->sc_siopp;
    206   1.1        is 	istat = rp->siop_istat;
    207   1.1        is 
    208   1.1        is 	if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0)
    209   1.1        is 		return;
    210   1.1        is 
    211   1.1        is 	/*
    212   1.1        is 	 * save interrupt status, DMA status, and SCSI status 0
    213   1.1        is 	 * (may need to deal with stacked interrupts?)
    214   1.1        is 	 */
    215   1.1        is 	sc->sc_sstat0 = rp->siop_sstat0;
    216   1.1        is 	sc->sc_istat = istat;
    217   1.1        is 	sc->sc_dstat = rp->siop_dstat;
    218   1.1        is 	/*
    219   1.1        is 	 * disable interrupts until the callback can process this
    220   1.1        is 	 * interrupt.
    221   1.1        is 	 */
    222   1.1        is #ifdef DRSC_NOCALLBACK
    223   1.1        is 	(void)spl1();
    224   1.1        is 	siopintr(sc);
    225   1.1        is #else
    226   1.1        is 	rp->siop_sien = 0;
    227   1.1        is 	rp->siop_dien = 0;
    228   1.1        is 	sc->sc_flags |= SIOP_INTDEFER | SIOP_INTSOFF;
    229  1.12        is 	single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI);
    230   1.1        is #ifdef DEBUG
    231   1.1        is 	if (*draco_intpen & DRIRQ_SCSI)
    232   1.6  christos 		printf("%s: intpen still 0x%x\n", sc->sc_dev.dv_xname,
    233   1.1        is 		    *draco_intpen);
    234   1.1        is #endif
    235   1.1        is 	add_sicallback((sifunc_t)siopintr, sc, NULL);
    236   1.1        is #endif
    237   1.1        is 	return;
    238   1.1        is }
    239   1.1        is 
    240   1.1        is #ifdef DEBUG
    241   1.1        is void
    242  1.19   aymeric drsc_dump(void)
    243   1.1        is {
    244  1.11   thorpej 	extern struct cfdriver drsc_cd;
    245   1.1        is 	int i;
    246   1.1        is 
    247   1.1        is 	for (i = 0; i < drsc_cd.cd_ndevs; ++i)
    248   1.1        is 		if (drsc_cd.cd_devs[i])
    249   1.1        is 			siop_dump(drsc_cd.cd_devs[i]);
    250   1.1        is }
    251   1.1        is #endif
    252