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drsc.c revision 1.28.78.1
      1  1.28.78.1      yamt /*	$NetBSD: drsc.c,v 1.28.78.1 2009/05/04 08:10:34 yamt Exp $ */
      2       1.24       agc 
      3       1.24       agc /*
      4       1.25        is  * Copyright (c) 1996 Ignatios Souvatzis
      5       1.24       agc  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6       1.24       agc  * All rights reserved.
      7       1.24       agc  *
      8       1.24       agc  * Redistribution and use in source and binary forms, with or without
      9       1.24       agc  * modification, are permitted provided that the following conditions
     10       1.24       agc  * are met:
     11       1.24       agc  * 1. Redistributions of source code must retain the above copyright
     12       1.24       agc  *    notice, this list of conditions and the following disclaimer.
     13       1.24       agc  * 2. Redistributions in binary form must reproduce the above copyright
     14       1.24       agc  *    notice, this list of conditions and the following disclaimer in the
     15       1.24       agc  *    documentation and/or other materials provided with the distribution.
     16       1.24       agc  * 3. Neither the name of the University nor the names of its contributors
     17       1.24       agc  *    may be used to endorse or promote products derived from this software
     18       1.24       agc  *    without specific prior written permission.
     19       1.24       agc  *
     20       1.24       agc  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     21       1.24       agc  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22       1.24       agc  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23       1.24       agc  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     24       1.24       agc  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25       1.24       agc  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26       1.24       agc  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27       1.24       agc  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28       1.24       agc  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29       1.24       agc  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30       1.24       agc  * SUCH DAMAGE.
     31       1.24       agc  *
     32       1.24       agc  *	@(#)dma.c
     33       1.24       agc  */
     34        1.1        is 
     35       1.26        is /*
     36       1.26        is  * Copyright (c) 1994 Michael L. Hitch
     37       1.26        is  *
     38       1.26        is  * Redistribution and use in source and binary forms, with or without
     39       1.26        is  * modification, are permitted provided that the following conditions
     40       1.26        is  * are met:
     41       1.26        is  * 1. Redistributions of source code must retain the above copyright
     42       1.26        is  *    notice, this list of conditions and the following disclaimer.
     43       1.26        is  * 2. Redistributions in binary form must reproduce the above copyright
     44       1.26        is  *    notice, this list of conditions and the following disclaimer in the
     45       1.26        is  *    documentation and/or other materials provided with the distribution.
     46       1.26        is  *
     47       1.27    mhitch  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     48       1.27    mhitch  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     49       1.27    mhitch  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     50       1.27    mhitch  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     51       1.27    mhitch  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     52       1.27    mhitch  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     53       1.27    mhitch  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     54       1.27    mhitch  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     55       1.27    mhitch  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     56       1.27    mhitch  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     57       1.26        is  *
     58       1.26        is  *	@(#)dma.c
     59       1.26        is  */
     60       1.26        is 
     61       1.20   aymeric #include <sys/cdefs.h>
     62  1.28.78.1      yamt __KERNEL_RCSID(0, "$NetBSD: drsc.c,v 1.28.78.1 2009/05/04 08:10:34 yamt Exp $");
     63        1.1        is 
     64        1.1        is #include <sys/param.h>
     65        1.1        is #include <sys/systm.h>
     66        1.1        is #include <sys/kernel.h>
     67        1.1        is #include <sys/device.h>
     68       1.23   thorpej 
     69       1.23   thorpej #include <uvm/uvm_extern.h>
     70       1.23   thorpej 
     71       1.10    bouyer #include <dev/scsipi/scsi_all.h>
     72       1.10    bouyer #include <dev/scsipi/scsipi_all.h>
     73       1.10    bouyer #include <dev/scsipi/scsiconf.h>
     74        1.1        is #include <amiga/amiga/custom.h>
     75        1.1        is #include <amiga/amiga/cc.h>
     76        1.1        is #include <amiga/amiga/device.h>
     77        1.1        is #include <amiga/amiga/isr.h>
     78        1.1        is #include <amiga/dev/siopreg.h>
     79        1.1        is #include <amiga/dev/siopvar.h>
     80        1.1        is #include <amiga/amiga/drcustom.h>
     81       1.16        is 
     82       1.16        is #include <machine/cpu.h>	/* is_xxx(), */
     83        1.1        is 
     84       1.19   aymeric void drscattach(struct device *, struct device *, void *);
     85       1.19   aymeric int drscmatch(struct device *, struct cfdata *, void *);
     86       1.19   aymeric int drsc_dmaintr(struct siop_softc *);
     87        1.2        is #ifdef DEBUG
     88       1.19   aymeric void drsc_dump(void);
     89        1.2        is #endif
     90        1.1        is 
     91        1.1        is #ifdef DEBUG
     92        1.1        is #endif
     93        1.1        is 
     94       1.22   thorpej CFATTACH_DECL(drsc, sizeof(struct siop_softc),
     95       1.22   thorpej     drscmatch, drscattach, NULL, NULL);
     96        1.1        is 
     97        1.1        is static struct siop_softc *drsc_softc;
     98        1.1        is 
     99        1.1        is /*
    100       1.19   aymeric  * One of us is on every DraCo motherboard,
    101        1.1        is  */
    102        1.1        is int
    103       1.19   aymeric drscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
    104        1.1        is {
    105       1.17    kleink 	static int drsc_matched = 0;
    106       1.17    kleink 
    107       1.17    kleink 	/* Allow only one instance. */
    108       1.17    kleink 	if (!is_draco() || !matchname(auxp, "drsc") || drsc_matched)
    109       1.17    kleink 		return (0);
    110       1.17    kleink 
    111       1.17    kleink 	drsc_matched = 1;
    112       1.17    kleink 	return(1);
    113        1.1        is }
    114        1.1        is 
    115        1.1        is void
    116       1.19   aymeric drscattach(struct device *pdp, struct device *dp, void *auxp)
    117        1.1        is {
    118       1.18    bouyer 	struct siop_softc *sc = (struct siop_softc *)dp;
    119        1.1        is 	struct zbus_args *zap;
    120        1.1        is 	siop_regmap_p rp;
    121       1.18    bouyer 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    122       1.18    bouyer 	struct scsipi_channel *chan = &sc->sc_channel;
    123        1.1        is 
    124        1.6  christos 	printf("\n");
    125        1.1        is 
    126        1.1        is 	zap = auxp;
    127        1.1        is 
    128       1.23   thorpej 	sc->sc_siopp = rp = (siop_regmap_p)(DRCCADDR+PAGE_SIZE*DRSCSIPG);
    129        1.1        is 
    130        1.1        is 	/*
    131        1.1        is 	 * CTEST7 = TT1
    132        1.1        is 	 */
    133        1.1        is 	sc->sc_clock_freq = 50;		/* Clock = 50MHz */
    134        1.1        is 	sc->sc_ctest7 = 0x02;
    135        1.1        is 
    136        1.1        is 	alloc_sicallback();
    137        1.1        is 
    138       1.18    bouyer 	/*
    139       1.18    bouyer 	 * Fill in the scsipi_adapter.
    140       1.18    bouyer 	 */
    141       1.18    bouyer 	memset(adapt, 0, sizeof(*adapt));
    142       1.18    bouyer 	adapt->adapt_dev = &sc->sc_dev;
    143       1.18    bouyer 	adapt->adapt_nchannels = 1;
    144       1.18    bouyer 	adapt->adapt_openings = 7;
    145       1.18    bouyer 	adapt->adapt_max_periph = 1;
    146       1.18    bouyer 	adapt->adapt_request = siop_scsipi_request;
    147       1.18    bouyer 	adapt->adapt_minphys = siop_minphys;
    148       1.14   thorpej 
    149       1.18    bouyer 	/*
    150       1.18    bouyer 	 * Fill in the scsipi_channel.
    151       1.18    bouyer 	 */
    152       1.18    bouyer 	memset(chan, 0, sizeof(*chan));
    153       1.18    bouyer 	chan->chan_adapter = adapt;
    154       1.18    bouyer 	chan->chan_bustype = &scsi_bustype;
    155       1.18    bouyer 	chan->chan_channel = 0;
    156       1.18    bouyer 	chan->chan_ntargets = 8;
    157       1.18    bouyer 	chan->chan_nluns = 8;
    158       1.18    bouyer 	chan->chan_id = 7;
    159        1.1        is 
    160        1.1        is 	siopinitialize(sc);
    161        1.1        is 
    162        1.1        is #if 0
    163        1.1        is 	sc->sc_isr.isr_intr = drsc_dmaintr;
    164        1.1        is 	sc->sc_isr.isr_arg = sc;
    165        1.1        is 	sc->sc_isr.isr_ipl = 4;
    166        1.1        is 	add_isr(&sc->sc_isr);
    167        1.1        is #else
    168        1.1        is 	drsc_softc = sc;
    169       1.12        is 	single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI);
    170       1.12        is 	single_inst_bset_b(*draco_intena, DRIRQ_SCSI);
    171        1.1        is #endif
    172        1.1        is 	/*
    173        1.1        is 	 * attach all scsi units on us
    174        1.1        is 	 */
    175       1.18    bouyer 	config_found(dp, chan, scsiprint);
    176        1.1        is }
    177        1.1        is 
    178        1.1        is /*
    179        1.1        is  * Level 4 interrupt processing for the MacroSystem DraCo mainboard
    180        1.1        is  * SCSI.  Because the level 4 interrupt is above splbio, the
    181        1.1        is  * interrupt status is saved and an sicallback to the level 2 interrupt
    182        1.1        is  * handler scheduled.  This way, the actual processing of the interrupt
    183        1.1        is  * can be deferred until splbio is unblocked.
    184        1.1        is  */
    185        1.1        is 
    186        1.1        is void
    187       1.19   aymeric drsc_handler(void)
    188        1.1        is {
    189        1.1        is 	struct siop_softc *sc = drsc_softc;
    190        1.1        is 
    191        1.1        is 	siop_regmap_p rp;
    192        1.1        is 	int istat;
    193        1.1        is 
    194        1.1        is 	if (sc->sc_flags & SIOP_INTSOFF)
    195        1.1        is 		return;		/* interrupts are not active */
    196        1.1        is 
    197        1.1        is 	rp = sc->sc_siopp;
    198        1.1        is 	istat = rp->siop_istat;
    199        1.1        is 
    200        1.1        is 	if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0)
    201        1.1        is 		return;
    202        1.1        is 
    203        1.1        is 	/*
    204        1.1        is 	 * save interrupt status, DMA status, and SCSI status 0
    205        1.1        is 	 * (may need to deal with stacked interrupts?)
    206        1.1        is 	 */
    207        1.1        is 	sc->sc_sstat0 = rp->siop_sstat0;
    208        1.1        is 	sc->sc_istat = istat;
    209        1.1        is 	sc->sc_dstat = rp->siop_dstat;
    210        1.1        is 	/*
    211        1.1        is 	 * disable interrupts until the callback can process this
    212        1.1        is 	 * interrupt.
    213        1.1        is 	 */
    214        1.1        is #ifdef DRSC_NOCALLBACK
    215        1.1        is 	(void)spl1();
    216        1.1        is 	siopintr(sc);
    217        1.1        is #else
    218        1.1        is 	rp->siop_sien = 0;
    219        1.1        is 	rp->siop_dien = 0;
    220        1.1        is 	sc->sc_flags |= SIOP_INTDEFER | SIOP_INTSOFF;
    221       1.12        is 	single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI);
    222        1.1        is #ifdef DEBUG
    223        1.1        is 	if (*draco_intpen & DRIRQ_SCSI)
    224        1.6  christos 		printf("%s: intpen still 0x%x\n", sc->sc_dev.dv_xname,
    225        1.1        is 		    *draco_intpen);
    226        1.1        is #endif
    227        1.1        is 	add_sicallback((sifunc_t)siopintr, sc, NULL);
    228        1.1        is #endif
    229        1.1        is 	return;
    230        1.1        is }
    231        1.1        is 
    232        1.1        is #ifdef DEBUG
    233        1.1        is void
    234       1.19   aymeric drsc_dump(void)
    235        1.1        is {
    236       1.11   thorpej 	extern struct cfdriver drsc_cd;
    237  1.28.78.1      yamt 	struct siop_softc *sc;
    238        1.1        is 	int i;
    239        1.1        is 
    240  1.28.78.1      yamt 	for (i = 0; i < drsc_cd.cd_ndevs; ++i) {
    241  1.28.78.1      yamt 		sc = device_lookup_private(&drsc_cd, i);
    242  1.28.78.1      yamt 		if (sc != NULL)
    243  1.28.78.1      yamt 			siop_dump(sc);
    244  1.28.78.1      yamt 	}
    245        1.1        is }
    246        1.1        is #endif
    247