drsc.c revision 1.24
1 /* $NetBSD: drsc.c,v 1.24 2003/08/07 16:26:40 agc Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)dma.c 32 */ 33 34 /* 35 * Copyright (c) 1996 Ignatios Souvatzis 36 * Copyright (c) 1994 Michael L. Hitch 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by the University of 49 * California, Berkeley and its contributors. 50 * 4. Neither the name of the University nor the names of its contributors 51 * may be used to endorse or promote products derived from this software 52 * without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 56 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 57 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 58 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 59 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 60 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 62 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 63 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 64 * SUCH DAMAGE. 65 * 66 * @(#)dma.c 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: drsc.c,v 1.24 2003/08/07 16:26:40 agc Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/kernel.h> 75 #include <sys/device.h> 76 77 #include <uvm/uvm_extern.h> 78 79 #include <dev/scsipi/scsi_all.h> 80 #include <dev/scsipi/scsipi_all.h> 81 #include <dev/scsipi/scsiconf.h> 82 #include <amiga/amiga/custom.h> 83 #include <amiga/amiga/cc.h> 84 #include <amiga/amiga/device.h> 85 #include <amiga/amiga/isr.h> 86 #include <amiga/dev/siopreg.h> 87 #include <amiga/dev/siopvar.h> 88 #include <amiga/amiga/drcustom.h> 89 90 #include <machine/cpu.h> /* is_xxx(), */ 91 92 void drscattach(struct device *, struct device *, void *); 93 int drscmatch(struct device *, struct cfdata *, void *); 94 int drsc_dmaintr(struct siop_softc *); 95 #ifdef DEBUG 96 void drsc_dump(void); 97 #endif 98 99 #ifdef DEBUG 100 #endif 101 102 CFATTACH_DECL(drsc, sizeof(struct siop_softc), 103 drscmatch, drscattach, NULL, NULL); 104 105 static struct siop_softc *drsc_softc; 106 107 /* 108 * One of us is on every DraCo motherboard, 109 */ 110 int 111 drscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 112 { 113 static int drsc_matched = 0; 114 115 /* Allow only one instance. */ 116 if (!is_draco() || !matchname(auxp, "drsc") || drsc_matched) 117 return (0); 118 119 drsc_matched = 1; 120 return(1); 121 } 122 123 void 124 drscattach(struct device *pdp, struct device *dp, void *auxp) 125 { 126 struct siop_softc *sc = (struct siop_softc *)dp; 127 struct zbus_args *zap; 128 siop_regmap_p rp; 129 struct scsipi_adapter *adapt = &sc->sc_adapter; 130 struct scsipi_channel *chan = &sc->sc_channel; 131 132 printf("\n"); 133 134 zap = auxp; 135 136 sc->sc_siopp = rp = (siop_regmap_p)(DRCCADDR+PAGE_SIZE*DRSCSIPG); 137 138 /* 139 * CTEST7 = TT1 140 */ 141 sc->sc_clock_freq = 50; /* Clock = 50MHz */ 142 sc->sc_ctest7 = 0x02; 143 144 alloc_sicallback(); 145 146 /* 147 * Fill in the scsipi_adapter. 148 */ 149 memset(adapt, 0, sizeof(*adapt)); 150 adapt->adapt_dev = &sc->sc_dev; 151 adapt->adapt_nchannels = 1; 152 adapt->adapt_openings = 7; 153 adapt->adapt_max_periph = 1; 154 adapt->adapt_request = siop_scsipi_request; 155 adapt->adapt_minphys = siop_minphys; 156 157 /* 158 * Fill in the scsipi_channel. 159 */ 160 memset(chan, 0, sizeof(*chan)); 161 chan->chan_adapter = adapt; 162 chan->chan_bustype = &scsi_bustype; 163 chan->chan_channel = 0; 164 chan->chan_ntargets = 8; 165 chan->chan_nluns = 8; 166 chan->chan_id = 7; 167 168 siopinitialize(sc); 169 170 #if 0 171 sc->sc_isr.isr_intr = drsc_dmaintr; 172 sc->sc_isr.isr_arg = sc; 173 sc->sc_isr.isr_ipl = 4; 174 add_isr(&sc->sc_isr); 175 #else 176 drsc_softc = sc; 177 single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI); 178 single_inst_bset_b(*draco_intena, DRIRQ_SCSI); 179 #endif 180 /* 181 * attach all scsi units on us 182 */ 183 config_found(dp, chan, scsiprint); 184 } 185 186 /* 187 * Level 4 interrupt processing for the MacroSystem DraCo mainboard 188 * SCSI. Because the level 4 interrupt is above splbio, the 189 * interrupt status is saved and an sicallback to the level 2 interrupt 190 * handler scheduled. This way, the actual processing of the interrupt 191 * can be deferred until splbio is unblocked. 192 */ 193 194 void 195 drsc_handler(void) 196 { 197 struct siop_softc *sc = drsc_softc; 198 199 siop_regmap_p rp; 200 int istat; 201 202 if (sc->sc_flags & SIOP_INTSOFF) 203 return; /* interrupts are not active */ 204 205 rp = sc->sc_siopp; 206 istat = rp->siop_istat; 207 208 if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) 209 return; 210 211 /* 212 * save interrupt status, DMA status, and SCSI status 0 213 * (may need to deal with stacked interrupts?) 214 */ 215 sc->sc_sstat0 = rp->siop_sstat0; 216 sc->sc_istat = istat; 217 sc->sc_dstat = rp->siop_dstat; 218 /* 219 * disable interrupts until the callback can process this 220 * interrupt. 221 */ 222 #ifdef DRSC_NOCALLBACK 223 (void)spl1(); 224 siopintr(sc); 225 #else 226 rp->siop_sien = 0; 227 rp->siop_dien = 0; 228 sc->sc_flags |= SIOP_INTDEFER | SIOP_INTSOFF; 229 single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI); 230 #ifdef DEBUG 231 if (*draco_intpen & DRIRQ_SCSI) 232 printf("%s: intpen still 0x%x\n", sc->sc_dev.dv_xname, 233 *draco_intpen); 234 #endif 235 add_sicallback((sifunc_t)siopintr, sc, NULL); 236 #endif 237 return; 238 } 239 240 #ifdef DEBUG 241 void 242 drsc_dump(void) 243 { 244 extern struct cfdriver drsc_cd; 245 int i; 246 247 for (i = 0; i < drsc_cd.cd_ndevs; ++i) 248 if (drsc_cd.cd_devs[i]) 249 siop_dump(drsc_cd.cd_devs[i]); 250 } 251 #endif 252
Indexes created Wed Sep 24 02:09:48 GMT 2025