drsc.c revision 1.28.78.2
1 /* $NetBSD: drsc.c,v 1.28.78.2 2009/06/20 07:20:00 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Ignatios Souvatzis 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * @(#)dma.c 33 */ 34 35 /* 36 * Copyright (c) 1994 Michael L. Hitch 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 * 58 * @(#)dma.c 59 */ 60 61 #include <sys/cdefs.h> 62 __KERNEL_RCSID(0, "$NetBSD: drsc.c,v 1.28.78.2 2009/06/20 07:20:00 yamt Exp $"); 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/kernel.h> 67 #include <sys/device.h> 68 69 #include <uvm/uvm_extern.h> 70 71 #include <dev/scsipi/scsi_all.h> 72 #include <dev/scsipi/scsipi_all.h> 73 #include <dev/scsipi/scsiconf.h> 74 #include <amiga/amiga/custom.h> 75 #include <amiga/amiga/cc.h> 76 #include <amiga/amiga/device.h> 77 #include <amiga/amiga/isr.h> 78 #include <amiga/dev/siopreg.h> 79 #include <amiga/dev/siopvar.h> 80 #include <amiga/amiga/drcustom.h> 81 #include <m68k/include/asm_single.h> 82 83 #include <machine/cpu.h> /* is_xxx(), */ 84 85 void drscattach(struct device *, struct device *, void *); 86 int drscmatch(struct device *, struct cfdata *, void *); 87 int drsc_dmaintr(struct siop_softc *); 88 #ifdef DEBUG 89 void drsc_dump(void); 90 #endif 91 92 #ifdef DEBUG 93 #endif 94 95 CFATTACH_DECL(drsc, sizeof(struct siop_softc), 96 drscmatch, drscattach, NULL, NULL); 97 98 static struct siop_softc *drsc_softc; 99 100 /* 101 * One of us is on every DraCo motherboard, 102 */ 103 int 104 drscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 105 { 106 static int drsc_matched = 0; 107 108 /* Allow only one instance. */ 109 if (!is_draco() || !matchname(auxp, "drsc") || drsc_matched) 110 return (0); 111 112 drsc_matched = 1; 113 return(1); 114 } 115 116 void 117 drscattach(struct device *pdp, struct device *dp, void *auxp) 118 { 119 struct siop_softc *sc = (struct siop_softc *)dp; 120 struct zbus_args *zap; 121 siop_regmap_p rp; 122 struct scsipi_adapter *adapt = &sc->sc_adapter; 123 struct scsipi_channel *chan = &sc->sc_channel; 124 125 printf("\n"); 126 127 zap = auxp; 128 129 sc->sc_siopp = rp = (siop_regmap_p)(DRCCADDR+PAGE_SIZE*DRSCSIPG); 130 131 /* 132 * CTEST7 = TT1 133 */ 134 sc->sc_clock_freq = 50; /* Clock = 50MHz */ 135 sc->sc_ctest7 = 0x02; 136 137 sc->sc_siop_si = softint_establish(SOFTINT_BIO, 138 (void (*)(void *))siopintr, sc); 139 140 /* 141 * Fill in the scsipi_adapter. 142 */ 143 memset(adapt, 0, sizeof(*adapt)); 144 adapt->adapt_dev = &sc->sc_dev; 145 adapt->adapt_nchannels = 1; 146 adapt->adapt_openings = 7; 147 adapt->adapt_max_periph = 1; 148 adapt->adapt_request = siop_scsipi_request; 149 adapt->adapt_minphys = siop_minphys; 150 151 /* 152 * Fill in the scsipi_channel. 153 */ 154 memset(chan, 0, sizeof(*chan)); 155 chan->chan_adapter = adapt; 156 chan->chan_bustype = &scsi_bustype; 157 chan->chan_channel = 0; 158 chan->chan_ntargets = 8; 159 chan->chan_nluns = 8; 160 chan->chan_id = 7; 161 162 siopinitialize(sc); 163 164 #if 0 165 sc->sc_isr.isr_intr = drsc_dmaintr; 166 sc->sc_isr.isr_arg = sc; 167 sc->sc_isr.isr_ipl = 4; 168 add_isr(&sc->sc_isr); 169 #else 170 drsc_softc = sc; 171 single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI); 172 single_inst_bset_b(*draco_intena, DRIRQ_SCSI); 173 #endif 174 /* 175 * attach all scsi units on us 176 */ 177 config_found(dp, chan, scsiprint); 178 } 179 180 /* 181 * Level 4 interrupt processing for the MacroSystem DraCo mainboard 182 * SCSI. Because the level 4 interrupt is above splbio, the 183 * interrupt status is saved and a softint scheduled. This way, 184 * the actual processing of the interrupt can be deferred until 185 * splbio is unblocked. 186 */ 187 188 void 189 drsc_handler(void) 190 { 191 struct siop_softc *sc = drsc_softc; 192 193 siop_regmap_p rp; 194 int istat; 195 196 if (sc->sc_flags & SIOP_INTSOFF) 197 return; /* interrupts are not active */ 198 199 rp = sc->sc_siopp; 200 istat = rp->siop_istat; 201 202 if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) 203 return; 204 205 /* 206 * save interrupt status, DMA status, and SCSI status 0 207 * (may need to deal with stacked interrupts?) 208 */ 209 sc->sc_sstat0 = rp->siop_sstat0; 210 sc->sc_istat = istat; 211 sc->sc_dstat = rp->siop_dstat; 212 /* 213 * disable interrupts until the callback can process this 214 * interrupt. 215 */ 216 #ifdef DRSC_NOCALLBACK 217 (void)spl1(); 218 siopintr(sc); 219 #else 220 rp->siop_sien = 0; 221 rp->siop_dien = 0; 222 sc->sc_flags |= SIOP_INTDEFER | SIOP_INTSOFF; 223 single_inst_bclr_b(*draco_intpen, DRIRQ_SCSI); 224 #ifdef DEBUG 225 if (*draco_intpen & DRIRQ_SCSI) 226 printf("%s: intpen still 0x%x\n", sc->sc_dev.dv_xname, 227 *draco_intpen); 228 #endif 229 softint_schedule(sc->sc_siop_si); 230 #endif 231 return; 232 } 233 234 #ifdef DEBUG 235 void 236 drsc_dump(void) 237 { 238 extern struct cfdriver drsc_cd; 239 struct siop_softc *sc; 240 int i; 241 242 for (i = 0; i < drsc_cd.cd_ndevs; ++i) { 243 sc = device_lookup_private(&drsc_cd, i); 244 if (sc != NULL) 245 siop_dump(sc); 246 } 247 } 248 #endif 249
Indexes created Thu Oct 02 01:09:59 GMT 2025