efa.c revision 1.7
1 /* $NetBSD: efa.c,v 1.7 2012/07/09 19:34:56 rkujawa Exp $ */ 2 3 /*- 4 * Copyright (c) 2011 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Radoslaw Kujawa. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for FastATA 1200 EIDE controller, manufactured by ELBOX Computer. 34 * 35 * Gayle-related stuff inspired by wdc_amiga.c written by Michael L. Hitch 36 * and Aymeric Vincent. 37 */ 38 39 #include <sys/cdefs.h> 40 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/malloc.h> 45 #include <sys/device.h> 46 #include <sys/bus.h> 47 #include <sys/proc.h> 48 #include <sys/kernel.h> 49 #include <sys/kthread.h> 50 51 #include <machine/cpu.h> 52 #include <machine/intr.h> 53 #include <sys/bswap.h> 54 55 #include <amiga/amiga/cia.h> 56 #include <amiga/amiga/custom.h> 57 #include <amiga/amiga/device.h> 58 #include <amiga/amiga/gayle.h> 59 #include <amiga/dev/zbusvar.h> 60 61 #include <dev/ata/atavar.h> 62 #include <dev/ic/wdcvar.h> 63 64 #include <amiga/dev/efareg.h> 65 #include <amiga/dev/efavar.h> 66 67 #define EFA_32BIT_IO 1 68 /* #define EFA_NO_INTR 1 */ 69 /* #define EFA_DEBUG 1 */ 70 71 int efa_probe(device_t, cfdata_t, void *); 72 void efa_attach(device_t, device_t, void *); 73 int efa_intr(void *); 74 int efa_intr_soft(void *arg); 75 static void efa_set_opts(struct efa_softc *sc); 76 static bool efa_mapbase(struct efa_softc *sc); 77 static bool efa_mapreg_gayle(struct efa_softc *sc); 78 static bool efa_mapreg_native(struct efa_softc *sc); 79 static void efa_fata_subregion_pio0(struct wdc_regs *wdr_fata); 80 static void efa_fata_subregion_pion(struct wdc_regs *wdr_fata, bool data32); 81 static void efa_setup_channel(struct ata_channel *chp); 82 static void efa_attach_channel(struct efa_softc *sc, int i); 83 static void efa_select_regset(struct efa_softc *sc, int chnum, 84 uint8_t piomode); 85 static void efa_poll_kthread(void *arg); 86 static bool efa_compare_status(void); 87 #ifdef EFA_DEBUG 88 static void efa_debug_print_regmapping(struct wdc_regs *wdr_fata); 89 #endif /* EFA_DEBUG */ 90 91 CFATTACH_DECL_NEW(efa, sizeof(struct efa_softc), 92 efa_probe, efa_attach, NULL, NULL); 93 94 #define PIO_NSUPP 0xFFFFFFFF 95 96 static const bus_addr_t pio_offsets[] = 97 { FATA1_PIO0_OFF, PIO_NSUPP, PIO_NSUPP, FATA1_PIO3_OFF, FATA1_PIO4_OFF, 98 FATA1_PIO5_OFF }; 99 static const unsigned int wdr_offsets_pio0[] = 100 { FATA1_PIO0_OFF_DATA, FATA1_PIO0_OFF_ERROR, FATA1_PIO0_OFF_SECCNT, 101 FATA1_PIO0_OFF_SECTOR, FATA1_PIO0_OFF_CYL_LO, FATA1_PIO0_OFF_CYL_HI, 102 FATA1_PIO0_OFF_SDH, FATA1_PIO0_OFF_COMMAND }; 103 static const unsigned int wdr_offsets_pion[] = 104 { FATA1_PION_OFF_DATA, FATA1_PION_OFF_ERROR, FATA1_PION_OFF_SECCNT, 105 FATA1_PION_OFF_SECTOR, FATA1_PION_OFF_CYL_LO, FATA1_PION_OFF_CYL_HI, 106 FATA1_PION_OFF_SDH, FATA1_PION_OFF_COMMAND }; 107 108 int 109 efa_probe(device_t parent, cfdata_t cfp, void *aux) 110 { 111 /* 112 * FastATA 1200 uses portions of Gayle IDE interface, and efa driver 113 * can't coexist with wdc_amiga. Match "wdc" on an A1200, because 114 * FastATA 1200 does not autoconfigure. 115 */ 116 if (!matchname(aux, "wdc") || !is_a1200()) 117 return(0); 118 119 if (!efa_compare_status()) 120 return(0); 121 122 #ifdef EFA_DEBUG 123 aprint_normal("efa_probe succeeded\n"); 124 #endif /* EFA_DEBUG */ 125 126 return 100; 127 } 128 129 void 130 efa_attach(device_t parent, device_t self, void *aux) 131 { 132 int i; 133 struct efa_softc *sc = device_private(self); 134 135 aprint_normal(": ELBOX FastATA 1200\n"); 136 137 gayle_init(); 138 139 sc->sc_dev = self; 140 141 efa_set_opts(sc); 142 143 if (!efa_mapbase(sc)) { 144 aprint_error_dev(self, "couldn't map base addresses\n"); 145 return; 146 } 147 if (!efa_mapreg_gayle(sc)) { 148 aprint_error_dev(self, "couldn't map Gayle registers\n"); 149 return; 150 } 151 if (!efa_mapreg_native(sc)) { 152 aprint_error_dev(self, "couldn't map FastATA regsters\n"); 153 return; 154 } 155 156 sc->sc_wdcdev.sc_atac.atac_pio_cap = 5; 157 sc->sc_wdcdev.sc_atac.atac_nchannels = FATA1_CHANNELS; 158 sc->sc_wdcdev.sc_atac.atac_set_modes = efa_setup_channel; 159 sc->sc_wdcdev.sc_atac.atac_dev = self; 160 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist; 161 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16; 162 sc->sc_wdcdev.wdc_maxdrives = 2; 163 164 if (sc->sc_32bit_io) 165 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32; 166 167 /* 168 * The following should work for polling mode, but it does not. 169 * if (sc->sc_no_intr) 170 * sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_NOIRQ; 171 */ 172 173 wdc_allocate_regs(&sc->sc_wdcdev); 174 175 sc->sc_intreg = &gayle.intreq; 176 177 for (i = 0; i < FATA1_CHANNELS; i++) 178 efa_attach_channel(sc, i); 179 180 if (sc->sc_no_intr) { 181 sc->sc_fata_softintr = softint_establish(SOFTINT_BIO, 182 (void (*)(void *))efa_intr_soft, sc); 183 if (sc->sc_fata_softintr == NULL) { 184 aprint_error_dev(self, "couldn't create soft intr\n"); 185 return; 186 } 187 if (kthread_create(PRI_NONE, 0, NULL, efa_poll_kthread, sc, 188 NULL, "efa")) { 189 aprint_error_dev(self, "couldn't create kthread\n"); 190 return; 191 } 192 } else { 193 sc->sc_isr.isr_intr = efa_intr; 194 sc->sc_isr.isr_arg = sc; 195 sc->sc_isr.isr_ipl = 2; 196 add_isr (&sc->sc_isr); 197 gayle.intena |= GAYLE_INT_IDE; 198 } 199 200 } 201 202 static void 203 efa_attach_channel(struct efa_softc *sc, int chnum) 204 { 205 sc->sc_chanlist[chnum] = &sc->sc_ports[chnum].chan; 206 207 sc->sc_ports[chnum].chan.ch_channel = chnum; 208 sc->sc_ports[chnum].chan.ch_atac = &sc->sc_wdcdev.sc_atac; 209 sc->sc_ports[chnum].chan.ch_queue = &sc->sc_ports[chnum].queue; 210 211 if (!sc->sc_32bit_io) 212 efa_select_regset(sc, chnum, 0); /* Start in PIO0. */ 213 else 214 efa_select_regset(sc, chnum, 3); 215 216 wdc_init_shadow_regs(&sc->sc_ports[chnum].chan); 217 218 wdcattach(&sc->sc_ports[chnum].chan); 219 220 #ifdef EFA_DEBUG 221 aprint_normal_dev(sc->sc_dev, "done init for channel %d\n", chnum); 222 #endif 223 224 } 225 226 /* TODO: convert to callout(9) */ 227 static void 228 efa_poll_kthread(void *arg) 229 { 230 struct efa_softc *sc = arg; 231 232 for (;;) { 233 /* TODO: actually check if interrupt status register is set */ 234 softint_schedule(sc->sc_fata_softintr); 235 /* TODO: convert to kpause */ 236 tsleep(arg, PWAIT, "efa_poll", hz); 237 } 238 } 239 240 static void 241 efa_set_opts(struct efa_softc *sc) 242 { 243 #ifdef EFA_32BIT_IO 244 sc->sc_32bit_io = true; 245 #else 246 sc->sc_32bit_io = false; 247 #endif /* EFA_32BIT_IO */ 248 249 #ifdef EFA_NO_INTR 250 sc->sc_no_intr = true; /* XXX: not yet! */ 251 #else 252 sc->sc_no_intr = false; 253 #endif /* EFA_NO_INTR */ 254 255 if (sc->sc_no_intr) 256 aprint_verbose_dev(sc->sc_dev, "hardware interrupt disabled\n"); 257 258 if (sc->sc_32bit_io) 259 aprint_verbose_dev(sc->sc_dev, "32-bit I/O enabled\n"); 260 } 261 262 int 263 efa_intr_soft(void *arg) 264 { 265 int ret = 0; 266 struct efa_softc *sc = (struct efa_softc *)arg; 267 268 /* TODO: check which channel needs servicing */ 269 /* 270 uint8_t fataintreq; 271 fataintreq = bus_space_read_1(sc->sc_ports[0].wdr[piom].cmd_iot, 272 sc->sc_ports[chnum].intst[piom], 0); 273 */ 274 275 ret = wdcintr(&sc->sc_ports[0].chan); 276 ret = wdcintr(&sc->sc_ports[1].chan); 277 278 return ret; 279 } 280 281 int 282 efa_intr(void *arg) 283 { 284 struct efa_softc *sc = (struct efa_softc *)arg; 285 int r1, r2, ret; 286 u_char intreq; 287 288 intreq = *sc->sc_intreg; 289 ret = 0; 290 291 if (intreq & GAYLE_INT_IDE) { 292 gayle.intreq = 0x7c | (intreq & 0x03); 293 /* How to check which channel caused interrupt? 294 * Interrupt status register is not very useful here. */ 295 r1 = wdcintr(&sc->sc_ports[0].chan); 296 r2 = wdcintr(&sc->sc_ports[1].chan); 297 ret = r1 | r2; 298 } 299 300 return ret; 301 } 302 303 static bool 304 efa_mapbase(struct efa_softc *sc) 305 { 306 int i, j; 307 static struct bus_space_tag fata_cmd_iot; 308 static struct bus_space_tag gayle_cmd_iot; 309 310 gayle_cmd_iot.base = (bus_addr_t) ztwomap(GAYLE_IDE_BASE + 2); 311 gayle_cmd_iot.absm = &amiga_bus_stride_4swap; 312 fata_cmd_iot.base = (bus_addr_t) ztwomap(FATA1_BASE); 313 fata_cmd_iot.absm = &amiga_bus_stride_4swap; 314 315 #ifdef EFA_DEBUG 316 aprint_normal_dev(sc->sc_dev, "Gayle %x -> %x, FastATA %x -> %x\n", 317 GAYLE_IDE_BASE, gayle_cmd_iot.base, FATA1_BASE, fata_cmd_iot.base); 318 #endif 319 320 if (!gayle_cmd_iot.base) 321 return false; 322 if (!fata_cmd_iot.base) 323 return false; 324 325 sc->sc_gayle_wdc_regs.cmd_iot = &gayle_cmd_iot; 326 sc->sc_gayle_wdc_regs.ctl_iot = &gayle_cmd_iot; 327 328 for (i = 0; i < FATA1_CHANNELS; i++) { 329 for (j = 0; j < PIO_COUNT; j++) { 330 sc->sc_ports[i].wdr[j].cmd_iot = &fata_cmd_iot; 331 sc->sc_ports[i].wdr[j].data32iot = &fata_cmd_iot; 332 sc->sc_ports[i].wdr[j].ctl_iot = &gayle_cmd_iot; 333 } 334 } 335 336 return true; 337 } 338 339 340 /* Gayle IDE register mapping, we need it anyway. */ 341 static bool 342 efa_mapreg_gayle(struct efa_softc *sc) 343 { 344 int i; 345 346 struct wdc_regs *wdr = &sc->sc_gayle_wdc_regs; 347 348 if (bus_space_map(wdr->cmd_iot, 0, 0x40, 0, 349 &wdr->cmd_baseioh)) { 350 return false; 351 } 352 353 for (i = 0; i < WDC_NREG; i++) { 354 if (bus_space_subregion(wdr->cmd_iot, 355 wdr->cmd_baseioh, i, i == 0 ? 4 : 1, 356 &wdr->cmd_iohs[i]) != 0) { 357 358 bus_space_unmap(wdr->cmd_iot, 359 wdr->cmd_baseioh, 0x40); 360 return false; 361 } 362 } 363 364 if (bus_space_subregion(wdr->cmd_iot, 365 wdr->cmd_baseioh, 0x406, 1, &wdr->ctl_ioh)) 366 return false; 367 368 return true; 369 } 370 371 /* Native FastATA register mapping, suitable for PIO modes 0 to 5. */ 372 static bool 373 efa_mapreg_native(struct efa_softc *sc) 374 { 375 int i,j; 376 struct wdc_regs *wdr_gayle = &sc->sc_gayle_wdc_regs; 377 struct wdc_regs *wdr_fata; 378 379 for (i = 0; i < FATA1_CHANNELS; i++) { 380 381 for (j = 0; j < PIO_COUNT; j++) { 382 383 wdr_fata = &sc->sc_ports[i].wdr[j]; 384 sc->sc_ports[i].mode_ok[j] = false; 385 386 if (pio_offsets[j] == PIO_NSUPP) { 387 #ifdef EFA_DEBUG 388 aprint_normal_dev(sc->sc_dev, 389 "Skipping mapping for PIO mode %x\n", j); 390 #endif 391 continue; 392 } 393 394 if (bus_space_map(wdr_fata->cmd_iot, 395 pio_offsets[j] + FATA1_CHAN_SIZE * i, 396 FATA1_CHAN_SIZE, 0, &wdr_fata->cmd_baseioh)) { 397 return false; 398 } 399 #ifdef EFA_DEBUG 400 aprint_normal_dev(sc->sc_dev, 401 "Chan %x PIO mode %x mapped %x -> %x\n", 402 i, j, (bus_addr_t) kvtop((void*) 403 wdr_fata->cmd_baseioh), (unsigned int) 404 wdr_fata->cmd_baseioh); 405 #endif 406 407 sc->sc_ports[i].mode_ok[j] = true; 408 409 if (j == 0) 410 efa_fata_subregion_pio0(wdr_fata); 411 else { 412 if (sc->sc_32bit_io) 413 efa_fata_subregion_pion(wdr_fata, 414 true); 415 else 416 efa_fata_subregion_pion(wdr_fata, 417 false); 418 419 bus_space_subregion(wdr_fata->cmd_iot, 420 wdr_fata->cmd_baseioh, FATA1_PION_OFF_INTST, 421 1, &sc->sc_ports[i].intst[j]); 422 } 423 424 /* No 32-bit register for PIO0 ... */ 425 if (j == 0 && sc->sc_32bit_io) 426 sc->sc_ports[i].mode_ok[j] = false; 427 428 wdr_fata->ctl_ioh = wdr_gayle->ctl_ioh; 429 }; 430 } 431 return true; 432 } 433 434 435 static void 436 efa_fata_subregion_pio0(struct wdc_regs *wdr_fata) 437 { 438 int i; 439 440 for (i = 0; i < WDC_NREG; i++) 441 bus_space_subregion(wdr_fata->cmd_iot, 442 wdr_fata->cmd_baseioh, wdr_offsets_pio0[i], 443 i == 0 ? 4 : 1, &wdr_fata->cmd_iohs[i]); 444 } 445 446 static void 447 efa_fata_subregion_pion(struct wdc_regs *wdr_fata, bool data32) 448 { 449 int i; 450 451 if (data32) 452 bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh, 453 FATA1_PION_OFF_DATA32, 8, &wdr_fata->data32ioh); 454 455 for (i = 0; i < WDC_NREG; i++) 456 bus_space_subregion(wdr_fata->cmd_iot, 457 wdr_fata->cmd_baseioh, wdr_offsets_pion[i], 458 i == 0 ? 4 : 1, &wdr_fata->cmd_iohs[i]); 459 } 460 461 static void 462 efa_setup_channel(struct ata_channel *chp) 463 { 464 int drive, chnum; 465 uint8_t mode; 466 struct atac_softc *atac; 467 struct ata_drive_datas *drvp; 468 struct efa_softc *sc; 469 int ipl; 470 471 chnum = chp->ch_channel; 472 atac = chp->ch_atac; 473 sc = device_private(atac->atac_dev); 474 475 mode = 5; /* start with fastest possible setting */ 476 477 #ifdef EFA_DEBUG 478 aprint_normal_dev(sc->sc_dev, "efa_setup_channel for ch %d\n", 479 chnum); 480 #endif /* EFA_DEBUG */ 481 482 /* We might be in the middle of something... so raise IPL. */ 483 ipl = splvm(); 484 485 for (drive = 0; drive < 2; drive++) { 486 drvp = &chp->ch_drive[drive]; 487 488 if (drvp->drive_type == DRIVET_NONE) 489 continue; /* nothing to see here */ 490 491 if (drvp->PIO_cap < mode) 492 mode = drvp->PIO_cap; 493 494 /* TODO: check if sc_ports->mode_ok */ 495 496 #ifdef EFA_DEBUG 497 aprint_normal_dev(sc->sc_dev, "drive %d supports %d\n", 498 drive, drvp->PIO_cap); 499 #endif /* EFA_DEBUG */ 500 501 drvp->PIO_mode = mode; 502 } 503 504 /* Change FastATA register set. */ 505 efa_select_regset(sc, chnum, mode); 506 /* re-init shadow regs */ 507 wdc_init_shadow_regs(&sc->sc_ports[chnum].chan); 508 509 splx(ipl); 510 } 511 512 static void 513 efa_select_regset(struct efa_softc *sc, int chnum, uint8_t piomode) 514 { 515 struct wdc_softc *wdc; 516 517 wdc = CHAN_TO_WDC(&sc->sc_ports[chnum].chan); 518 wdc->regs[chnum] = sc->sc_ports[chnum].wdr[piomode]; 519 520 #ifdef EFA_DEBUG 521 aprint_normal_dev(sc->sc_dev, "switched ch %d to PIO %d\n", 522 chnum, piomode); 523 524 efa_debug_print_regmapping(&wdc->regs[chnum]); 525 #endif /* EFA_DEBUG */ 526 } 527 528 #ifdef EFA_DEBUG 529 static void 530 efa_debug_print_regmapping(struct wdc_regs *wdr_fata) 531 { 532 int i; 533 aprint_normal("base %x->%x", 534 (bus_addr_t) kvtop((void*) wdr_fata->cmd_baseioh), 535 (bus_addr_t) wdr_fata->cmd_baseioh); 536 for (i = 0; i < WDC_NREG; i++) { 537 aprint_normal("reg %x, %x->%x, ", i, 538 (bus_addr_t) kvtop((void*) wdr_fata->cmd_iohs[i]), 539 (bus_addr_t) wdr_fata->cmd_iohs[i]); 540 } 541 aprint_normal("\n"); 542 } 543 #endif /* EFA_DEBUG */ 544 545 /* Compare the values of (status) command register in PIO0, PIO3 sets. */ 546 static bool 547 efa_compare_status(void) 548 { 549 uint8_t cmd0, cmd3; 550 struct bus_space_tag fata_bst; 551 bus_space_tag_t fata_iot; 552 bus_space_handle_t cmd0_ioh, cmd3_ioh; 553 bool rv; 554 555 rv = false; 556 557 fata_bst.base = (bus_addr_t) ztwomap(FATA1_BASE); 558 fata_bst.absm = &amiga_bus_stride_4swap; 559 560 fata_iot = &fata_bst; 561 562 if (bus_space_map(fata_iot, pio_offsets[0], FATA1_CHAN_SIZE, 0, 563 &cmd0_ioh)) 564 return false; 565 if (bus_space_map(fata_iot, pio_offsets[3], FATA1_CHAN_SIZE, 0, 566 &cmd3_ioh)) 567 return false; 568 569 #ifdef EFA_DEBUG 570 aprint_normal("probing for FastATA at %x, %x: ", (bus_addr_t) cmd0_ioh, 571 (bus_addr_t) cmd3_ioh); 572 #endif /* EFA_DEBUG */ 573 574 cmd0 = bus_space_read_1(fata_iot, cmd0_ioh, FATA1_PIO0_OFF_COMMAND); 575 cmd3 = bus_space_read_1(fata_iot, cmd3_ioh, FATA1_PION_OFF_COMMAND); 576 577 if (cmd0 == cmd3) 578 rv = true; 579 580 if ( (cmd0 == 0xFF) || (cmd0 == 0x00) ) { 581 /* Assume there's nothing there... */ 582 rv = false; 583 } 584 585 #ifdef EFA_DEBUG 586 aprint_normal("cmd0 %x, cmd3 %x\n", cmd0, cmd3); 587 #endif /* EFA_DEBUG */ 588 589 bus_space_unmap(fata_iot, pio_offsets[0], FATA1_CHAN_SIZE); 590 bus_space_unmap(fata_iot, pio_offsets[3], FATA1_CHAN_SIZE); 591 592 return rv; 593 } 594 595
Indexes created Tue Sep 30 20:09:53 GMT 2025