grf_cl.c revision 1.19.2.2 1 1.19.2.2 veego /* $NetBSD: grf_cl.c,v 1.19.2.2 1997/03/05 22:46:33 veego Exp $ */
2 1.19.2.2 veego
3 1.19.2.2 veego /*
4 1.19.2.2 veego * Copyright (c) 1997 Klaus Burkert
5 1.19.2.2 veego * Copyright (c) 1995 Ezra Story
6 1.19.2.2 veego * Copyright (c) 1995 Kari Mettinen
7 1.19.2.2 veego * Copyright (c) 1994 Markus Wild
8 1.19.2.2 veego * Copyright (c) 1994 Lutz Vieweg
9 1.19.2.2 veego * All rights reserved.
10 1.19.2.2 veego *
11 1.19.2.2 veego * Redistribution and use in source and binary forms, with or without
12 1.19.2.2 veego * modification, are permitted provided that the following conditions
13 1.19.2.2 veego * are met:
14 1.19.2.2 veego * 1. Redistributions of source code must retain the above copyright
15 1.19.2.2 veego * notice, this list of conditions and the following disclaimer.
16 1.19.2.2 veego * 2. Redistributions in binary form must reproduce the above copyright
17 1.19.2.2 veego * notice, this list of conditions and the following disclaimer in the
18 1.19.2.2 veego * documentation and/or other materials provided with the distribution.
19 1.19.2.2 veego * 3. All advertising materials mentioning features or use of this software
20 1.19.2.2 veego * must display the following acknowledgement:
21 1.19.2.2 veego * This product includes software developed by Lutz Vieweg.
22 1.19.2.2 veego * 4. The name of the author may not be used to endorse or promote products
23 1.19.2.2 veego * derived from this software without specific prior written permission
24 1.19.2.2 veego *
25 1.19.2.2 veego * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.19.2.2 veego * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.19.2.2 veego * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.19.2.2 veego * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.19.2.2 veego * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.19.2.2 veego * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.19.2.2 veego * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.19.2.2 veego * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.19.2.2 veego * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 1.19.2.2 veego * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.19.2.2 veego */
36 1.19.2.2 veego #include "grfcl.h"
37 1.19.2.2 veego #if NGRFCL > 0
38 1.19.2.2 veego
39 1.19.2.2 veego /*
40 1.19.2.2 veego * Graphics routines for Cirrus CL GD 5426 boards,
41 1.19.2.2 veego *
42 1.19.2.2 veego * This code offers low-level routines to access Cirrus Cl GD 5426
43 1.19.2.2 veego * graphics-boards from within NetBSD for the Amiga.
44 1.19.2.2 veego * No warranties for any kind of function at all - this
45 1.19.2.2 veego * code may crash your hardware and scratch your harddisk. Use at your
46 1.19.2.2 veego * own risk. Freely distributable.
47 1.19.2.2 veego *
48 1.19.2.2 veego * Modified for Cirrus CL GD 5426 from
49 1.19.2.2 veego * Lutz Vieweg's retina driver by Kari Mettinen 08/94
50 1.19.2.2 veego * Contributions by Ill, ScottE, MiL
51 1.19.2.2 veego * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95
52 1.19.2.2 veego * Picasso/040 patches (wee!) by crest 01/96
53 1.19.2.2 veego *
54 1.19.2.2 veego * PicassoIV support bz Klaus "crest" Burkert.
55 1.19.2.2 veego * Fixed interlace and doublescan, added clockdoubling and
56 1.19.2.2 veego * HiColor&TrueColor suuport by crest 01/97
57 1.19.2.2 veego *
58 1.19.2.2 veego * Thanks to Village Tronic Marketing Gmbh for providing me with
59 1.19.2.2 veego * a Picasso-II board.
60 1.19.2.2 veego * Thanks for Integrated Electronics Oy Ab for providing me with
61 1.19.2.2 veego * Cirrus CL GD 542x family documentation.
62 1.19.2.2 veego *
63 1.19.2.2 veego * TODO:
64 1.19.2.2 veego * Mouse support (almost there! :-))
65 1.19.2.2 veego * Blitter support
66 1.19.2.2 veego *
67 1.19.2.2 veego */
68 1.19.2.2 veego
69 1.19.2.2 veego #include <sys/param.h>
70 1.19.2.2 veego #include <sys/systm.h>
71 1.19.2.2 veego #include <sys/errno.h>
72 1.19.2.2 veego #include <sys/ioctl.h>
73 1.19.2.2 veego #include <sys/device.h>
74 1.19.2.2 veego #include <sys/malloc.h>
75 1.19.2.2 veego
76 1.19.2.2 veego #include <machine/cpu.h>
77 1.19.2.2 veego #include <dev/cons.h>
78 1.19.2.2 veego #include <amiga/dev/itevar.h>
79 1.19.2.2 veego #include <amiga/amiga/device.h>
80 1.19.2.2 veego #include <amiga/dev/grfioctl.h>
81 1.19.2.2 veego #include <amiga/dev/grfvar.h>
82 1.19.2.2 veego #include <amiga/dev/grf_clreg.h>
83 1.19.2.2 veego #include <amiga/dev/zbusvar.h>
84 1.19.2.2 veego
85 1.19.2.2 veego int cl_mondefok __P((struct grfvideo_mode *));
86 1.19.2.2 veego void cl_boardinit __P((struct grf_softc *));
87 1.19.2.2 veego static void cl_CompFQ __P((u_int, u_char *, u_char *, u_char *));
88 1.19.2.2 veego int cl_getvmode __P((struct grf_softc *, struct grfvideo_mode *));
89 1.19.2.2 veego int cl_setvmode __P((struct grf_softc *, unsigned int));
90 1.19.2.2 veego int cl_toggle __P((struct grf_softc *, unsigned short));
91 1.19.2.2 veego int cl_getcmap __P((struct grf_softc *, struct grf_colormap *));
92 1.19.2.2 veego int cl_putcmap __P((struct grf_softc *, struct grf_colormap *));
93 1.19.2.2 veego #ifndef CL5426CONSOLE
94 1.19.2.2 veego void cl_off __P((struct grf_softc *));
95 1.19.2.2 veego #endif
96 1.19.2.2 veego void cl_inittextmode __P((struct grf_softc *));
97 1.19.2.2 veego int cl_ioctl __P((register struct grf_softc *, u_long, void *));
98 1.19.2.2 veego int cl_getmousepos __P((struct grf_softc *, struct grf_position *));
99 1.19.2.2 veego int cl_setmousepos __P((struct grf_softc *, struct grf_position *));
100 1.19.2.2 veego static int cl_setspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *));
101 1.19.2.2 veego int cl_getspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *));
102 1.19.2.2 veego static int cl_getspritemax __P((struct grf_softc *, struct grf_position *));
103 1.19.2.2 veego int cl_blank __P((struct grf_softc *, int *));
104 1.19.2.2 veego int cl_setmonitor __P((struct grf_softc *, struct grfvideo_mode *));
105 1.19.2.2 veego void cl_writesprpos __P((volatile char *, short, short));
106 1.19.2.2 veego void writeshifted __P((volatile char *, char, char));
107 1.19.2.2 veego
108 1.19.2.2 veego static void RegWakeup __P((volatile caddr_t));
109 1.19.2.2 veego static void RegOnpass __P((volatile caddr_t));
110 1.19.2.2 veego static void RegOffpass __P((volatile caddr_t));
111 1.19.2.2 veego
112 1.19.2.2 veego void grfclattach __P((struct device *, struct device *, void *));
113 1.19.2.2 veego int grfclprint __P((void *, const char *));
114 1.19.2.2 veego int grfclmatch __P((struct device *, struct cfdata *, void *));
115 1.19.2.2 veego void cl_memset __P((unsigned char *, unsigned char, int));
116 1.19.2.2 veego
117 1.19.2.2 veego /* Graphics display definitions.
118 1.19.2.2 veego * These are filled by 'grfconfig' using GRFIOCSETMON.
119 1.19.2.2 veego */
120 1.19.2.2 veego #define monitor_def_max 8
121 1.19.2.2 veego static struct grfvideo_mode monitor_def[8] = {
122 1.19.2.2 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
123 1.19.2.2 veego };
124 1.19.2.2 veego static struct grfvideo_mode *monitor_current = &monitor_def[0];
125 1.19.2.2 veego
126 1.19.2.2 veego /* Patchable maximum pixel clock */
127 1.19.2.2 veego unsigned long cl_maxpixelclock = 86000000;
128 1.19.2.2 veego
129 1.19.2.2 veego /* Console display definition.
130 1.19.2.2 veego * Default hardcoded text mode. This grf_cl is set up to
131 1.19.2.2 veego * use one text mode only, and this is it. You may use
132 1.19.2.2 veego * grfconfig to change the mode after boot.
133 1.19.2.2 veego */
134 1.19.2.2 veego /* Console font */
135 1.19.2.2 veego #ifdef KFONT_8X11
136 1.19.2.2 veego #define CIRRUSFONT kernel_font_8x11
137 1.19.2.2 veego #define CIRRUSFONTY 11
138 1.19.2.2 veego #else
139 1.19.2.2 veego #define CIRRUSFONT kernel_font_8x8
140 1.19.2.2 veego #define CIRRUSFONTY 8
141 1.19.2.2 veego #endif
142 1.19.2.2 veego extern unsigned char CIRRUSFONT[];
143 1.19.2.2 veego
144 1.19.2.2 veego struct grfcltext_mode clconsole_mode = {
145 1.19.2.2 veego {255, "", 25200000, 640, 480, 4, 80, 100, 94, 99, 100, 481, 522, 490,
146 1.19.2.2 veego 498, 522},
147 1.19.2.2 veego 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255
148 1.19.2.2 veego };
149 1.19.2.2 veego /* Console colors */
150 1.19.2.2 veego unsigned char clconscolors[3][3] = { /* background, foreground, hilite */
151 1.19.2.2 veego {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
152 1.19.2.2 veego };
153 1.19.2.2 veego
154 1.19.2.2 veego int cltype = 0; /* Picasso, Spectrum or Piccolo */
155 1.19.2.2 veego int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */
156 1.19.2.2 veego unsigned char pass_toggle; /* passthru status tracker */
157 1.19.2.2 veego
158 1.19.2.2 veego /*
159 1.19.2.2 veego * because all 542x-boards have 2 configdev entries, one for
160 1.19.2.2 veego * framebuffer mem and the other for regs, we have to hold onto
161 1.19.2.2 veego * the pointers globally until we match on both. This and 'cltype'
162 1.19.2.2 veego * are the primary obsticles to multiple board support, but if you
163 1.19.2.2 veego * have multiple boards you have bigger problems than grf_cl.
164 1.19.2.2 veego */
165 1.19.2.2 veego static void *cl_fbaddr = 0; /* framebuffer */
166 1.19.2.2 veego static void *cl_regaddr = 0; /* registers */
167 1.19.2.2 veego static int cl_fbsize; /* framebuffer size */
168 1.19.2.2 veego static int cl_fbautosize; /* framebuffer autoconfig size */
169 1.19.2.2 veego
170 1.19.2.2 veego
171 1.19.2.2 veego /*
172 1.19.2.2 veego * current sprite info, if you add support for multiple boards
173 1.19.2.2 veego * make this an array or something
174 1.19.2.2 veego */
175 1.19.2.2 veego struct grf_spriteinfo cl_cursprite;
176 1.19.2.2 veego
177 1.19.2.2 veego /* sprite bitmaps in kernel stack, you'll need to arrayize these too if
178 1.19.2.2 veego * you add multiple board support
179 1.19.2.2 veego */
180 1.19.2.2 veego static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64];
181 1.19.2.2 veego static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2];
182 1.19.2.2 veego
183 1.19.2.2 veego /* standard driver stuff */
184 1.19.2.2 veego struct cfattach grfcl_ca = {
185 1.19.2.2 veego sizeof(struct grf_softc), grfclmatch, grfclattach
186 1.19.2.2 veego };
187 1.19.2.2 veego
188 1.19.2.2 veego struct cfdriver grfcl_cd = {
189 1.19.2.2 veego NULL, "grfcl", DV_DULL, NULL, 0
190 1.19.2.2 veego };
191 1.19.2.2 veego static struct cfdata *cfdata;
192 1.19.2.2 veego
193 1.19.2.2 veego int
194 1.19.2.2 veego grfclmatch(pdp, cfp, auxp)
195 1.19.2.2 veego struct device *pdp;
196 1.19.2.2 veego struct cfdata *cfp;
197 1.19.2.2 veego void *auxp;
198 1.19.2.2 veego {
199 1.19.2.2 veego struct zbus_args *zap;
200 1.19.2.2 veego static int regprod, fbprod, fbprod2;
201 1.19.2.2 veego int error;
202 1.19.2.2 veego
203 1.19.2.2 veego fbprod2 = 0;
204 1.19.2.2 veego zap = auxp;
205 1.19.2.2 veego
206 1.19.2.2 veego #ifndef CL5426CONSOLE
207 1.19.2.2 veego if (amiga_realconfig == 0)
208 1.19.2.2 veego return (0);
209 1.19.2.2 veego #endif
210 1.19.2.2 veego
211 1.19.2.2 veego /* Grab the first board we encounter as the preferred one. This will
212 1.19.2.2 veego * allow one board to work in a multiple 5426 board system, but not
213 1.19.2.2 veego * multiple boards at the same time. */
214 1.19.2.2 veego if (cltype == 0) {
215 1.19.2.2 veego switch (zap->manid) {
216 1.19.2.2 veego case PICASSO:
217 1.19.2.2 veego switch (zap->prodid) {
218 1.19.2.2 veego case 11:
219 1.19.2.2 veego case 12:
220 1.19.2.2 veego regprod = 12;
221 1.19.2.2 veego fbprod = 11;
222 1.19.2.2 veego error = 0;
223 1.19.2.2 veego break;
224 1.19.2.2 veego case 22:
225 1.19.2.2 veego fbprod2 = 22;
226 1.19.2.2 veego error = 0;
227 1.19.2.2 veego break;
228 1.19.2.2 veego case 21:
229 1.19.2.2 veego case 23:
230 1.19.2.2 veego regprod = 23;
231 1.19.2.2 veego fbprod = 21;
232 1.19.2.2 veego cl_64bit = 1;
233 1.19.2.2 veego error = 0;
234 1.19.2.2 veego break;
235 1.19.2.2 veego case 24:
236 1.19.2.2 veego regprod = 24;
237 1.19.2.2 veego fbprod = 24;
238 1.19.2.2 veego cl_64bit = 1;
239 1.19.2.2 veego error = 0;
240 1.19.2.2 veego break;
241 1.19.2.2 veego default:
242 1.19.2.2 veego error = 1;
243 1.19.2.2 veego break;
244 1.19.2.2 veego }
245 1.19.2.2 veego if (error == 1)
246 1.19.2.2 veego return (0);
247 1.19.2.2 veego else
248 1.19.2.2 veego break;
249 1.19.2.2 veego case SPECTRUM:
250 1.19.2.2 veego if (zap->prodid != 2 && zap->prodid != 1)
251 1.19.2.2 veego return (0);
252 1.19.2.2 veego regprod = 2;
253 1.19.2.2 veego fbprod = 1;
254 1.19.2.2 veego break;
255 1.19.2.2 veego case PICCOLO:
256 1.19.2.2 veego switch (zap->prodid) {
257 1.19.2.2 veego case 5:
258 1.19.2.2 veego case 6:
259 1.19.2.2 veego regprod = 6;
260 1.19.2.2 veego fbprod = 5;
261 1.19.2.2 veego error = 0;
262 1.19.2.2 veego break;
263 1.19.2.2 veego case 10:
264 1.19.2.2 veego case 11:
265 1.19.2.2 veego regprod = 11;
266 1.19.2.2 veego fbprod = 10;
267 1.19.2.2 veego cl_64bit = 1;
268 1.19.2.2 veego error = 0;
269 1.19.2.2 veego break;
270 1.19.2.2 veego default:
271 1.19.2.2 veego error = 1;
272 1.19.2.2 veego break;
273 1.19.2.2 veego }
274 1.19.2.2 veego if (error == 1)
275 1.19.2.2 veego return (0);
276 1.19.2.2 veego else
277 1.19.2.2 veego break;
278 1.19.2.2 veego default:
279 1.19.2.2 veego return (0);
280 1.19.2.2 veego }
281 1.19.2.2 veego cltype = zap->manid;
282 1.19.2.2 veego } else {
283 1.19.2.2 veego if (cltype != zap->manid) {
284 1.19.2.2 veego return (0);
285 1.19.2.2 veego }
286 1.19.2.2 veego }
287 1.19.2.2 veego
288 1.19.2.2 veego /* Configure either registers or framebuffer in any order */
289 1.19.2.2 veego if ((cltype == PICASSO) && (cl_64bit == 1)) {
290 1.19.2.2 veego switch (zap->prodid) {
291 1.19.2.2 veego case 21:
292 1.19.2.2 veego cl_fbaddr = zap->va;
293 1.19.2.2 veego cl_fbautosize = zap->size;
294 1.19.2.2 veego break;
295 1.19.2.2 veego case 22:
296 1.19.2.2 veego cl_fbautosize += zap->size;
297 1.19.2.2 veego break;
298 1.19.2.2 veego case 23:
299 1.19.2.2 veego cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000);
300 1.19.2.2 veego break;
301 1.19.2.2 veego case 24:
302 1.19.2.2 veego cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000);
303 1.19.2.2 veego cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000);
304 1.19.2.2 veego cl_fbautosize = 0x400000;
305 1.19.2.2 veego break;
306 1.19.2.2 veego default:
307 1.19.2.2 veego return (0);
308 1.19.2.2 veego }
309 1.19.2.2 veego }
310 1.19.2.2 veego else {
311 1.19.2.2 veego if (zap->prodid == regprod)
312 1.19.2.2 veego cl_regaddr = zap->va;
313 1.19.2.2 veego else
314 1.19.2.2 veego if (zap->prodid == fbprod) {
315 1.19.2.2 veego cl_fbaddr = zap->va;
316 1.19.2.2 veego cl_fbautosize = zap->size;
317 1.19.2.2 veego } else
318 1.19.2.2 veego return (0);
319 1.19.2.2 veego }
320 1.19.2.2 veego
321 1.19.2.2 veego #ifdef CL5426CONSOLE
322 1.19.2.2 veego if (amiga_realconfig == 0) {
323 1.19.2.2 veego cfdata = cfp;
324 1.19.2.2 veego }
325 1.19.2.2 veego #endif
326 1.19.2.2 veego
327 1.19.2.2 veego return (1);
328 1.19.2.2 veego }
329 1.19.2.2 veego
330 1.19.2.2 veego void
331 1.19.2.2 veego grfclattach(pdp, dp, auxp)
332 1.19.2.2 veego struct device *pdp, *dp;
333 1.19.2.2 veego void *auxp;
334 1.19.2.2 veego {
335 1.19.2.2 veego static struct grf_softc congrf;
336 1.19.2.2 veego struct zbus_args *zap;
337 1.19.2.2 veego struct grf_softc *gp;
338 1.19.2.2 veego static char attachflag = 0;
339 1.19.2.2 veego
340 1.19.2.2 veego zap = auxp;
341 1.19.2.2 veego
342 1.19.2.2 veego printf("\n");
343 1.19.2.2 veego
344 1.19.2.2 veego /* make sure both halves have matched */
345 1.19.2.2 veego if (!cl_regaddr || !cl_fbaddr)
346 1.19.2.2 veego return;
347 1.19.2.2 veego
348 1.19.2.2 veego /* do all that messy console/grf stuff */
349 1.19.2.2 veego if (dp == NULL)
350 1.19.2.2 veego gp = &congrf;
351 1.19.2.2 veego else
352 1.19.2.2 veego gp = (struct grf_softc *) dp;
353 1.19.2.2 veego
354 1.19.2.2 veego if (dp != NULL && congrf.g_regkva != 0) {
355 1.19.2.2 veego /*
356 1.19.2.2 veego * inited earlier, just copy (not device struct)
357 1.19.2.2 veego */
358 1.19.2.2 veego bcopy(&congrf.g_display, &gp->g_display,
359 1.19.2.2 veego (char *) &gp[1] - (char *) &gp->g_display);
360 1.19.2.2 veego } else {
361 1.19.2.2 veego gp->g_regkva = (volatile caddr_t) cl_regaddr;
362 1.19.2.2 veego gp->g_fbkva = (volatile caddr_t) cl_fbaddr;
363 1.19.2.2 veego
364 1.19.2.2 veego gp->g_unit = GRF_CL5426_UNIT;
365 1.19.2.2 veego gp->g_mode = cl_mode;
366 1.19.2.2 veego gp->g_conpri = grfcl_cnprobe();
367 1.19.2.2 veego gp->g_flags = GF_ALIVE;
368 1.19.2.2 veego
369 1.19.2.2 veego /* wakeup the board */
370 1.19.2.2 veego cl_boardinit(gp);
371 1.19.2.2 veego #ifdef CL5426CONSOLE
372 1.19.2.2 veego grfcl_iteinit(gp);
373 1.19.2.2 veego (void) cl_load_mon(gp, &clconsole_mode);
374 1.19.2.2 veego #endif
375 1.19.2.2 veego
376 1.19.2.2 veego }
377 1.19.2.2 veego
378 1.19.2.2 veego /*
379 1.19.2.2 veego * attach grf (once)
380 1.19.2.2 veego */
381 1.19.2.2 veego if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) {
382 1.19.2.2 veego attachflag = 1;
383 1.19.2.2 veego printf("grfcl: %dMB ", cl_fbsize / 0x100000);
384 1.19.2.2 veego switch (cltype) {
385 1.19.2.2 veego case PICASSO:
386 1.19.2.2 veego if (cl_64bit == 1) {
387 1.19.2.2 veego printf("Picasso IV");
388 1.19.2.2 veego /* 135MHz will be supported if we
389 1.19.2.2 veego * have a palette doubling mode.
390 1.19.2.2 veego */
391 1.19.2.2 veego cl_maxpixelclock = 86000000;
392 1.19.2.2 veego }
393 1.19.2.2 veego else {
394 1.19.2.2 veego printf("Picasso II");
395 1.19.2.2 veego
396 1.19.2.2 veego /* check for PicassoII+ (crest) */
397 1.19.2.2 veego if(zap->serno == 0x00100000)
398 1.19.2.2 veego printf("+");
399 1.19.2.2 veego
400 1.19.2.2 veego /* determine used Gfx/chipset (crest) */
401 1.19.2.2 veego vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */
402 1.19.2.2 veego switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) {
403 1.19.2.2 veego case 0x24:
404 1.19.2.2 veego printf(" (with CL-GD5426)");
405 1.19.2.2 veego break;
406 1.19.2.2 veego case 0x26:
407 1.19.2.2 veego printf(" (with CL-GD5428)");
408 1.19.2.2 veego break;
409 1.19.2.2 veego case 0x27:
410 1.19.2.2 veego printf(" (with CL-GD5429)");
411 1.19.2.2 veego break;
412 1.19.2.2 veego }
413 1.19.2.2 veego cl_maxpixelclock = 86000000;
414 1.19.2.2 veego }
415 1.19.2.2 veego break;
416 1.19.2.2 veego case SPECTRUM:
417 1.19.2.2 veego printf("Spectrum");
418 1.19.2.2 veego cl_maxpixelclock = 90000000;
419 1.19.2.2 veego break;
420 1.19.2.2 veego case PICCOLO:
421 1.19.2.2 veego if (cl_64bit == 1) {
422 1.19.2.2 veego printf("Piccolo SD64");
423 1.19.2.2 veego /* 110MHz will be supported if we
424 1.19.2.2 veego * have a palette doubling mode.
425 1.19.2.2 veego */
426 1.19.2.2 veego cl_maxpixelclock = 90000000;
427 1.19.2.2 veego } else {
428 1.19.2.2 veego printf("Piccolo");
429 1.19.2.2 veego cl_maxpixelclock = 90000000;
430 1.19.2.2 veego }
431 1.19.2.2 veego break;
432 1.19.2.2 veego }
433 1.19.2.2 veego printf(" being used\n");
434 1.19.2.2 veego #ifdef CL_OVERCLOCK
435 1.19.2.2 veego cl_maxpixelclock = 115000000;
436 1.19.2.2 veego #endif
437 1.19.2.2 veego } else {
438 1.19.2.2 veego if (!attachflag)
439 1.19.2.2 veego printf("grfcl unattached!!\n");
440 1.19.2.2 veego }
441 1.19.2.2 veego }
442 1.19.2.2 veego
443 1.19.2.2 veego int
444 1.19.2.2 veego grfclprint(auxp, pnp)
445 1.19.2.2 veego void *auxp;
446 1.19.2.2 veego const char *pnp;
447 1.19.2.2 veego {
448 1.19.2.2 veego if (pnp)
449 1.19.2.2 veego printf("ite at %s: ", pnp);
450 1.19.2.2 veego return (UNCONF);
451 1.19.2.2 veego }
452 1.19.2.2 veego
453 1.19.2.2 veego void
454 1.19.2.2 veego cl_boardinit(gp)
455 1.19.2.2 veego struct grf_softc *gp;
456 1.19.2.2 veego {
457 1.19.2.2 veego unsigned char *ba = gp->g_regkva;
458 1.19.2.2 veego int x;
459 1.19.2.2 veego
460 1.19.2.2 veego if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */
461 1.19.2.2 veego WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */
462 1.19.2.2 veego delay(200000); /* wait some time (two frames as of now) */
463 1.19.2.2 veego WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */
464 1.19.2.2 veego WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */
465 1.19.2.2 veego WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */
466 1.19.2.2 veego cl_fbsize = cl_fbautosize;
467 1.19.2.2 veego } else {
468 1.19.2.2 veego
469 1.19.2.2 veego /* wakeup board and flip passthru OFF */
470 1.19.2.2 veego RegWakeup(ba);
471 1.19.2.2 veego RegOnpass(ba);
472 1.19.2.2 veego
473 1.19.2.2 veego vgaw(ba, 0x46e8, 0x16);
474 1.19.2.2 veego vgaw(ba, 0x102, 1);
475 1.19.2.2 veego vgaw(ba, 0x46e8, 0x0e);
476 1.19.2.2 veego if (cl_64bit != 1)
477 1.19.2.2 veego vgaw(ba, 0x3c3, 1);
478 1.19.2.2 veego
479 1.19.2.2 veego cl_fbsize = cl_fbautosize;
480 1.19.2.2 veego
481 1.19.2.2 veego /* setup initial unchanging parameters */
482 1.19.2.2 veego
483 1.19.2.2 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */
484 1.19.2.2 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */
485 1.19.2.2 veego
486 1.19.2.2 veego WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */
487 1.19.2.2 veego WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */
488 1.19.2.2 veego
489 1.19.2.2 veego if (cl_64bit == 1) {
490 1.19.2.2 veego WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
491 1.19.2.2 veego WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
492 1.19.2.2 veego } else {
493 1.19.2.2 veego WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0);
494 1.19.2.2 veego }
495 1.19.2.2 veego WSeq(ba, SEQ_ID_RESET, 0x03);
496 1.19.2.2 veego WSeq(ba, SEQ_ID_MAP_MASK, 0xff);
497 1.19.2.2 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
498 1.19.2.2 veego WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */
499 1.19.2.2 veego WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81);
500 1.19.2.2 veego WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00);
501 1.19.2.2 veego if (cl_64bit == 1)
502 1.19.2.2 veego WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a);
503 1.19.2.2 veego else
504 1.19.2.2 veego WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */
505 1.19.2.2 veego WSeq(ba, SEQ_ID_SIG_CNTL, 0x02);
506 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
507 1.19.2.2 veego
508 1.19.2.2 veego if (cl_64bit == 1)
509 1.19.2.2 veego WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c);
510 1.19.2.2 veego else
511 1.19.2.2 veego WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22);
512 1.19.2.2 veego
513 1.19.2.2 veego WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
514 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
515 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_END, 0x08);
516 1.19.2.2 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
517 1.19.2.2 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
518 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
519 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
520 1.19.2.2 veego
521 1.19.2.2 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07);
522 1.19.2.2 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
523 1.19.2.2 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */
524 1.19.2.2 veego WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22);
525 1.19.2.2 veego if (cl_64bit == 1) {
526 1.19.2.2 veego WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
527 1.19.2.2 veego WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
528 1.19.2.2 veego }
529 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */
530 1.19.2.2 veego
531 1.19.2.2 veego WGfx(ba, GCT_ID_SET_RESET, 0x00);
532 1.19.2.2 veego WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
533 1.19.2.2 veego WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
534 1.19.2.2 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
535 1.19.2.2 veego WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
536 1.19.2.2 veego WGfx(ba, GCT_ID_MISC, 0x01);
537 1.19.2.2 veego WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
538 1.19.2.2 veego WGfx(ba, GCT_ID_BITMASK, 0xff);
539 1.19.2.2 veego WGfx(ba, GCT_ID_MODE_EXT, 0x28);
540 1.19.2.2 veego
541 1.19.2.2 veego for (x = 0; x < 0x10; x++)
542 1.19.2.2 veego WAttr(ba, x, x);
543 1.19.2.2 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
544 1.19.2.2 veego WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
545 1.19.2.2 veego WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
546 1.19.2.2 veego WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
547 1.19.2.2 veego WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
548 1.19.2.2 veego WAttr(ba, 0x34, 0x00);
549 1.19.2.2 veego
550 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0xff);
551 1.19.2.2 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xef);
552 1.19.2.2 veego
553 1.19.2.2 veego WGfx(ba, GCT_ID_BLT_STAT_START, 0x04);
554 1.19.2.2 veego WGfx(ba, GCT_ID_BLT_STAT_START, 0x00);
555 1.19.2.2 veego }
556 1.19.2.2 veego
557 1.19.2.2 veego /* colors initially set to greyscale */
558 1.19.2.2 veego vgaw(ba, VDAC_ADDRESS_W, 0);
559 1.19.2.2 veego for (x = 255; x >= 0; x--) {
560 1.19.2.2 veego vgaw(ba, VDAC_DATA, x);
561 1.19.2.2 veego vgaw(ba, VDAC_DATA, x);
562 1.19.2.2 veego vgaw(ba, VDAC_DATA, x);
563 1.19.2.2 veego }
564 1.19.2.2 veego /* set sprite bitmap pointers */
565 1.19.2.2 veego cl_cursprite.image = cl_imageptr;
566 1.19.2.2 veego cl_cursprite.mask = cl_maskptr;
567 1.19.2.2 veego cl_cursprite.cmap.red = cl_sprred;
568 1.19.2.2 veego cl_cursprite.cmap.green = cl_sprgreen;
569 1.19.2.2 veego cl_cursprite.cmap.blue = cl_sprblue;
570 1.19.2.2 veego
571 1.19.2.2 veego if (cl_64bit == 0) {
572 1.19.2.2 veego
573 1.19.2.2 veego /* check for 1MB or 2MB board (crest) */
574 1.19.2.2 veego volatile unsigned long *cl_fbtestaddr;
575 1.19.2.2 veego cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva;
576 1.19.2.2 veego
577 1.19.2.2 veego WGfx(ba, GCT_ID_OFFSET_0, 0x40);
578 1.19.2.2 veego *cl_fbtestaddr = 0x12345678;
579 1.19.2.2 veego
580 1.19.2.2 veego if (*cl_fbtestaddr != 0x12345678) {
581 1.19.2.2 veego WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30);
582 1.19.2.2 veego cl_fbsize = 0x100000;
583 1.19.2.2 veego }
584 1.19.2.2 veego else
585 1.19.2.2 veego {
586 1.19.2.2 veego cl_fbsize = 0x200000;
587 1.19.2.2 veego }
588 1.19.2.2 veego }
589 1.19.2.2 veego WGfx(ba, GCT_ID_OFFSET_0, 0x00);
590 1.19.2.2 veego }
591 1.19.2.2 veego
592 1.19.2.2 veego
593 1.19.2.2 veego int
594 1.19.2.2 veego cl_getvmode(gp, vm)
595 1.19.2.2 veego struct grf_softc *gp;
596 1.19.2.2 veego struct grfvideo_mode *vm;
597 1.19.2.2 veego {
598 1.19.2.2 veego struct grfvideo_mode *gv;
599 1.19.2.2 veego
600 1.19.2.2 veego #ifdef CL5426CONSOLE
601 1.19.2.2 veego /* Handle grabbing console mode */
602 1.19.2.2 veego if (vm->mode_num == 255) {
603 1.19.2.2 veego bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode));
604 1.19.2.2 veego /* XXX so grfconfig can tell us the correct text dimensions. */
605 1.19.2.2 veego vm->depth = clconsole_mode.fy;
606 1.19.2.2 veego } else
607 1.19.2.2 veego #endif
608 1.19.2.2 veego {
609 1.19.2.2 veego if (vm->mode_num == 0)
610 1.19.2.2 veego vm->mode_num = (monitor_current - monitor_def) + 1;
611 1.19.2.2 veego if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
612 1.19.2.2 veego return (EINVAL);
613 1.19.2.2 veego gv = monitor_def + (vm->mode_num - 1);
614 1.19.2.2 veego if (gv->mode_num == 0)
615 1.19.2.2 veego return (EINVAL);
616 1.19.2.2 veego
617 1.19.2.2 veego bcopy(gv, vm, sizeof(struct grfvideo_mode));
618 1.19.2.2 veego }
619 1.19.2.2 veego
620 1.19.2.2 veego /* adjust internal values to pixel values */
621 1.19.2.2 veego
622 1.19.2.2 veego vm->hblank_start *= 8;
623 1.19.2.2 veego vm->hblank_stop *= 8;
624 1.19.2.2 veego vm->hsync_start *= 8;
625 1.19.2.2 veego vm->hsync_stop *= 8;
626 1.19.2.2 veego vm->htotal *= 8;
627 1.19.2.2 veego
628 1.19.2.2 veego return (0);
629 1.19.2.2 veego }
630 1.19.2.2 veego
631 1.19.2.2 veego
632 1.19.2.2 veego int
633 1.19.2.2 veego cl_setvmode(gp, mode)
634 1.19.2.2 veego struct grf_softc *gp;
635 1.19.2.2 veego unsigned mode;
636 1.19.2.2 veego {
637 1.19.2.2 veego if (!mode || (mode > monitor_def_max) ||
638 1.19.2.2 veego monitor_def[mode - 1].mode_num == 0)
639 1.19.2.2 veego return (EINVAL);
640 1.19.2.2 veego
641 1.19.2.2 veego monitor_current = monitor_def + (mode - 1);
642 1.19.2.2 veego
643 1.19.2.2 veego return (0);
644 1.19.2.2 veego }
645 1.19.2.2 veego
646 1.19.2.2 veego #ifndef CL5426CONSOLE
647 1.19.2.2 veego void
648 1.19.2.2 veego cl_off(gp)
649 1.19.2.2 veego struct grf_softc *gp;
650 1.19.2.2 veego {
651 1.19.2.2 veego char *ba = gp->g_regkva;
652 1.19.2.2 veego
653 1.19.2.2 veego /*
654 1.19.2.2 veego * we'll put the pass-through on for cc ite and set Full Bandwidth bit
655 1.19.2.2 veego * on just in case it didn't work...but then it doesn't matter does
656 1.19.2.2 veego * it? =)
657 1.19.2.2 veego */
658 1.19.2.2 veego RegOnpass(ba);
659 1.19.2.2 veego vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE);
660 1.19.2.2 veego vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20);
661 1.19.2.2 veego }
662 1.19.2.2 veego #endif
663 1.19.2.2 veego
664 1.19.2.2 veego int
665 1.19.2.2 veego cl_blank(gp, on)
666 1.19.2.2 veego struct grf_softc *gp;
667 1.19.2.2 veego int *on;
668 1.19.2.2 veego {
669 1.19.2.2 veego WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21);
670 1.19.2.2 veego return(0);
671 1.19.2.2 veego }
672 1.19.2.2 veego
673 1.19.2.2 veego /*
674 1.19.2.2 veego * Change the mode of the display.
675 1.19.2.2 veego * Return a UNIX error number or 0 for success.
676 1.19.2.2 veego */
677 1.19.2.2 veego int
678 1.19.2.2 veego cl_mode(gp, cmd, arg, a2, a3)
679 1.19.2.2 veego register struct grf_softc *gp;
680 1.19.2.2 veego u_long cmd;
681 1.19.2.2 veego void *arg;
682 1.19.2.2 veego u_long a2;
683 1.19.2.2 veego int a3;
684 1.19.2.2 veego {
685 1.19.2.2 veego int error;
686 1.19.2.2 veego
687 1.19.2.2 veego switch (cmd) {
688 1.19.2.2 veego case GM_GRFON:
689 1.19.2.2 veego error = cl_load_mon(gp,
690 1.19.2.2 veego (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL;
691 1.19.2.2 veego return (error);
692 1.19.2.2 veego
693 1.19.2.2 veego case GM_GRFOFF:
694 1.19.2.2 veego #ifndef CL5426CONSOLE
695 1.19.2.2 veego cl_off(gp);
696 1.19.2.2 veego #else
697 1.19.2.2 veego cl_load_mon(gp, &clconsole_mode);
698 1.19.2.2 veego #endif
699 1.19.2.2 veego return (0);
700 1.19.2.2 veego
701 1.19.2.2 veego case GM_GRFCONFIG:
702 1.19.2.2 veego return (0);
703 1.19.2.2 veego
704 1.19.2.2 veego case GM_GRFGETVMODE:
705 1.19.2.2 veego return (cl_getvmode(gp, (struct grfvideo_mode *) arg));
706 1.19.2.2 veego
707 1.19.2.2 veego case GM_GRFSETVMODE:
708 1.19.2.2 veego error = cl_setvmode(gp, *(unsigned *) arg);
709 1.19.2.2 veego if (!error && (gp->g_flags & GF_GRFON))
710 1.19.2.2 veego cl_load_mon(gp,
711 1.19.2.2 veego (struct grfcltext_mode *) monitor_current);
712 1.19.2.2 veego return (error);
713 1.19.2.2 veego
714 1.19.2.2 veego case GM_GRFGETNUMVM:
715 1.19.2.2 veego *(int *) arg = monitor_def_max;
716 1.19.2.2 veego return (0);
717 1.19.2.2 veego
718 1.19.2.2 veego case GM_GRFIOCTL:
719 1.19.2.2 veego return (cl_ioctl(gp, a2, arg));
720 1.19.2.2 veego
721 1.19.2.2 veego default:
722 1.19.2.2 veego break;
723 1.19.2.2 veego }
724 1.19.2.2 veego
725 1.19.2.2 veego return (EINVAL);
726 1.19.2.2 veego }
727 1.19.2.2 veego
728 1.19.2.2 veego int
729 1.19.2.2 veego cl_ioctl(gp, cmd, data)
730 1.19.2.2 veego register struct grf_softc *gp;
731 1.19.2.2 veego u_long cmd;
732 1.19.2.2 veego void *data;
733 1.19.2.2 veego {
734 1.19.2.2 veego switch (cmd) {
735 1.19.2.2 veego case GRFIOCGSPRITEPOS:
736 1.19.2.2 veego return (cl_getmousepos(gp, (struct grf_position *) data));
737 1.19.2.2 veego
738 1.19.2.2 veego case GRFIOCSSPRITEPOS:
739 1.19.2.2 veego return (cl_setmousepos(gp, (struct grf_position *) data));
740 1.19.2.2 veego
741 1.19.2.2 veego case GRFIOCSSPRITEINF:
742 1.19.2.2 veego return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data));
743 1.19.2.2 veego
744 1.19.2.2 veego case GRFIOCGSPRITEINF:
745 1.19.2.2 veego return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data));
746 1.19.2.2 veego
747 1.19.2.2 veego case GRFIOCGSPRITEMAX:
748 1.19.2.2 veego return (cl_getspritemax(gp, (struct grf_position *) data));
749 1.19.2.2 veego
750 1.19.2.2 veego case GRFIOCGETCMAP:
751 1.19.2.2 veego return (cl_getcmap(gp, (struct grf_colormap *) data));
752 1.19.2.2 veego
753 1.19.2.2 veego case GRFIOCPUTCMAP:
754 1.19.2.2 veego return (cl_putcmap(gp, (struct grf_colormap *) data));
755 1.19.2.2 veego
756 1.19.2.2 veego case GRFIOCBITBLT:
757 1.19.2.2 veego break;
758 1.19.2.2 veego
759 1.19.2.2 veego case GRFTOGGLE:
760 1.19.2.2 veego return (cl_toggle(gp, 0));
761 1.19.2.2 veego
762 1.19.2.2 veego case GRFIOCSETMON:
763 1.19.2.2 veego return (cl_setmonitor(gp, (struct grfvideo_mode *) data));
764 1.19.2.2 veego
765 1.19.2.2 veego case GRFIOCBLANK:
766 1.19.2.2 veego return (cl_blank(gp, (int *)data));
767 1.19.2.2 veego
768 1.19.2.2 veego }
769 1.19.2.2 veego return (EINVAL);
770 1.19.2.2 veego }
771 1.19.2.2 veego
772 1.19.2.2 veego int
773 1.19.2.2 veego cl_getmousepos(gp, data)
774 1.19.2.2 veego struct grf_softc *gp;
775 1.19.2.2 veego struct grf_position *data;
776 1.19.2.2 veego {
777 1.19.2.2 veego data->x = cl_cursprite.pos.x;
778 1.19.2.2 veego data->y = cl_cursprite.pos.y;
779 1.19.2.2 veego return (0);
780 1.19.2.2 veego }
781 1.19.2.2 veego
782 1.19.2.2 veego void
783 1.19.2.2 veego cl_writesprpos(ba, x, y)
784 1.19.2.2 veego volatile char *ba;
785 1.19.2.2 veego short x;
786 1.19.2.2 veego short y;
787 1.19.2.2 veego {
788 1.19.2.2 veego /* we want to use a 16-bit write to 3c4 so no macros used */
789 1.19.2.2 veego volatile unsigned char *cwp;
790 1.19.2.2 veego volatile unsigned short *wp;
791 1.19.2.2 veego
792 1.19.2.2 veego cwp = ba + 0x3c4;
793 1.19.2.2 veego wp = (unsigned short *)cwp;
794 1.19.2.2 veego
795 1.19.2.2 veego /*
796 1.19.2.2 veego * don't ask me why, but apparently you can't do a 16-bit write with
797 1.19.2.2 veego * x-position like with y-position below (dagge)
798 1.19.2.2 veego */
799 1.19.2.2 veego cwp[0] = 0x10 | ((x << 5) & 0xff);
800 1.19.2.2 veego cwp[1] = (x >> 3) & 0xff;
801 1.19.2.2 veego
802 1.19.2.2 veego *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff);
803 1.19.2.2 veego }
804 1.19.2.2 veego
805 1.19.2.2 veego void
806 1.19.2.2 veego writeshifted(to, shiftx, shifty)
807 1.19.2.2 veego volatile char *to;
808 1.19.2.2 veego char shiftx;
809 1.19.2.2 veego char shifty;
810 1.19.2.2 veego {
811 1.19.2.2 veego register char y;
812 1.19.2.2 veego unsigned long long *tptr, *iptr, *mptr, line;
813 1.19.2.2 veego
814 1.19.2.2 veego tptr = (unsigned long long *) to;
815 1.19.2.2 veego iptr = (unsigned long long *) cl_cursprite.image;
816 1.19.2.2 veego mptr = (unsigned long long *) cl_cursprite.mask;
817 1.19.2.2 veego
818 1.19.2.2 veego shiftx = shiftx < 0 ? 0 : shiftx;
819 1.19.2.2 veego shifty = shifty < 0 ? 0 : shifty;
820 1.19.2.2 veego
821 1.19.2.2 veego /* start reading shifty lines down, and
822 1.19.2.2 veego * shift each line in by shiftx
823 1.19.2.2 veego */
824 1.19.2.2 veego for (y = shifty; y < 64; y++) {
825 1.19.2.2 veego
826 1.19.2.2 veego /* image */
827 1.19.2.2 veego line = iptr[y];
828 1.19.2.2 veego *tptr++ = line << shiftx;
829 1.19.2.2 veego
830 1.19.2.2 veego /* mask */
831 1.19.2.2 veego line = mptr[y];
832 1.19.2.2 veego *tptr++ = line << shiftx;
833 1.19.2.2 veego }
834 1.19.2.2 veego
835 1.19.2.2 veego /* clear the remainder */
836 1.19.2.2 veego for (y = shifty; y > 0; y--) {
837 1.19.2.2 veego *tptr++ = 0;
838 1.19.2.2 veego *tptr++ = 0;
839 1.19.2.2 veego }
840 1.19.2.2 veego }
841 1.19.2.2 veego
842 1.19.2.2 veego int
843 1.19.2.2 veego cl_setmousepos(gp, data)
844 1.19.2.2 veego struct grf_softc *gp;
845 1.19.2.2 veego struct grf_position *data;
846 1.19.2.2 veego {
847 1.19.2.2 veego volatile char *ba = gp->g_regkva;
848 1.19.2.2 veego short rx, ry, prx, pry;
849 1.19.2.2 veego #ifdef CL_SHIFTSPRITE
850 1.19.2.2 veego volatile char *fb = gp->g_fbkva;
851 1.19.2.2 veego volatile char *sprite = fb + (cl_fbsize - 1024);
852 1.19.2.2 veego #endif
853 1.19.2.2 veego
854 1.19.2.2 veego /* no movement */
855 1.19.2.2 veego if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y)
856 1.19.2.2 veego return (0);
857 1.19.2.2 veego
858 1.19.2.2 veego /* current and previous real coordinates */
859 1.19.2.2 veego rx = data->x - cl_cursprite.hot.x;
860 1.19.2.2 veego ry = data->y - cl_cursprite.hot.y;
861 1.19.2.2 veego prx = cl_cursprite.pos.x - cl_cursprite.hot.x;
862 1.19.2.2 veego pry = cl_cursprite.pos.y - cl_cursprite.hot.y;
863 1.19.2.2 veego
864 1.19.2.2 veego /*
865 1.19.2.2 veego * if we are/were on an edge, create (un)shifted bitmap --
866 1.19.2.2 veego * ripped out optimization (not extremely worthwhile,
867 1.19.2.2 veego * and kind of buggy anyhow).
868 1.19.2.2 veego */
869 1.19.2.2 veego #ifdef CL_SHIFTSPRITE
870 1.19.2.2 veego if (rx < 0 || ry < 0 || prx < 0 || pry < 0) {
871 1.19.2.2 veego writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0);
872 1.19.2.2 veego }
873 1.19.2.2 veego #endif
874 1.19.2.2 veego
875 1.19.2.2 veego /* do movement, save position */
876 1.19.2.2 veego cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
877 1.19.2.2 veego cl_cursprite.pos.x = data->x;
878 1.19.2.2 veego cl_cursprite.pos.y = data->y;
879 1.19.2.2 veego
880 1.19.2.2 veego return (0);
881 1.19.2.2 veego }
882 1.19.2.2 veego
883 1.19.2.2 veego int
884 1.19.2.2 veego cl_getspriteinfo(gp, data)
885 1.19.2.2 veego struct grf_softc *gp;
886 1.19.2.2 veego struct grf_spriteinfo *data;
887 1.19.2.2 veego {
888 1.19.2.2 veego copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo));
889 1.19.2.2 veego copyout(cl_cursprite.image, data->image, 64 * 8);
890 1.19.2.2 veego copyout(cl_cursprite.mask, data->mask, 64 * 8);
891 1.19.2.2 veego return (0);
892 1.19.2.2 veego }
893 1.19.2.2 veego
894 1.19.2.2 veego static int
895 1.19.2.2 veego cl_setspriteinfo(gp, data)
896 1.19.2.2 veego struct grf_softc *gp;
897 1.19.2.2 veego struct grf_spriteinfo *data;
898 1.19.2.2 veego {
899 1.19.2.2 veego volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva;
900 1.19.2.2 veego volatile char *sprite = fb + (cl_fbsize - 1024);
901 1.19.2.2 veego
902 1.19.2.2 veego if (data->set & GRFSPRSET_SHAPE) {
903 1.19.2.2 veego
904 1.19.2.2 veego short dsx, dsy, i;
905 1.19.2.2 veego unsigned long *di, *dm, *si, *sm;
906 1.19.2.2 veego unsigned long ssi[128], ssm[128];
907 1.19.2.2 veego struct grf_position gpos;
908 1.19.2.2 veego
909 1.19.2.2 veego
910 1.19.2.2 veego /* check for a too large sprite (no clipping!) */
911 1.19.2.2 veego dsy = data->size.y;
912 1.19.2.2 veego dsx = data->size.x;
913 1.19.2.2 veego if (dsy > 64 || dsx > 64)
914 1.19.2.2 veego return(EINVAL);
915 1.19.2.2 veego
916 1.19.2.2 veego /* prepare destination */
917 1.19.2.2 veego di = (unsigned long *)cl_cursprite.image;
918 1.19.2.2 veego dm = (unsigned long *)cl_cursprite.mask;
919 1.19.2.2 veego cl_memset((unsigned char *)di, 0, 8*64);
920 1.19.2.2 veego cl_memset((unsigned char *)dm, 0, 8*64);
921 1.19.2.2 veego
922 1.19.2.2 veego /* two alternatives: 64 across, then it's
923 1.19.2.2 veego * the same format we use, just copy. Otherwise,
924 1.19.2.2 veego * copy into tmp buf and recopy skipping the
925 1.19.2.2 veego * unused 32 bits.
926 1.19.2.2 veego */
927 1.19.2.2 veego if ((dsx - 1) / 32) {
928 1.19.2.2 veego copyin(data->image, di, 8 * dsy);
929 1.19.2.2 veego copyin(data->mask, dm, 8 * dsy);
930 1.19.2.2 veego } else {
931 1.19.2.2 veego si = ssi; sm = ssm;
932 1.19.2.2 veego copyin(data->image, si, 4 * dsy);
933 1.19.2.2 veego copyin(data->mask, sm, 4 * dsy);
934 1.19.2.2 veego for (i = 0; i < dsy; i++) {
935 1.19.2.2 veego *di = *si++;
936 1.19.2.2 veego *dm = *sm++;
937 1.19.2.2 veego di += 2;
938 1.19.2.2 veego dm += 2;
939 1.19.2.2 veego }
940 1.19.2.2 veego }
941 1.19.2.2 veego
942 1.19.2.2 veego /* set size */
943 1.19.2.2 veego cl_cursprite.size.x = data->size.x;
944 1.19.2.2 veego cl_cursprite.size.y = data->size.y;
945 1.19.2.2 veego
946 1.19.2.2 veego /* forcably load into board */
947 1.19.2.2 veego gpos.x = cl_cursprite.pos.x;
948 1.19.2.2 veego gpos.y = cl_cursprite.pos.y;
949 1.19.2.2 veego cl_cursprite.pos.x = -1;
950 1.19.2.2 veego cl_cursprite.pos.y = -1;
951 1.19.2.2 veego writeshifted(sprite, 0, 0);
952 1.19.2.2 veego cl_setmousepos(gp, &gpos);
953 1.19.2.2 veego
954 1.19.2.2 veego }
955 1.19.2.2 veego if (data->set & GRFSPRSET_HOT) {
956 1.19.2.2 veego
957 1.19.2.2 veego cl_cursprite.hot = data->hot;
958 1.19.2.2 veego
959 1.19.2.2 veego }
960 1.19.2.2 veego if (data->set & GRFSPRSET_CMAP) {
961 1.19.2.2 veego
962 1.19.2.2 veego u_char red[2], green[2], blue[2];
963 1.19.2.2 veego
964 1.19.2.2 veego copyin(data->cmap.red, red, 2);
965 1.19.2.2 veego copyin(data->cmap.green, green, 2);
966 1.19.2.2 veego copyin(data->cmap.blue, blue, 2);
967 1.19.2.2 veego bcopy(red, cl_cursprite.cmap.red, 2);
968 1.19.2.2 veego bcopy(green, cl_cursprite.cmap.green, 2);
969 1.19.2.2 veego bcopy(blue, cl_cursprite.cmap.blue, 2);
970 1.19.2.2 veego
971 1.19.2.2 veego /* enable and load colors 256 & 257 */
972 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06);
973 1.19.2.2 veego
974 1.19.2.2 veego /* 256 */
975 1.19.2.2 veego vgaw(ba, VDAC_ADDRESS_W, 0x00);
976 1.19.2.2 veego if (cltype == PICASSO) {
977 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2));
978 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2));
979 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2));
980 1.19.2.2 veego } else {
981 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2));
982 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2));
983 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2));
984 1.19.2.2 veego }
985 1.19.2.2 veego
986 1.19.2.2 veego /* 257 */
987 1.19.2.2 veego vgaw(ba, VDAC_ADDRESS_W, 0x0f);
988 1.19.2.2 veego if (cltype == PICASSO) {
989 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2));
990 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2));
991 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2));
992 1.19.2.2 veego } else {
993 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2));
994 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2));
995 1.19.2.2 veego vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2));
996 1.19.2.2 veego }
997 1.19.2.2 veego
998 1.19.2.2 veego /* turn on/off sprite */
999 1.19.2.2 veego if (cl_cursprite.enable) {
1000 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05);
1001 1.19.2.2 veego } else {
1002 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
1003 1.19.2.2 veego }
1004 1.19.2.2 veego
1005 1.19.2.2 veego }
1006 1.19.2.2 veego if (data->set & GRFSPRSET_ENABLE) {
1007 1.19.2.2 veego
1008 1.19.2.2 veego if (data->enable == 1) {
1009 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05);
1010 1.19.2.2 veego cl_cursprite.enable = 1;
1011 1.19.2.2 veego } else {
1012 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
1013 1.19.2.2 veego cl_cursprite.enable = 0;
1014 1.19.2.2 veego }
1015 1.19.2.2 veego
1016 1.19.2.2 veego }
1017 1.19.2.2 veego if (data->set & GRFSPRSET_POS) {
1018 1.19.2.2 veego
1019 1.19.2.2 veego /* force placement */
1020 1.19.2.2 veego cl_cursprite.pos.x = -1;
1021 1.19.2.2 veego cl_cursprite.pos.y = -1;
1022 1.19.2.2 veego
1023 1.19.2.2 veego /* do it */
1024 1.19.2.2 veego cl_setmousepos(gp, &data->pos);
1025 1.19.2.2 veego
1026 1.19.2.2 veego }
1027 1.19.2.2 veego return (0);
1028 1.19.2.2 veego }
1029 1.19.2.2 veego
1030 1.19.2.2 veego static int
1031 1.19.2.2 veego cl_getspritemax(gp, data)
1032 1.19.2.2 veego struct grf_softc *gp;
1033 1.19.2.2 veego struct grf_position *data;
1034 1.19.2.2 veego {
1035 1.19.2.2 veego if (gp->g_display.gd_planes == 24)
1036 1.19.2.2 veego return (EINVAL);
1037 1.19.2.2 veego data->x = 64;
1038 1.19.2.2 veego data->y = 64;
1039 1.19.2.2 veego return (0);
1040 1.19.2.2 veego }
1041 1.19.2.2 veego
1042 1.19.2.2 veego int
1043 1.19.2.2 veego cl_setmonitor(gp, gv)
1044 1.19.2.2 veego struct grf_softc *gp;
1045 1.19.2.2 veego struct grfvideo_mode *gv;
1046 1.19.2.2 veego {
1047 1.19.2.2 veego struct grfvideo_mode *md;
1048 1.19.2.2 veego
1049 1.19.2.2 veego if (!cl_mondefok(gv))
1050 1.19.2.2 veego return(EINVAL);
1051 1.19.2.2 veego
1052 1.19.2.2 veego #ifdef CL5426CONSOLE
1053 1.19.2.2 veego /* handle interactive setting of console mode */
1054 1.19.2.2 veego if (gv->mode_num == 255) {
1055 1.19.2.2 veego bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode));
1056 1.19.2.2 veego clconsole_mode.gv.hblank_start /= 8;
1057 1.19.2.2 veego clconsole_mode.gv.hblank_stop /= 8;
1058 1.19.2.2 veego clconsole_mode.gv.hsync_start /= 8;
1059 1.19.2.2 veego clconsole_mode.gv.hsync_stop /= 8;
1060 1.19.2.2 veego clconsole_mode.gv.htotal /= 8;
1061 1.19.2.2 veego clconsole_mode.rows = gv->disp_height / clconsole_mode.fy;
1062 1.19.2.2 veego clconsole_mode.cols = gv->disp_width / clconsole_mode.fx;
1063 1.19.2.2 veego if (!(gp->g_flags & GF_GRFON))
1064 1.19.2.2 veego cl_load_mon(gp, &clconsole_mode);
1065 1.19.2.2 veego ite_reinit(gp->g_itedev);
1066 1.19.2.2 veego return (0);
1067 1.19.2.2 veego }
1068 1.19.2.2 veego #endif
1069 1.19.2.2 veego
1070 1.19.2.2 veego md = monitor_def + (gv->mode_num - 1);
1071 1.19.2.2 veego bcopy(gv, md, sizeof(struct grfvideo_mode));
1072 1.19.2.2 veego
1073 1.19.2.2 veego /* adjust pixel oriented values to internal rep. */
1074 1.19.2.2 veego
1075 1.19.2.2 veego md->hblank_start /= 8;
1076 1.19.2.2 veego md->hblank_stop /= 8;
1077 1.19.2.2 veego md->hsync_start /= 8;
1078 1.19.2.2 veego md->hsync_stop /= 8;
1079 1.19.2.2 veego md->htotal /= 8;
1080 1.19.2.2 veego
1081 1.19.2.2 veego return (0);
1082 1.19.2.2 veego }
1083 1.19.2.2 veego
1084 1.19.2.2 veego int
1085 1.19.2.2 veego cl_getcmap(gfp, cmap)
1086 1.19.2.2 veego struct grf_softc *gfp;
1087 1.19.2.2 veego struct grf_colormap *cmap;
1088 1.19.2.2 veego {
1089 1.19.2.2 veego volatile unsigned char *ba;
1090 1.19.2.2 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1091 1.19.2.2 veego short x;
1092 1.19.2.2 veego int error;
1093 1.19.2.2 veego
1094 1.19.2.2 veego if (cmap->count == 0 || cmap->index >= 256)
1095 1.19.2.2 veego return 0;
1096 1.19.2.2 veego
1097 1.19.2.2 veego if (cmap->index + cmap->count > 256)
1098 1.19.2.2 veego cmap->count = 256 - cmap->index;
1099 1.19.2.2 veego
1100 1.19.2.2 veego ba = gfp->g_regkva;
1101 1.19.2.2 veego /* first read colors out of the chip, then copyout to userspace */
1102 1.19.2.2 veego vgaw(ba, VDAC_ADDRESS_R, cmap->index);
1103 1.19.2.2 veego x = cmap->count - 1;
1104 1.19.2.2 veego
1105 1.19.2.2 veego /*
1106 1.19.2.2 veego * Some sort 'o Magic. Spectrum has some changes on the board to speed
1107 1.19.2.2 veego * up 15 and 16Bit modes. They can access these modes with easy-to-programm
1108 1.19.2.2 veego * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb
1109 1.19.2.2 veego * is swapped to bgr. I wonder if we need to check for 8Bit though, ill
1110 1.19.2.2 veego */
1111 1.19.2.2 veego
1112 1.19.2.2 veego /*
1113 1.19.2.2 veego * The source for the above comment is somewhat unknow to me.
1114 1.19.2.2 veego * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue
1115 1.19.2.2 veego * lines swapped. In 24BPP this provides RGB instead of BGR as it would
1116 1.19.2.2 veego * be native to the chipset. This requires special programming for the
1117 1.19.2.2 veego * CLUT in 8BPP to compensate and avoid false colors.
1118 1.19.2.2 veego * I didn't find any special stuff for 15 and 16BPP though, crest.
1119 1.19.2.2 veego */
1120 1.19.2.2 veego
1121 1.19.2.2 veego switch (cltype) {
1122 1.19.2.2 veego case SPECTRUM:
1123 1.19.2.2 veego case PICCOLO:
1124 1.19.2.2 veego rp = blue + cmap->index;
1125 1.19.2.2 veego gp = green + cmap->index;
1126 1.19.2.2 veego bp = red + cmap->index;
1127 1.19.2.2 veego break;
1128 1.19.2.2 veego case PICASSO:
1129 1.19.2.2 veego rp = red + cmap->index;
1130 1.19.2.2 veego gp = green + cmap->index;
1131 1.19.2.2 veego bp = blue + cmap->index;
1132 1.19.2.2 veego break;
1133 1.19.2.2 veego default:
1134 1.19.2.2 veego rp = gp = bp = 0;
1135 1.19.2.2 veego break;
1136 1.19.2.2 veego }
1137 1.19.2.2 veego
1138 1.19.2.2 veego do {
1139 1.19.2.2 veego *rp++ = vgar(ba, VDAC_DATA) << 2;
1140 1.19.2.2 veego *gp++ = vgar(ba, VDAC_DATA) << 2;
1141 1.19.2.2 veego *bp++ = vgar(ba, VDAC_DATA) << 2;
1142 1.19.2.2 veego } while (x-- > 0);
1143 1.19.2.2 veego
1144 1.19.2.2 veego if (!(error = copyout(red + cmap->index, cmap->red, cmap->count))
1145 1.19.2.2 veego && !(error = copyout(green + cmap->index, cmap->green, cmap->count))
1146 1.19.2.2 veego && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count)))
1147 1.19.2.2 veego return (0);
1148 1.19.2.2 veego
1149 1.19.2.2 veego return (error);
1150 1.19.2.2 veego }
1151 1.19.2.2 veego
1152 1.19.2.2 veego int
1153 1.19.2.2 veego cl_putcmap(gfp, cmap)
1154 1.19.2.2 veego struct grf_softc *gfp;
1155 1.19.2.2 veego struct grf_colormap *cmap;
1156 1.19.2.2 veego {
1157 1.19.2.2 veego volatile unsigned char *ba;
1158 1.19.2.2 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1159 1.19.2.2 veego short x;
1160 1.19.2.2 veego int error;
1161 1.19.2.2 veego
1162 1.19.2.2 veego if (cmap->count == 0 || cmap->index >= 256)
1163 1.19.2.2 veego return (0);
1164 1.19.2.2 veego
1165 1.19.2.2 veego if (cmap->index + cmap->count > 256)
1166 1.19.2.2 veego cmap->count = 256 - cmap->index;
1167 1.19.2.2 veego
1168 1.19.2.2 veego /* first copy the colors into kernelspace */
1169 1.19.2.2 veego if (!(error = copyin(cmap->red, red + cmap->index, cmap->count))
1170 1.19.2.2 veego && !(error = copyin(cmap->green, green + cmap->index, cmap->count))
1171 1.19.2.2 veego && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) {
1172 1.19.2.2 veego ba = gfp->g_regkva;
1173 1.19.2.2 veego vgaw(ba, VDAC_ADDRESS_W, cmap->index);
1174 1.19.2.2 veego x = cmap->count - 1;
1175 1.19.2.2 veego
1176 1.19.2.2 veego switch (cltype) {
1177 1.19.2.2 veego case SPECTRUM:
1178 1.19.2.2 veego case PICCOLO:
1179 1.19.2.2 veego rp = blue + cmap->index;
1180 1.19.2.2 veego gp = green + cmap->index;
1181 1.19.2.2 veego bp = red + cmap->index;
1182 1.19.2.2 veego break;
1183 1.19.2.2 veego case PICASSO:
1184 1.19.2.2 veego rp = red + cmap->index;
1185 1.19.2.2 veego gp = green + cmap->index;
1186 1.19.2.2 veego bp = blue + cmap->index;
1187 1.19.2.2 veego break;
1188 1.19.2.2 veego default:
1189 1.19.2.2 veego rp = gp = bp = 0;
1190 1.19.2.2 veego break;
1191 1.19.2.2 veego }
1192 1.19.2.2 veego
1193 1.19.2.2 veego do {
1194 1.19.2.2 veego vgaw(ba, VDAC_DATA, *rp++ >> 2);
1195 1.19.2.2 veego vgaw(ba, VDAC_DATA, *gp++ >> 2);
1196 1.19.2.2 veego vgaw(ba, VDAC_DATA, *bp++ >> 2);
1197 1.19.2.2 veego } while (x-- > 0);
1198 1.19.2.2 veego return (0);
1199 1.19.2.2 veego } else
1200 1.19.2.2 veego return (error);
1201 1.19.2.2 veego }
1202 1.19.2.2 veego
1203 1.19.2.2 veego
1204 1.19.2.2 veego int
1205 1.19.2.2 veego cl_toggle(gp, wopp)
1206 1.19.2.2 veego struct grf_softc *gp;
1207 1.19.2.2 veego unsigned short wopp; /* don't need that one yet, ill */
1208 1.19.2.2 veego {
1209 1.19.2.2 veego volatile caddr_t ba;
1210 1.19.2.2 veego
1211 1.19.2.2 veego ba = gp->g_regkva;
1212 1.19.2.2 veego
1213 1.19.2.2 veego if (pass_toggle) {
1214 1.19.2.2 veego RegOffpass(ba);
1215 1.19.2.2 veego } else {
1216 1.19.2.2 veego RegOnpass(ba);
1217 1.19.2.2 veego }
1218 1.19.2.2 veego return (0);
1219 1.19.2.2 veego }
1220 1.19.2.2 veego
1221 1.19.2.2 veego static void
1222 1.19.2.2 veego cl_CompFQ(fq, num, denom, clkdoub)
1223 1.19.2.2 veego u_int fq;
1224 1.19.2.2 veego u_char *num;
1225 1.19.2.2 veego u_char *denom;
1226 1.19.2.2 veego u_char *clkdoub;
1227 1.19.2.2 veego {
1228 1.19.2.2 veego #define OSC 14318180
1229 1.19.2.2 veego /* OK, here's what we're doing here:
1230 1.19.2.2 veego *
1231 1.19.2.2 veego * OSC * NUMERATOR
1232 1.19.2.2 veego * VCLK = ------------------- Hz
1233 1.19.2.2 veego * DENOMINATOR * (1+P)
1234 1.19.2.2 veego *
1235 1.19.2.2 veego * so we're given VCLK and we should give out some useful
1236 1.19.2.2 veego * values....
1237 1.19.2.2 veego *
1238 1.19.2.2 veego * NUMERATOR is 7 bits wide
1239 1.19.2.2 veego * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0.
1240 1.19.2.2 veego *
1241 1.19.2.2 veego * We run through all the possible combinations and
1242 1.19.2.2 veego * return the values which deviate the least from the chosen frequency.
1243 1.19.2.2 veego *
1244 1.19.2.2 veego */
1245 1.19.2.2 veego #define OSC 14318180
1246 1.19.2.2 veego #define count(n,d,p) ((OSC * n)/(d * (1+p)))
1247 1.19.2.2 veego
1248 1.19.2.2 veego unsigned char n, d, p, minn, mind, minp = 0;
1249 1.19.2.2 veego unsigned long err, minerr;
1250 1.19.2.2 veego
1251 1.19.2.2 veego /*
1252 1.19.2.2 veego numer = 0x00 - 0x7f
1253 1.19.2.2 veego denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even)
1254 1.19.2.2 veego */
1255 1.19.2.2 veego
1256 1.19.2.2 veego /* find lowest error in 6144 iterations. */
1257 1.19.2.2 veego minerr = fq;
1258 1.19.2.2 veego minn = 0;
1259 1.19.2.2 veego mind = 0;
1260 1.19.2.2 veego p = 0;
1261 1.19.2.2 veego
1262 1.19.2.2 veego if ((cl_64bit == 1) && (fq >= 86000000))
1263 1.19.2.2 veego {
1264 1.19.2.2 veego for (d = 1; d < 0x20; d++) {
1265 1.19.2.2 veego for (n = 1; n < 0x80; n++) {
1266 1.19.2.2 veego err = abs(count(n, d, 0) - fq);
1267 1.19.2.2 veego if (err < minerr) {
1268 1.19.2.2 veego minerr = err;
1269 1.19.2.2 veego minn = n;
1270 1.19.2.2 veego mind = d;
1271 1.19.2.2 veego minp = 1;
1272 1.19.2.2 veego }
1273 1.19.2.2 veego }
1274 1.19.2.2 veego }
1275 1.19.2.2 veego *clkdoub = 1;
1276 1.19.2.2 veego }
1277 1.19.2.2 veego else {
1278 1.19.2.2 veego for (d = 1; d < 0x20; d++) {
1279 1.19.2.2 veego for (n = 1; n < 0x80; n++) {
1280 1.19.2.2 veego err = abs(count(n, d, p) - fq);
1281 1.19.2.2 veego if (err < minerr) {
1282 1.19.2.2 veego minerr = err;
1283 1.19.2.2 veego minn = n;
1284 1.19.2.2 veego mind = d;
1285 1.19.2.2 veego minp = p;
1286 1.19.2.2 veego }
1287 1.19.2.2 veego }
1288 1.19.2.2 veego if (d == 0x1f && p == 0) {
1289 1.19.2.2 veego p = 1;
1290 1.19.2.2 veego d = 0x0f;
1291 1.19.2.2 veego }
1292 1.19.2.2 veego }
1293 1.19.2.2 veego *clkdoub = 0;
1294 1.19.2.2 veego }
1295 1.19.2.2 veego
1296 1.19.2.2 veego *num = minn;
1297 1.19.2.2 veego *denom = (mind << 1) | minp;
1298 1.19.2.2 veego if (minerr > 500000)
1299 1.19.2.2 veego printf("Warning: CompFQ minimum error = %ld\n", minerr);
1300 1.19.2.2 veego return;
1301 1.19.2.2 veego }
1302 1.19.2.2 veego
1303 1.19.2.2 veego int
1304 1.19.2.2 veego cl_mondefok(gv)
1305 1.19.2.2 veego struct grfvideo_mode *gv;
1306 1.19.2.2 veego {
1307 1.19.2.2 veego unsigned long maxpix;
1308 1.19.2.2 veego
1309 1.19.2.2 veego if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
1310 1.19.2.2 veego if (gv->mode_num != 255 || gv->depth != 4)
1311 1.19.2.2 veego return(0);
1312 1.19.2.2 veego
1313 1.19.2.2 veego switch (gv->depth) {
1314 1.19.2.2 veego case 4:
1315 1.19.2.2 veego if (gv->mode_num != 255)
1316 1.19.2.2 veego return(0);
1317 1.19.2.2 veego case 1:
1318 1.19.2.2 veego case 8:
1319 1.19.2.2 veego maxpix = cl_maxpixelclock;
1320 1.19.2.2 veego if (cl_64bit == 1)
1321 1.19.2.2 veego {
1322 1.19.2.2 veego if (cltype == PICASSO) /* Picasso IV */
1323 1.19.2.2 veego maxpix = 135000000;
1324 1.19.2.2 veego else /* Piccolo SD64 */
1325 1.19.2.2 veego maxpix = 110000000;
1326 1.19.2.2 veego }
1327 1.19.2.2 veego break;
1328 1.19.2.2 veego case 15:
1329 1.19.2.2 veego case 16:
1330 1.19.2.2 veego if (cl_64bit == 1)
1331 1.19.2.2 veego maxpix = 85000000;
1332 1.19.2.2 veego else
1333 1.19.2.2 veego maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3);
1334 1.19.2.2 veego break;
1335 1.19.2.2 veego case 24:
1336 1.19.2.2 veego if ((cltype == PICASSO) && (cl_64bit == 1))
1337 1.19.2.2 veego maxpix = 85000000;
1338 1.19.2.2 veego else
1339 1.19.2.2 veego maxpix = cl_maxpixelclock / 3;
1340 1.19.2.2 veego break;
1341 1.19.2.2 veego case 32:
1342 1.19.2.2 veego if ((cltype == PICCOLO) && (cl_64bit == 1))
1343 1.19.2.2 veego maxpix = 50000000;
1344 1.19.2.2 veego else
1345 1.19.2.2 veego maxpix = 0;
1346 1.19.2.2 veego break;
1347 1.19.2.2 veego default:
1348 1.19.2.2 veego return (0);
1349 1.19.2.2 veego }
1350 1.19.2.2 veego if (gv->pixel_clock > maxpix)
1351 1.19.2.2 veego return (0);
1352 1.19.2.2 veego return (1);
1353 1.19.2.2 veego }
1354 1.19.2.2 veego
1355 1.19.2.2 veego int
1356 1.19.2.2 veego cl_load_mon(gp, md)
1357 1.19.2.2 veego struct grf_softc *gp;
1358 1.19.2.2 veego struct grfcltext_mode *md;
1359 1.19.2.2 veego {
1360 1.19.2.2 veego struct grfvideo_mode *gv;
1361 1.19.2.2 veego struct grfinfo *gi;
1362 1.19.2.2 veego volatile caddr_t ba, fb;
1363 1.19.2.2 veego unsigned char num0, denom0, clkdoub;
1364 1.19.2.2 veego unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
1365 1.19.2.2 veego VSE, VT;
1366 1.19.2.2 veego char LACE, DBLSCAN, TEXT;
1367 1.19.2.2 veego int uplim, lowlim;
1368 1.19.2.2 veego int sr15;
1369 1.19.2.2 veego int clkmul, offsmul, clkmode;
1370 1.19.2.2 veego
1371 1.19.2.2 veego /* identity */
1372 1.19.2.2 veego gv = &md->gv;
1373 1.19.2.2 veego TEXT = (gv->depth == 4);
1374 1.19.2.2 veego
1375 1.19.2.2 veego if (!cl_mondefok(gv)) {
1376 1.19.2.2 veego printf("mondef not ok\n");
1377 1.19.2.2 veego return (0);
1378 1.19.2.2 veego }
1379 1.19.2.2 veego ba = gp->g_regkva;
1380 1.19.2.2 veego fb = gp->g_fbkva;
1381 1.19.2.2 veego
1382 1.19.2.2 veego /* provide all needed information in grf device-independant locations */
1383 1.19.2.2 veego gp->g_data = (caddr_t) gv;
1384 1.19.2.2 veego gi = &gp->g_display;
1385 1.19.2.2 veego gi->gd_regaddr = (caddr_t) kvtop(ba);
1386 1.19.2.2 veego gi->gd_regsize = 64 * 1024;
1387 1.19.2.2 veego gi->gd_fbaddr = (caddr_t) kvtop(fb);
1388 1.19.2.2 veego gi->gd_fbsize = cl_fbsize;
1389 1.19.2.2 veego gi->gd_colors = 1 << gv->depth;
1390 1.19.2.2 veego gi->gd_planes = gv->depth;
1391 1.19.2.2 veego gi->gd_fbwidth = gv->disp_width;
1392 1.19.2.2 veego gi->gd_fbheight = gv->disp_height;
1393 1.19.2.2 veego gi->gd_fbx = 0;
1394 1.19.2.2 veego gi->gd_fby = 0;
1395 1.19.2.2 veego if (TEXT) {
1396 1.19.2.2 veego gi->gd_dwidth = md->fx * md->cols;
1397 1.19.2.2 veego gi->gd_dheight = md->fy * md->rows;
1398 1.19.2.2 veego } else {
1399 1.19.2.2 veego gi->gd_dwidth = gv->disp_width;
1400 1.19.2.2 veego gi->gd_dheight = gv->disp_height;
1401 1.19.2.2 veego }
1402 1.19.2.2 veego gi->gd_dx = 0;
1403 1.19.2.2 veego gi->gd_dy = 0;
1404 1.19.2.2 veego
1405 1.19.2.2 veego /* get display mode parameters */
1406 1.19.2.2 veego
1407 1.19.2.2 veego HBS = gv->hblank_start;
1408 1.19.2.2 veego HBE = gv->hblank_stop;
1409 1.19.2.2 veego HSS = gv->hsync_start;
1410 1.19.2.2 veego HSE = gv->hsync_stop;
1411 1.19.2.2 veego HT = gv->htotal;
1412 1.19.2.2 veego VBS = gv->vblank_start;
1413 1.19.2.2 veego VSS = gv->vsync_start;
1414 1.19.2.2 veego VSE = gv->vsync_stop;
1415 1.19.2.2 veego VBE = gv->vblank_stop;
1416 1.19.2.2 veego VT = gv->vtotal;
1417 1.19.2.2 veego
1418 1.19.2.2 veego if (TEXT)
1419 1.19.2.2 veego HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
1420 1.19.2.2 veego else
1421 1.19.2.2 veego HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */
1422 1.19.2.2 veego VDE = gv->disp_height - 1;
1423 1.19.2.2 veego
1424 1.19.2.2 veego /* figure out whether lace or dblscan is needed */
1425 1.19.2.2 veego
1426 1.19.2.2 veego uplim = gv->disp_height + (gv->disp_height / 4);
1427 1.19.2.2 veego lowlim = gv->disp_height - (gv->disp_height / 4);
1428 1.19.2.2 veego LACE = (((VT * 2) > lowlim) && ((VT * 2) < uplim)) ? 1 : 0;
1429 1.19.2.2 veego DBLSCAN = (((VT / 2) > lowlim) && ((VT / 2) < uplim)) ? 1 : 0;
1430 1.19.2.2 veego
1431 1.19.2.2 veego /* adjustments */
1432 1.19.2.2 veego switch (gv->depth) {
1433 1.19.2.2 veego case 8:
1434 1.19.2.2 veego clkmul = 1;
1435 1.19.2.2 veego offsmul = 1;
1436 1.19.2.2 veego clkmode = 0x0;
1437 1.19.2.2 veego break;
1438 1.19.2.2 veego case 15:
1439 1.19.2.2 veego case 16:
1440 1.19.2.2 veego clkmul = 1;
1441 1.19.2.2 veego offsmul = 2;
1442 1.19.2.2 veego clkmode = 0x6;
1443 1.19.2.2 veego break;
1444 1.19.2.2 veego case 24:
1445 1.19.2.2 veego if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */
1446 1.19.2.2 veego clkmul = 1;
1447 1.19.2.2 veego else
1448 1.19.2.2 veego clkmul = 3;
1449 1.19.2.2 veego offsmul = 3;
1450 1.19.2.2 veego clkmode = 0x4;
1451 1.19.2.2 veego break;
1452 1.19.2.2 veego case 32:
1453 1.19.2.2 veego clkmul = 1;
1454 1.19.2.2 veego offsmul = 2;
1455 1.19.2.2 veego clkmode = 0x8;
1456 1.19.2.2 veego break;
1457 1.19.2.2 veego default:
1458 1.19.2.2 veego clkmul = 1;
1459 1.19.2.2 veego offsmul = 1;
1460 1.19.2.2 veego clkmode = 0x0;
1461 1.19.2.2 veego break;
1462 1.19.2.2 veego }
1463 1.19.2.2 veego
1464 1.19.2.2 veego if (LACE)
1465 1.19.2.2 veego VDE /= 2;
1466 1.19.2.2 veego
1467 1.19.2.2 veego if (DBLSCAN)
1468 1.19.2.2 veego VDE *= 2;
1469 1.19.2.2 veego
1470 1.19.2.2 veego if ((VT > 1023) && (!LACE)) {
1471 1.19.2.2 veego VDE /= 2;
1472 1.19.2.2 veego VBS /= 2;
1473 1.19.2.2 veego VSS /= 2;
1474 1.19.2.2 veego VSE /= 2;
1475 1.19.2.2 veego VBE /= 2;
1476 1.19.2.2 veego VT /= 2;
1477 1.19.2.2 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7);
1478 1.19.2.2 veego }
1479 1.19.2.2 veego else
1480 1.19.2.2 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
1481 1.19.2.2 veego
1482 1.19.2.2 veego WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
1483 1.19.2.2 veego if (cl_64bit == 1) {
1484 1.19.2.2 veego if (TEXT || (gv->depth == 1))
1485 1.19.2.2 veego sr15 = 0xd0;
1486 1.19.2.2 veego else
1487 1.19.2.2 veego sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
1488 1.19.2.2 veego WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
1489 1.19.2.2 veego } else {
1490 1.19.2.2 veego sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0;
1491 1.19.2.2 veego sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f;
1492 1.19.2.2 veego }
1493 1.19.2.2 veego WSeq(ba, SEQ_ID_DRAM_CNTL, sr15);
1494 1.19.2.2 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1495 1.19.2.2 veego WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
1496 1.19.2.2 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
1497 1.19.2.2 veego
1498 1.19.2.2 veego /* Set clock */
1499 1.19.2.2 veego
1500 1.19.2.2 veego cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub);
1501 1.19.2.2 veego
1502 1.19.2.2 veego if (clkdoub) {
1503 1.19.2.2 veego HDE /= 2;
1504 1.19.2.2 veego HBS /= 2;
1505 1.19.2.2 veego HSS /= 2;
1506 1.19.2.2 veego HSE /= 2;
1507 1.19.2.2 veego HBE /= 2;
1508 1.19.2.2 veego HT /= 2;
1509 1.19.2.2 veego clkmode = 0x6;
1510 1.19.2.2 veego }
1511 1.19.2.2 veego
1512 1.19.2.2 veego WSeq(ba, SEQ_ID_VCLK_3_NUM, num0);
1513 1.19.2.2 veego WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0);
1514 1.19.2.2 veego
1515 1.19.2.2 veego /* load display parameters into board */
1516 1.19.2.2 veego
1517 1.19.2.2 veego WCrt(ba, CRT_ID_HOR_TOTAL, HT);
1518 1.19.2.2 veego WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
1519 1.19.2.2 veego WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
1520 1.19.2.2 veego WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */
1521 1.19.2.2 veego WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
1522 1.19.2.2 veego WCrt(ba, CRT_ID_END_HOR_RETR,
1523 1.19.2.2 veego (HSE & 0x1f) |
1524 1.19.2.2 veego ((HBE & 0x20) ? 0x80 : 0x00));
1525 1.19.2.2 veego WCrt(ba, CRT_ID_VER_TOTAL, VT);
1526 1.19.2.2 veego WCrt(ba, CRT_ID_OVERFLOW,
1527 1.19.2.2 veego 0x10 |
1528 1.19.2.2 veego ((VT & 0x100) ? 0x01 : 0x00) |
1529 1.19.2.2 veego ((VDE & 0x100) ? 0x02 : 0x00) |
1530 1.19.2.2 veego ((VSS & 0x100) ? 0x04 : 0x00) |
1531 1.19.2.2 veego ((VBS & 0x100) ? 0x08 : 0x00) |
1532 1.19.2.2 veego ((VT & 0x200) ? 0x20 : 0x00) |
1533 1.19.2.2 veego ((VDE & 0x200) ? 0x40 : 0x00) |
1534 1.19.2.2 veego ((VSS & 0x200) ? 0x80 : 0x00));
1535 1.19.2.2 veego
1536 1.19.2.2 veego WCrt(ba, CRT_ID_CHAR_HEIGHT,
1537 1.19.2.2 veego 0x40 | /* TEXT ? 0x00 ??? */
1538 1.19.2.2 veego (DBLSCAN ? 0x80 : 0x00) |
1539 1.19.2.2 veego ((VBS & 0x200) ? 0x20 : 0x00) |
1540 1.19.2.2 veego (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
1541 1.19.2.2 veego
1542 1.19.2.2 veego /* text cursor */
1543 1.19.2.2 veego
1544 1.19.2.2 veego if (TEXT) {
1545 1.19.2.2 veego #if CL_ULCURSOR
1546 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
1547 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
1548 1.19.2.2 veego #else
1549 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
1550 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
1551 1.19.2.2 veego #endif
1552 1.19.2.2 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f);
1553 1.19.2.2 veego
1554 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
1555 1.19.2.2 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
1556 1.19.2.2 veego }
1557 1.19.2.2 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
1558 1.19.2.2 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
1559 1.19.2.2 veego
1560 1.19.2.2 veego WCrt(ba, CRT_ID_START_VER_RETR, VSS);
1561 1.19.2.2 veego WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20);
1562 1.19.2.2 veego WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
1563 1.19.2.2 veego WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
1564 1.19.2.2 veego WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
1565 1.19.2.2 veego
1566 1.19.2.2 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
1567 1.19.2.2 veego WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */
1568 1.19.2.2 veego WCrt(ba, CRT_ID_LACE_CNTL,
1569 1.19.2.2 veego (LACE ? 0x01 : 0x00) |
1570 1.19.2.2 veego ((HBE & 0x40) ? 0x10 : 0x00) |
1571 1.19.2.2 veego ((HBE & 0x80) ? 0x20 : 0x00) |
1572 1.19.2.2 veego ((VBE & 0x100) ? 0x40 : 0x00) |
1573 1.19.2.2 veego ((VBE & 0x200) ? 0x80 : 0x00));
1574 1.19.2.2 veego
1575 1.19.2.2 veego WGfx(ba, GCT_ID_GRAPHICS_MODE,
1576 1.19.2.2 veego ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
1577 1.19.2.2 veego WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
1578 1.19.2.2 veego
1579 1.19.2.2 veego WSeq(ba, SEQ_ID_EXT_SEQ_MODE,
1580 1.19.2.2 veego ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) |
1581 1.19.2.2 veego ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode);
1582 1.19.2.2 veego
1583 1.19.2.2 veego /* write 0x00 to VDAC_MASK before accessing HDR this helps
1584 1.19.2.2 veego sometimes, out of "secret" application note (crest) */
1585 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0);
1586 1.19.2.2 veego /* reset HDR "magic" access counter (crest) */
1587 1.19.2.2 veego vgar(ba, VDAC_ADDRESS);
1588 1.19.2.2 veego
1589 1.19.2.2 veego delay(200000);
1590 1.19.2.2 veego vgar(ba, VDAC_MASK);
1591 1.19.2.2 veego delay(200000);
1592 1.19.2.2 veego vgar(ba, VDAC_MASK);
1593 1.19.2.2 veego delay(200000);
1594 1.19.2.2 veego vgar(ba, VDAC_MASK);
1595 1.19.2.2 veego delay(200000);
1596 1.19.2.2 veego vgar(ba, VDAC_MASK);
1597 1.19.2.2 veego delay(200000);
1598 1.19.2.2 veego switch (gv->depth) {
1599 1.19.2.2 veego case 1:
1600 1.19.2.2 veego case 4: /* text */
1601 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0);
1602 1.19.2.2 veego HDE = gv->disp_width / 16;
1603 1.19.2.2 veego break;
1604 1.19.2.2 veego case 8:
1605 1.19.2.2 veego if (clkdoub)
1606 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */
1607 1.19.2.2 veego else
1608 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0);
1609 1.19.2.2 veego HDE = gv->disp_width / 8;
1610 1.19.2.2 veego break;
1611 1.19.2.2 veego case 15:
1612 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0xd0);
1613 1.19.2.2 veego HDE = gv->disp_width / 4;
1614 1.19.2.2 veego break;
1615 1.19.2.2 veego case 16:
1616 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0xc1);
1617 1.19.2.2 veego HDE = gv->disp_width / 4;
1618 1.19.2.2 veego break;
1619 1.19.2.2 veego case 24:
1620 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0xc5);
1621 1.19.2.2 veego HDE = (gv->disp_width / 8) * 3;
1622 1.19.2.2 veego break;
1623 1.19.2.2 veego case 32:
1624 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0xc5);
1625 1.19.2.2 veego HDE = (gv->disp_width / 4);
1626 1.19.2.2 veego break;
1627 1.19.2.2 veego }
1628 1.19.2.2 veego
1629 1.19.2.2 veego /* reset HDR "magic" access counter (crest) */
1630 1.19.2.2 veego vgar(ba, VDAC_ADDRESS);
1631 1.19.2.2 veego /* then enable all bit in VDAC_MASK afterwards (crest) */
1632 1.19.2.2 veego vgaw(ba, VDAC_MASK, 0xff);
1633 1.19.2.2 veego
1634 1.19.2.2 veego WCrt(ba, CRT_ID_OFFSET, HDE);
1635 1.19.2.2 veego if (cl_64bit == 1) {
1636 1.19.2.2 veego WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
1637 1.19.2.2 veego WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
1638 1.19.2.2 veego }
1639 1.19.2.2 veego WCrt(ba, CRT_ID_EXT_DISP_CNTL,
1640 1.19.2.2 veego ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) |
1641 1.19.2.2 veego 0x22 |
1642 1.19.2.2 veego ((HDE > 0xff) ? 0x10 : 0x00));
1643 1.19.2.2 veego
1644 1.19.2.2 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
1645 1.19.2.2 veego WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
1646 1.19.2.2 veego (gv->depth == 1) ? 0x01 : 0x0f);
1647 1.19.2.2 veego
1648 1.19.2.2 veego /* text initialization */
1649 1.19.2.2 veego
1650 1.19.2.2 veego if (TEXT) {
1651 1.19.2.2 veego cl_inittextmode(gp);
1652 1.19.2.2 veego }
1653 1.19.2.2 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14);
1654 1.19.2.2 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
1655 1.19.2.2 veego
1656 1.19.2.2 veego /* Pass-through */
1657 1.19.2.2 veego
1658 1.19.2.2 veego RegOffpass(ba);
1659 1.19.2.2 veego
1660 1.19.2.2 veego return (1);
1661 1.19.2.2 veego }
1662 1.19.2.2 veego
1663 1.19.2.2 veego void
1664 1.19.2.2 veego cl_inittextmode(gp)
1665 1.19.2.2 veego struct grf_softc *gp;
1666 1.19.2.2 veego {
1667 1.19.2.2 veego struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data;
1668 1.19.2.2 veego volatile unsigned char *ba = gp->g_regkva;
1669 1.19.2.2 veego unsigned char *fb = gp->g_fbkva;
1670 1.19.2.2 veego unsigned char *c, *f, y;
1671 1.19.2.2 veego unsigned short z;
1672 1.19.2.2 veego
1673 1.19.2.2 veego
1674 1.19.2.2 veego /* load text font into beginning of display memory. Each character
1675 1.19.2.2 veego * cell is 32 bytes long (enough for 4 planes) */
1676 1.19.2.2 veego
1677 1.19.2.2 veego SetTextPlane(ba, 0x02);
1678 1.19.2.2 veego cl_memset(fb, 0, 256 * 32);
1679 1.19.2.2 veego c = (unsigned char *) (fb) + (32 * tm->fdstart);
1680 1.19.2.2 veego f = tm->fdata;
1681 1.19.2.2 veego for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
1682 1.19.2.2 veego for (y = 0; y < tm->fy; y++)
1683 1.19.2.2 veego *c++ = *f++;
1684 1.19.2.2 veego
1685 1.19.2.2 veego /* clear out text/attr planes (three screens worth) */
1686 1.19.2.2 veego
1687 1.19.2.2 veego SetTextPlane(ba, 0x01);
1688 1.19.2.2 veego cl_memset(fb, 0x07, tm->cols * tm->rows * 3);
1689 1.19.2.2 veego SetTextPlane(ba, 0x00);
1690 1.19.2.2 veego cl_memset(fb, 0x20, tm->cols * tm->rows * 3);
1691 1.19.2.2 veego
1692 1.19.2.2 veego /* print out a little init msg */
1693 1.19.2.2 veego
1694 1.19.2.2 veego c = (unsigned char *) (fb) + (tm->cols - 16);
1695 1.19.2.2 veego strcpy(c, "CIRRUS");
1696 1.19.2.2 veego c[6] = 0x20;
1697 1.19.2.2 veego
1698 1.19.2.2 veego /* set colors (B&W) */
1699 1.19.2.2 veego
1700 1.19.2.2 veego vgaw(ba, VDAC_ADDRESS_W, 0);
1701 1.19.2.2 veego for (z = 0; z < 256; z++) {
1702 1.19.2.2 veego unsigned char r, g, b;
1703 1.19.2.2 veego
1704 1.19.2.2 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1705 1.19.2.2 veego
1706 1.19.2.2 veego if (cltype == PICASSO) {
1707 1.19.2.2 veego r = clconscolors[y][0];
1708 1.19.2.2 veego g = clconscolors[y][1];
1709 1.19.2.2 veego b = clconscolors[y][2];
1710 1.19.2.2 veego } else {
1711 1.19.2.2 veego b = clconscolors[y][0];
1712 1.19.2.2 veego g = clconscolors[y][1];
1713 1.19.2.2 veego r = clconscolors[y][2];
1714 1.19.2.2 veego }
1715 1.19.2.2 veego vgaw(ba, VDAC_DATA, r >> 2);
1716 1.19.2.2 veego vgaw(ba, VDAC_DATA, g >> 2);
1717 1.19.2.2 veego vgaw(ba, VDAC_DATA, b >> 2);
1718 1.19.2.2 veego }
1719 1.19.2.2 veego }
1720 1.19.2.2 veego
1721 1.19.2.2 veego void
1722 1.19.2.2 veego cl_memset(d, c, l)
1723 1.19.2.2 veego unsigned char *d;
1724 1.19.2.2 veego unsigned char c;
1725 1.19.2.2 veego int l;
1726 1.19.2.2 veego {
1727 1.19.2.2 veego for (; l > 0; l--)
1728 1.19.2.2 veego *d++ = c;
1729 1.19.2.2 veego }
1730 1.19.2.2 veego
1731 1.19.2.2 veego /*
1732 1.19.2.2 veego * Special wakeup/passthrough registers on graphics boards
1733 1.19.2.2 veego *
1734 1.19.2.2 veego * The methods have diverged a bit for each board, so
1735 1.19.2.2 veego * WPass(P) has been converted into a set of specific
1736 1.19.2.2 veego * inline functions.
1737 1.19.2.2 veego */
1738 1.19.2.2 veego static void
1739 1.19.2.2 veego RegWakeup(ba)
1740 1.19.2.2 veego volatile caddr_t ba;
1741 1.19.2.2 veego {
1742 1.19.2.2 veego
1743 1.19.2.2 veego switch (cltype) {
1744 1.19.2.2 veego case SPECTRUM:
1745 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, 0x1f);
1746 1.19.2.2 veego break;
1747 1.19.2.2 veego case PICASSO:
1748 1.19.2.2 veego /* Picasso needs no wakeup */
1749 1.19.2.2 veego break;
1750 1.19.2.2 veego case PICCOLO:
1751 1.19.2.2 veego if (cl_64bit == 1)
1752 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, 0x1f);
1753 1.19.2.2 veego else
1754 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10);
1755 1.19.2.2 veego break;
1756 1.19.2.2 veego }
1757 1.19.2.2 veego delay(200000);
1758 1.19.2.2 veego }
1759 1.19.2.2 veego
1760 1.19.2.2 veego static void
1761 1.19.2.2 veego RegOnpass(ba)
1762 1.19.2.2 veego volatile caddr_t ba;
1763 1.19.2.2 veego {
1764 1.19.2.2 veego
1765 1.19.2.2 veego switch (cltype) {
1766 1.19.2.2 veego case SPECTRUM:
1767 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, 0x4f);
1768 1.19.2.2 veego break;
1769 1.19.2.2 veego case PICASSO:
1770 1.19.2.2 veego if (cl_64bit == 0)
1771 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_WP, 0x01);
1772 1.19.2.2 veego break;
1773 1.19.2.2 veego case PICCOLO:
1774 1.19.2.2 veego if (cl_64bit == 1)
1775 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, 0x4f);
1776 1.19.2.2 veego else
1777 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf);
1778 1.19.2.2 veego break;
1779 1.19.2.2 veego }
1780 1.19.2.2 veego pass_toggle = 1;
1781 1.19.2.2 veego delay(200000);
1782 1.19.2.2 veego }
1783 1.19.2.2 veego
1784 1.19.2.2 veego static void
1785 1.19.2.2 veego RegOffpass(ba)
1786 1.19.2.2 veego volatile caddr_t ba;
1787 1.19.2.2 veego {
1788 1.19.2.2 veego
1789 1.19.2.2 veego switch (cltype) {
1790 1.19.2.2 veego case SPECTRUM:
1791 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, 0x6f);
1792 1.19.2.2 veego break;
1793 1.19.2.2 veego case PICASSO:
1794 1.19.2.2 veego if (cl_64bit == 0)
1795 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, 0xff);
1796 1.19.2.2 veego break;
1797 1.19.2.2 veego case PICCOLO:
1798 1.19.2.2 veego if (cl_64bit == 1)
1799 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, 0x6f);
1800 1.19.2.2 veego else
1801 1.19.2.2 veego vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20);
1802 1.19.2.2 veego break;
1803 1.19.2.2 veego }
1804 1.19.2.2 veego pass_toggle = 0;
1805 1.19.2.2 veego delay(200000);
1806 1.19.2.2 veego }
1807 1.19.2.2 veego
1808 1.19.2.2 veego #endif /* NGRFCL */
1809