grf_cl.c revision 1.26.6.6 1 1.26.6.6 nathanw /* $NetBSD: grf_cl.c,v 1.26.6.6 2002/10/18 02:34:53 nathanw Exp $ */
2 1.26.6.2 nathanw
3 1.26.6.2 nathanw /*
4 1.26.6.2 nathanw * Copyright (c) 1997 Klaus Burkert
5 1.26.6.2 nathanw * Copyright (c) 1995 Ezra Story
6 1.26.6.2 nathanw * Copyright (c) 1995 Kari Mettinen
7 1.26.6.2 nathanw * Copyright (c) 1994 Markus Wild
8 1.26.6.2 nathanw * Copyright (c) 1994 Lutz Vieweg
9 1.26.6.2 nathanw * All rights reserved.
10 1.26.6.2 nathanw *
11 1.26.6.2 nathanw * Redistribution and use in source and binary forms, with or without
12 1.26.6.2 nathanw * modification, are permitted provided that the following conditions
13 1.26.6.2 nathanw * are met:
14 1.26.6.2 nathanw * 1. Redistributions of source code must retain the above copyright
15 1.26.6.2 nathanw * notice, this list of conditions and the following disclaimer.
16 1.26.6.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
17 1.26.6.2 nathanw * notice, this list of conditions and the following disclaimer in the
18 1.26.6.2 nathanw * documentation and/or other materials provided with the distribution.
19 1.26.6.2 nathanw * 3. All advertising materials mentioning features or use of this software
20 1.26.6.2 nathanw * must display the following acknowledgement:
21 1.26.6.2 nathanw * This product includes software developed by Lutz Vieweg.
22 1.26.6.2 nathanw * 4. The name of the author may not be used to endorse or promote products
23 1.26.6.2 nathanw * derived from this software without specific prior written permission
24 1.26.6.2 nathanw *
25 1.26.6.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.26.6.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.26.6.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.26.6.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.26.6.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.26.6.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.26.6.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.26.6.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.26.6.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 1.26.6.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.26.6.2 nathanw */
36 1.26.6.2 nathanw #include "opt_amigacons.h"
37 1.26.6.2 nathanw
38 1.26.6.2 nathanw #include <sys/cdefs.h>
39 1.26.6.6 nathanw __KERNEL_RCSID(0, "$NetBSD: grf_cl.c,v 1.26.6.6 2002/10/18 02:34:53 nathanw Exp $");
40 1.26.6.2 nathanw
41 1.26.6.2 nathanw #include "grfcl.h"
42 1.26.6.2 nathanw #if NGRFCL > 0
43 1.26.6.2 nathanw
44 1.26.6.2 nathanw /*
45 1.26.6.2 nathanw * Graphics routines for Cirrus CL GD 5426 boards,
46 1.26.6.2 nathanw *
47 1.26.6.2 nathanw * This code offers low-level routines to access Cirrus Cl GD 5426
48 1.26.6.2 nathanw * graphics-boards from within NetBSD for the Amiga.
49 1.26.6.2 nathanw * No warranties for any kind of function at all - this
50 1.26.6.2 nathanw * code may crash your hardware and scratch your harddisk. Use at your
51 1.26.6.2 nathanw * own risk. Freely distributable.
52 1.26.6.2 nathanw *
53 1.26.6.2 nathanw * Modified for Cirrus CL GD 5426 from
54 1.26.6.2 nathanw * Lutz Vieweg's retina driver by Kari Mettinen 08/94
55 1.26.6.2 nathanw * Contributions by Ill, ScottE, MiL
56 1.26.6.2 nathanw * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95
57 1.26.6.2 nathanw * Picasso/040 patches (wee!) by crest 01/96
58 1.26.6.2 nathanw *
59 1.26.6.2 nathanw * PicassoIV support bz Klaus "crest" Burkert.
60 1.26.6.2 nathanw * Fixed interlace and doublescan, added clockdoubling and
61 1.26.6.2 nathanw * HiColor&TrueColor suuport by crest 01/97
62 1.26.6.2 nathanw *
63 1.26.6.2 nathanw * Thanks to Village Tronic Marketing Gmbh for providing me with
64 1.26.6.2 nathanw * a Picasso-II board.
65 1.26.6.2 nathanw * Thanks for Integrated Electronics Oy Ab for providing me with
66 1.26.6.2 nathanw * Cirrus CL GD 542x family documentation.
67 1.26.6.2 nathanw *
68 1.26.6.2 nathanw * TODO:
69 1.26.6.2 nathanw * Mouse support (almost there! :-))
70 1.26.6.2 nathanw * Blitter support
71 1.26.6.2 nathanw *
72 1.26.6.2 nathanw */
73 1.26.6.2 nathanw
74 1.26.6.2 nathanw #include <sys/param.h>
75 1.26.6.2 nathanw #include <sys/systm.h>
76 1.26.6.2 nathanw #include <sys/errno.h>
77 1.26.6.2 nathanw #include <sys/ioctl.h>
78 1.26.6.2 nathanw #include <sys/device.h>
79 1.26.6.2 nathanw #include <sys/malloc.h>
80 1.26.6.2 nathanw
81 1.26.6.2 nathanw #include <machine/cpu.h>
82 1.26.6.2 nathanw #include <dev/cons.h>
83 1.26.6.2 nathanw #include <amiga/dev/itevar.h>
84 1.26.6.2 nathanw #include <amiga/amiga/device.h>
85 1.26.6.2 nathanw #include <amiga/dev/grfioctl.h>
86 1.26.6.2 nathanw #include <amiga/dev/grfvar.h>
87 1.26.6.2 nathanw #include <amiga/dev/grf_clreg.h>
88 1.26.6.2 nathanw #include <amiga/dev/zbusvar.h>
89 1.26.6.2 nathanw
90 1.26.6.2 nathanw int cl_mondefok(struct grfvideo_mode *);
91 1.26.6.2 nathanw void cl_boardinit(struct grf_softc *);
92 1.26.6.2 nathanw static void cl_CompFQ(u_int, u_char *, u_char *, u_char *);
93 1.26.6.2 nathanw int cl_getvmode(struct grf_softc *, struct grfvideo_mode *);
94 1.26.6.2 nathanw int cl_setvmode(struct grf_softc *, unsigned int);
95 1.26.6.2 nathanw int cl_toggle(struct grf_softc *, unsigned short);
96 1.26.6.2 nathanw int cl_getcmap(struct grf_softc *, struct grf_colormap *);
97 1.26.6.2 nathanw int cl_putcmap(struct grf_softc *, struct grf_colormap *);
98 1.26.6.2 nathanw #ifndef CL5426CONSOLE
99 1.26.6.2 nathanw void cl_off(struct grf_softc *);
100 1.26.6.2 nathanw #endif
101 1.26.6.2 nathanw void cl_inittextmode(struct grf_softc *);
102 1.26.6.2 nathanw int cl_ioctl(register struct grf_softc *, u_long, void *);
103 1.26.6.2 nathanw int cl_getmousepos(struct grf_softc *, struct grf_position *);
104 1.26.6.2 nathanw int cl_setmousepos(struct grf_softc *, struct grf_position *);
105 1.26.6.2 nathanw static int cl_setspriteinfo(struct grf_softc *, struct grf_spriteinfo *);
106 1.26.6.2 nathanw int cl_getspriteinfo(struct grf_softc *, struct grf_spriteinfo *);
107 1.26.6.2 nathanw static int cl_getspritemax(struct grf_softc *, struct grf_position *);
108 1.26.6.2 nathanw int cl_blank(struct grf_softc *, int *);
109 1.26.6.2 nathanw int cl_setmonitor(struct grf_softc *, struct grfvideo_mode *);
110 1.26.6.2 nathanw void cl_writesprpos(volatile char *, short, short);
111 1.26.6.2 nathanw void writeshifted(volatile char *, char, char);
112 1.26.6.2 nathanw
113 1.26.6.2 nathanw static void RegWakeup(volatile caddr_t);
114 1.26.6.2 nathanw static void RegOnpass(volatile caddr_t);
115 1.26.6.2 nathanw static void RegOffpass(volatile caddr_t);
116 1.26.6.2 nathanw
117 1.26.6.2 nathanw void grfclattach(struct device *, struct device *, void *);
118 1.26.6.2 nathanw int grfclprint(void *, const char *);
119 1.26.6.2 nathanw int grfclmatch(struct device *, struct cfdata *, void *);
120 1.26.6.2 nathanw void cl_memset(unsigned char *, unsigned char, int);
121 1.26.6.2 nathanw
122 1.26.6.2 nathanw /* Graphics display definitions.
123 1.26.6.2 nathanw * These are filled by 'grfconfig' using GRFIOCSETMON.
124 1.26.6.2 nathanw */
125 1.26.6.2 nathanw #define monitor_def_max 24
126 1.26.6.2 nathanw static struct grfvideo_mode monitor_def[24] = {
127 1.26.6.2 nathanw {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
128 1.26.6.2 nathanw {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
129 1.26.6.2 nathanw {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
130 1.26.6.2 nathanw };
131 1.26.6.2 nathanw static struct grfvideo_mode *monitor_current = &monitor_def[0];
132 1.26.6.2 nathanw
133 1.26.6.2 nathanw /* Patchable maximum pixel clock */
134 1.26.6.2 nathanw unsigned long cl_maxpixelclock = 86000000;
135 1.26.6.2 nathanw
136 1.26.6.2 nathanw /* Console display definition.
137 1.26.6.2 nathanw * Default hardcoded text mode. This grf_cl is set up to
138 1.26.6.2 nathanw * use one text mode only, and this is it. You may use
139 1.26.6.2 nathanw * grfconfig to change the mode after boot.
140 1.26.6.2 nathanw */
141 1.26.6.2 nathanw /* Console font */
142 1.26.6.2 nathanw #ifdef KFONT_8X11
143 1.26.6.2 nathanw #define CIRRUSFONT kernel_font_8x11
144 1.26.6.2 nathanw #define CIRRUSFONTY 11
145 1.26.6.2 nathanw #else
146 1.26.6.2 nathanw #define CIRRUSFONT kernel_font_8x8
147 1.26.6.2 nathanw #define CIRRUSFONTY 8
148 1.26.6.2 nathanw #endif
149 1.26.6.2 nathanw extern unsigned char CIRRUSFONT[];
150 1.26.6.2 nathanw
151 1.26.6.2 nathanw struct grfcltext_mode clconsole_mode = {
152 1.26.6.2 nathanw {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8,
153 1.26.6.2 nathanw 481, 490, 498, 522, 0},
154 1.26.6.2 nathanw 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255
155 1.26.6.2 nathanw };
156 1.26.6.2 nathanw /* Console colors */
157 1.26.6.2 nathanw unsigned char clconscolors[3][3] = { /* background, foreground, hilite */
158 1.26.6.2 nathanw {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
159 1.26.6.2 nathanw };
160 1.26.6.2 nathanw
161 1.26.6.2 nathanw int cltype = 0; /* Picasso, Spectrum or Piccolo */
162 1.26.6.2 nathanw int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */
163 1.26.6.4 nathanw unsigned char cl_pass_toggle; /* passthru status tracker */
164 1.26.6.2 nathanw
165 1.26.6.2 nathanw /*
166 1.26.6.2 nathanw * because all 542x-boards have 2 configdev entries, one for
167 1.26.6.2 nathanw * framebuffer mem and the other for regs, we have to hold onto
168 1.26.6.2 nathanw * the pointers globally until we match on both. This and 'cltype'
169 1.26.6.2 nathanw * are the primary obsticles to multiple board support, but if you
170 1.26.6.2 nathanw * have multiple boards you have bigger problems than grf_cl.
171 1.26.6.2 nathanw */
172 1.26.6.2 nathanw static void *cl_fbaddr = 0; /* framebuffer */
173 1.26.6.2 nathanw static void *cl_regaddr = 0; /* registers */
174 1.26.6.2 nathanw static int cl_fbsize; /* framebuffer size */
175 1.26.6.2 nathanw static int cl_fbautosize; /* framebuffer autoconfig size */
176 1.26.6.2 nathanw
177 1.26.6.2 nathanw
178 1.26.6.2 nathanw /*
179 1.26.6.2 nathanw * current sprite info, if you add support for multiple boards
180 1.26.6.2 nathanw * make this an array or something
181 1.26.6.2 nathanw */
182 1.26.6.2 nathanw struct grf_spriteinfo cl_cursprite;
183 1.26.6.2 nathanw
184 1.26.6.2 nathanw /* sprite bitmaps in kernel stack, you'll need to arrayize these too if
185 1.26.6.2 nathanw * you add multiple board support
186 1.26.6.2 nathanw */
187 1.26.6.2 nathanw static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64];
188 1.26.6.2 nathanw static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2];
189 1.26.6.2 nathanw
190 1.26.6.2 nathanw /* standard driver stuff */
191 1.26.6.6 nathanw CFATTACH_DECL(grfcl, sizeof(struct grf_softc),
192 1.26.6.6 nathanw grfclmatch, grfclattach, NULL, NULL);
193 1.26.6.2 nathanw
194 1.26.6.2 nathanw static struct cfdata *cfdata;
195 1.26.6.2 nathanw
196 1.26.6.2 nathanw int
197 1.26.6.2 nathanw grfclmatch(pdp, cfp, auxp)
198 1.26.6.2 nathanw struct device *pdp;
199 1.26.6.2 nathanw struct cfdata *cfp;
200 1.26.6.2 nathanw void *auxp;
201 1.26.6.2 nathanw {
202 1.26.6.2 nathanw struct zbus_args *zap;
203 1.26.6.2 nathanw static int regprod, fbprod, fbprod2;
204 1.26.6.2 nathanw int error;
205 1.26.6.2 nathanw
206 1.26.6.2 nathanw fbprod2 = 0;
207 1.26.6.2 nathanw zap = auxp;
208 1.26.6.2 nathanw
209 1.26.6.2 nathanw #ifndef CL5426CONSOLE
210 1.26.6.2 nathanw if (amiga_realconfig == 0)
211 1.26.6.2 nathanw return (0);
212 1.26.6.2 nathanw #endif
213 1.26.6.2 nathanw
214 1.26.6.2 nathanw /* Grab the first board we encounter as the preferred one. This will
215 1.26.6.2 nathanw * allow one board to work in a multiple 5426 board system, but not
216 1.26.6.2 nathanw * multiple boards at the same time. */
217 1.26.6.2 nathanw if (cltype == 0) {
218 1.26.6.2 nathanw switch (zap->manid) {
219 1.26.6.2 nathanw case PICASSO:
220 1.26.6.2 nathanw switch (zap->prodid) {
221 1.26.6.2 nathanw case 11:
222 1.26.6.2 nathanw case 12:
223 1.26.6.2 nathanw regprod = 12;
224 1.26.6.2 nathanw fbprod = 11;
225 1.26.6.2 nathanw error = 0;
226 1.26.6.2 nathanw break;
227 1.26.6.2 nathanw case 22:
228 1.26.6.2 nathanw fbprod2 = 22;
229 1.26.6.2 nathanw error = 0;
230 1.26.6.2 nathanw break;
231 1.26.6.2 nathanw case 21:
232 1.26.6.2 nathanw case 23:
233 1.26.6.2 nathanw regprod = 23;
234 1.26.6.2 nathanw fbprod = 21;
235 1.26.6.2 nathanw cl_64bit = 1;
236 1.26.6.2 nathanw error = 0;
237 1.26.6.2 nathanw break;
238 1.26.6.2 nathanw case 24:
239 1.26.6.2 nathanw regprod = 24;
240 1.26.6.2 nathanw fbprod = 24;
241 1.26.6.2 nathanw cl_64bit = 1;
242 1.26.6.2 nathanw error = 0;
243 1.26.6.2 nathanw break;
244 1.26.6.2 nathanw default:
245 1.26.6.2 nathanw error = 1;
246 1.26.6.2 nathanw break;
247 1.26.6.2 nathanw }
248 1.26.6.2 nathanw if (error == 1)
249 1.26.6.2 nathanw return (0);
250 1.26.6.2 nathanw else
251 1.26.6.2 nathanw break;
252 1.26.6.2 nathanw case SPECTRUM:
253 1.26.6.2 nathanw if (zap->prodid != 2 && zap->prodid != 1)
254 1.26.6.2 nathanw return (0);
255 1.26.6.2 nathanw regprod = 2;
256 1.26.6.2 nathanw fbprod = 1;
257 1.26.6.2 nathanw break;
258 1.26.6.2 nathanw case PICCOLO:
259 1.26.6.2 nathanw switch (zap->prodid) {
260 1.26.6.2 nathanw case 5:
261 1.26.6.2 nathanw case 6:
262 1.26.6.2 nathanw regprod = 6;
263 1.26.6.2 nathanw fbprod = 5;
264 1.26.6.2 nathanw error = 0;
265 1.26.6.2 nathanw break;
266 1.26.6.2 nathanw case 10:
267 1.26.6.2 nathanw case 11:
268 1.26.6.2 nathanw regprod = 11;
269 1.26.6.2 nathanw fbprod = 10;
270 1.26.6.2 nathanw cl_64bit = 1;
271 1.26.6.2 nathanw error = 0;
272 1.26.6.2 nathanw break;
273 1.26.6.2 nathanw default:
274 1.26.6.2 nathanw error = 1;
275 1.26.6.2 nathanw break;
276 1.26.6.2 nathanw }
277 1.26.6.2 nathanw if (error == 1)
278 1.26.6.2 nathanw return (0);
279 1.26.6.2 nathanw else
280 1.26.6.2 nathanw break;
281 1.26.6.2 nathanw default:
282 1.26.6.2 nathanw return (0);
283 1.26.6.2 nathanw }
284 1.26.6.2 nathanw cltype = zap->manid;
285 1.26.6.2 nathanw } else {
286 1.26.6.2 nathanw if (cltype != zap->manid) {
287 1.26.6.2 nathanw return (0);
288 1.26.6.2 nathanw }
289 1.26.6.2 nathanw }
290 1.26.6.2 nathanw
291 1.26.6.2 nathanw /* Configure either registers or framebuffer in any order */
292 1.26.6.2 nathanw if ((cltype == PICASSO) && (cl_64bit == 1)) {
293 1.26.6.2 nathanw switch (zap->prodid) {
294 1.26.6.2 nathanw case 21:
295 1.26.6.2 nathanw cl_fbaddr = zap->va;
296 1.26.6.2 nathanw cl_fbautosize = zap->size;
297 1.26.6.2 nathanw break;
298 1.26.6.2 nathanw case 22:
299 1.26.6.2 nathanw cl_fbautosize += zap->size;
300 1.26.6.2 nathanw break;
301 1.26.6.2 nathanw case 23:
302 1.26.6.2 nathanw cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000);
303 1.26.6.2 nathanw break;
304 1.26.6.2 nathanw case 24:
305 1.26.6.2 nathanw cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000);
306 1.26.6.2 nathanw /* check for PicassoIV with 64MB config and handle it */
307 1.26.6.2 nathanw if (zap->size == 0x04000000) {
308 1.26.6.2 nathanw cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000);
309 1.26.6.2 nathanw } else {
310 1.26.6.2 nathanw cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000);
311 1.26.6.2 nathanw }
312 1.26.6.2 nathanw cl_fbautosize = 0x400000;
313 1.26.6.2 nathanw break;
314 1.26.6.2 nathanw default:
315 1.26.6.2 nathanw return (0);
316 1.26.6.2 nathanw }
317 1.26.6.2 nathanw }
318 1.26.6.2 nathanw else {
319 1.26.6.2 nathanw if (zap->prodid == regprod)
320 1.26.6.2 nathanw cl_regaddr = zap->va;
321 1.26.6.2 nathanw else
322 1.26.6.2 nathanw if (zap->prodid == fbprod) {
323 1.26.6.2 nathanw cl_fbaddr = zap->va;
324 1.26.6.2 nathanw cl_fbautosize = zap->size;
325 1.26.6.2 nathanw } else
326 1.26.6.2 nathanw return (0);
327 1.26.6.2 nathanw }
328 1.26.6.2 nathanw
329 1.26.6.2 nathanw #ifdef CL5426CONSOLE
330 1.26.6.2 nathanw if (amiga_realconfig == 0) {
331 1.26.6.2 nathanw cfdata = cfp;
332 1.26.6.2 nathanw }
333 1.26.6.2 nathanw #endif
334 1.26.6.2 nathanw
335 1.26.6.2 nathanw return (1);
336 1.26.6.2 nathanw }
337 1.26.6.2 nathanw
338 1.26.6.2 nathanw void
339 1.26.6.2 nathanw grfclattach(pdp, dp, auxp)
340 1.26.6.2 nathanw struct device *pdp, *dp;
341 1.26.6.2 nathanw void *auxp;
342 1.26.6.2 nathanw {
343 1.26.6.2 nathanw static struct grf_softc congrf;
344 1.26.6.2 nathanw struct zbus_args *zap;
345 1.26.6.2 nathanw struct grf_softc *gp;
346 1.26.6.2 nathanw static char attachflag = 0;
347 1.26.6.2 nathanw
348 1.26.6.2 nathanw zap = auxp;
349 1.26.6.2 nathanw
350 1.26.6.2 nathanw printf("\n");
351 1.26.6.2 nathanw
352 1.26.6.2 nathanw /* make sure both halves have matched */
353 1.26.6.2 nathanw if (!cl_regaddr || !cl_fbaddr)
354 1.26.6.2 nathanw return;
355 1.26.6.2 nathanw
356 1.26.6.2 nathanw /* do all that messy console/grf stuff */
357 1.26.6.2 nathanw if (dp == NULL)
358 1.26.6.2 nathanw gp = &congrf;
359 1.26.6.2 nathanw else
360 1.26.6.2 nathanw gp = (struct grf_softc *) dp;
361 1.26.6.2 nathanw
362 1.26.6.2 nathanw if (dp != NULL && congrf.g_regkva != 0) {
363 1.26.6.2 nathanw /*
364 1.26.6.2 nathanw * inited earlier, just copy (not device struct)
365 1.26.6.2 nathanw */
366 1.26.6.2 nathanw bcopy(&congrf.g_display, &gp->g_display,
367 1.26.6.2 nathanw (char *) &gp[1] - (char *) &gp->g_display);
368 1.26.6.2 nathanw } else {
369 1.26.6.2 nathanw gp->g_regkva = (volatile caddr_t) cl_regaddr;
370 1.26.6.2 nathanw gp->g_fbkva = (volatile caddr_t) cl_fbaddr;
371 1.26.6.2 nathanw
372 1.26.6.2 nathanw gp->g_unit = GRF_CL5426_UNIT;
373 1.26.6.2 nathanw gp->g_mode = cl_mode;
374 1.26.6.2 nathanw gp->g_conpri = grfcl_cnprobe();
375 1.26.6.2 nathanw gp->g_flags = GF_ALIVE;
376 1.26.6.2 nathanw
377 1.26.6.2 nathanw /* wakeup the board */
378 1.26.6.2 nathanw cl_boardinit(gp);
379 1.26.6.2 nathanw #ifdef CL5426CONSOLE
380 1.26.6.2 nathanw grfcl_iteinit(gp);
381 1.26.6.2 nathanw (void) cl_load_mon(gp, &clconsole_mode);
382 1.26.6.2 nathanw #endif
383 1.26.6.2 nathanw
384 1.26.6.2 nathanw }
385 1.26.6.2 nathanw
386 1.26.6.2 nathanw /*
387 1.26.6.2 nathanw * attach grf (once)
388 1.26.6.2 nathanw */
389 1.26.6.2 nathanw if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) {
390 1.26.6.2 nathanw attachflag = 1;
391 1.26.6.2 nathanw printf("grfcl: %dMB ", cl_fbsize / 0x100000);
392 1.26.6.2 nathanw switch (cltype) {
393 1.26.6.2 nathanw case PICASSO:
394 1.26.6.2 nathanw if (cl_64bit == 1) {
395 1.26.6.2 nathanw printf("Picasso IV");
396 1.26.6.2 nathanw /* 135MHz will be supported if we
397 1.26.6.2 nathanw * have a palette doubling mode.
398 1.26.6.2 nathanw */
399 1.26.6.2 nathanw cl_maxpixelclock = 86000000;
400 1.26.6.2 nathanw }
401 1.26.6.2 nathanw else {
402 1.26.6.2 nathanw printf("Picasso II");
403 1.26.6.2 nathanw
404 1.26.6.2 nathanw /* check for PicassoII+ (crest) */
405 1.26.6.2 nathanw if(zap->serno == 0x00100000)
406 1.26.6.2 nathanw printf("+");
407 1.26.6.2 nathanw
408 1.26.6.2 nathanw /* determine used Gfx/chipset (crest) */
409 1.26.6.2 nathanw vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */
410 1.26.6.2 nathanw switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) {
411 1.26.6.2 nathanw case 0x24:
412 1.26.6.2 nathanw printf(" (with CL-GD5426)");
413 1.26.6.2 nathanw break;
414 1.26.6.2 nathanw case 0x26:
415 1.26.6.2 nathanw printf(" (with CL-GD5428)");
416 1.26.6.2 nathanw break;
417 1.26.6.2 nathanw case 0x27:
418 1.26.6.2 nathanw printf(" (with CL-GD5429)");
419 1.26.6.2 nathanw break;
420 1.26.6.2 nathanw }
421 1.26.6.2 nathanw cl_maxpixelclock = 86000000;
422 1.26.6.2 nathanw }
423 1.26.6.2 nathanw break;
424 1.26.6.2 nathanw case SPECTRUM:
425 1.26.6.2 nathanw printf("Spectrum");
426 1.26.6.2 nathanw cl_maxpixelclock = 90000000;
427 1.26.6.2 nathanw break;
428 1.26.6.2 nathanw case PICCOLO:
429 1.26.6.2 nathanw if (cl_64bit == 1) {
430 1.26.6.2 nathanw printf("Piccolo SD64");
431 1.26.6.2 nathanw /* 110MHz will be supported if we
432 1.26.6.2 nathanw * have a palette doubling mode.
433 1.26.6.2 nathanw */
434 1.26.6.2 nathanw cl_maxpixelclock = 90000000;
435 1.26.6.2 nathanw } else {
436 1.26.6.2 nathanw printf("Piccolo");
437 1.26.6.2 nathanw cl_maxpixelclock = 90000000;
438 1.26.6.2 nathanw }
439 1.26.6.2 nathanw break;
440 1.26.6.2 nathanw }
441 1.26.6.2 nathanw printf(" being used\n");
442 1.26.6.2 nathanw #ifdef CL_OVERCLOCK
443 1.26.6.2 nathanw cl_maxpixelclock = 115000000;
444 1.26.6.2 nathanw #endif
445 1.26.6.2 nathanw } else {
446 1.26.6.2 nathanw if (!attachflag)
447 1.26.6.2 nathanw printf("grfcl unattached!!\n");
448 1.26.6.2 nathanw }
449 1.26.6.2 nathanw }
450 1.26.6.2 nathanw
451 1.26.6.2 nathanw int
452 1.26.6.2 nathanw grfclprint(auxp, pnp)
453 1.26.6.2 nathanw void *auxp;
454 1.26.6.2 nathanw const char *pnp;
455 1.26.6.2 nathanw {
456 1.26.6.2 nathanw if (pnp)
457 1.26.6.2 nathanw printf("ite at %s: ", pnp);
458 1.26.6.2 nathanw return (UNCONF);
459 1.26.6.2 nathanw }
460 1.26.6.2 nathanw
461 1.26.6.2 nathanw void
462 1.26.6.2 nathanw cl_boardinit(gp)
463 1.26.6.2 nathanw struct grf_softc *gp;
464 1.26.6.2 nathanw {
465 1.26.6.2 nathanw unsigned char *ba = gp->g_regkva;
466 1.26.6.2 nathanw int x;
467 1.26.6.2 nathanw
468 1.26.6.2 nathanw if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */
469 1.26.6.2 nathanw WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */
470 1.26.6.2 nathanw delay(200000); /* wait some time (two frames as of now) */
471 1.26.6.2 nathanw WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */
472 1.26.6.2 nathanw WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */
473 1.26.6.2 nathanw WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */
474 1.26.6.2 nathanw cl_fbsize = cl_fbautosize;
475 1.26.6.2 nathanw } else {
476 1.26.6.2 nathanw
477 1.26.6.2 nathanw /* wakeup board and flip passthru OFF */
478 1.26.6.2 nathanw RegWakeup(ba);
479 1.26.6.2 nathanw RegOnpass(ba);
480 1.26.6.2 nathanw
481 1.26.6.2 nathanw vgaw(ba, 0x46e8, 0x16);
482 1.26.6.2 nathanw vgaw(ba, 0x102, 1);
483 1.26.6.2 nathanw vgaw(ba, 0x46e8, 0x0e);
484 1.26.6.2 nathanw if (cl_64bit != 1)
485 1.26.6.2 nathanw vgaw(ba, 0x3c3, 1);
486 1.26.6.2 nathanw
487 1.26.6.2 nathanw cl_fbsize = cl_fbautosize;
488 1.26.6.2 nathanw
489 1.26.6.2 nathanw /* setup initial unchanging parameters */
490 1.26.6.2 nathanw
491 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */
492 1.26.6.2 nathanw vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */
493 1.26.6.2 nathanw
494 1.26.6.2 nathanw WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */
495 1.26.6.2 nathanw WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */
496 1.26.6.2 nathanw
497 1.26.6.2 nathanw if (cl_64bit == 1) {
498 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
499 1.26.6.2 nathanw WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
500 1.26.6.2 nathanw } else {
501 1.26.6.2 nathanw WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0);
502 1.26.6.2 nathanw }
503 1.26.6.2 nathanw WSeq(ba, SEQ_ID_RESET, 0x03);
504 1.26.6.2 nathanw WSeq(ba, SEQ_ID_MAP_MASK, 0xff);
505 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
506 1.26.6.2 nathanw WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */
507 1.26.6.2 nathanw WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81);
508 1.26.6.2 nathanw WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00);
509 1.26.6.2 nathanw if (cl_64bit == 1)
510 1.26.6.2 nathanw WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a);
511 1.26.6.2 nathanw else
512 1.26.6.2 nathanw WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */
513 1.26.6.2 nathanw WSeq(ba, SEQ_ID_SIG_CNTL, 0x02);
514 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
515 1.26.6.2 nathanw
516 1.26.6.2 nathanw if (cl_64bit == 1)
517 1.26.6.2 nathanw WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c);
518 1.26.6.2 nathanw else
519 1.26.6.2 nathanw WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22);
520 1.26.6.2 nathanw
521 1.26.6.2 nathanw WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
522 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_START, 0x00);
523 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_END, 0x08);
524 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
525 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
526 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
527 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
528 1.26.6.2 nathanw
529 1.26.6.2 nathanw WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07);
530 1.26.6.2 nathanw WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
531 1.26.6.2 nathanw WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */
532 1.26.6.2 nathanw WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22);
533 1.26.6.2 nathanw if (cl_64bit == 1) {
534 1.26.6.2 nathanw WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
535 1.26.6.2 nathanw WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
536 1.26.6.2 nathanw }
537 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */
538 1.26.6.2 nathanw
539 1.26.6.2 nathanw WGfx(ba, GCT_ID_SET_RESET, 0x00);
540 1.26.6.2 nathanw WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
541 1.26.6.2 nathanw WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
542 1.26.6.2 nathanw WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
543 1.26.6.2 nathanw WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
544 1.26.6.2 nathanw WGfx(ba, GCT_ID_MISC, 0x01);
545 1.26.6.2 nathanw WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
546 1.26.6.2 nathanw WGfx(ba, GCT_ID_BITMASK, 0xff);
547 1.26.6.2 nathanw WGfx(ba, GCT_ID_MODE_EXT, 0x28);
548 1.26.6.2 nathanw
549 1.26.6.2 nathanw for (x = 0; x < 0x10; x++)
550 1.26.6.2 nathanw WAttr(ba, x, x);
551 1.26.6.2 nathanw WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
552 1.26.6.2 nathanw WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
553 1.26.6.2 nathanw WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
554 1.26.6.2 nathanw WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
555 1.26.6.2 nathanw WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
556 1.26.6.2 nathanw WAttr(ba, 0x34, 0x00);
557 1.26.6.2 nathanw
558 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0xff);
559 1.26.6.2 nathanw vgaw(ba, GREG_MISC_OUTPUT_W, 0xef);
560 1.26.6.2 nathanw
561 1.26.6.2 nathanw WGfx(ba, GCT_ID_BLT_STAT_START, 0x04);
562 1.26.6.2 nathanw WGfx(ba, GCT_ID_BLT_STAT_START, 0x00);
563 1.26.6.2 nathanw }
564 1.26.6.2 nathanw
565 1.26.6.2 nathanw /* colors initially set to greyscale */
566 1.26.6.2 nathanw vgaw(ba, VDAC_ADDRESS_W, 0);
567 1.26.6.2 nathanw for (x = 255; x >= 0; x--) {
568 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, x);
569 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, x);
570 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, x);
571 1.26.6.2 nathanw }
572 1.26.6.2 nathanw /* set sprite bitmap pointers */
573 1.26.6.2 nathanw cl_cursprite.image = cl_imageptr;
574 1.26.6.2 nathanw cl_cursprite.mask = cl_maskptr;
575 1.26.6.2 nathanw cl_cursprite.cmap.red = cl_sprred;
576 1.26.6.2 nathanw cl_cursprite.cmap.green = cl_sprgreen;
577 1.26.6.2 nathanw cl_cursprite.cmap.blue = cl_sprblue;
578 1.26.6.2 nathanw
579 1.26.6.2 nathanw if (cl_64bit == 0) {
580 1.26.6.2 nathanw
581 1.26.6.2 nathanw /* check for 1MB or 2MB board (crest) */
582 1.26.6.2 nathanw volatile unsigned long *cl_fbtestaddr;
583 1.26.6.2 nathanw cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva;
584 1.26.6.2 nathanw
585 1.26.6.2 nathanw WGfx(ba, GCT_ID_OFFSET_0, 0x40);
586 1.26.6.2 nathanw *cl_fbtestaddr = 0x12345678;
587 1.26.6.2 nathanw
588 1.26.6.2 nathanw if (*cl_fbtestaddr != 0x12345678) {
589 1.26.6.2 nathanw WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30);
590 1.26.6.2 nathanw cl_fbsize = 0x100000;
591 1.26.6.2 nathanw }
592 1.26.6.2 nathanw else
593 1.26.6.2 nathanw {
594 1.26.6.2 nathanw cl_fbsize = 0x200000;
595 1.26.6.2 nathanw }
596 1.26.6.2 nathanw }
597 1.26.6.2 nathanw WGfx(ba, GCT_ID_OFFSET_0, 0x00);
598 1.26.6.2 nathanw }
599 1.26.6.2 nathanw
600 1.26.6.2 nathanw
601 1.26.6.2 nathanw int
602 1.26.6.2 nathanw cl_getvmode(gp, vm)
603 1.26.6.2 nathanw struct grf_softc *gp;
604 1.26.6.2 nathanw struct grfvideo_mode *vm;
605 1.26.6.2 nathanw {
606 1.26.6.2 nathanw struct grfvideo_mode *gv;
607 1.26.6.2 nathanw
608 1.26.6.2 nathanw #ifdef CL5426CONSOLE
609 1.26.6.2 nathanw /* Handle grabbing console mode */
610 1.26.6.2 nathanw if (vm->mode_num == 255) {
611 1.26.6.2 nathanw bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode));
612 1.26.6.2 nathanw /* XXX so grfconfig can tell us the correct text dimensions. */
613 1.26.6.2 nathanw vm->depth = clconsole_mode.fy;
614 1.26.6.2 nathanw } else
615 1.26.6.2 nathanw #endif
616 1.26.6.2 nathanw {
617 1.26.6.2 nathanw if (vm->mode_num == 0)
618 1.26.6.2 nathanw vm->mode_num = (monitor_current - monitor_def) + 1;
619 1.26.6.2 nathanw if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
620 1.26.6.2 nathanw return (EINVAL);
621 1.26.6.2 nathanw gv = monitor_def + (vm->mode_num - 1);
622 1.26.6.2 nathanw if (gv->mode_num == 0)
623 1.26.6.2 nathanw return (EINVAL);
624 1.26.6.2 nathanw
625 1.26.6.2 nathanw bcopy(gv, vm, sizeof(struct grfvideo_mode));
626 1.26.6.2 nathanw }
627 1.26.6.2 nathanw
628 1.26.6.2 nathanw /* adjust internal values to pixel values */
629 1.26.6.2 nathanw
630 1.26.6.2 nathanw vm->hblank_start *= 8;
631 1.26.6.2 nathanw vm->hsync_start *= 8;
632 1.26.6.2 nathanw vm->hsync_stop *= 8;
633 1.26.6.2 nathanw vm->htotal *= 8;
634 1.26.6.2 nathanw
635 1.26.6.2 nathanw return (0);
636 1.26.6.2 nathanw }
637 1.26.6.2 nathanw
638 1.26.6.2 nathanw
639 1.26.6.2 nathanw int
640 1.26.6.2 nathanw cl_setvmode(gp, mode)
641 1.26.6.2 nathanw struct grf_softc *gp;
642 1.26.6.2 nathanw unsigned mode;
643 1.26.6.2 nathanw {
644 1.26.6.2 nathanw if (!mode || (mode > monitor_def_max) ||
645 1.26.6.2 nathanw monitor_def[mode - 1].mode_num == 0)
646 1.26.6.2 nathanw return (EINVAL);
647 1.26.6.2 nathanw
648 1.26.6.2 nathanw monitor_current = monitor_def + (mode - 1);
649 1.26.6.2 nathanw
650 1.26.6.2 nathanw return (0);
651 1.26.6.2 nathanw }
652 1.26.6.2 nathanw
653 1.26.6.2 nathanw #ifndef CL5426CONSOLE
654 1.26.6.2 nathanw void
655 1.26.6.2 nathanw cl_off(gp)
656 1.26.6.2 nathanw struct grf_softc *gp;
657 1.26.6.2 nathanw {
658 1.26.6.2 nathanw char *ba = gp->g_regkva;
659 1.26.6.2 nathanw
660 1.26.6.2 nathanw /*
661 1.26.6.2 nathanw * we'll put the pass-through on for cc ite and set Full Bandwidth bit
662 1.26.6.2 nathanw * on just in case it didn't work...but then it doesn't matter does
663 1.26.6.2 nathanw * it? =)
664 1.26.6.2 nathanw */
665 1.26.6.2 nathanw RegOnpass(ba);
666 1.26.6.2 nathanw vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE);
667 1.26.6.2 nathanw vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20);
668 1.26.6.2 nathanw }
669 1.26.6.2 nathanw #endif
670 1.26.6.2 nathanw
671 1.26.6.2 nathanw int
672 1.26.6.2 nathanw cl_blank(gp, on)
673 1.26.6.2 nathanw struct grf_softc *gp;
674 1.26.6.2 nathanw int *on;
675 1.26.6.2 nathanw {
676 1.26.6.2 nathanw WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21);
677 1.26.6.2 nathanw return(0);
678 1.26.6.2 nathanw }
679 1.26.6.2 nathanw
680 1.26.6.2 nathanw /*
681 1.26.6.2 nathanw * Change the mode of the display.
682 1.26.6.2 nathanw * Return a UNIX error number or 0 for success.
683 1.26.6.2 nathanw */
684 1.26.6.2 nathanw int
685 1.26.6.2 nathanw cl_mode(gp, cmd, arg, a2, a3)
686 1.26.6.2 nathanw register struct grf_softc *gp;
687 1.26.6.2 nathanw u_long cmd;
688 1.26.6.2 nathanw void *arg;
689 1.26.6.2 nathanw u_long a2;
690 1.26.6.2 nathanw int a3;
691 1.26.6.2 nathanw {
692 1.26.6.2 nathanw int error;
693 1.26.6.2 nathanw
694 1.26.6.2 nathanw switch (cmd) {
695 1.26.6.2 nathanw case GM_GRFON:
696 1.26.6.2 nathanw error = cl_load_mon(gp,
697 1.26.6.2 nathanw (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL;
698 1.26.6.2 nathanw return (error);
699 1.26.6.2 nathanw
700 1.26.6.2 nathanw case GM_GRFOFF:
701 1.26.6.2 nathanw #ifndef CL5426CONSOLE
702 1.26.6.2 nathanw cl_off(gp);
703 1.26.6.2 nathanw #else
704 1.26.6.2 nathanw cl_load_mon(gp, &clconsole_mode);
705 1.26.6.2 nathanw #endif
706 1.26.6.2 nathanw return (0);
707 1.26.6.2 nathanw
708 1.26.6.2 nathanw case GM_GRFCONFIG:
709 1.26.6.2 nathanw return (0);
710 1.26.6.2 nathanw
711 1.26.6.2 nathanw case GM_GRFGETVMODE:
712 1.26.6.2 nathanw return (cl_getvmode(gp, (struct grfvideo_mode *) arg));
713 1.26.6.2 nathanw
714 1.26.6.2 nathanw case GM_GRFSETVMODE:
715 1.26.6.2 nathanw error = cl_setvmode(gp, *(unsigned *) arg);
716 1.26.6.2 nathanw if (!error && (gp->g_flags & GF_GRFON))
717 1.26.6.2 nathanw cl_load_mon(gp,
718 1.26.6.2 nathanw (struct grfcltext_mode *) monitor_current);
719 1.26.6.2 nathanw return (error);
720 1.26.6.2 nathanw
721 1.26.6.2 nathanw case GM_GRFGETNUMVM:
722 1.26.6.2 nathanw *(int *) arg = monitor_def_max;
723 1.26.6.2 nathanw return (0);
724 1.26.6.2 nathanw
725 1.26.6.2 nathanw case GM_GRFIOCTL:
726 1.26.6.2 nathanw return (cl_ioctl(gp, a2, arg));
727 1.26.6.2 nathanw
728 1.26.6.2 nathanw default:
729 1.26.6.2 nathanw break;
730 1.26.6.2 nathanw }
731 1.26.6.2 nathanw
732 1.26.6.3 nathanw return (EPASSTHROUGH);
733 1.26.6.2 nathanw }
734 1.26.6.2 nathanw
735 1.26.6.2 nathanw int
736 1.26.6.2 nathanw cl_ioctl(gp, cmd, data)
737 1.26.6.2 nathanw register struct grf_softc *gp;
738 1.26.6.2 nathanw u_long cmd;
739 1.26.6.2 nathanw void *data;
740 1.26.6.2 nathanw {
741 1.26.6.2 nathanw switch (cmd) {
742 1.26.6.2 nathanw case GRFIOCGSPRITEPOS:
743 1.26.6.2 nathanw return (cl_getmousepos(gp, (struct grf_position *) data));
744 1.26.6.2 nathanw
745 1.26.6.2 nathanw case GRFIOCSSPRITEPOS:
746 1.26.6.2 nathanw return (cl_setmousepos(gp, (struct grf_position *) data));
747 1.26.6.2 nathanw
748 1.26.6.2 nathanw case GRFIOCSSPRITEINF:
749 1.26.6.2 nathanw return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data));
750 1.26.6.2 nathanw
751 1.26.6.2 nathanw case GRFIOCGSPRITEINF:
752 1.26.6.2 nathanw return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data));
753 1.26.6.2 nathanw
754 1.26.6.2 nathanw case GRFIOCGSPRITEMAX:
755 1.26.6.2 nathanw return (cl_getspritemax(gp, (struct grf_position *) data));
756 1.26.6.2 nathanw
757 1.26.6.2 nathanw case GRFIOCGETCMAP:
758 1.26.6.2 nathanw return (cl_getcmap(gp, (struct grf_colormap *) data));
759 1.26.6.2 nathanw
760 1.26.6.2 nathanw case GRFIOCPUTCMAP:
761 1.26.6.2 nathanw return (cl_putcmap(gp, (struct grf_colormap *) data));
762 1.26.6.2 nathanw
763 1.26.6.2 nathanw case GRFIOCBITBLT:
764 1.26.6.2 nathanw break;
765 1.26.6.2 nathanw
766 1.26.6.2 nathanw case GRFTOGGLE:
767 1.26.6.2 nathanw return (cl_toggle(gp, 0));
768 1.26.6.2 nathanw
769 1.26.6.2 nathanw case GRFIOCSETMON:
770 1.26.6.2 nathanw return (cl_setmonitor(gp, (struct grfvideo_mode *) data));
771 1.26.6.2 nathanw
772 1.26.6.2 nathanw case GRFIOCBLANK:
773 1.26.6.2 nathanw return (cl_blank(gp, (int *)data));
774 1.26.6.2 nathanw
775 1.26.6.2 nathanw }
776 1.26.6.3 nathanw return (EPASSTHROUGH);
777 1.26.6.2 nathanw }
778 1.26.6.2 nathanw
779 1.26.6.2 nathanw int
780 1.26.6.2 nathanw cl_getmousepos(gp, data)
781 1.26.6.2 nathanw struct grf_softc *gp;
782 1.26.6.2 nathanw struct grf_position *data;
783 1.26.6.2 nathanw {
784 1.26.6.2 nathanw data->x = cl_cursprite.pos.x;
785 1.26.6.2 nathanw data->y = cl_cursprite.pos.y;
786 1.26.6.2 nathanw return (0);
787 1.26.6.2 nathanw }
788 1.26.6.2 nathanw
789 1.26.6.2 nathanw void
790 1.26.6.2 nathanw cl_writesprpos(ba, x, y)
791 1.26.6.2 nathanw volatile char *ba;
792 1.26.6.2 nathanw short x;
793 1.26.6.2 nathanw short y;
794 1.26.6.2 nathanw {
795 1.26.6.2 nathanw /* we want to use a 16-bit write to 3c4 so no macros used */
796 1.26.6.2 nathanw volatile unsigned char *cwp;
797 1.26.6.2 nathanw volatile unsigned short *wp;
798 1.26.6.2 nathanw
799 1.26.6.2 nathanw cwp = ba + 0x3c4;
800 1.26.6.2 nathanw wp = (unsigned short *)cwp;
801 1.26.6.2 nathanw
802 1.26.6.2 nathanw /*
803 1.26.6.2 nathanw * don't ask me why, but apparently you can't do a 16-bit write with
804 1.26.6.2 nathanw * x-position like with y-position below (dagge)
805 1.26.6.2 nathanw */
806 1.26.6.2 nathanw cwp[0] = 0x10 | ((x << 5) & 0xff);
807 1.26.6.2 nathanw cwp[1] = (x >> 3) & 0xff;
808 1.26.6.2 nathanw
809 1.26.6.2 nathanw *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff);
810 1.26.6.2 nathanw }
811 1.26.6.2 nathanw
812 1.26.6.2 nathanw void
813 1.26.6.2 nathanw writeshifted(to, shiftx, shifty)
814 1.26.6.2 nathanw volatile char *to;
815 1.26.6.2 nathanw char shiftx;
816 1.26.6.2 nathanw char shifty;
817 1.26.6.2 nathanw {
818 1.26.6.2 nathanw int y;
819 1.26.6.2 nathanw unsigned long long *tptr, *iptr, *mptr, line;
820 1.26.6.2 nathanw
821 1.26.6.2 nathanw tptr = (unsigned long long *) to;
822 1.26.6.2 nathanw iptr = (unsigned long long *) cl_cursprite.image;
823 1.26.6.2 nathanw mptr = (unsigned long long *) cl_cursprite.mask;
824 1.26.6.2 nathanw
825 1.26.6.2 nathanw shiftx = shiftx < 0 ? 0 : shiftx;
826 1.26.6.2 nathanw shifty = shifty < 0 ? 0 : shifty;
827 1.26.6.2 nathanw
828 1.26.6.2 nathanw /* start reading shifty lines down, and
829 1.26.6.2 nathanw * shift each line in by shiftx
830 1.26.6.2 nathanw */
831 1.26.6.2 nathanw for (y = shifty; y < 64; y++) {
832 1.26.6.2 nathanw
833 1.26.6.2 nathanw /* image */
834 1.26.6.2 nathanw line = iptr[y];
835 1.26.6.2 nathanw *tptr++ = line << shiftx;
836 1.26.6.2 nathanw
837 1.26.6.2 nathanw /* mask */
838 1.26.6.2 nathanw line = mptr[y];
839 1.26.6.2 nathanw *tptr++ = line << shiftx;
840 1.26.6.2 nathanw }
841 1.26.6.2 nathanw
842 1.26.6.2 nathanw /* clear the remainder */
843 1.26.6.2 nathanw for (y = shifty; y > 0; y--) {
844 1.26.6.2 nathanw *tptr++ = 0;
845 1.26.6.2 nathanw *tptr++ = 0;
846 1.26.6.2 nathanw }
847 1.26.6.2 nathanw }
848 1.26.6.2 nathanw
849 1.26.6.2 nathanw int
850 1.26.6.2 nathanw cl_setmousepos(gp, data)
851 1.26.6.2 nathanw struct grf_softc *gp;
852 1.26.6.2 nathanw struct grf_position *data;
853 1.26.6.2 nathanw {
854 1.26.6.2 nathanw volatile char *ba = gp->g_regkva;
855 1.26.6.2 nathanw short rx, ry, prx, pry;
856 1.26.6.2 nathanw #ifdef CL_SHIFTSPRITE
857 1.26.6.2 nathanw volatile char *fb = gp->g_fbkva;
858 1.26.6.2 nathanw volatile char *sprite = fb + (cl_fbsize - 1024);
859 1.26.6.2 nathanw #endif
860 1.26.6.2 nathanw
861 1.26.6.2 nathanw /* no movement */
862 1.26.6.2 nathanw if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y)
863 1.26.6.2 nathanw return (0);
864 1.26.6.2 nathanw
865 1.26.6.2 nathanw /* current and previous real coordinates */
866 1.26.6.2 nathanw rx = data->x - cl_cursprite.hot.x;
867 1.26.6.2 nathanw ry = data->y - cl_cursprite.hot.y;
868 1.26.6.2 nathanw prx = cl_cursprite.pos.x - cl_cursprite.hot.x;
869 1.26.6.2 nathanw pry = cl_cursprite.pos.y - cl_cursprite.hot.y;
870 1.26.6.2 nathanw
871 1.26.6.2 nathanw /*
872 1.26.6.2 nathanw * if we are/were on an edge, create (un)shifted bitmap --
873 1.26.6.2 nathanw * ripped out optimization (not extremely worthwhile,
874 1.26.6.2 nathanw * and kind of buggy anyhow).
875 1.26.6.2 nathanw */
876 1.26.6.2 nathanw #ifdef CL_SHIFTSPRITE
877 1.26.6.2 nathanw if (rx < 0 || ry < 0 || prx < 0 || pry < 0) {
878 1.26.6.2 nathanw writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0);
879 1.26.6.2 nathanw }
880 1.26.6.2 nathanw #endif
881 1.26.6.2 nathanw
882 1.26.6.2 nathanw /* do movement, save position */
883 1.26.6.2 nathanw cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
884 1.26.6.2 nathanw cl_cursprite.pos.x = data->x;
885 1.26.6.2 nathanw cl_cursprite.pos.y = data->y;
886 1.26.6.2 nathanw
887 1.26.6.2 nathanw return (0);
888 1.26.6.2 nathanw }
889 1.26.6.2 nathanw
890 1.26.6.2 nathanw int
891 1.26.6.2 nathanw cl_getspriteinfo(gp, data)
892 1.26.6.2 nathanw struct grf_softc *gp;
893 1.26.6.2 nathanw struct grf_spriteinfo *data;
894 1.26.6.2 nathanw {
895 1.26.6.2 nathanw copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo));
896 1.26.6.2 nathanw copyout(cl_cursprite.image, data->image, 64 * 8);
897 1.26.6.2 nathanw copyout(cl_cursprite.mask, data->mask, 64 * 8);
898 1.26.6.2 nathanw return (0);
899 1.26.6.2 nathanw }
900 1.26.6.2 nathanw
901 1.26.6.2 nathanw static int
902 1.26.6.2 nathanw cl_setspriteinfo(gp, data)
903 1.26.6.2 nathanw struct grf_softc *gp;
904 1.26.6.2 nathanw struct grf_spriteinfo *data;
905 1.26.6.2 nathanw {
906 1.26.6.2 nathanw volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva;
907 1.26.6.2 nathanw volatile char *sprite = fb + (cl_fbsize - 1024);
908 1.26.6.2 nathanw
909 1.26.6.2 nathanw if (data->set & GRFSPRSET_SHAPE) {
910 1.26.6.2 nathanw
911 1.26.6.2 nathanw unsigned short dsx, dsy, i;
912 1.26.6.2 nathanw unsigned long *di, *dm, *si, *sm;
913 1.26.6.2 nathanw unsigned long ssi[128], ssm[128];
914 1.26.6.2 nathanw struct grf_position gpos;
915 1.26.6.2 nathanw
916 1.26.6.2 nathanw
917 1.26.6.2 nathanw /* check for a too large sprite (no clipping!) */
918 1.26.6.2 nathanw dsy = data->size.y;
919 1.26.6.2 nathanw dsx = data->size.x;
920 1.26.6.2 nathanw if (dsy > 64 || dsx > 64)
921 1.26.6.2 nathanw return(EINVAL);
922 1.26.6.2 nathanw
923 1.26.6.2 nathanw /* prepare destination */
924 1.26.6.2 nathanw di = (unsigned long *)cl_cursprite.image;
925 1.26.6.2 nathanw dm = (unsigned long *)cl_cursprite.mask;
926 1.26.6.2 nathanw cl_memset((unsigned char *)di, 0, 8*64);
927 1.26.6.2 nathanw cl_memset((unsigned char *)dm, 0, 8*64);
928 1.26.6.2 nathanw
929 1.26.6.2 nathanw /* two alternatives: 64 across, then it's
930 1.26.6.2 nathanw * the same format we use, just copy. Otherwise,
931 1.26.6.2 nathanw * copy into tmp buf and recopy skipping the
932 1.26.6.2 nathanw * unused 32 bits.
933 1.26.6.2 nathanw */
934 1.26.6.2 nathanw if ((dsx - 1) / 32) {
935 1.26.6.2 nathanw copyin(data->image, di, 8 * dsy);
936 1.26.6.2 nathanw copyin(data->mask, dm, 8 * dsy);
937 1.26.6.2 nathanw } else {
938 1.26.6.2 nathanw si = ssi; sm = ssm;
939 1.26.6.2 nathanw copyin(data->image, si, 4 * dsy);
940 1.26.6.2 nathanw copyin(data->mask, sm, 4 * dsy);
941 1.26.6.2 nathanw for (i = 0; i < dsy; i++) {
942 1.26.6.2 nathanw *di = *si++;
943 1.26.6.2 nathanw *dm = *sm++;
944 1.26.6.2 nathanw di += 2;
945 1.26.6.2 nathanw dm += 2;
946 1.26.6.2 nathanw }
947 1.26.6.2 nathanw }
948 1.26.6.2 nathanw
949 1.26.6.2 nathanw /* set size */
950 1.26.6.2 nathanw cl_cursprite.size.x = data->size.x;
951 1.26.6.2 nathanw cl_cursprite.size.y = data->size.y;
952 1.26.6.2 nathanw
953 1.26.6.2 nathanw /* forcably load into board */
954 1.26.6.2 nathanw gpos.x = cl_cursprite.pos.x;
955 1.26.6.2 nathanw gpos.y = cl_cursprite.pos.y;
956 1.26.6.2 nathanw cl_cursprite.pos.x = -1;
957 1.26.6.2 nathanw cl_cursprite.pos.y = -1;
958 1.26.6.2 nathanw writeshifted(sprite, 0, 0);
959 1.26.6.2 nathanw cl_setmousepos(gp, &gpos);
960 1.26.6.2 nathanw
961 1.26.6.2 nathanw }
962 1.26.6.2 nathanw if (data->set & GRFSPRSET_HOT) {
963 1.26.6.2 nathanw
964 1.26.6.2 nathanw cl_cursprite.hot = data->hot;
965 1.26.6.2 nathanw
966 1.26.6.2 nathanw }
967 1.26.6.2 nathanw if (data->set & GRFSPRSET_CMAP) {
968 1.26.6.2 nathanw
969 1.26.6.2 nathanw u_char red[2], green[2], blue[2];
970 1.26.6.2 nathanw
971 1.26.6.2 nathanw copyin(data->cmap.red, red, 2);
972 1.26.6.2 nathanw copyin(data->cmap.green, green, 2);
973 1.26.6.2 nathanw copyin(data->cmap.blue, blue, 2);
974 1.26.6.2 nathanw bcopy(red, cl_cursprite.cmap.red, 2);
975 1.26.6.2 nathanw bcopy(green, cl_cursprite.cmap.green, 2);
976 1.26.6.2 nathanw bcopy(blue, cl_cursprite.cmap.blue, 2);
977 1.26.6.2 nathanw
978 1.26.6.2 nathanw /* enable and load colors 256 & 257 */
979 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06);
980 1.26.6.2 nathanw
981 1.26.6.2 nathanw /* 256 */
982 1.26.6.2 nathanw vgaw(ba, VDAC_ADDRESS_W, 0x00);
983 1.26.6.2 nathanw if (cltype == PICASSO) {
984 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2));
985 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2));
986 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2));
987 1.26.6.2 nathanw } else {
988 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2));
989 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2));
990 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2));
991 1.26.6.2 nathanw }
992 1.26.6.2 nathanw
993 1.26.6.2 nathanw /* 257 */
994 1.26.6.2 nathanw vgaw(ba, VDAC_ADDRESS_W, 0x0f);
995 1.26.6.2 nathanw if (cltype == PICASSO) {
996 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2));
997 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2));
998 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2));
999 1.26.6.2 nathanw } else {
1000 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2));
1001 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2));
1002 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2));
1003 1.26.6.2 nathanw }
1004 1.26.6.2 nathanw
1005 1.26.6.2 nathanw /* turn on/off sprite */
1006 1.26.6.2 nathanw if (cl_cursprite.enable) {
1007 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05);
1008 1.26.6.2 nathanw } else {
1009 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
1010 1.26.6.2 nathanw }
1011 1.26.6.2 nathanw
1012 1.26.6.2 nathanw }
1013 1.26.6.2 nathanw if (data->set & GRFSPRSET_ENABLE) {
1014 1.26.6.2 nathanw
1015 1.26.6.2 nathanw if (data->enable == 1) {
1016 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05);
1017 1.26.6.2 nathanw cl_cursprite.enable = 1;
1018 1.26.6.2 nathanw } else {
1019 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
1020 1.26.6.2 nathanw cl_cursprite.enable = 0;
1021 1.26.6.2 nathanw }
1022 1.26.6.2 nathanw
1023 1.26.6.2 nathanw }
1024 1.26.6.2 nathanw if (data->set & GRFSPRSET_POS) {
1025 1.26.6.2 nathanw
1026 1.26.6.2 nathanw /* force placement */
1027 1.26.6.2 nathanw cl_cursprite.pos.x = -1;
1028 1.26.6.2 nathanw cl_cursprite.pos.y = -1;
1029 1.26.6.2 nathanw
1030 1.26.6.2 nathanw /* do it */
1031 1.26.6.2 nathanw cl_setmousepos(gp, &data->pos);
1032 1.26.6.2 nathanw
1033 1.26.6.2 nathanw }
1034 1.26.6.2 nathanw return (0);
1035 1.26.6.2 nathanw }
1036 1.26.6.2 nathanw
1037 1.26.6.2 nathanw static int
1038 1.26.6.2 nathanw cl_getspritemax(gp, data)
1039 1.26.6.2 nathanw struct grf_softc *gp;
1040 1.26.6.2 nathanw struct grf_position *data;
1041 1.26.6.2 nathanw {
1042 1.26.6.2 nathanw if (gp->g_display.gd_planes == 24)
1043 1.26.6.2 nathanw return (EINVAL);
1044 1.26.6.2 nathanw data->x = 64;
1045 1.26.6.2 nathanw data->y = 64;
1046 1.26.6.2 nathanw return (0);
1047 1.26.6.2 nathanw }
1048 1.26.6.2 nathanw
1049 1.26.6.2 nathanw int
1050 1.26.6.2 nathanw cl_setmonitor(gp, gv)
1051 1.26.6.2 nathanw struct grf_softc *gp;
1052 1.26.6.2 nathanw struct grfvideo_mode *gv;
1053 1.26.6.2 nathanw {
1054 1.26.6.2 nathanw struct grfvideo_mode *md;
1055 1.26.6.2 nathanw
1056 1.26.6.2 nathanw if (!cl_mondefok(gv))
1057 1.26.6.2 nathanw return(EINVAL);
1058 1.26.6.2 nathanw
1059 1.26.6.2 nathanw #ifdef CL5426CONSOLE
1060 1.26.6.2 nathanw /* handle interactive setting of console mode */
1061 1.26.6.2 nathanw if (gv->mode_num == 255) {
1062 1.26.6.2 nathanw bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode));
1063 1.26.6.2 nathanw clconsole_mode.gv.hblank_start /= 8;
1064 1.26.6.2 nathanw clconsole_mode.gv.hsync_start /= 8;
1065 1.26.6.2 nathanw clconsole_mode.gv.hsync_stop /= 8;
1066 1.26.6.2 nathanw clconsole_mode.gv.htotal /= 8;
1067 1.26.6.2 nathanw clconsole_mode.rows = gv->disp_height / clconsole_mode.fy;
1068 1.26.6.2 nathanw clconsole_mode.cols = gv->disp_width / clconsole_mode.fx;
1069 1.26.6.2 nathanw if (!(gp->g_flags & GF_GRFON))
1070 1.26.6.2 nathanw cl_load_mon(gp, &clconsole_mode);
1071 1.26.6.2 nathanw ite_reinit(gp->g_itedev);
1072 1.26.6.2 nathanw return (0);
1073 1.26.6.2 nathanw }
1074 1.26.6.2 nathanw #endif
1075 1.26.6.2 nathanw
1076 1.26.6.2 nathanw md = monitor_def + (gv->mode_num - 1);
1077 1.26.6.2 nathanw bcopy(gv, md, sizeof(struct grfvideo_mode));
1078 1.26.6.2 nathanw
1079 1.26.6.2 nathanw /* adjust pixel oriented values to internal rep. */
1080 1.26.6.2 nathanw
1081 1.26.6.2 nathanw md->hblank_start /= 8;
1082 1.26.6.2 nathanw md->hsync_start /= 8;
1083 1.26.6.2 nathanw md->hsync_stop /= 8;
1084 1.26.6.2 nathanw md->htotal /= 8;
1085 1.26.6.2 nathanw
1086 1.26.6.2 nathanw return (0);
1087 1.26.6.2 nathanw }
1088 1.26.6.2 nathanw
1089 1.26.6.2 nathanw int
1090 1.26.6.2 nathanw cl_getcmap(gfp, cmap)
1091 1.26.6.2 nathanw struct grf_softc *gfp;
1092 1.26.6.2 nathanw struct grf_colormap *cmap;
1093 1.26.6.2 nathanw {
1094 1.26.6.2 nathanw volatile unsigned char *ba;
1095 1.26.6.2 nathanw u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1096 1.26.6.2 nathanw short x;
1097 1.26.6.2 nathanw int error;
1098 1.26.6.2 nathanw
1099 1.26.6.2 nathanw if (cmap->count == 0 || cmap->index >= 256)
1100 1.26.6.2 nathanw return 0;
1101 1.26.6.2 nathanw
1102 1.26.6.5 nathanw if (cmap->count > 256 - cmap->index)
1103 1.26.6.2 nathanw cmap->count = 256 - cmap->index;
1104 1.26.6.2 nathanw
1105 1.26.6.2 nathanw ba = gfp->g_regkva;
1106 1.26.6.2 nathanw /* first read colors out of the chip, then copyout to userspace */
1107 1.26.6.2 nathanw vgaw(ba, VDAC_ADDRESS_R, cmap->index);
1108 1.26.6.2 nathanw x = cmap->count - 1;
1109 1.26.6.2 nathanw
1110 1.26.6.2 nathanw /*
1111 1.26.6.2 nathanw * Some sort 'o Magic. Spectrum has some changes on the board to speed
1112 1.26.6.2 nathanw * up 15 and 16Bit modes. They can access these modes with easy-to-programm
1113 1.26.6.2 nathanw * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb
1114 1.26.6.2 nathanw * is swapped to bgr. I wonder if we need to check for 8Bit though, ill
1115 1.26.6.2 nathanw */
1116 1.26.6.2 nathanw
1117 1.26.6.2 nathanw /*
1118 1.26.6.2 nathanw * The source for the above comment is somewhat unknow to me.
1119 1.26.6.2 nathanw * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue
1120 1.26.6.2 nathanw * lines swapped. In 24BPP this provides RGB instead of BGR as it would
1121 1.26.6.2 nathanw * be native to the chipset. This requires special programming for the
1122 1.26.6.2 nathanw * CLUT in 8BPP to compensate and avoid false colors.
1123 1.26.6.2 nathanw * I didn't find any special stuff for 15 and 16BPP though, crest.
1124 1.26.6.2 nathanw */
1125 1.26.6.2 nathanw
1126 1.26.6.2 nathanw switch (cltype) {
1127 1.26.6.2 nathanw case SPECTRUM:
1128 1.26.6.2 nathanw case PICCOLO:
1129 1.26.6.2 nathanw rp = blue + cmap->index;
1130 1.26.6.2 nathanw gp = green + cmap->index;
1131 1.26.6.2 nathanw bp = red + cmap->index;
1132 1.26.6.2 nathanw break;
1133 1.26.6.2 nathanw case PICASSO:
1134 1.26.6.2 nathanw rp = red + cmap->index;
1135 1.26.6.2 nathanw gp = green + cmap->index;
1136 1.26.6.2 nathanw bp = blue + cmap->index;
1137 1.26.6.2 nathanw break;
1138 1.26.6.2 nathanw default:
1139 1.26.6.2 nathanw rp = gp = bp = 0;
1140 1.26.6.2 nathanw break;
1141 1.26.6.2 nathanw }
1142 1.26.6.2 nathanw
1143 1.26.6.2 nathanw do {
1144 1.26.6.2 nathanw *rp++ = vgar(ba, VDAC_DATA) << 2;
1145 1.26.6.2 nathanw *gp++ = vgar(ba, VDAC_DATA) << 2;
1146 1.26.6.2 nathanw *bp++ = vgar(ba, VDAC_DATA) << 2;
1147 1.26.6.2 nathanw } while (x-- > 0);
1148 1.26.6.2 nathanw
1149 1.26.6.2 nathanw if (!(error = copyout(red + cmap->index, cmap->red, cmap->count))
1150 1.26.6.2 nathanw && !(error = copyout(green + cmap->index, cmap->green, cmap->count))
1151 1.26.6.2 nathanw && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count)))
1152 1.26.6.2 nathanw return (0);
1153 1.26.6.2 nathanw
1154 1.26.6.2 nathanw return (error);
1155 1.26.6.2 nathanw }
1156 1.26.6.2 nathanw
1157 1.26.6.2 nathanw int
1158 1.26.6.2 nathanw cl_putcmap(gfp, cmap)
1159 1.26.6.2 nathanw struct grf_softc *gfp;
1160 1.26.6.2 nathanw struct grf_colormap *cmap;
1161 1.26.6.2 nathanw {
1162 1.26.6.2 nathanw volatile unsigned char *ba;
1163 1.26.6.2 nathanw u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1164 1.26.6.2 nathanw short x;
1165 1.26.6.2 nathanw int error;
1166 1.26.6.2 nathanw
1167 1.26.6.2 nathanw if (cmap->count == 0 || cmap->index >= 256)
1168 1.26.6.2 nathanw return (0);
1169 1.26.6.2 nathanw
1170 1.26.6.5 nathanw if (cmap->count > 256 - cmap->index)
1171 1.26.6.2 nathanw cmap->count = 256 - cmap->index;
1172 1.26.6.2 nathanw
1173 1.26.6.2 nathanw /* first copy the colors into kernelspace */
1174 1.26.6.2 nathanw if (!(error = copyin(cmap->red, red + cmap->index, cmap->count))
1175 1.26.6.2 nathanw && !(error = copyin(cmap->green, green + cmap->index, cmap->count))
1176 1.26.6.2 nathanw && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) {
1177 1.26.6.2 nathanw ba = gfp->g_regkva;
1178 1.26.6.2 nathanw vgaw(ba, VDAC_ADDRESS_W, cmap->index);
1179 1.26.6.2 nathanw x = cmap->count - 1;
1180 1.26.6.2 nathanw
1181 1.26.6.2 nathanw switch (cltype) {
1182 1.26.6.2 nathanw case SPECTRUM:
1183 1.26.6.2 nathanw case PICCOLO:
1184 1.26.6.2 nathanw rp = blue + cmap->index;
1185 1.26.6.2 nathanw gp = green + cmap->index;
1186 1.26.6.2 nathanw bp = red + cmap->index;
1187 1.26.6.2 nathanw break;
1188 1.26.6.2 nathanw case PICASSO:
1189 1.26.6.2 nathanw rp = red + cmap->index;
1190 1.26.6.2 nathanw gp = green + cmap->index;
1191 1.26.6.2 nathanw bp = blue + cmap->index;
1192 1.26.6.2 nathanw break;
1193 1.26.6.2 nathanw default:
1194 1.26.6.2 nathanw rp = gp = bp = 0;
1195 1.26.6.2 nathanw break;
1196 1.26.6.2 nathanw }
1197 1.26.6.2 nathanw
1198 1.26.6.2 nathanw do {
1199 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, *rp++ >> 2);
1200 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, *gp++ >> 2);
1201 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, *bp++ >> 2);
1202 1.26.6.2 nathanw } while (x-- > 0);
1203 1.26.6.2 nathanw return (0);
1204 1.26.6.2 nathanw } else
1205 1.26.6.2 nathanw return (error);
1206 1.26.6.2 nathanw }
1207 1.26.6.2 nathanw
1208 1.26.6.2 nathanw
1209 1.26.6.2 nathanw int
1210 1.26.6.2 nathanw cl_toggle(gp, wopp)
1211 1.26.6.2 nathanw struct grf_softc *gp;
1212 1.26.6.2 nathanw unsigned short wopp; /* don't need that one yet, ill */
1213 1.26.6.2 nathanw {
1214 1.26.6.2 nathanw volatile caddr_t ba;
1215 1.26.6.2 nathanw
1216 1.26.6.2 nathanw ba = gp->g_regkva;
1217 1.26.6.2 nathanw
1218 1.26.6.4 nathanw if (cl_pass_toggle) {
1219 1.26.6.2 nathanw RegOffpass(ba);
1220 1.26.6.2 nathanw } else {
1221 1.26.6.2 nathanw RegOnpass(ba);
1222 1.26.6.2 nathanw }
1223 1.26.6.2 nathanw return (0);
1224 1.26.6.2 nathanw }
1225 1.26.6.2 nathanw
1226 1.26.6.2 nathanw static void
1227 1.26.6.2 nathanw cl_CompFQ(fq, num, denom, clkdoub)
1228 1.26.6.2 nathanw u_int fq;
1229 1.26.6.2 nathanw u_char *num;
1230 1.26.6.2 nathanw u_char *denom;
1231 1.26.6.2 nathanw u_char *clkdoub;
1232 1.26.6.2 nathanw {
1233 1.26.6.2 nathanw #define OSC 14318180
1234 1.26.6.2 nathanw /* OK, here's what we're doing here:
1235 1.26.6.2 nathanw *
1236 1.26.6.2 nathanw * OSC * NUMERATOR
1237 1.26.6.2 nathanw * VCLK = ------------------- Hz
1238 1.26.6.2 nathanw * DENOMINATOR * (1+P)
1239 1.26.6.2 nathanw *
1240 1.26.6.2 nathanw * so we're given VCLK and we should give out some useful
1241 1.26.6.2 nathanw * values....
1242 1.26.6.2 nathanw *
1243 1.26.6.2 nathanw * NUMERATOR is 7 bits wide
1244 1.26.6.2 nathanw * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0.
1245 1.26.6.2 nathanw *
1246 1.26.6.2 nathanw * We run through all the possible combinations and
1247 1.26.6.2 nathanw * return the values which deviate the least from the chosen frequency.
1248 1.26.6.2 nathanw *
1249 1.26.6.2 nathanw */
1250 1.26.6.2 nathanw #define OSC 14318180
1251 1.26.6.2 nathanw #define count(n,d,p) ((OSC * n)/(d * (1+p)))
1252 1.26.6.2 nathanw
1253 1.26.6.2 nathanw unsigned char n, d, p, minn, mind, minp = 0;
1254 1.26.6.2 nathanw unsigned long err, minerr;
1255 1.26.6.2 nathanw
1256 1.26.6.2 nathanw /*
1257 1.26.6.2 nathanw numer = 0x00 - 0x7f
1258 1.26.6.2 nathanw denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even)
1259 1.26.6.2 nathanw */
1260 1.26.6.2 nathanw
1261 1.26.6.2 nathanw /* find lowest error in 6144 iterations. */
1262 1.26.6.2 nathanw minerr = fq;
1263 1.26.6.2 nathanw minn = 0;
1264 1.26.6.2 nathanw mind = 0;
1265 1.26.6.2 nathanw p = 0;
1266 1.26.6.2 nathanw
1267 1.26.6.2 nathanw if ((cl_64bit == 1) && (fq >= 86000000))
1268 1.26.6.2 nathanw {
1269 1.26.6.2 nathanw for (d = 1; d < 0x20; d++) {
1270 1.26.6.2 nathanw for (n = 1; n < 0x80; n++) {
1271 1.26.6.2 nathanw err = abs(count(n, d, 0) - fq);
1272 1.26.6.2 nathanw if (err < minerr) {
1273 1.26.6.2 nathanw minerr = err;
1274 1.26.6.2 nathanw minn = n;
1275 1.26.6.2 nathanw mind = d;
1276 1.26.6.2 nathanw minp = 1;
1277 1.26.6.2 nathanw }
1278 1.26.6.2 nathanw }
1279 1.26.6.2 nathanw }
1280 1.26.6.2 nathanw *clkdoub = 1;
1281 1.26.6.2 nathanw }
1282 1.26.6.2 nathanw else {
1283 1.26.6.2 nathanw for (d = 1; d < 0x20; d++) {
1284 1.26.6.2 nathanw for (n = 1; n < 0x80; n++) {
1285 1.26.6.2 nathanw err = abs(count(n, d, p) - fq);
1286 1.26.6.2 nathanw if (err < minerr) {
1287 1.26.6.2 nathanw minerr = err;
1288 1.26.6.2 nathanw minn = n;
1289 1.26.6.2 nathanw mind = d;
1290 1.26.6.2 nathanw minp = p;
1291 1.26.6.2 nathanw }
1292 1.26.6.2 nathanw }
1293 1.26.6.2 nathanw if (d == 0x1f && p == 0) {
1294 1.26.6.2 nathanw p = 1;
1295 1.26.6.2 nathanw d = 0x0f;
1296 1.26.6.2 nathanw }
1297 1.26.6.2 nathanw }
1298 1.26.6.2 nathanw *clkdoub = 0;
1299 1.26.6.2 nathanw }
1300 1.26.6.2 nathanw
1301 1.26.6.2 nathanw *num = minn;
1302 1.26.6.2 nathanw *denom = (mind << 1) | minp;
1303 1.26.6.2 nathanw if (minerr > 500000)
1304 1.26.6.2 nathanw printf("Warning: CompFQ minimum error = %ld\n", minerr);
1305 1.26.6.2 nathanw return;
1306 1.26.6.2 nathanw }
1307 1.26.6.2 nathanw
1308 1.26.6.2 nathanw int
1309 1.26.6.2 nathanw cl_mondefok(gv)
1310 1.26.6.2 nathanw struct grfvideo_mode *gv;
1311 1.26.6.2 nathanw {
1312 1.26.6.2 nathanw unsigned long maxpix;
1313 1.26.6.2 nathanw
1314 1.26.6.2 nathanw if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
1315 1.26.6.2 nathanw if (gv->mode_num != 255 || gv->depth != 4)
1316 1.26.6.2 nathanw return(0);
1317 1.26.6.2 nathanw
1318 1.26.6.2 nathanw switch (gv->depth) {
1319 1.26.6.2 nathanw case 4:
1320 1.26.6.2 nathanw if (gv->mode_num != 255)
1321 1.26.6.2 nathanw return(0);
1322 1.26.6.2 nathanw case 1:
1323 1.26.6.2 nathanw case 8:
1324 1.26.6.2 nathanw maxpix = cl_maxpixelclock;
1325 1.26.6.2 nathanw if (cl_64bit == 1)
1326 1.26.6.2 nathanw {
1327 1.26.6.2 nathanw if (cltype == PICASSO) /* Picasso IV */
1328 1.26.6.2 nathanw maxpix = 135000000;
1329 1.26.6.2 nathanw else /* Piccolo SD64 */
1330 1.26.6.2 nathanw maxpix = 110000000;
1331 1.26.6.2 nathanw }
1332 1.26.6.2 nathanw break;
1333 1.26.6.2 nathanw case 15:
1334 1.26.6.2 nathanw case 16:
1335 1.26.6.2 nathanw if (cl_64bit == 1)
1336 1.26.6.2 nathanw maxpix = 85000000;
1337 1.26.6.2 nathanw else
1338 1.26.6.2 nathanw maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3);
1339 1.26.6.2 nathanw break;
1340 1.26.6.2 nathanw case 24:
1341 1.26.6.2 nathanw if ((cltype == PICASSO) && (cl_64bit == 1))
1342 1.26.6.2 nathanw maxpix = 85000000;
1343 1.26.6.2 nathanw else
1344 1.26.6.2 nathanw maxpix = cl_maxpixelclock / 3;
1345 1.26.6.2 nathanw break;
1346 1.26.6.2 nathanw case 32:
1347 1.26.6.2 nathanw if ((cltype == PICCOLO) && (cl_64bit == 1))
1348 1.26.6.2 nathanw maxpix = 50000000;
1349 1.26.6.2 nathanw else
1350 1.26.6.2 nathanw maxpix = 0;
1351 1.26.6.2 nathanw break;
1352 1.26.6.2 nathanw default:
1353 1.26.6.2 nathanw printf("grfcl: Illegal depth in mode %d\n",
1354 1.26.6.2 nathanw (int) gv->mode_num);
1355 1.26.6.2 nathanw return (0);
1356 1.26.6.2 nathanw }
1357 1.26.6.2 nathanw
1358 1.26.6.2 nathanw if (gv->pixel_clock > maxpix) {
1359 1.26.6.2 nathanw printf("grfcl: Pixelclock too high in mode %d\n",
1360 1.26.6.2 nathanw (int) gv->mode_num);
1361 1.26.6.2 nathanw return (0);
1362 1.26.6.2 nathanw }
1363 1.26.6.2 nathanw
1364 1.26.6.2 nathanw if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) {
1365 1.26.6.2 nathanw printf("grfcl: sync-on-green is not supported\n");
1366 1.26.6.2 nathanw return (0);
1367 1.26.6.2 nathanw }
1368 1.26.6.2 nathanw
1369 1.26.6.2 nathanw return (1);
1370 1.26.6.2 nathanw }
1371 1.26.6.2 nathanw
1372 1.26.6.2 nathanw int
1373 1.26.6.2 nathanw cl_load_mon(gp, md)
1374 1.26.6.2 nathanw struct grf_softc *gp;
1375 1.26.6.2 nathanw struct grfcltext_mode *md;
1376 1.26.6.2 nathanw {
1377 1.26.6.2 nathanw struct grfvideo_mode *gv;
1378 1.26.6.2 nathanw struct grfinfo *gi;
1379 1.26.6.2 nathanw volatile caddr_t ba, fb;
1380 1.26.6.2 nathanw unsigned char num0, denom0, clkdoub;
1381 1.26.6.2 nathanw unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
1382 1.26.6.2 nathanw VSE, VT;
1383 1.26.6.2 nathanw int clkmul, offsmul, clkmode;
1384 1.26.6.2 nathanw int vmul;
1385 1.26.6.2 nathanw int sr15;
1386 1.26.6.2 nathanw unsigned char hvsync_pulse;
1387 1.26.6.2 nathanw char TEXT;
1388 1.26.6.2 nathanw
1389 1.26.6.2 nathanw /* identity */
1390 1.26.6.2 nathanw gv = &md->gv;
1391 1.26.6.2 nathanw TEXT = (gv->depth == 4);
1392 1.26.6.2 nathanw
1393 1.26.6.2 nathanw if (!cl_mondefok(gv)) {
1394 1.26.6.2 nathanw printf("grfcl: Monitor definition not ok\n");
1395 1.26.6.2 nathanw return (0);
1396 1.26.6.2 nathanw }
1397 1.26.6.2 nathanw
1398 1.26.6.2 nathanw ba = gp->g_regkva;
1399 1.26.6.2 nathanw fb = gp->g_fbkva;
1400 1.26.6.2 nathanw
1401 1.26.6.2 nathanw /* provide all needed information in grf device-independant locations */
1402 1.26.6.2 nathanw gp->g_data = (caddr_t) gv;
1403 1.26.6.2 nathanw gi = &gp->g_display;
1404 1.26.6.2 nathanw gi->gd_regaddr = (caddr_t) kvtop(ba);
1405 1.26.6.2 nathanw gi->gd_regsize = 64 * 1024;
1406 1.26.6.2 nathanw gi->gd_fbaddr = (caddr_t) kvtop(fb);
1407 1.26.6.2 nathanw gi->gd_fbsize = cl_fbsize;
1408 1.26.6.2 nathanw gi->gd_colors = 1 << gv->depth;
1409 1.26.6.2 nathanw gi->gd_planes = gv->depth;
1410 1.26.6.2 nathanw gi->gd_fbwidth = gv->disp_width;
1411 1.26.6.2 nathanw gi->gd_fbheight = gv->disp_height;
1412 1.26.6.2 nathanw gi->gd_fbx = 0;
1413 1.26.6.2 nathanw gi->gd_fby = 0;
1414 1.26.6.2 nathanw if (TEXT) {
1415 1.26.6.2 nathanw gi->gd_dwidth = md->fx * md->cols;
1416 1.26.6.2 nathanw gi->gd_dheight = md->fy * md->rows;
1417 1.26.6.2 nathanw } else {
1418 1.26.6.2 nathanw gi->gd_dwidth = gv->disp_width;
1419 1.26.6.2 nathanw gi->gd_dheight = gv->disp_height;
1420 1.26.6.2 nathanw }
1421 1.26.6.2 nathanw gi->gd_dx = 0;
1422 1.26.6.2 nathanw gi->gd_dy = 0;
1423 1.26.6.2 nathanw
1424 1.26.6.2 nathanw /* get display mode parameters */
1425 1.26.6.2 nathanw
1426 1.26.6.2 nathanw HBS = gv->hblank_start;
1427 1.26.6.2 nathanw HSS = gv->hsync_start;
1428 1.26.6.2 nathanw HSE = gv->hsync_stop;
1429 1.26.6.2 nathanw HBE = gv->htotal - 1;
1430 1.26.6.2 nathanw HT = gv->htotal;
1431 1.26.6.2 nathanw VBS = gv->vblank_start;
1432 1.26.6.2 nathanw VSS = gv->vsync_start;
1433 1.26.6.2 nathanw VSE = gv->vsync_stop;
1434 1.26.6.2 nathanw VBE = gv->vtotal - 1;
1435 1.26.6.2 nathanw VT = gv->vtotal;
1436 1.26.6.2 nathanw
1437 1.26.6.2 nathanw if (TEXT)
1438 1.26.6.2 nathanw HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
1439 1.26.6.2 nathanw else
1440 1.26.6.2 nathanw HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */
1441 1.26.6.2 nathanw VDE = gv->disp_height - 1;
1442 1.26.6.2 nathanw
1443 1.26.6.2 nathanw /* adjustments */
1444 1.26.6.2 nathanw switch (gv->depth) {
1445 1.26.6.2 nathanw case 8:
1446 1.26.6.2 nathanw clkmul = 1;
1447 1.26.6.2 nathanw offsmul = 1;
1448 1.26.6.2 nathanw clkmode = 0x0;
1449 1.26.6.2 nathanw break;
1450 1.26.6.2 nathanw case 15:
1451 1.26.6.2 nathanw case 16:
1452 1.26.6.2 nathanw clkmul = 1;
1453 1.26.6.2 nathanw offsmul = 2;
1454 1.26.6.2 nathanw clkmode = 0x6;
1455 1.26.6.2 nathanw break;
1456 1.26.6.2 nathanw case 24:
1457 1.26.6.2 nathanw if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */
1458 1.26.6.2 nathanw clkmul = 1;
1459 1.26.6.2 nathanw else
1460 1.26.6.2 nathanw clkmul = 3;
1461 1.26.6.2 nathanw offsmul = 3;
1462 1.26.6.2 nathanw clkmode = 0x4;
1463 1.26.6.2 nathanw break;
1464 1.26.6.2 nathanw case 32:
1465 1.26.6.2 nathanw clkmul = 1;
1466 1.26.6.2 nathanw offsmul = 2;
1467 1.26.6.2 nathanw clkmode = 0x8;
1468 1.26.6.2 nathanw break;
1469 1.26.6.2 nathanw default:
1470 1.26.6.2 nathanw clkmul = 1;
1471 1.26.6.2 nathanw offsmul = 1;
1472 1.26.6.2 nathanw clkmode = 0x0;
1473 1.26.6.2 nathanw break;
1474 1.26.6.2 nathanw }
1475 1.26.6.2 nathanw
1476 1.26.6.2 nathanw if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) {
1477 1.26.6.2 nathanw WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7);
1478 1.26.6.2 nathanw } else
1479 1.26.6.2 nathanw WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
1480 1.26.6.2 nathanw
1481 1.26.6.2 nathanw vmul = 2;
1482 1.26.6.2 nathanw if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE))
1483 1.26.6.2 nathanw vmul = 1;
1484 1.26.6.2 nathanw if (gv->disp_flags & GRF_FLAGS_DBLSCAN)
1485 1.26.6.2 nathanw vmul = 4;
1486 1.26.6.2 nathanw
1487 1.26.6.2 nathanw VDE = VDE * vmul / 2;
1488 1.26.6.2 nathanw VBS = VBS * vmul / 2;
1489 1.26.6.2 nathanw VSS = VSS * vmul / 2;
1490 1.26.6.2 nathanw VSE = VSE * vmul / 2;
1491 1.26.6.2 nathanw VBE = VBE * vmul / 2;
1492 1.26.6.2 nathanw VT = VT * vmul / 2;
1493 1.26.6.2 nathanw
1494 1.26.6.2 nathanw WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
1495 1.26.6.2 nathanw if (cl_64bit == 1) {
1496 1.26.6.2 nathanw if (TEXT || (gv->depth == 1))
1497 1.26.6.2 nathanw sr15 = 0xd0;
1498 1.26.6.2 nathanw else
1499 1.26.6.2 nathanw sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
1500 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
1501 1.26.6.2 nathanw } else {
1502 1.26.6.2 nathanw sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0;
1503 1.26.6.2 nathanw sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f;
1504 1.26.6.2 nathanw }
1505 1.26.6.2 nathanw WSeq(ba, SEQ_ID_DRAM_CNTL, sr15);
1506 1.26.6.2 nathanw WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1507 1.26.6.2 nathanw WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
1508 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
1509 1.26.6.2 nathanw
1510 1.26.6.2 nathanw /* Set clock */
1511 1.26.6.2 nathanw
1512 1.26.6.2 nathanw cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub);
1513 1.26.6.2 nathanw
1514 1.26.6.2 nathanw /* Horizontal/Vertical Sync Pulse */
1515 1.26.6.2 nathanw hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R);
1516 1.26.6.2 nathanw if (gv->disp_flags & GRF_FLAGS_PHSYNC)
1517 1.26.6.2 nathanw hvsync_pulse &= ~0x40;
1518 1.26.6.2 nathanw else
1519 1.26.6.2 nathanw hvsync_pulse |= 0x40;
1520 1.26.6.2 nathanw if (gv->disp_flags & GRF_FLAGS_PVSYNC)
1521 1.26.6.2 nathanw hvsync_pulse &= ~0x80;
1522 1.26.6.2 nathanw else
1523 1.26.6.2 nathanw hvsync_pulse |= 0x80;
1524 1.26.6.2 nathanw vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse);
1525 1.26.6.2 nathanw
1526 1.26.6.2 nathanw if (clkdoub) {
1527 1.26.6.2 nathanw HDE /= 2;
1528 1.26.6.2 nathanw HBS /= 2;
1529 1.26.6.2 nathanw HSS /= 2;
1530 1.26.6.2 nathanw HSE /= 2;
1531 1.26.6.2 nathanw HBE /= 2;
1532 1.26.6.2 nathanw HT /= 2;
1533 1.26.6.2 nathanw clkmode = 0x6;
1534 1.26.6.2 nathanw }
1535 1.26.6.2 nathanw
1536 1.26.6.2 nathanw WSeq(ba, SEQ_ID_VCLK_3_NUM, num0);
1537 1.26.6.2 nathanw WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0);
1538 1.26.6.2 nathanw
1539 1.26.6.2 nathanw /* load display parameters into board */
1540 1.26.6.2 nathanw
1541 1.26.6.2 nathanw WCrt(ba, CRT_ID_HOR_TOTAL, HT);
1542 1.26.6.2 nathanw WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
1543 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
1544 1.26.6.2 nathanw WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */
1545 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
1546 1.26.6.2 nathanw WCrt(ba, CRT_ID_END_HOR_RETR,
1547 1.26.6.2 nathanw (HSE & 0x1f) |
1548 1.26.6.2 nathanw ((HBE & 0x20) ? 0x80 : 0x00));
1549 1.26.6.2 nathanw WCrt(ba, CRT_ID_VER_TOTAL, VT);
1550 1.26.6.2 nathanw WCrt(ba, CRT_ID_OVERFLOW,
1551 1.26.6.2 nathanw 0x10 |
1552 1.26.6.2 nathanw ((VT & 0x100) ? 0x01 : 0x00) |
1553 1.26.6.2 nathanw ((VDE & 0x100) ? 0x02 : 0x00) |
1554 1.26.6.2 nathanw ((VSS & 0x100) ? 0x04 : 0x00) |
1555 1.26.6.2 nathanw ((VBS & 0x100) ? 0x08 : 0x00) |
1556 1.26.6.2 nathanw ((VT & 0x200) ? 0x20 : 0x00) |
1557 1.26.6.2 nathanw ((VDE & 0x200) ? 0x40 : 0x00) |
1558 1.26.6.2 nathanw ((VSS & 0x200) ? 0x80 : 0x00));
1559 1.26.6.2 nathanw
1560 1.26.6.2 nathanw WCrt(ba, CRT_ID_CHAR_HEIGHT,
1561 1.26.6.2 nathanw 0x40 | /* TEXT ? 0x00 ??? */
1562 1.26.6.2 nathanw ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) |
1563 1.26.6.2 nathanw ((VBS & 0x200) ? 0x20 : 0x00) |
1564 1.26.6.2 nathanw (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
1565 1.26.6.2 nathanw
1566 1.26.6.2 nathanw /* text cursor */
1567 1.26.6.2 nathanw
1568 1.26.6.2 nathanw if (TEXT) {
1569 1.26.6.2 nathanw #if CL_ULCURSOR
1570 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
1571 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
1572 1.26.6.2 nathanw #else
1573 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_START, 0x00);
1574 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
1575 1.26.6.2 nathanw #endif
1576 1.26.6.2 nathanw WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f);
1577 1.26.6.2 nathanw
1578 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
1579 1.26.6.2 nathanw WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
1580 1.26.6.2 nathanw }
1581 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
1582 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
1583 1.26.6.2 nathanw
1584 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_VER_RETR, VSS);
1585 1.26.6.2 nathanw WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20);
1586 1.26.6.2 nathanw WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
1587 1.26.6.2 nathanw WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
1588 1.26.6.2 nathanw WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
1589 1.26.6.2 nathanw
1590 1.26.6.2 nathanw WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
1591 1.26.6.2 nathanw WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */
1592 1.26.6.2 nathanw WCrt(ba, CRT_ID_LACE_CNTL,
1593 1.26.6.2 nathanw ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) |
1594 1.26.6.2 nathanw ((HBE & 0x40) ? 0x10 : 0x00) |
1595 1.26.6.2 nathanw ((HBE & 0x80) ? 0x20 : 0x00) |
1596 1.26.6.2 nathanw ((VBE & 0x100) ? 0x40 : 0x00) |
1597 1.26.6.2 nathanw ((VBE & 0x200) ? 0x80 : 0x00));
1598 1.26.6.2 nathanw
1599 1.26.6.2 nathanw WGfx(ba, GCT_ID_GRAPHICS_MODE,
1600 1.26.6.2 nathanw ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
1601 1.26.6.2 nathanw WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
1602 1.26.6.2 nathanw
1603 1.26.6.2 nathanw WSeq(ba, SEQ_ID_EXT_SEQ_MODE,
1604 1.26.6.2 nathanw ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) |
1605 1.26.6.2 nathanw ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode);
1606 1.26.6.2 nathanw
1607 1.26.6.2 nathanw /* write 0x00 to VDAC_MASK before accessing HDR this helps
1608 1.26.6.2 nathanw sometimes, out of "secret" application note (crest) */
1609 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0);
1610 1.26.6.2 nathanw /* reset HDR "magic" access counter (crest) */
1611 1.26.6.2 nathanw vgar(ba, VDAC_ADDRESS);
1612 1.26.6.2 nathanw
1613 1.26.6.2 nathanw delay(200000);
1614 1.26.6.2 nathanw vgar(ba, VDAC_MASK);
1615 1.26.6.2 nathanw delay(200000);
1616 1.26.6.2 nathanw vgar(ba, VDAC_MASK);
1617 1.26.6.2 nathanw delay(200000);
1618 1.26.6.2 nathanw vgar(ba, VDAC_MASK);
1619 1.26.6.2 nathanw delay(200000);
1620 1.26.6.2 nathanw vgar(ba, VDAC_MASK);
1621 1.26.6.2 nathanw delay(200000);
1622 1.26.6.2 nathanw switch (gv->depth) {
1623 1.26.6.2 nathanw case 1:
1624 1.26.6.2 nathanw case 4: /* text */
1625 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0);
1626 1.26.6.2 nathanw HDE = gv->disp_width / 16;
1627 1.26.6.2 nathanw break;
1628 1.26.6.2 nathanw case 8:
1629 1.26.6.2 nathanw if (clkdoub)
1630 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */
1631 1.26.6.2 nathanw else
1632 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0);
1633 1.26.6.2 nathanw HDE = gv->disp_width / 8;
1634 1.26.6.2 nathanw break;
1635 1.26.6.2 nathanw case 15:
1636 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0xd0);
1637 1.26.6.2 nathanw HDE = gv->disp_width / 4;
1638 1.26.6.2 nathanw break;
1639 1.26.6.2 nathanw case 16:
1640 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0xc1);
1641 1.26.6.2 nathanw HDE = gv->disp_width / 4;
1642 1.26.6.2 nathanw break;
1643 1.26.6.2 nathanw case 24:
1644 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0xc5);
1645 1.26.6.2 nathanw HDE = (gv->disp_width / 8) * 3;
1646 1.26.6.2 nathanw break;
1647 1.26.6.2 nathanw case 32:
1648 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0xc5);
1649 1.26.6.2 nathanw HDE = (gv->disp_width / 4);
1650 1.26.6.2 nathanw break;
1651 1.26.6.2 nathanw }
1652 1.26.6.2 nathanw
1653 1.26.6.2 nathanw /* reset HDR "magic" access counter (crest) */
1654 1.26.6.2 nathanw vgar(ba, VDAC_ADDRESS);
1655 1.26.6.2 nathanw /* then enable all bit in VDAC_MASK afterwards (crest) */
1656 1.26.6.2 nathanw vgaw(ba, VDAC_MASK, 0xff);
1657 1.26.6.2 nathanw
1658 1.26.6.2 nathanw WCrt(ba, CRT_ID_OFFSET, HDE);
1659 1.26.6.2 nathanw if (cl_64bit == 1) {
1660 1.26.6.2 nathanw WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
1661 1.26.6.2 nathanw WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
1662 1.26.6.2 nathanw }
1663 1.26.6.2 nathanw WCrt(ba, CRT_ID_EXT_DISP_CNTL,
1664 1.26.6.2 nathanw ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) |
1665 1.26.6.2 nathanw 0x22 |
1666 1.26.6.2 nathanw ((HDE > 0xff) ? 0x10 : 0x00));
1667 1.26.6.2 nathanw
1668 1.26.6.2 nathanw WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
1669 1.26.6.2 nathanw WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
1670 1.26.6.2 nathanw (gv->depth == 1) ? 0x01 : 0x0f);
1671 1.26.6.2 nathanw
1672 1.26.6.2 nathanw /* text initialization */
1673 1.26.6.2 nathanw
1674 1.26.6.2 nathanw if (TEXT) {
1675 1.26.6.2 nathanw cl_inittextmode(gp);
1676 1.26.6.2 nathanw }
1677 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14);
1678 1.26.6.2 nathanw WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
1679 1.26.6.2 nathanw
1680 1.26.6.2 nathanw /* Pass-through */
1681 1.26.6.2 nathanw
1682 1.26.6.2 nathanw RegOffpass(ba);
1683 1.26.6.2 nathanw
1684 1.26.6.2 nathanw return (1);
1685 1.26.6.2 nathanw }
1686 1.26.6.2 nathanw
1687 1.26.6.2 nathanw void
1688 1.26.6.2 nathanw cl_inittextmode(gp)
1689 1.26.6.2 nathanw struct grf_softc *gp;
1690 1.26.6.2 nathanw {
1691 1.26.6.2 nathanw struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data;
1692 1.26.6.2 nathanw volatile unsigned char *ba = gp->g_regkva;
1693 1.26.6.2 nathanw unsigned char *fb = gp->g_fbkva;
1694 1.26.6.2 nathanw unsigned char *c, *f, y;
1695 1.26.6.2 nathanw unsigned short z;
1696 1.26.6.2 nathanw
1697 1.26.6.2 nathanw
1698 1.26.6.2 nathanw /* load text font into beginning of display memory. Each character
1699 1.26.6.2 nathanw * cell is 32 bytes long (enough for 4 planes) */
1700 1.26.6.2 nathanw
1701 1.26.6.2 nathanw SetTextPlane(ba, 0x02);
1702 1.26.6.2 nathanw cl_memset(fb, 0, 256 * 32);
1703 1.26.6.2 nathanw c = (unsigned char *) (fb) + (32 * tm->fdstart);
1704 1.26.6.2 nathanw f = tm->fdata;
1705 1.26.6.2 nathanw for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
1706 1.26.6.2 nathanw for (y = 0; y < tm->fy; y++)
1707 1.26.6.2 nathanw *c++ = *f++;
1708 1.26.6.2 nathanw
1709 1.26.6.2 nathanw /* clear out text/attr planes (three screens worth) */
1710 1.26.6.2 nathanw
1711 1.26.6.2 nathanw SetTextPlane(ba, 0x01);
1712 1.26.6.2 nathanw cl_memset(fb, 0x07, tm->cols * tm->rows * 3);
1713 1.26.6.2 nathanw SetTextPlane(ba, 0x00);
1714 1.26.6.2 nathanw cl_memset(fb, 0x20, tm->cols * tm->rows * 3);
1715 1.26.6.2 nathanw
1716 1.26.6.2 nathanw /* print out a little init msg */
1717 1.26.6.2 nathanw
1718 1.26.6.2 nathanw c = (unsigned char *) (fb) + (tm->cols - 16);
1719 1.26.6.2 nathanw strcpy(c, "CIRRUS");
1720 1.26.6.2 nathanw c[6] = 0x20;
1721 1.26.6.2 nathanw
1722 1.26.6.2 nathanw /* set colors (B&W) */
1723 1.26.6.2 nathanw
1724 1.26.6.2 nathanw vgaw(ba, VDAC_ADDRESS_W, 0);
1725 1.26.6.2 nathanw for (z = 0; z < 256; z++) {
1726 1.26.6.2 nathanw unsigned char r, g, b;
1727 1.26.6.2 nathanw
1728 1.26.6.2 nathanw y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1729 1.26.6.2 nathanw
1730 1.26.6.2 nathanw if (cltype == PICASSO) {
1731 1.26.6.2 nathanw r = clconscolors[y][0];
1732 1.26.6.2 nathanw g = clconscolors[y][1];
1733 1.26.6.2 nathanw b = clconscolors[y][2];
1734 1.26.6.2 nathanw } else {
1735 1.26.6.2 nathanw b = clconscolors[y][0];
1736 1.26.6.2 nathanw g = clconscolors[y][1];
1737 1.26.6.2 nathanw r = clconscolors[y][2];
1738 1.26.6.2 nathanw }
1739 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, r >> 2);
1740 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, g >> 2);
1741 1.26.6.2 nathanw vgaw(ba, VDAC_DATA, b >> 2);
1742 1.26.6.2 nathanw }
1743 1.26.6.2 nathanw }
1744 1.26.6.2 nathanw
1745 1.26.6.2 nathanw void
1746 1.26.6.2 nathanw cl_memset(d, c, l)
1747 1.26.6.2 nathanw unsigned char *d;
1748 1.26.6.2 nathanw unsigned char c;
1749 1.26.6.2 nathanw int l;
1750 1.26.6.2 nathanw {
1751 1.26.6.2 nathanw for (; l > 0; l--)
1752 1.26.6.2 nathanw *d++ = c;
1753 1.26.6.2 nathanw }
1754 1.26.6.2 nathanw
1755 1.26.6.2 nathanw /*
1756 1.26.6.2 nathanw * Special wakeup/passthrough registers on graphics boards
1757 1.26.6.2 nathanw *
1758 1.26.6.2 nathanw * The methods have diverged a bit for each board, so
1759 1.26.6.2 nathanw * WPass(P) has been converted into a set of specific
1760 1.26.6.2 nathanw * inline functions.
1761 1.26.6.2 nathanw */
1762 1.26.6.2 nathanw static void
1763 1.26.6.2 nathanw RegWakeup(ba)
1764 1.26.6.2 nathanw volatile caddr_t ba;
1765 1.26.6.2 nathanw {
1766 1.26.6.2 nathanw
1767 1.26.6.2 nathanw switch (cltype) {
1768 1.26.6.2 nathanw case SPECTRUM:
1769 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, 0x1f);
1770 1.26.6.2 nathanw break;
1771 1.26.6.2 nathanw case PICASSO:
1772 1.26.6.2 nathanw /* Picasso needs no wakeup */
1773 1.26.6.2 nathanw break;
1774 1.26.6.2 nathanw case PICCOLO:
1775 1.26.6.2 nathanw if (cl_64bit == 1)
1776 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, 0x1f);
1777 1.26.6.2 nathanw else
1778 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10);
1779 1.26.6.2 nathanw break;
1780 1.26.6.2 nathanw }
1781 1.26.6.2 nathanw delay(200000);
1782 1.26.6.2 nathanw }
1783 1.26.6.2 nathanw
1784 1.26.6.2 nathanw static void
1785 1.26.6.2 nathanw RegOnpass(ba)
1786 1.26.6.2 nathanw volatile caddr_t ba;
1787 1.26.6.2 nathanw {
1788 1.26.6.2 nathanw
1789 1.26.6.2 nathanw switch (cltype) {
1790 1.26.6.2 nathanw case SPECTRUM:
1791 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, 0x4f);
1792 1.26.6.2 nathanw break;
1793 1.26.6.2 nathanw case PICASSO:
1794 1.26.6.2 nathanw if (cl_64bit == 0)
1795 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_WP, 0x01);
1796 1.26.6.2 nathanw break;
1797 1.26.6.2 nathanw case PICCOLO:
1798 1.26.6.2 nathanw if (cl_64bit == 1)
1799 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, 0x4f);
1800 1.26.6.2 nathanw else
1801 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf);
1802 1.26.6.2 nathanw break;
1803 1.26.6.2 nathanw }
1804 1.26.6.4 nathanw cl_pass_toggle = 1;
1805 1.26.6.2 nathanw delay(200000);
1806 1.26.6.2 nathanw }
1807 1.26.6.2 nathanw
1808 1.26.6.2 nathanw static void
1809 1.26.6.2 nathanw RegOffpass(ba)
1810 1.26.6.2 nathanw volatile caddr_t ba;
1811 1.26.6.2 nathanw {
1812 1.26.6.2 nathanw
1813 1.26.6.2 nathanw switch (cltype) {
1814 1.26.6.2 nathanw case SPECTRUM:
1815 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, 0x6f);
1816 1.26.6.2 nathanw break;
1817 1.26.6.2 nathanw case PICASSO:
1818 1.26.6.2 nathanw if (cl_64bit == 0)
1819 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, 0xff);
1820 1.26.6.2 nathanw break;
1821 1.26.6.2 nathanw case PICCOLO:
1822 1.26.6.2 nathanw if (cl_64bit == 1)
1823 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, 0x6f);
1824 1.26.6.2 nathanw else
1825 1.26.6.2 nathanw vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20);
1826 1.26.6.2 nathanw break;
1827 1.26.6.2 nathanw }
1828 1.26.6.4 nathanw cl_pass_toggle = 0;
1829 1.26.6.2 nathanw delay(200000);
1830 1.26.6.2 nathanw }
1831 1.26.6.2 nathanw
1832 1.26.6.2 nathanw #endif /* NGRFCL */
1833