grf_cl.c revision 1.49 1 1.49 christos /* $NetBSD: grf_cl.c,v 1.49 2014/01/22 00:25:16 christos Exp $ */
2 1.1 chopps
3 1.1 chopps /*
4 1.19 veego * Copyright (c) 1997 Klaus Burkert
5 1.1 chopps * Copyright (c) 1995 Ezra Story
6 1.1 chopps * Copyright (c) 1995 Kari Mettinen
7 1.1 chopps * Copyright (c) 1994 Markus Wild
8 1.1 chopps * Copyright (c) 1994 Lutz Vieweg
9 1.1 chopps * All rights reserved.
10 1.1 chopps *
11 1.1 chopps * Redistribution and use in source and binary forms, with or without
12 1.1 chopps * modification, are permitted provided that the following conditions
13 1.1 chopps * are met:
14 1.1 chopps * 1. Redistributions of source code must retain the above copyright
15 1.1 chopps * notice, this list of conditions and the following disclaimer.
16 1.1 chopps * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 chopps * notice, this list of conditions and the following disclaimer in the
18 1.1 chopps * documentation and/or other materials provided with the distribution.
19 1.1 chopps * 3. All advertising materials mentioning features or use of this software
20 1.1 chopps * must display the following acknowledgement:
21 1.1 chopps * This product includes software developed by Lutz Vieweg.
22 1.1 chopps * 4. The name of the author may not be used to endorse or promote products
23 1.1 chopps * derived from this software without specific prior written permission
24 1.1 chopps *
25 1.1 chopps * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.1 chopps * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.1 chopps * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.1 chopps * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.1 chopps * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.1 chopps * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.1 chopps * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.1 chopps * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.1 chopps * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 1.5 chopps * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.1 chopps */
36 1.24 is #include "opt_amigacons.h"
37 1.28 aymeric
38 1.28 aymeric #include <sys/cdefs.h>
39 1.49 christos __KERNEL_RCSID(0, "$NetBSD: grf_cl.c,v 1.49 2014/01/22 00:25:16 christos Exp $");
40 1.28 aymeric
41 1.5 chopps #include "grfcl.h"
42 1.46 phx #include "ite.h"
43 1.5 chopps #if NGRFCL > 0
44 1.1 chopps
45 1.1 chopps /*
46 1.1 chopps * Graphics routines for Cirrus CL GD 5426 boards,
47 1.1 chopps *
48 1.1 chopps * This code offers low-level routines to access Cirrus Cl GD 5426
49 1.1 chopps * graphics-boards from within NetBSD for the Amiga.
50 1.1 chopps * No warranties for any kind of function at all - this
51 1.1 chopps * code may crash your hardware and scratch your harddisk. Use at your
52 1.1 chopps * own risk. Freely distributable.
53 1.1 chopps *
54 1.1 chopps * Modified for Cirrus CL GD 5426 from
55 1.1 chopps * Lutz Vieweg's retina driver by Kari Mettinen 08/94
56 1.1 chopps * Contributions by Ill, ScottE, MiL
57 1.1 chopps * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95
58 1.6 is * Picasso/040 patches (wee!) by crest 01/96
59 1.1 chopps *
60 1.19 veego * PicassoIV support bz Klaus "crest" Burkert.
61 1.19 veego * Fixed interlace and doublescan, added clockdoubling and
62 1.19 veego * HiColor&TrueColor suuport by crest 01/97
63 1.19 veego *
64 1.1 chopps * Thanks to Village Tronic Marketing Gmbh for providing me with
65 1.1 chopps * a Picasso-II board.
66 1.1 chopps * Thanks for Integrated Electronics Oy Ab for providing me with
67 1.1 chopps * Cirrus CL GD 542x family documentation.
68 1.1 chopps *
69 1.1 chopps * TODO:
70 1.5 chopps * Mouse support (almost there! :-))
71 1.1 chopps * Blitter support
72 1.1 chopps *
73 1.1 chopps */
74 1.1 chopps
75 1.1 chopps #include <sys/param.h>
76 1.4 chopps #include <sys/systm.h>
77 1.1 chopps #include <sys/errno.h>
78 1.1 chopps #include <sys/ioctl.h>
79 1.1 chopps #include <sys/device.h>
80 1.1 chopps #include <sys/malloc.h>
81 1.5 chopps
82 1.1 chopps #include <machine/cpu.h>
83 1.1 chopps #include <dev/cons.h>
84 1.9 veego #include <amiga/dev/itevar.h>
85 1.1 chopps #include <amiga/amiga/device.h>
86 1.1 chopps #include <amiga/dev/grfioctl.h>
87 1.1 chopps #include <amiga/dev/grfvar.h>
88 1.1 chopps #include <amiga/dev/grf_clreg.h>
89 1.1 chopps #include <amiga/dev/zbusvar.h>
90 1.1 chopps
91 1.27 aymeric int cl_mondefok(struct grfvideo_mode *);
92 1.27 aymeric void cl_boardinit(struct grf_softc *);
93 1.27 aymeric static void cl_CompFQ(u_int, u_char *, u_char *, u_char *);
94 1.27 aymeric int cl_getvmode(struct grf_softc *, struct grfvideo_mode *);
95 1.27 aymeric int cl_setvmode(struct grf_softc *, unsigned int);
96 1.27 aymeric int cl_toggle(struct grf_softc *, unsigned short);
97 1.27 aymeric int cl_getcmap(struct grf_softc *, struct grf_colormap *);
98 1.27 aymeric int cl_putcmap(struct grf_softc *, struct grf_colormap *);
99 1.9 veego #ifndef CL5426CONSOLE
100 1.27 aymeric void cl_off(struct grf_softc *);
101 1.9 veego #endif
102 1.27 aymeric void cl_inittextmode(struct grf_softc *);
103 1.27 aymeric int cl_ioctl(register struct grf_softc *, u_long, void *);
104 1.27 aymeric int cl_getmousepos(struct grf_softc *, struct grf_position *);
105 1.27 aymeric int cl_setmousepos(struct grf_softc *, struct grf_position *);
106 1.27 aymeric static int cl_setspriteinfo(struct grf_softc *, struct grf_spriteinfo *);
107 1.27 aymeric int cl_getspriteinfo(struct grf_softc *, struct grf_spriteinfo *);
108 1.27 aymeric static int cl_getspritemax(struct grf_softc *, struct grf_position *);
109 1.27 aymeric int cl_blank(struct grf_softc *, int *);
110 1.27 aymeric int cl_setmonitor(struct grf_softc *, struct grfvideo_mode *);
111 1.27 aymeric void cl_writesprpos(volatile char *, short, short);
112 1.40 is void writeshifted(volatile char *, signed char, signed char);
113 1.27 aymeric
114 1.38 christos static void RegWakeup(volatile void *);
115 1.38 christos static void RegOnpass(volatile void *);
116 1.38 christos static void RegOffpass(volatile void *);
117 1.27 aymeric
118 1.47 chs void grfclattach(device_t, device_t, void *);
119 1.27 aymeric int grfclprint(void *, const char *);
120 1.47 chs int grfclmatch(device_t, cfdata_t, void *);
121 1.27 aymeric void cl_memset(unsigned char *, unsigned char, int);
122 1.1 chopps
123 1.5 chopps /* Graphics display definitions.
124 1.1 chopps * These are filled by 'grfconfig' using GRFIOCSETMON.
125 1.1 chopps */
126 1.20 veego #define monitor_def_max 24
127 1.20 veego static struct grfvideo_mode monitor_def[24] = {
128 1.20 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
129 1.20 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
130 1.1 chopps {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
131 1.1 chopps };
132 1.1 chopps static struct grfvideo_mode *monitor_current = &monitor_def[0];
133 1.1 chopps
134 1.1 chopps /* Patchable maximum pixel clock */
135 1.5 chopps unsigned long cl_maxpixelclock = 86000000;
136 1.1 chopps
137 1.1 chopps /* Console display definition.
138 1.1 chopps * Default hardcoded text mode. This grf_cl is set up to
139 1.1 chopps * use one text mode only, and this is it. You may use
140 1.1 chopps * grfconfig to change the mode after boot.
141 1.5 chopps */
142 1.1 chopps /* Console font */
143 1.2 chopps #ifdef KFONT_8X11
144 1.2 chopps #define CIRRUSFONT kernel_font_8x11
145 1.2 chopps #define CIRRUSFONTY 11
146 1.2 chopps #else
147 1.1 chopps #define CIRRUSFONT kernel_font_8x8
148 1.1 chopps #define CIRRUSFONTY 8
149 1.2 chopps #endif
150 1.1 chopps extern unsigned char CIRRUSFONT[];
151 1.1 chopps
152 1.1 chopps struct grfcltext_mode clconsole_mode = {
153 1.25 is {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8,
154 1.20 veego 481, 490, 498, 522, 0},
155 1.5 chopps 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255
156 1.1 chopps };
157 1.1 chopps /* Console colors */
158 1.5 chopps unsigned char clconscolors[3][3] = { /* background, foreground, hilite */
159 1.5 chopps {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
160 1.1 chopps };
161 1.1 chopps
162 1.11 veego int cltype = 0; /* Picasso, Spectrum or Piccolo */
163 1.19 veego int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */
164 1.30 matt unsigned char cl_pass_toggle; /* passthru status tracker */
165 1.1 chopps
166 1.19 veego /*
167 1.19 veego * because all 542x-boards have 2 configdev entries, one for
168 1.1 chopps * framebuffer mem and the other for regs, we have to hold onto
169 1.1 chopps * the pointers globally until we match on both. This and 'cltype'
170 1.1 chopps * are the primary obsticles to multiple board support, but if you
171 1.1 chopps * have multiple boards you have bigger problems than grf_cl.
172 1.1 chopps */
173 1.5 chopps static void *cl_fbaddr = 0; /* framebuffer */
174 1.5 chopps static void *cl_regaddr = 0; /* registers */
175 1.5 chopps static int cl_fbsize; /* framebuffer size */
176 1.19 veego static int cl_fbautosize; /* framebuffer autoconfig size */
177 1.19 veego
178 1.5 chopps
179 1.19 veego /*
180 1.19 veego * current sprite info, if you add support for multiple boards
181 1.5 chopps * make this an array or something
182 1.5 chopps */
183 1.5 chopps struct grf_spriteinfo cl_cursprite;
184 1.5 chopps
185 1.5 chopps /* sprite bitmaps in kernel stack, you'll need to arrayize these too if
186 1.5 chopps * you add multiple board support
187 1.5 chopps */
188 1.5 chopps static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64];
189 1.5 chopps static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2];
190 1.1 chopps
191 1.1 chopps /* standard driver stuff */
192 1.47 chs CFATTACH_DECL_NEW(grfcl, sizeof(struct grf_softc),
193 1.33 thorpej grfclmatch, grfclattach, NULL, NULL);
194 1.7 thorpej
195 1.1 chopps static struct cfdata *cfdata;
196 1.1 chopps
197 1.1 chopps int
198 1.47 chs grfclmatch(device_t parent, cfdata_t cf, void *aux)
199 1.1 chopps {
200 1.1 chopps struct zbus_args *zap;
201 1.49 christos static int regprod, fbprod;
202 1.11 veego int error;
203 1.1 chopps
204 1.47 chs zap = aux;
205 1.1 chopps
206 1.1 chopps #ifndef CL5426CONSOLE
207 1.1 chopps if (amiga_realconfig == 0)
208 1.5 chopps return (0);
209 1.1 chopps #endif
210 1.1 chopps
211 1.5 chopps /* Grab the first board we encounter as the preferred one. This will
212 1.5 chopps * allow one board to work in a multiple 5426 board system, but not
213 1.5 chopps * multiple boards at the same time. */
214 1.1 chopps if (cltype == 0) {
215 1.1 chopps switch (zap->manid) {
216 1.11 veego case PICASSO:
217 1.19 veego switch (zap->prodid) {
218 1.19 veego case 11:
219 1.19 veego case 12:
220 1.19 veego regprod = 12;
221 1.19 veego fbprod = 11;
222 1.19 veego error = 0;
223 1.19 veego break;
224 1.19 veego case 22:
225 1.19 veego error = 0;
226 1.19 veego break;
227 1.19 veego case 21:
228 1.19 veego case 23:
229 1.19 veego regprod = 23;
230 1.19 veego fbprod = 21;
231 1.19 veego cl_64bit = 1;
232 1.19 veego error = 0;
233 1.19 veego break;
234 1.19 veego case 24:
235 1.19 veego regprod = 24;
236 1.19 veego fbprod = 24;
237 1.19 veego cl_64bit = 1;
238 1.19 veego error = 0;
239 1.19 veego break;
240 1.19 veego default:
241 1.19 veego error = 1;
242 1.19 veego break;
243 1.19 veego }
244 1.19 veego if (error == 1)
245 1.19 veego return (0);
246 1.19 veego else
247 1.19 veego break;
248 1.11 veego case SPECTRUM:
249 1.3 chopps if (zap->prodid != 2 && zap->prodid != 1)
250 1.3 chopps return (0);
251 1.1 chopps regprod = 2;
252 1.1 chopps fbprod = 1;
253 1.1 chopps break;
254 1.11 veego case PICCOLO:
255 1.11 veego switch (zap->prodid) {
256 1.11 veego case 5:
257 1.11 veego case 6:
258 1.11 veego regprod = 6;
259 1.11 veego fbprod = 5;
260 1.11 veego error = 0;
261 1.11 veego break;
262 1.11 veego case 10:
263 1.11 veego case 11:
264 1.11 veego regprod = 11;
265 1.11 veego fbprod = 10;
266 1.19 veego cl_64bit = 1;
267 1.11 veego error = 0;
268 1.11 veego break;
269 1.11 veego default:
270 1.11 veego error = 1;
271 1.11 veego break;
272 1.11 veego }
273 1.11 veego if (error == 1)
274 1.11 veego return (0);
275 1.11 veego else
276 1.11 veego break;
277 1.11 veego default:
278 1.5 chopps return (0);
279 1.1 chopps }
280 1.1 chopps cltype = zap->manid;
281 1.1 chopps } else {
282 1.1 chopps if (cltype != zap->manid) {
283 1.5 chopps return (0);
284 1.1 chopps }
285 1.1 chopps }
286 1.1 chopps
287 1.5 chopps /* Configure either registers or framebuffer in any order */
288 1.19 veego if ((cltype == PICASSO) && (cl_64bit == 1)) {
289 1.19 veego switch (zap->prodid) {
290 1.19 veego case 21:
291 1.5 chopps cl_fbaddr = zap->va;
292 1.19 veego cl_fbautosize = zap->size;
293 1.19 veego break;
294 1.27 aymeric case 22:
295 1.19 veego cl_fbautosize += zap->size;
296 1.19 veego break;
297 1.19 veego case 23:
298 1.19 veego cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000);
299 1.19 veego break;
300 1.19 veego case 24:
301 1.19 veego cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000);
302 1.23 veego /* check for PicassoIV with 64MB config and handle it */
303 1.23 veego if (zap->size == 0x04000000) {
304 1.23 veego cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000);
305 1.23 veego } else {
306 1.23 veego cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000);
307 1.23 veego }
308 1.19 veego cl_fbautosize = 0x400000;
309 1.19 veego break;
310 1.19 veego default:
311 1.5 chopps return (0);
312 1.19 veego }
313 1.19 veego }
314 1.19 veego else {
315 1.19 veego if (zap->prodid == regprod)
316 1.19 veego cl_regaddr = zap->va;
317 1.19 veego else
318 1.19 veego if (zap->prodid == fbprod) {
319 1.19 veego cl_fbaddr = zap->va;
320 1.19 veego cl_fbautosize = zap->size;
321 1.19 veego } else
322 1.19 veego return (0);
323 1.19 veego }
324 1.1 chopps
325 1.1 chopps #ifdef CL5426CONSOLE
326 1.19 veego if (amiga_realconfig == 0) {
327 1.47 chs cfdata = cf;
328 1.19 veego }
329 1.5 chopps #endif
330 1.27 aymeric
331 1.5 chopps return (1);
332 1.1 chopps }
333 1.1 chopps
334 1.1 chopps void
335 1.47 chs grfclattach(device_t parent, device_t self, void *aux)
336 1.1 chopps {
337 1.1 chopps static struct grf_softc congrf;
338 1.1 chopps struct zbus_args *zap;
339 1.1 chopps struct grf_softc *gp;
340 1.47 chs struct device temp;
341 1.1 chopps static char attachflag = 0;
342 1.1 chopps
343 1.47 chs zap = aux;
344 1.1 chopps
345 1.16 christos printf("\n");
346 1.1 chopps
347 1.1 chopps /* make sure both halves have matched */
348 1.1 chopps if (!cl_regaddr || !cl_fbaddr)
349 1.1 chopps return;
350 1.1 chopps
351 1.1 chopps /* do all that messy console/grf stuff */
352 1.47 chs if (self == NULL) {
353 1.1 chopps gp = &congrf;
354 1.47 chs gp->g_device = &temp;
355 1.47 chs temp.dv_private = gp;
356 1.47 chs } else {
357 1.47 chs gp = device_private(self);
358 1.47 chs gp->g_device = self;
359 1.47 chs }
360 1.1 chopps
361 1.47 chs if (self != NULL && congrf.g_regkva != 0) {
362 1.1 chopps /*
363 1.1 chopps * inited earlier, just copy (not device struct)
364 1.1 chopps */
365 1.45 cegger memcpy(&gp->g_display, &congrf.g_display,
366 1.5 chopps (char *) &gp[1] - (char *) &gp->g_display);
367 1.1 chopps } else {
368 1.38 christos gp->g_regkva = (volatile void *) cl_regaddr;
369 1.38 christos gp->g_fbkva = (volatile void *) cl_fbaddr;
370 1.1 chopps
371 1.1 chopps gp->g_unit = GRF_CL5426_UNIT;
372 1.1 chopps gp->g_mode = cl_mode;
373 1.46 phx #if NITE > 0
374 1.1 chopps gp->g_conpri = grfcl_cnprobe();
375 1.46 phx #endif
376 1.1 chopps gp->g_flags = GF_ALIVE;
377 1.1 chopps
378 1.1 chopps /* wakeup the board */
379 1.1 chopps cl_boardinit(gp);
380 1.1 chopps #ifdef CL5426CONSOLE
381 1.46 phx #if NITE > 0
382 1.1 chopps grfcl_iteinit(gp);
383 1.46 phx #endif
384 1.5 chopps (void) cl_load_mon(gp, &clconsole_mode);
385 1.1 chopps #endif
386 1.1 chopps
387 1.1 chopps }
388 1.1 chopps
389 1.1 chopps /*
390 1.1 chopps * attach grf (once)
391 1.1 chopps */
392 1.48 rkujawa if (amiga_config_found(cfdata, gp->g_device, gp, grfclprint)) {
393 1.1 chopps attachflag = 1;
394 1.16 christos printf("grfcl: %dMB ", cl_fbsize / 0x100000);
395 1.1 chopps switch (cltype) {
396 1.11 veego case PICASSO:
397 1.19 veego if (cl_64bit == 1) {
398 1.19 veego printf("Picasso IV");
399 1.19 veego /* 135MHz will be supported if we
400 1.19 veego * have a palette doubling mode.
401 1.19 veego */
402 1.19 veego cl_maxpixelclock = 86000000;
403 1.19 veego }
404 1.19 veego else {
405 1.19 veego printf("Picasso II");
406 1.19 veego
407 1.19 veego /* check for PicassoII+ (crest) */
408 1.19 veego if(zap->serno == 0x00100000)
409 1.19 veego printf("+");
410 1.19 veego
411 1.19 veego /* determine used Gfx/chipset (crest) */
412 1.19 veego vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */
413 1.19 veego switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) {
414 1.19 veego case 0x24:
415 1.19 veego printf(" (with CL-GD5426)");
416 1.19 veego break;
417 1.19 veego case 0x26:
418 1.19 veego printf(" (with CL-GD5428)");
419 1.19 veego break;
420 1.19 veego case 0x27:
421 1.19 veego printf(" (with CL-GD5429)");
422 1.19 veego break;
423 1.19 veego }
424 1.19 veego cl_maxpixelclock = 86000000;
425 1.19 veego }
426 1.1 chopps break;
427 1.11 veego case SPECTRUM:
428 1.16 christos printf("Spectrum");
429 1.5 chopps cl_maxpixelclock = 90000000;
430 1.1 chopps break;
431 1.11 veego case PICCOLO:
432 1.19 veego if (cl_64bit == 1) {
433 1.16 christos printf("Piccolo SD64");
434 1.11 veego /* 110MHz will be supported if we
435 1.11 veego * have a palette doubling mode.
436 1.11 veego */
437 1.11 veego cl_maxpixelclock = 90000000;
438 1.11 veego } else {
439 1.16 christos printf("Piccolo");
440 1.11 veego cl_maxpixelclock = 90000000;
441 1.11 veego }
442 1.1 chopps break;
443 1.1 chopps }
444 1.16 christos printf(" being used\n");
445 1.5 chopps #ifdef CL_OVERCLOCK
446 1.5 chopps cl_maxpixelclock = 115000000;
447 1.5 chopps #endif
448 1.1 chopps } else {
449 1.1 chopps if (!attachflag)
450 1.16 christos printf("grfcl unattached!!\n");
451 1.1 chopps }
452 1.1 chopps }
453 1.1 chopps
454 1.1 chopps int
455 1.47 chs grfclprint(void *aux, const char *pnp)
456 1.1 chopps {
457 1.1 chopps if (pnp)
458 1.34 thorpej aprint_normal("ite at %s: ", pnp);
459 1.5 chopps return (UNCONF);
460 1.1 chopps }
461 1.1 chopps
462 1.1 chopps void
463 1.42 dsl cl_boardinit(struct grf_softc *gp)
464 1.1 chopps {
465 1.39 he volatile unsigned char *ba = gp->g_regkva;
466 1.5 chopps int x;
467 1.1 chopps
468 1.19 veego if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */
469 1.19 veego WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */
470 1.19 veego delay(200000); /* wait some time (two frames as of now) */
471 1.19 veego WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */
472 1.19 veego WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */
473 1.19 veego WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */
474 1.19 veego cl_fbsize = cl_fbautosize;
475 1.19 veego } else {
476 1.19 veego
477 1.19 veego /* wakeup board and flip passthru OFF */
478 1.19 veego RegWakeup(ba);
479 1.19 veego RegOnpass(ba);
480 1.19 veego
481 1.19 veego vgaw(ba, 0x46e8, 0x16);
482 1.19 veego vgaw(ba, 0x102, 1);
483 1.19 veego vgaw(ba, 0x46e8, 0x0e);
484 1.19 veego if (cl_64bit != 1)
485 1.19 veego vgaw(ba, 0x3c3, 1);
486 1.19 veego
487 1.19 veego cl_fbsize = cl_fbautosize;
488 1.1 chopps
489 1.19 veego /* setup initial unchanging parameters */
490 1.19 veego
491 1.19 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */
492 1.19 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */
493 1.19 veego
494 1.19 veego WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */
495 1.19 veego WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */
496 1.1 chopps
497 1.19 veego if (cl_64bit == 1) {
498 1.19 veego WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
499 1.19 veego WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
500 1.19 veego } else {
501 1.19 veego WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0);
502 1.19 veego }
503 1.19 veego WSeq(ba, SEQ_ID_RESET, 0x03);
504 1.19 veego WSeq(ba, SEQ_ID_MAP_MASK, 0xff);
505 1.19 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
506 1.19 veego WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */
507 1.19 veego WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81);
508 1.19 veego WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00);
509 1.19 veego if (cl_64bit == 1)
510 1.19 veego WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a);
511 1.19 veego else
512 1.19 veego WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */
513 1.19 veego WSeq(ba, SEQ_ID_SIG_CNTL, 0x02);
514 1.19 veego WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
515 1.1 chopps
516 1.19 veego if (cl_64bit == 1)
517 1.19 veego WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c);
518 1.19 veego else
519 1.14 thorpej WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22);
520 1.1 chopps
521 1.19 veego WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
522 1.19 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
523 1.19 veego WCrt(ba, CRT_ID_CURSOR_END, 0x08);
524 1.19 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
525 1.19 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
526 1.19 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
527 1.19 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
528 1.1 chopps
529 1.19 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07);
530 1.19 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
531 1.19 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */
532 1.19 veego WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22);
533 1.19 veego if (cl_64bit == 1) {
534 1.19 veego WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
535 1.19 veego WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
536 1.19 veego }
537 1.19 veego WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */
538 1.1 chopps
539 1.19 veego WGfx(ba, GCT_ID_SET_RESET, 0x00);
540 1.19 veego WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
541 1.19 veego WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
542 1.19 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
543 1.19 veego WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
544 1.19 veego WGfx(ba, GCT_ID_MISC, 0x01);
545 1.19 veego WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
546 1.19 veego WGfx(ba, GCT_ID_BITMASK, 0xff);
547 1.19 veego WGfx(ba, GCT_ID_MODE_EXT, 0x28);
548 1.19 veego
549 1.19 veego for (x = 0; x < 0x10; x++)
550 1.19 veego WAttr(ba, x, x);
551 1.19 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
552 1.19 veego WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
553 1.19 veego WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
554 1.19 veego WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
555 1.19 veego WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
556 1.19 veego WAttr(ba, 0x34, 0x00);
557 1.1 chopps
558 1.19 veego vgaw(ba, VDAC_MASK, 0xff);
559 1.19 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xef);
560 1.1 chopps
561 1.19 veego WGfx(ba, GCT_ID_BLT_STAT_START, 0x04);
562 1.19 veego WGfx(ba, GCT_ID_BLT_STAT_START, 0x00);
563 1.19 veego }
564 1.1 chopps
565 1.1 chopps /* colors initially set to greyscale */
566 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, 0);
567 1.5 chopps for (x = 255; x >= 0; x--) {
568 1.1 chopps vgaw(ba, VDAC_DATA, x);
569 1.1 chopps vgaw(ba, VDAC_DATA, x);
570 1.1 chopps vgaw(ba, VDAC_DATA, x);
571 1.1 chopps }
572 1.5 chopps /* set sprite bitmap pointers */
573 1.5 chopps cl_cursprite.image = cl_imageptr;
574 1.5 chopps cl_cursprite.mask = cl_maskptr;
575 1.5 chopps cl_cursprite.cmap.red = cl_sprred;
576 1.5 chopps cl_cursprite.cmap.green = cl_sprgreen;
577 1.5 chopps cl_cursprite.cmap.blue = cl_sprblue;
578 1.19 veego
579 1.19 veego if (cl_64bit == 0) {
580 1.19 veego
581 1.19 veego /* check for 1MB or 2MB board (crest) */
582 1.19 veego volatile unsigned long *cl_fbtestaddr;
583 1.19 veego cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva;
584 1.19 veego
585 1.19 veego WGfx(ba, GCT_ID_OFFSET_0, 0x40);
586 1.19 veego *cl_fbtestaddr = 0x12345678;
587 1.19 veego
588 1.19 veego if (*cl_fbtestaddr != 0x12345678) {
589 1.19 veego WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30);
590 1.19 veego cl_fbsize = 0x100000;
591 1.19 veego }
592 1.19 veego else
593 1.19 veego {
594 1.19 veego cl_fbsize = 0x200000;
595 1.19 veego }
596 1.19 veego }
597 1.19 veego WGfx(ba, GCT_ID_OFFSET_0, 0x00);
598 1.1 chopps }
599 1.1 chopps
600 1.1 chopps
601 1.1 chopps int
602 1.42 dsl cl_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm)
603 1.1 chopps {
604 1.1 chopps struct grfvideo_mode *gv;
605 1.1 chopps
606 1.1 chopps #ifdef CL5426CONSOLE
607 1.1 chopps /* Handle grabbing console mode */
608 1.1 chopps if (vm->mode_num == 255) {
609 1.45 cegger memcpy(vm, &clconsole_mode, sizeof(struct grfvideo_mode));
610 1.5 chopps /* XXX so grfconfig can tell us the correct text dimensions. */
611 1.1 chopps vm->depth = clconsole_mode.fy;
612 1.27 aymeric } else
613 1.1 chopps #endif
614 1.5 chopps {
615 1.5 chopps if (vm->mode_num == 0)
616 1.5 chopps vm->mode_num = (monitor_current - monitor_def) + 1;
617 1.5 chopps if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
618 1.5 chopps return (EINVAL);
619 1.5 chopps gv = monitor_def + (vm->mode_num - 1);
620 1.5 chopps if (gv->mode_num == 0)
621 1.5 chopps return (EINVAL);
622 1.5 chopps
623 1.45 cegger memcpy(vm, gv, sizeof(struct grfvideo_mode));
624 1.5 chopps }
625 1.5 chopps
626 1.5 chopps /* adjust internal values to pixel values */
627 1.5 chopps
628 1.5 chopps vm->hblank_start *= 8;
629 1.5 chopps vm->hsync_start *= 8;
630 1.5 chopps vm->hsync_stop *= 8;
631 1.5 chopps vm->htotal *= 8;
632 1.27 aymeric
633 1.5 chopps return (0);
634 1.1 chopps }
635 1.1 chopps
636 1.1 chopps
637 1.1 chopps int
638 1.42 dsl cl_setvmode(struct grf_softc *gp, unsigned mode)
639 1.1 chopps {
640 1.5 chopps if (!mode || (mode > monitor_def_max) ||
641 1.5 chopps monitor_def[mode - 1].mode_num == 0)
642 1.5 chopps return (EINVAL);
643 1.1 chopps
644 1.1 chopps monitor_current = monitor_def + (mode - 1);
645 1.1 chopps
646 1.5 chopps return (0);
647 1.1 chopps }
648 1.1 chopps
649 1.9 veego #ifndef CL5426CONSOLE
650 1.1 chopps void
651 1.42 dsl cl_off(struct grf_softc *gp)
652 1.1 chopps {
653 1.5 chopps char *ba = gp->g_regkva;
654 1.1 chopps
655 1.19 veego /*
656 1.19 veego * we'll put the pass-through on for cc ite and set Full Bandwidth bit
657 1.5 chopps * on just in case it didn't work...but then it doesn't matter does
658 1.19 veego * it? =)
659 1.19 veego */
660 1.1 chopps RegOnpass(ba);
661 1.19 veego vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE);
662 1.19 veego vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20);
663 1.1 chopps }
664 1.9 veego #endif
665 1.1 chopps
666 1.5 chopps int
667 1.42 dsl cl_blank(struct grf_softc *gp, int *on)
668 1.5 chopps {
669 1.12 is WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21);
670 1.5 chopps return(0);
671 1.5 chopps }
672 1.27 aymeric
673 1.1 chopps /*
674 1.1 chopps * Change the mode of the display.
675 1.1 chopps * Return a UNIX error number or 0 for success.
676 1.1 chopps */
677 1.9 veego int
678 1.42 dsl cl_mode(register struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3)
679 1.1 chopps {
680 1.5 chopps int error;
681 1.1 chopps
682 1.1 chopps switch (cmd) {
683 1.11 veego case GM_GRFON:
684 1.5 chopps error = cl_load_mon(gp,
685 1.1 chopps (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL;
686 1.5 chopps return (error);
687 1.1 chopps
688 1.11 veego case GM_GRFOFF:
689 1.1 chopps #ifndef CL5426CONSOLE
690 1.1 chopps cl_off(gp);
691 1.1 chopps #else
692 1.1 chopps cl_load_mon(gp, &clconsole_mode);
693 1.1 chopps #endif
694 1.5 chopps return (0);
695 1.1 chopps
696 1.11 veego case GM_GRFCONFIG:
697 1.5 chopps return (0);
698 1.1 chopps
699 1.11 veego case GM_GRFGETVMODE:
700 1.5 chopps return (cl_getvmode(gp, (struct grfvideo_mode *) arg));
701 1.1 chopps
702 1.11 veego case GM_GRFSETVMODE:
703 1.5 chopps error = cl_setvmode(gp, *(unsigned *) arg);
704 1.5 chopps if (!error && (gp->g_flags & GF_GRFON))
705 1.5 chopps cl_load_mon(gp,
706 1.1 chopps (struct grfcltext_mode *) monitor_current);
707 1.5 chopps return (error);
708 1.1 chopps
709 1.11 veego case GM_GRFGETNUMVM:
710 1.5 chopps *(int *) arg = monitor_def_max;
711 1.5 chopps return (0);
712 1.1 chopps
713 1.11 veego case GM_GRFIOCTL:
714 1.9 veego return (cl_ioctl(gp, a2, arg));
715 1.1 chopps
716 1.11 veego default:
717 1.1 chopps break;
718 1.1 chopps }
719 1.1 chopps
720 1.29 atatat return (EPASSTHROUGH);
721 1.1 chopps }
722 1.1 chopps
723 1.1 chopps int
724 1.42 dsl cl_ioctl(register struct grf_softc *gp, u_long cmd, void *data)
725 1.1 chopps {
726 1.1 chopps switch (cmd) {
727 1.11 veego case GRFIOCGSPRITEPOS:
728 1.5 chopps return (cl_getmousepos(gp, (struct grf_position *) data));
729 1.5 chopps
730 1.11 veego case GRFIOCSSPRITEPOS:
731 1.5 chopps return (cl_setmousepos(gp, (struct grf_position *) data));
732 1.5 chopps
733 1.11 veego case GRFIOCSSPRITEINF:
734 1.5 chopps return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data));
735 1.5 chopps
736 1.11 veego case GRFIOCGSPRITEINF:
737 1.5 chopps return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data));
738 1.5 chopps
739 1.11 veego case GRFIOCGSPRITEMAX:
740 1.5 chopps return (cl_getspritemax(gp, (struct grf_position *) data));
741 1.1 chopps
742 1.11 veego case GRFIOCGETCMAP:
743 1.5 chopps return (cl_getcmap(gp, (struct grf_colormap *) data));
744 1.1 chopps
745 1.11 veego case GRFIOCPUTCMAP:
746 1.5 chopps return (cl_putcmap(gp, (struct grf_colormap *) data));
747 1.1 chopps
748 1.11 veego case GRFIOCBITBLT:
749 1.1 chopps break;
750 1.1 chopps
751 1.11 veego case GRFTOGGLE:
752 1.5 chopps return (cl_toggle(gp, 0));
753 1.1 chopps
754 1.11 veego case GRFIOCSETMON:
755 1.5 chopps return (cl_setmonitor(gp, (struct grfvideo_mode *) data));
756 1.5 chopps
757 1.11 veego case GRFIOCBLANK:
758 1.5 chopps return (cl_blank(gp, (int *)data));
759 1.5 chopps
760 1.5 chopps }
761 1.29 atatat return (EPASSTHROUGH);
762 1.5 chopps }
763 1.5 chopps
764 1.5 chopps int
765 1.42 dsl cl_getmousepos(struct grf_softc *gp, struct grf_position *data)
766 1.5 chopps {
767 1.5 chopps data->x = cl_cursprite.pos.x;
768 1.5 chopps data->y = cl_cursprite.pos.y;
769 1.5 chopps return (0);
770 1.5 chopps }
771 1.5 chopps
772 1.5 chopps void
773 1.42 dsl cl_writesprpos(volatile char *ba, short x, short y)
774 1.5 chopps {
775 1.5 chopps /* we want to use a 16-bit write to 3c4 so no macros used */
776 1.5 chopps volatile unsigned char *cwp;
777 1.5 chopps volatile unsigned short *wp;
778 1.5 chopps
779 1.5 chopps cwp = ba + 0x3c4;
780 1.35 jmc wp = (volatile unsigned short *)cwp;
781 1.5 chopps
782 1.19 veego /*
783 1.19 veego * don't ask me why, but apparently you can't do a 16-bit write with
784 1.19 veego * x-position like with y-position below (dagge)
785 1.19 veego */
786 1.5 chopps cwp[0] = 0x10 | ((x << 5) & 0xff);
787 1.5 chopps cwp[1] = (x >> 3) & 0xff;
788 1.5 chopps
789 1.5 chopps *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff);
790 1.5 chopps }
791 1.5 chopps
792 1.5 chopps void
793 1.42 dsl writeshifted(volatile char *to, signed char shiftx, signed char shifty)
794 1.5 chopps {
795 1.22 veego int y;
796 1.5 chopps unsigned long long *tptr, *iptr, *mptr, line;
797 1.5 chopps
798 1.35 jmc tptr = (unsigned long long *) __UNVOLATILE(to);
799 1.5 chopps iptr = (unsigned long long *) cl_cursprite.image;
800 1.5 chopps mptr = (unsigned long long *) cl_cursprite.mask;
801 1.5 chopps
802 1.5 chopps shiftx = shiftx < 0 ? 0 : shiftx;
803 1.5 chopps shifty = shifty < 0 ? 0 : shifty;
804 1.5 chopps
805 1.5 chopps /* start reading shifty lines down, and
806 1.5 chopps * shift each line in by shiftx
807 1.5 chopps */
808 1.5 chopps for (y = shifty; y < 64; y++) {
809 1.5 chopps
810 1.5 chopps /* image */
811 1.5 chopps line = iptr[y];
812 1.5 chopps *tptr++ = line << shiftx;
813 1.5 chopps
814 1.5 chopps /* mask */
815 1.5 chopps line = mptr[y];
816 1.5 chopps *tptr++ = line << shiftx;
817 1.5 chopps }
818 1.5 chopps
819 1.5 chopps /* clear the remainder */
820 1.5 chopps for (y = shifty; y > 0; y--) {
821 1.5 chopps *tptr++ = 0;
822 1.5 chopps *tptr++ = 0;
823 1.5 chopps }
824 1.5 chopps }
825 1.5 chopps
826 1.5 chopps int
827 1.42 dsl cl_setmousepos(struct grf_softc *gp, struct grf_position *data)
828 1.5 chopps {
829 1.5 chopps volatile char *ba = gp->g_regkva;
830 1.49 christos short rx, ry;
831 1.9 veego #ifdef CL_SHIFTSPRITE
832 1.5 chopps volatile char *fb = gp->g_fbkva;
833 1.5 chopps volatile char *sprite = fb + (cl_fbsize - 1024);
834 1.9 veego #endif
835 1.5 chopps
836 1.5 chopps /* no movement */
837 1.5 chopps if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y)
838 1.5 chopps return (0);
839 1.5 chopps
840 1.5 chopps /* current and previous real coordinates */
841 1.5 chopps rx = data->x - cl_cursprite.hot.x;
842 1.5 chopps ry = data->y - cl_cursprite.hot.y;
843 1.5 chopps
844 1.19 veego /*
845 1.19 veego * if we are/were on an edge, create (un)shifted bitmap --
846 1.5 chopps * ripped out optimization (not extremely worthwhile,
847 1.5 chopps * and kind of buggy anyhow).
848 1.5 chopps */
849 1.5 chopps #ifdef CL_SHIFTSPRITE
850 1.5 chopps if (rx < 0 || ry < 0 || prx < 0 || pry < 0) {
851 1.5 chopps writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0);
852 1.5 chopps }
853 1.5 chopps #endif
854 1.5 chopps
855 1.5 chopps /* do movement, save position */
856 1.5 chopps cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
857 1.5 chopps cl_cursprite.pos.x = data->x;
858 1.5 chopps cl_cursprite.pos.y = data->y;
859 1.5 chopps
860 1.5 chopps return (0);
861 1.5 chopps }
862 1.5 chopps
863 1.5 chopps int
864 1.42 dsl cl_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data)
865 1.5 chopps {
866 1.5 chopps copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo));
867 1.5 chopps copyout(cl_cursprite.image, data->image, 64 * 8);
868 1.5 chopps copyout(cl_cursprite.mask, data->mask, 64 * 8);
869 1.5 chopps return (0);
870 1.5 chopps }
871 1.5 chopps
872 1.14 thorpej static int
873 1.42 dsl cl_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data)
874 1.5 chopps {
875 1.5 chopps volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva;
876 1.5 chopps volatile char *sprite = fb + (cl_fbsize - 1024);
877 1.5 chopps
878 1.5 chopps if (data->set & GRFSPRSET_SHAPE) {
879 1.5 chopps
880 1.26 jdolecek unsigned short dsx, dsy, i;
881 1.5 chopps unsigned long *di, *dm, *si, *sm;
882 1.5 chopps unsigned long ssi[128], ssm[128];
883 1.5 chopps struct grf_position gpos;
884 1.5 chopps
885 1.27 aymeric
886 1.27 aymeric /* check for a too large sprite (no clipping!) */
887 1.5 chopps dsy = data->size.y;
888 1.5 chopps dsx = data->size.x;
889 1.5 chopps if (dsy > 64 || dsx > 64)
890 1.5 chopps return(EINVAL);
891 1.5 chopps
892 1.5 chopps /* prepare destination */
893 1.5 chopps di = (unsigned long *)cl_cursprite.image;
894 1.5 chopps dm = (unsigned long *)cl_cursprite.mask;
895 1.5 chopps cl_memset((unsigned char *)di, 0, 8*64);
896 1.5 chopps cl_memset((unsigned char *)dm, 0, 8*64);
897 1.5 chopps
898 1.5 chopps /* two alternatives: 64 across, then it's
899 1.5 chopps * the same format we use, just copy. Otherwise,
900 1.5 chopps * copy into tmp buf and recopy skipping the
901 1.5 chopps * unused 32 bits.
902 1.5 chopps */
903 1.5 chopps if ((dsx - 1) / 32) {
904 1.5 chopps copyin(data->image, di, 8 * dsy);
905 1.5 chopps copyin(data->mask, dm, 8 * dsy);
906 1.5 chopps } else {
907 1.5 chopps si = ssi; sm = ssm;
908 1.5 chopps copyin(data->image, si, 4 * dsy);
909 1.5 chopps copyin(data->mask, sm, 4 * dsy);
910 1.5 chopps for (i = 0; i < dsy; i++) {
911 1.5 chopps *di = *si++;
912 1.5 chopps *dm = *sm++;
913 1.5 chopps di += 2;
914 1.5 chopps dm += 2;
915 1.5 chopps }
916 1.5 chopps }
917 1.5 chopps
918 1.5 chopps /* set size */
919 1.5 chopps cl_cursprite.size.x = data->size.x;
920 1.5 chopps cl_cursprite.size.y = data->size.y;
921 1.5 chopps
922 1.5 chopps /* forcably load into board */
923 1.5 chopps gpos.x = cl_cursprite.pos.x;
924 1.5 chopps gpos.y = cl_cursprite.pos.y;
925 1.5 chopps cl_cursprite.pos.x = -1;
926 1.5 chopps cl_cursprite.pos.y = -1;
927 1.5 chopps writeshifted(sprite, 0, 0);
928 1.5 chopps cl_setmousepos(gp, &gpos);
929 1.5 chopps
930 1.5 chopps }
931 1.5 chopps if (data->set & GRFSPRSET_HOT) {
932 1.5 chopps
933 1.5 chopps cl_cursprite.hot = data->hot;
934 1.5 chopps
935 1.5 chopps }
936 1.5 chopps if (data->set & GRFSPRSET_CMAP) {
937 1.5 chopps
938 1.5 chopps u_char red[2], green[2], blue[2];
939 1.5 chopps
940 1.5 chopps copyin(data->cmap.red, red, 2);
941 1.5 chopps copyin(data->cmap.green, green, 2);
942 1.5 chopps copyin(data->cmap.blue, blue, 2);
943 1.45 cegger memcpy(cl_cursprite.cmap.red, red, 2);
944 1.45 cegger memcpy(cl_cursprite.cmap.green, green, 2);
945 1.45 cegger memcpy(cl_cursprite.cmap.blue, blue, 2);
946 1.5 chopps
947 1.5 chopps /* enable and load colors 256 & 257 */
948 1.5 chopps WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06);
949 1.5 chopps
950 1.5 chopps /* 256 */
951 1.5 chopps vgaw(ba, VDAC_ADDRESS_W, 0x00);
952 1.5 chopps if (cltype == PICASSO) {
953 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2));
954 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2));
955 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2));
956 1.5 chopps } else {
957 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2));
958 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2));
959 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2));
960 1.5 chopps }
961 1.5 chopps
962 1.5 chopps /* 257 */
963 1.5 chopps vgaw(ba, VDAC_ADDRESS_W, 0x0f);
964 1.5 chopps if (cltype == PICASSO) {
965 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2));
966 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2));
967 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2));
968 1.5 chopps } else {
969 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2));
970 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2));
971 1.5 chopps vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2));
972 1.5 chopps }
973 1.27 aymeric
974 1.5 chopps /* turn on/off sprite */
975 1.5 chopps if (cl_cursprite.enable) {
976 1.5 chopps WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05);
977 1.5 chopps } else {
978 1.5 chopps WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
979 1.5 chopps }
980 1.5 chopps
981 1.5 chopps }
982 1.5 chopps if (data->set & GRFSPRSET_ENABLE) {
983 1.5 chopps
984 1.5 chopps if (data->enable == 1) {
985 1.5 chopps WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05);
986 1.5 chopps cl_cursprite.enable = 1;
987 1.5 chopps } else {
988 1.5 chopps WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04);
989 1.5 chopps cl_cursprite.enable = 0;
990 1.5 chopps }
991 1.5 chopps
992 1.5 chopps }
993 1.5 chopps if (data->set & GRFSPRSET_POS) {
994 1.5 chopps
995 1.5 chopps /* force placement */
996 1.5 chopps cl_cursprite.pos.x = -1;
997 1.5 chopps cl_cursprite.pos.y = -1;
998 1.1 chopps
999 1.5 chopps /* do it */
1000 1.5 chopps cl_setmousepos(gp, &data->pos);
1001 1.27 aymeric
1002 1.1 chopps }
1003 1.5 chopps return (0);
1004 1.5 chopps }
1005 1.5 chopps
1006 1.14 thorpej static int
1007 1.42 dsl cl_getspritemax(struct grf_softc *gp, struct grf_position *data)
1008 1.5 chopps {
1009 1.5 chopps if (gp->g_display.gd_planes == 24)
1010 1.5 chopps return (EINVAL);
1011 1.5 chopps data->x = 64;
1012 1.5 chopps data->y = 64;
1013 1.5 chopps return (0);
1014 1.1 chopps }
1015 1.1 chopps
1016 1.1 chopps int
1017 1.42 dsl cl_setmonitor(struct grf_softc *gp, struct grfvideo_mode *gv)
1018 1.1 chopps {
1019 1.5 chopps struct grfvideo_mode *md;
1020 1.5 chopps
1021 1.5 chopps if (!cl_mondefok(gv))
1022 1.5 chopps return(EINVAL);
1023 1.1 chopps
1024 1.1 chopps #ifdef CL5426CONSOLE
1025 1.1 chopps /* handle interactive setting of console mode */
1026 1.5 chopps if (gv->mode_num == 255) {
1027 1.45 cegger memcpy(&clconsole_mode.gv, gv, sizeof(struct grfvideo_mode));
1028 1.20 veego clconsole_mode.gv.hblank_start /= 8;
1029 1.20 veego clconsole_mode.gv.hsync_start /= 8;
1030 1.20 veego clconsole_mode.gv.hsync_stop /= 8;
1031 1.20 veego clconsole_mode.gv.htotal /= 8;
1032 1.1 chopps clconsole_mode.rows = gv->disp_height / clconsole_mode.fy;
1033 1.1 chopps clconsole_mode.cols = gv->disp_width / clconsole_mode.fx;
1034 1.1 chopps if (!(gp->g_flags & GF_GRFON))
1035 1.5 chopps cl_load_mon(gp, &clconsole_mode);
1036 1.46 phx #if NITE > 0
1037 1.1 chopps ite_reinit(gp->g_itedev);
1038 1.46 phx #endif
1039 1.5 chopps return (0);
1040 1.1 chopps }
1041 1.1 chopps #endif
1042 1.1 chopps
1043 1.5 chopps md = monitor_def + (gv->mode_num - 1);
1044 1.45 cegger memcpy(md, gv, sizeof(struct grfvideo_mode));
1045 1.5 chopps
1046 1.20 veego /* adjust pixel oriented values to internal rep. */
1047 1.1 chopps
1048 1.20 veego md->hblank_start /= 8;
1049 1.20 veego md->hsync_start /= 8;
1050 1.20 veego md->hsync_stop /= 8;
1051 1.20 veego md->htotal /= 8;
1052 1.1 chopps
1053 1.5 chopps return (0);
1054 1.1 chopps }
1055 1.1 chopps
1056 1.1 chopps int
1057 1.42 dsl cl_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap)
1058 1.1 chopps {
1059 1.1 chopps volatile unsigned char *ba;
1060 1.5 chopps u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1061 1.5 chopps short x;
1062 1.5 chopps int error;
1063 1.1 chopps
1064 1.1 chopps if (cmap->count == 0 || cmap->index >= 256)
1065 1.1 chopps return 0;
1066 1.1 chopps
1067 1.31 itojun if (cmap->count > 256 - cmap->index)
1068 1.1 chopps cmap->count = 256 - cmap->index;
1069 1.1 chopps
1070 1.1 chopps ba = gfp->g_regkva;
1071 1.1 chopps /* first read colors out of the chip, then copyout to userspace */
1072 1.6 is vgaw(ba, VDAC_ADDRESS_R, cmap->index);
1073 1.1 chopps x = cmap->count - 1;
1074 1.1 chopps
1075 1.19 veego /*
1076 1.19 veego * Some sort 'o Magic. Spectrum has some changes on the board to speed
1077 1.1 chopps * up 15 and 16Bit modes. They can access these modes with easy-to-programm
1078 1.1 chopps * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb
1079 1.1 chopps * is swapped to bgr. I wonder if we need to check for 8Bit though, ill
1080 1.1 chopps */
1081 1.1 chopps
1082 1.19 veego /*
1083 1.19 veego * The source for the above comment is somewhat unknow to me.
1084 1.19 veego * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue
1085 1.19 veego * lines swapped. In 24BPP this provides RGB instead of BGR as it would
1086 1.19 veego * be native to the chipset. This requires special programming for the
1087 1.19 veego * CLUT in 8BPP to compensate and avoid false colors.
1088 1.19 veego * I didn't find any special stuff for 15 and 16BPP though, crest.
1089 1.19 veego */
1090 1.19 veego
1091 1.5 chopps switch (cltype) {
1092 1.11 veego case SPECTRUM:
1093 1.11 veego case PICCOLO:
1094 1.5 chopps rp = blue + cmap->index;
1095 1.1 chopps gp = green + cmap->index;
1096 1.1 chopps bp = red + cmap->index;
1097 1.1 chopps break;
1098 1.11 veego case PICASSO:
1099 1.5 chopps rp = red + cmap->index;
1100 1.1 chopps gp = green + cmap->index;
1101 1.1 chopps bp = blue + cmap->index;
1102 1.1 chopps break;
1103 1.11 veego default:
1104 1.9 veego rp = gp = bp = 0;
1105 1.9 veego break;
1106 1.1 chopps }
1107 1.1 chopps
1108 1.1 chopps do {
1109 1.5 chopps *rp++ = vgar(ba, VDAC_DATA) << 2;
1110 1.5 chopps *gp++ = vgar(ba, VDAC_DATA) << 2;
1111 1.5 chopps *bp++ = vgar(ba, VDAC_DATA) << 2;
1112 1.1 chopps } while (x-- > 0);
1113 1.1 chopps
1114 1.5 chopps if (!(error = copyout(red + cmap->index, cmap->red, cmap->count))
1115 1.5 chopps && !(error = copyout(green + cmap->index, cmap->green, cmap->count))
1116 1.5 chopps && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count)))
1117 1.5 chopps return (0);
1118 1.1 chopps
1119 1.5 chopps return (error);
1120 1.1 chopps }
1121 1.1 chopps
1122 1.1 chopps int
1123 1.42 dsl cl_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap)
1124 1.1 chopps {
1125 1.1 chopps volatile unsigned char *ba;
1126 1.5 chopps u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1127 1.5 chopps short x;
1128 1.5 chopps int error;
1129 1.1 chopps
1130 1.1 chopps if (cmap->count == 0 || cmap->index >= 256)
1131 1.5 chopps return (0);
1132 1.1 chopps
1133 1.31 itojun if (cmap->count > 256 - cmap->index)
1134 1.1 chopps cmap->count = 256 - cmap->index;
1135 1.1 chopps
1136 1.1 chopps /* first copy the colors into kernelspace */
1137 1.5 chopps if (!(error = copyin(cmap->red, red + cmap->index, cmap->count))
1138 1.5 chopps && !(error = copyin(cmap->green, green + cmap->index, cmap->count))
1139 1.5 chopps && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) {
1140 1.1 chopps ba = gfp->g_regkva;
1141 1.5 chopps vgaw(ba, VDAC_ADDRESS_W, cmap->index);
1142 1.1 chopps x = cmap->count - 1;
1143 1.1 chopps
1144 1.5 chopps switch (cltype) {
1145 1.11 veego case SPECTRUM:
1146 1.11 veego case PICCOLO:
1147 1.1 chopps rp = blue + cmap->index;
1148 1.1 chopps gp = green + cmap->index;
1149 1.1 chopps bp = red + cmap->index;
1150 1.1 chopps break;
1151 1.11 veego case PICASSO:
1152 1.1 chopps rp = red + cmap->index;
1153 1.1 chopps gp = green + cmap->index;
1154 1.1 chopps bp = blue + cmap->index;
1155 1.1 chopps break;
1156 1.11 veego default:
1157 1.9 veego rp = gp = bp = 0;
1158 1.9 veego break;
1159 1.5 chopps }
1160 1.1 chopps
1161 1.1 chopps do {
1162 1.5 chopps vgaw(ba, VDAC_DATA, *rp++ >> 2);
1163 1.5 chopps vgaw(ba, VDAC_DATA, *gp++ >> 2);
1164 1.5 chopps vgaw(ba, VDAC_DATA, *bp++ >> 2);
1165 1.1 chopps } while (x-- > 0);
1166 1.5 chopps return (0);
1167 1.5 chopps } else
1168 1.5 chopps return (error);
1169 1.1 chopps }
1170 1.1 chopps
1171 1.1 chopps
1172 1.1 chopps int
1173 1.43 dsl cl_toggle(struct grf_softc *gp, unsigned short wopp)
1174 1.43 dsl /* wopp: don't need that one yet, ill */
1175 1.1 chopps {
1176 1.38 christos volatile void *ba;
1177 1.1 chopps
1178 1.1 chopps ba = gp->g_regkva;
1179 1.1 chopps
1180 1.30 matt if (cl_pass_toggle) {
1181 1.1 chopps RegOffpass(ba);
1182 1.1 chopps } else {
1183 1.1 chopps RegOnpass(ba);
1184 1.1 chopps }
1185 1.5 chopps return (0);
1186 1.1 chopps }
1187 1.1 chopps
1188 1.1 chopps static void
1189 1.42 dsl cl_CompFQ(u_int fq, u_char *num, u_char *denom, u_char *clkdoub)
1190 1.1 chopps {
1191 1.1 chopps #define OSC 14318180
1192 1.1 chopps /* OK, here's what we're doing here:
1193 1.5 chopps *
1194 1.1 chopps * OSC * NUMERATOR
1195 1.1 chopps * VCLK = ------------------- Hz
1196 1.1 chopps * DENOMINATOR * (1+P)
1197 1.1 chopps *
1198 1.1 chopps * so we're given VCLK and we should give out some useful
1199 1.1 chopps * values....
1200 1.1 chopps *
1201 1.5 chopps * NUMERATOR is 7 bits wide
1202 1.1 chopps * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0.
1203 1.1 chopps *
1204 1.1 chopps * We run through all the possible combinations and
1205 1.1 chopps * return the values which deviate the least from the chosen frequency.
1206 1.5 chopps *
1207 1.1 chopps */
1208 1.1 chopps #define OSC 14318180
1209 1.1 chopps #define count(n,d,p) ((OSC * n)/(d * (1+p)))
1210 1.1 chopps
1211 1.9 veego unsigned char n, d, p, minn, mind, minp = 0;
1212 1.1 chopps unsigned long err, minerr;
1213 1.1 chopps
1214 1.1 chopps /*
1215 1.27 aymeric numer = 0x00 - 0x7f
1216 1.1 chopps denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even)
1217 1.1 chopps */
1218 1.1 chopps
1219 1.5 chopps /* find lowest error in 6144 iterations. */
1220 1.1 chopps minerr = fq;
1221 1.1 chopps minn = 0;
1222 1.1 chopps mind = 0;
1223 1.1 chopps p = 0;
1224 1.1 chopps
1225 1.19 veego if ((cl_64bit == 1) && (fq >= 86000000))
1226 1.19 veego {
1227 1.19 veego for (d = 1; d < 0x20; d++) {
1228 1.19 veego for (n = 1; n < 0x80; n++) {
1229 1.19 veego err = abs(count(n, d, 0) - fq);
1230 1.19 veego if (err < minerr) {
1231 1.19 veego minerr = err;
1232 1.19 veego minn = n;
1233 1.19 veego mind = d;
1234 1.19 veego minp = 1;
1235 1.19 veego }
1236 1.1 chopps }
1237 1.1 chopps }
1238 1.19 veego *clkdoub = 1;
1239 1.19 veego }
1240 1.19 veego else {
1241 1.19 veego for (d = 1; d < 0x20; d++) {
1242 1.19 veego for (n = 1; n < 0x80; n++) {
1243 1.19 veego err = abs(count(n, d, p) - fq);
1244 1.19 veego if (err < minerr) {
1245 1.19 veego minerr = err;
1246 1.19 veego minn = n;
1247 1.19 veego mind = d;
1248 1.19 veego minp = p;
1249 1.19 veego }
1250 1.19 veego }
1251 1.19 veego if (d == 0x1f && p == 0) {
1252 1.19 veego p = 1;
1253 1.19 veego d = 0x0f;
1254 1.19 veego }
1255 1.1 chopps }
1256 1.19 veego *clkdoub = 0;
1257 1.1 chopps }
1258 1.1 chopps
1259 1.1 chopps *num = minn;
1260 1.1 chopps *denom = (mind << 1) | minp;
1261 1.1 chopps if (minerr > 500000)
1262 1.16 christos printf("Warning: CompFQ minimum error = %ld\n", minerr);
1263 1.1 chopps return;
1264 1.1 chopps }
1265 1.1 chopps
1266 1.1 chopps int
1267 1.42 dsl cl_mondefok(struct grfvideo_mode *gv)
1268 1.1 chopps {
1269 1.5 chopps unsigned long maxpix;
1270 1.27 aymeric
1271 1.5 chopps if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
1272 1.5 chopps if (gv->mode_num != 255 || gv->depth != 4)
1273 1.5 chopps return(0);
1274 1.1 chopps
1275 1.5 chopps switch (gv->depth) {
1276 1.11 veego case 4:
1277 1.5 chopps if (gv->mode_num != 255)
1278 1.5 chopps return(0);
1279 1.11 veego case 1:
1280 1.11 veego case 8:
1281 1.19 veego maxpix = cl_maxpixelclock;
1282 1.19 veego if (cl_64bit == 1)
1283 1.19 veego {
1284 1.19 veego if (cltype == PICASSO) /* Picasso IV */
1285 1.19 veego maxpix = 135000000;
1286 1.19 veego else /* Piccolo SD64 */
1287 1.19 veego maxpix = 110000000;
1288 1.19 veego }
1289 1.5 chopps break;
1290 1.11 veego case 15:
1291 1.11 veego case 16:
1292 1.19 veego if (cl_64bit == 1)
1293 1.19 veego maxpix = 85000000;
1294 1.19 veego else
1295 1.19 veego maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3);
1296 1.5 chopps break;
1297 1.11 veego case 24:
1298 1.19 veego if ((cltype == PICASSO) && (cl_64bit == 1))
1299 1.19 veego maxpix = 85000000;
1300 1.19 veego else
1301 1.19 veego maxpix = cl_maxpixelclock / 3;
1302 1.19 veego break;
1303 1.19 veego case 32:
1304 1.19 veego if ((cltype == PICCOLO) && (cl_64bit == 1))
1305 1.19 veego maxpix = 50000000;
1306 1.19 veego else
1307 1.19 veego maxpix = 0;
1308 1.5 chopps break;
1309 1.1 chopps default:
1310 1.20 veego printf("grfcl: Illegal depth in mode %d\n",
1311 1.20 veego (int) gv->mode_num);
1312 1.5 chopps return (0);
1313 1.1 chopps }
1314 1.20 veego
1315 1.20 veego if (gv->pixel_clock > maxpix) {
1316 1.20 veego printf("grfcl: Pixelclock too high in mode %d\n",
1317 1.20 veego (int) gv->mode_num);
1318 1.5 chopps return (0);
1319 1.20 veego }
1320 1.20 veego
1321 1.20 veego if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) {
1322 1.20 veego printf("grfcl: sync-on-green is not supported\n");
1323 1.20 veego return (0);
1324 1.20 veego }
1325 1.20 veego
1326 1.5 chopps return (1);
1327 1.1 chopps }
1328 1.1 chopps
1329 1.1 chopps int
1330 1.42 dsl cl_load_mon(struct grf_softc *gp, struct grfcltext_mode *md)
1331 1.1 chopps {
1332 1.1 chopps struct grfvideo_mode *gv;
1333 1.1 chopps struct grfinfo *gi;
1334 1.39 he volatile void *ba, *fb;
1335 1.19 veego unsigned char num0, denom0, clkdoub;
1336 1.5 chopps unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
1337 1.5 chopps VSE, VT;
1338 1.49 christos int clkmul, clkmode;
1339 1.20 veego int vmul;
1340 1.11 veego int sr15;
1341 1.20 veego unsigned char hvsync_pulse;
1342 1.20 veego char TEXT;
1343 1.1 chopps
1344 1.1 chopps /* identity */
1345 1.1 chopps gv = &md->gv;
1346 1.1 chopps TEXT = (gv->depth == 4);
1347 1.1 chopps
1348 1.1 chopps if (!cl_mondefok(gv)) {
1349 1.20 veego printf("grfcl: Monitor definition not ok\n");
1350 1.5 chopps return (0);
1351 1.1 chopps }
1352 1.20 veego
1353 1.1 chopps ba = gp->g_regkva;
1354 1.1 chopps fb = gp->g_fbkva;
1355 1.1 chopps
1356 1.37 wiz /* provide all needed information in grf device-independent locations */
1357 1.38 christos gp->g_data = (void *) gv;
1358 1.1 chopps gi = &gp->g_display;
1359 1.39 he gi->gd_regaddr = (void *) kvtop(__UNVOLATILE(ba));
1360 1.5 chopps gi->gd_regsize = 64 * 1024;
1361 1.39 he gi->gd_fbaddr = (void *) kvtop(__UNVOLATILE(fb));
1362 1.5 chopps gi->gd_fbsize = cl_fbsize;
1363 1.5 chopps gi->gd_colors = 1 << gv->depth;
1364 1.5 chopps gi->gd_planes = gv->depth;
1365 1.5 chopps gi->gd_fbwidth = gv->disp_width;
1366 1.5 chopps gi->gd_fbheight = gv->disp_height;
1367 1.5 chopps gi->gd_fbx = 0;
1368 1.5 chopps gi->gd_fby = 0;
1369 1.1 chopps if (TEXT) {
1370 1.5 chopps gi->gd_dwidth = md->fx * md->cols;
1371 1.5 chopps gi->gd_dheight = md->fy * md->rows;
1372 1.1 chopps } else {
1373 1.5 chopps gi->gd_dwidth = gv->disp_width;
1374 1.5 chopps gi->gd_dheight = gv->disp_height;
1375 1.1 chopps }
1376 1.5 chopps gi->gd_dx = 0;
1377 1.5 chopps gi->gd_dy = 0;
1378 1.1 chopps
1379 1.1 chopps /* get display mode parameters */
1380 1.1 chopps
1381 1.1 chopps HBS = gv->hblank_start;
1382 1.1 chopps HSS = gv->hsync_start;
1383 1.1 chopps HSE = gv->hsync_stop;
1384 1.20 veego HBE = gv->htotal - 1;
1385 1.5 chopps HT = gv->htotal;
1386 1.1 chopps VBS = gv->vblank_start;
1387 1.1 chopps VSS = gv->vsync_start;
1388 1.1 chopps VSE = gv->vsync_stop;
1389 1.20 veego VBE = gv->vtotal - 1;
1390 1.5 chopps VT = gv->vtotal;
1391 1.1 chopps
1392 1.5 chopps if (TEXT)
1393 1.5 chopps HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
1394 1.1 chopps else
1395 1.5 chopps HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */
1396 1.5 chopps VDE = gv->disp_height - 1;
1397 1.1 chopps
1398 1.1 chopps /* adjustments */
1399 1.19 veego switch (gv->depth) {
1400 1.19 veego case 8:
1401 1.19 veego clkmul = 1;
1402 1.19 veego clkmode = 0x0;
1403 1.19 veego break;
1404 1.19 veego case 15:
1405 1.19 veego case 16:
1406 1.19 veego clkmul = 1;
1407 1.19 veego clkmode = 0x6;
1408 1.19 veego break;
1409 1.19 veego case 24:
1410 1.19 veego if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */
1411 1.19 veego clkmul = 1;
1412 1.19 veego else
1413 1.19 veego clkmul = 3;
1414 1.19 veego clkmode = 0x4;
1415 1.19 veego break;
1416 1.19 veego case 32:
1417 1.19 veego clkmul = 1;
1418 1.19 veego clkmode = 0x8;
1419 1.19 veego break;
1420 1.19 veego default:
1421 1.19 veego clkmul = 1;
1422 1.19 veego clkmode = 0x0;
1423 1.19 veego break;
1424 1.19 veego }
1425 1.1 chopps
1426 1.20 veego if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) {
1427 1.19 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7);
1428 1.20 veego } else
1429 1.19 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
1430 1.19 veego
1431 1.20 veego vmul = 2;
1432 1.20 veego if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE))
1433 1.20 veego vmul = 1;
1434 1.20 veego if (gv->disp_flags & GRF_FLAGS_DBLSCAN)
1435 1.20 veego vmul = 4;
1436 1.20 veego
1437 1.20 veego VDE = VDE * vmul / 2;
1438 1.20 veego VBS = VBS * vmul / 2;
1439 1.20 veego VSS = VSS * vmul / 2;
1440 1.20 veego VSE = VSE * vmul / 2;
1441 1.20 veego VBE = VBE * vmul / 2;
1442 1.20 veego VT = VT * vmul / 2;
1443 1.20 veego
1444 1.1 chopps WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
1445 1.19 veego if (cl_64bit == 1) {
1446 1.11 veego if (TEXT || (gv->depth == 1))
1447 1.19 veego sr15 = 0xd0;
1448 1.11 veego else
1449 1.11 veego sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
1450 1.11 veego WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
1451 1.11 veego } else {
1452 1.17 veego sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0;
1453 1.19 veego sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f;
1454 1.11 veego }
1455 1.11 veego WSeq(ba, SEQ_ID_DRAM_CNTL, sr15);
1456 1.5 chopps WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1457 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
1458 1.5 chopps WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
1459 1.1 chopps
1460 1.1 chopps /* Set clock */
1461 1.1 chopps
1462 1.19 veego cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub);
1463 1.19 veego
1464 1.20 veego /* Horizontal/Vertical Sync Pulse */
1465 1.20 veego hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R);
1466 1.20 veego if (gv->disp_flags & GRF_FLAGS_PHSYNC)
1467 1.20 veego hvsync_pulse &= ~0x40;
1468 1.20 veego else
1469 1.20 veego hvsync_pulse |= 0x40;
1470 1.20 veego if (gv->disp_flags & GRF_FLAGS_PVSYNC)
1471 1.20 veego hvsync_pulse &= ~0x80;
1472 1.20 veego else
1473 1.20 veego hvsync_pulse |= 0x80;
1474 1.20 veego vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse);
1475 1.20 veego
1476 1.19 veego if (clkdoub) {
1477 1.19 veego HDE /= 2;
1478 1.19 veego HBS /= 2;
1479 1.19 veego HSS /= 2;
1480 1.19 veego HSE /= 2;
1481 1.19 veego HBE /= 2;
1482 1.19 veego HT /= 2;
1483 1.19 veego clkmode = 0x6;
1484 1.19 veego }
1485 1.19 veego
1486 1.11 veego WSeq(ba, SEQ_ID_VCLK_3_NUM, num0);
1487 1.11 veego WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0);
1488 1.1 chopps
1489 1.1 chopps /* load display parameters into board */
1490 1.1 chopps
1491 1.1 chopps WCrt(ba, CRT_ID_HOR_TOTAL, HT);
1492 1.5 chopps WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
1493 1.1 chopps WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
1494 1.5 chopps WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */
1495 1.1 chopps WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
1496 1.1 chopps WCrt(ba, CRT_ID_END_HOR_RETR,
1497 1.5 chopps (HSE & 0x1f) |
1498 1.5 chopps ((HBE & 0x20) ? 0x80 : 0x00));
1499 1.1 chopps WCrt(ba, CRT_ID_VER_TOTAL, VT);
1500 1.1 chopps WCrt(ba, CRT_ID_OVERFLOW,
1501 1.1 chopps 0x10 |
1502 1.5 chopps ((VT & 0x100) ? 0x01 : 0x00) |
1503 1.1 chopps ((VDE & 0x100) ? 0x02 : 0x00) |
1504 1.1 chopps ((VSS & 0x100) ? 0x04 : 0x00) |
1505 1.1 chopps ((VBS & 0x100) ? 0x08 : 0x00) |
1506 1.5 chopps ((VT & 0x200) ? 0x20 : 0x00) |
1507 1.1 chopps ((VDE & 0x200) ? 0x40 : 0x00) |
1508 1.5 chopps ((VSS & 0x200) ? 0x80 : 0x00));
1509 1.1 chopps
1510 1.1 chopps WCrt(ba, CRT_ID_CHAR_HEIGHT,
1511 1.5 chopps 0x40 | /* TEXT ? 0x00 ??? */
1512 1.20 veego ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) |
1513 1.1 chopps ((VBS & 0x200) ? 0x20 : 0x00) |
1514 1.5 chopps (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
1515 1.1 chopps
1516 1.1 chopps /* text cursor */
1517 1.1 chopps
1518 1.1 chopps if (TEXT) {
1519 1.5 chopps #if CL_ULCURSOR
1520 1.1 chopps WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
1521 1.1 chopps WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
1522 1.1 chopps #else
1523 1.1 chopps WCrt(ba, CRT_ID_CURSOR_START, 0x00);
1524 1.1 chopps WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
1525 1.1 chopps #endif
1526 1.9 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f);
1527 1.1 chopps
1528 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
1529 1.5 chopps WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
1530 1.1 chopps }
1531 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
1532 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
1533 1.1 chopps
1534 1.1 chopps WCrt(ba, CRT_ID_START_VER_RETR, VSS);
1535 1.14 thorpej WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20);
1536 1.1 chopps WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
1537 1.1 chopps WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
1538 1.1 chopps WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
1539 1.1 chopps
1540 1.1 chopps WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
1541 1.5 chopps WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */
1542 1.1 chopps WCrt(ba, CRT_ID_LACE_CNTL,
1543 1.20 veego ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) |
1544 1.1 chopps ((HBE & 0x40) ? 0x10 : 0x00) |
1545 1.1 chopps ((HBE & 0x80) ? 0x20 : 0x00) |
1546 1.1 chopps ((VBE & 0x100) ? 0x40 : 0x00) |
1547 1.5 chopps ((VBE & 0x200) ? 0x80 : 0x00));
1548 1.1 chopps
1549 1.5 chopps WGfx(ba, GCT_ID_GRAPHICS_MODE,
1550 1.1 chopps ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
1551 1.1 chopps WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
1552 1.1 chopps
1553 1.5 chopps WSeq(ba, SEQ_ID_EXT_SEQ_MODE,
1554 1.5 chopps ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) |
1555 1.19 veego ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode);
1556 1.6 is
1557 1.6 is /* write 0x00 to VDAC_MASK before accessing HDR this helps
1558 1.6 is sometimes, out of "secret" application note (crest) */
1559 1.6 is vgaw(ba, VDAC_MASK, 0);
1560 1.6 is /* reset HDR "magic" access counter (crest) */
1561 1.6 is vgar(ba, VDAC_ADDRESS);
1562 1.6 is
1563 1.1 chopps delay(200000);
1564 1.1 chopps vgar(ba, VDAC_MASK);
1565 1.1 chopps delay(200000);
1566 1.1 chopps vgar(ba, VDAC_MASK);
1567 1.1 chopps delay(200000);
1568 1.1 chopps vgar(ba, VDAC_MASK);
1569 1.1 chopps delay(200000);
1570 1.1 chopps vgar(ba, VDAC_MASK);
1571 1.1 chopps delay(200000);
1572 1.1 chopps switch (gv->depth) {
1573 1.11 veego case 1:
1574 1.11 veego case 4: /* text */
1575 1.1 chopps vgaw(ba, VDAC_MASK, 0);
1576 1.1 chopps HDE = gv->disp_width / 16;
1577 1.1 chopps break;
1578 1.11 veego case 8:
1579 1.27 aymeric if (clkdoub)
1580 1.19 veego vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */
1581 1.19 veego else
1582 1.19 veego vgaw(ba, VDAC_MASK, 0);
1583 1.1 chopps HDE = gv->disp_width / 8;
1584 1.1 chopps break;
1585 1.11 veego case 15:
1586 1.1 chopps vgaw(ba, VDAC_MASK, 0xd0);
1587 1.1 chopps HDE = gv->disp_width / 4;
1588 1.1 chopps break;
1589 1.11 veego case 16:
1590 1.5 chopps vgaw(ba, VDAC_MASK, 0xc1);
1591 1.1 chopps HDE = gv->disp_width / 4;
1592 1.1 chopps break;
1593 1.11 veego case 24:
1594 1.5 chopps vgaw(ba, VDAC_MASK, 0xc5);
1595 1.1 chopps HDE = (gv->disp_width / 8) * 3;
1596 1.1 chopps break;
1597 1.19 veego case 32:
1598 1.19 veego vgaw(ba, VDAC_MASK, 0xc5);
1599 1.19 veego HDE = (gv->disp_width / 4);
1600 1.19 veego break;
1601 1.1 chopps }
1602 1.6 is
1603 1.6 is /* reset HDR "magic" access counter (crest) */
1604 1.6 is vgar(ba, VDAC_ADDRESS);
1605 1.6 is /* then enable all bit in VDAC_MASK afterwards (crest) */
1606 1.6 is vgaw(ba, VDAC_MASK, 0xff);
1607 1.1 chopps
1608 1.5 chopps WCrt(ba, CRT_ID_OFFSET, HDE);
1609 1.19 veego if (cl_64bit == 1) {
1610 1.11 veego WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
1611 1.11 veego WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
1612 1.11 veego }
1613 1.5 chopps WCrt(ba, CRT_ID_EXT_DISP_CNTL,
1614 1.1 chopps ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) |
1615 1.5 chopps 0x22 |
1616 1.19 veego ((HDE > 0xff) ? 0x10 : 0x00));
1617 1.1 chopps
1618 1.1 chopps WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
1619 1.5 chopps WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
1620 1.1 chopps (gv->depth == 1) ? 0x01 : 0x0f);
1621 1.1 chopps
1622 1.1 chopps /* text initialization */
1623 1.1 chopps
1624 1.1 chopps if (TEXT) {
1625 1.1 chopps cl_inittextmode(gp);
1626 1.1 chopps }
1627 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14);
1628 1.1 chopps WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
1629 1.1 chopps
1630 1.1 chopps /* Pass-through */
1631 1.1 chopps
1632 1.1 chopps RegOffpass(ba);
1633 1.1 chopps
1634 1.5 chopps return (1);
1635 1.1 chopps }
1636 1.1 chopps
1637 1.1 chopps void
1638 1.42 dsl cl_inittextmode(struct grf_softc *gp)
1639 1.1 chopps {
1640 1.5 chopps struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data;
1641 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
1642 1.39 he unsigned char *fb = __UNVOLATILE(gp->g_fbkva);
1643 1.1 chopps unsigned char *c, *f, y;
1644 1.1 chopps unsigned short z;
1645 1.1 chopps
1646 1.1 chopps
1647 1.5 chopps /* load text font into beginning of display memory. Each character
1648 1.5 chopps * cell is 32 bytes long (enough for 4 planes) */
1649 1.1 chopps
1650 1.1 chopps SetTextPlane(ba, 0x02);
1651 1.5 chopps cl_memset(fb, 0, 256 * 32);
1652 1.5 chopps c = (unsigned char *) (fb) + (32 * tm->fdstart);
1653 1.1 chopps f = tm->fdata;
1654 1.5 chopps for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
1655 1.5 chopps for (y = 0; y < tm->fy; y++)
1656 1.1 chopps *c++ = *f++;
1657 1.1 chopps
1658 1.1 chopps /* clear out text/attr planes (three screens worth) */
1659 1.1 chopps
1660 1.1 chopps SetTextPlane(ba, 0x01);
1661 1.5 chopps cl_memset(fb, 0x07, tm->cols * tm->rows * 3);
1662 1.1 chopps SetTextPlane(ba, 0x00);
1663 1.5 chopps cl_memset(fb, 0x20, tm->cols * tm->rows * 3);
1664 1.1 chopps
1665 1.1 chopps /* print out a little init msg */
1666 1.1 chopps
1667 1.5 chopps c = (unsigned char *) (fb) + (tm->cols - 16);
1668 1.1 chopps strcpy(c, "CIRRUS");
1669 1.1 chopps c[6] = 0x20;
1670 1.1 chopps
1671 1.1 chopps /* set colors (B&W) */
1672 1.1 chopps
1673 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, 0);
1674 1.5 chopps for (z = 0; z < 256; z++) {
1675 1.1 chopps unsigned char r, g, b;
1676 1.1 chopps
1677 1.1 chopps y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1678 1.1 chopps
1679 1.1 chopps if (cltype == PICASSO) {
1680 1.1 chopps r = clconscolors[y][0];
1681 1.1 chopps g = clconscolors[y][1];
1682 1.1 chopps b = clconscolors[y][2];
1683 1.1 chopps } else {
1684 1.1 chopps b = clconscolors[y][0];
1685 1.1 chopps g = clconscolors[y][1];
1686 1.1 chopps r = clconscolors[y][2];
1687 1.1 chopps }
1688 1.1 chopps vgaw(ba, VDAC_DATA, r >> 2);
1689 1.1 chopps vgaw(ba, VDAC_DATA, g >> 2);
1690 1.1 chopps vgaw(ba, VDAC_DATA, b >> 2);
1691 1.1 chopps }
1692 1.1 chopps }
1693 1.1 chopps
1694 1.1 chopps void
1695 1.42 dsl cl_memset(unsigned char *d, unsigned char c, int l)
1696 1.1 chopps {
1697 1.5 chopps for (; l > 0; l--)
1698 1.1 chopps *d++ = c;
1699 1.1 chopps }
1700 1.14 thorpej
1701 1.19 veego /*
1702 1.19 veego * Special wakeup/passthrough registers on graphics boards
1703 1.14 thorpej *
1704 1.14 thorpej * The methods have diverged a bit for each board, so
1705 1.14 thorpej * WPass(P) has been converted into a set of specific
1706 1.14 thorpej * inline functions.
1707 1.14 thorpej */
1708 1.14 thorpej static void
1709 1.42 dsl RegWakeup(volatile void *ba)
1710 1.14 thorpej {
1711 1.14 thorpej
1712 1.14 thorpej switch (cltype) {
1713 1.14 thorpej case SPECTRUM:
1714 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, 0x1f);
1715 1.14 thorpej break;
1716 1.14 thorpej case PICASSO:
1717 1.19 veego /* Picasso needs no wakeup */
1718 1.14 thorpej break;
1719 1.14 thorpej case PICCOLO:
1720 1.19 veego if (cl_64bit == 1)
1721 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, 0x1f);
1722 1.14 thorpej else
1723 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10);
1724 1.14 thorpej break;
1725 1.14 thorpej }
1726 1.14 thorpej delay(200000);
1727 1.14 thorpej }
1728 1.14 thorpej
1729 1.14 thorpej static void
1730 1.42 dsl RegOnpass(volatile void *ba)
1731 1.14 thorpej {
1732 1.14 thorpej
1733 1.14 thorpej switch (cltype) {
1734 1.14 thorpej case SPECTRUM:
1735 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, 0x4f);
1736 1.14 thorpej break;
1737 1.14 thorpej case PICASSO:
1738 1.19 veego if (cl_64bit == 0)
1739 1.19 veego vgaw(ba, PASS_ADDRESS_WP, 0x01);
1740 1.14 thorpej break;
1741 1.14 thorpej case PICCOLO:
1742 1.19 veego if (cl_64bit == 1)
1743 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, 0x4f);
1744 1.14 thorpej else
1745 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf);
1746 1.14 thorpej break;
1747 1.14 thorpej }
1748 1.30 matt cl_pass_toggle = 1;
1749 1.14 thorpej delay(200000);
1750 1.14 thorpej }
1751 1.14 thorpej
1752 1.14 thorpej static void
1753 1.42 dsl RegOffpass(volatile void *ba)
1754 1.14 thorpej {
1755 1.14 thorpej
1756 1.14 thorpej switch (cltype) {
1757 1.14 thorpej case SPECTRUM:
1758 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, 0x6f);
1759 1.14 thorpej break;
1760 1.14 thorpej case PICASSO:
1761 1.19 veego if (cl_64bit == 0)
1762 1.19 veego vgaw(ba, PASS_ADDRESS_W, 0xff);
1763 1.14 thorpej break;
1764 1.14 thorpej case PICCOLO:
1765 1.19 veego if (cl_64bit == 1)
1766 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, 0x6f);
1767 1.14 thorpej else
1768 1.14 thorpej vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20);
1769 1.14 thorpej break;
1770 1.14 thorpej }
1771 1.30 matt cl_pass_toggle = 0;
1772 1.14 thorpej delay(200000);
1773 1.14 thorpej }
1774 1.14 thorpej
1775 1.5 chopps #endif /* NGRFCL */
1776