grf_cl.c revision 1.19.2.2
1 /* $NetBSD: grf_cl.c,v 1.19.2.2 1997/03/05 22:46:33 veego Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "grfcl.h" 37 #if NGRFCL > 0 38 39 /* 40 * Graphics routines for Cirrus CL GD 5426 boards, 41 * 42 * This code offers low-level routines to access Cirrus Cl GD 5426 43 * graphics-boards from within NetBSD for the Amiga. 44 * No warranties for any kind of function at all - this 45 * code may crash your hardware and scratch your harddisk. Use at your 46 * own risk. Freely distributable. 47 * 48 * Modified for Cirrus CL GD 5426 from 49 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 50 * Contributions by Ill, ScottE, MiL 51 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 52 * Picasso/040 patches (wee!) by crest 01/96 53 * 54 * PicassoIV support bz Klaus "crest" Burkert. 55 * Fixed interlace and doublescan, added clockdoubling and 56 * HiColor&TrueColor suuport by crest 01/97 57 * 58 * Thanks to Village Tronic Marketing Gmbh for providing me with 59 * a Picasso-II board. 60 * Thanks for Integrated Electronics Oy Ab for providing me with 61 * Cirrus CL GD 542x family documentation. 62 * 63 * TODO: 64 * Mouse support (almost there! :-)) 65 * Blitter support 66 * 67 */ 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/errno.h> 72 #include <sys/ioctl.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 76 #include <machine/cpu.h> 77 #include <dev/cons.h> 78 #include <amiga/dev/itevar.h> 79 #include <amiga/amiga/device.h> 80 #include <amiga/dev/grfioctl.h> 81 #include <amiga/dev/grfvar.h> 82 #include <amiga/dev/grf_clreg.h> 83 #include <amiga/dev/zbusvar.h> 84 85 int cl_mondefok __P((struct grfvideo_mode *)); 86 void cl_boardinit __P((struct grf_softc *)); 87 static void cl_CompFQ __P((u_int, u_char *, u_char *, u_char *)); 88 int cl_getvmode __P((struct grf_softc *, struct grfvideo_mode *)); 89 int cl_setvmode __P((struct grf_softc *, unsigned int)); 90 int cl_toggle __P((struct grf_softc *, unsigned short)); 91 int cl_getcmap __P((struct grf_softc *, struct grf_colormap *)); 92 int cl_putcmap __P((struct grf_softc *, struct grf_colormap *)); 93 #ifndef CL5426CONSOLE 94 void cl_off __P((struct grf_softc *)); 95 #endif 96 void cl_inittextmode __P((struct grf_softc *)); 97 int cl_ioctl __P((register struct grf_softc *, u_long, void *)); 98 int cl_getmousepos __P((struct grf_softc *, struct grf_position *)); 99 int cl_setmousepos __P((struct grf_softc *, struct grf_position *)); 100 static int cl_setspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 101 int cl_getspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 102 static int cl_getspritemax __P((struct grf_softc *, struct grf_position *)); 103 int cl_blank __P((struct grf_softc *, int *)); 104 int cl_setmonitor __P((struct grf_softc *, struct grfvideo_mode *)); 105 void cl_writesprpos __P((volatile char *, short, short)); 106 void writeshifted __P((volatile char *, char, char)); 107 108 static void RegWakeup __P((volatile caddr_t)); 109 static void RegOnpass __P((volatile caddr_t)); 110 static void RegOffpass __P((volatile caddr_t)); 111 112 void grfclattach __P((struct device *, struct device *, void *)); 113 int grfclprint __P((void *, const char *)); 114 int grfclmatch __P((struct device *, struct cfdata *, void *)); 115 void cl_memset __P((unsigned char *, unsigned char, int)); 116 117 /* Graphics display definitions. 118 * These are filled by 'grfconfig' using GRFIOCSETMON. 119 */ 120 #define monitor_def_max 8 121 static struct grfvideo_mode monitor_def[8] = { 122 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 123 }; 124 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 125 126 /* Patchable maximum pixel clock */ 127 unsigned long cl_maxpixelclock = 86000000; 128 129 /* Console display definition. 130 * Default hardcoded text mode. This grf_cl is set up to 131 * use one text mode only, and this is it. You may use 132 * grfconfig to change the mode after boot. 133 */ 134 /* Console font */ 135 #ifdef KFONT_8X11 136 #define CIRRUSFONT kernel_font_8x11 137 #define CIRRUSFONTY 11 138 #else 139 #define CIRRUSFONT kernel_font_8x8 140 #define CIRRUSFONTY 8 141 #endif 142 extern unsigned char CIRRUSFONT[]; 143 144 struct grfcltext_mode clconsole_mode = { 145 {255, "", 25200000, 640, 480, 4, 80, 100, 94, 99, 100, 481, 522, 490, 146 498, 522}, 147 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 148 }; 149 /* Console colors */ 150 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 151 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 152 }; 153 154 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 155 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 156 unsigned char pass_toggle; /* passthru status tracker */ 157 158 /* 159 * because all 542x-boards have 2 configdev entries, one for 160 * framebuffer mem and the other for regs, we have to hold onto 161 * the pointers globally until we match on both. This and 'cltype' 162 * are the primary obsticles to multiple board support, but if you 163 * have multiple boards you have bigger problems than grf_cl. 164 */ 165 static void *cl_fbaddr = 0; /* framebuffer */ 166 static void *cl_regaddr = 0; /* registers */ 167 static int cl_fbsize; /* framebuffer size */ 168 static int cl_fbautosize; /* framebuffer autoconfig size */ 169 170 171 /* 172 * current sprite info, if you add support for multiple boards 173 * make this an array or something 174 */ 175 struct grf_spriteinfo cl_cursprite; 176 177 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 178 * you add multiple board support 179 */ 180 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 181 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 182 183 /* standard driver stuff */ 184 struct cfattach grfcl_ca = { 185 sizeof(struct grf_softc), grfclmatch, grfclattach 186 }; 187 188 struct cfdriver grfcl_cd = { 189 NULL, "grfcl", DV_DULL, NULL, 0 190 }; 191 static struct cfdata *cfdata; 192 193 int 194 grfclmatch(pdp, cfp, auxp) 195 struct device *pdp; 196 struct cfdata *cfp; 197 void *auxp; 198 { 199 struct zbus_args *zap; 200 static int regprod, fbprod, fbprod2; 201 int error; 202 203 fbprod2 = 0; 204 zap = auxp; 205 206 #ifndef CL5426CONSOLE 207 if (amiga_realconfig == 0) 208 return (0); 209 #endif 210 211 /* Grab the first board we encounter as the preferred one. This will 212 * allow one board to work in a multiple 5426 board system, but not 213 * multiple boards at the same time. */ 214 if (cltype == 0) { 215 switch (zap->manid) { 216 case PICASSO: 217 switch (zap->prodid) { 218 case 11: 219 case 12: 220 regprod = 12; 221 fbprod = 11; 222 error = 0; 223 break; 224 case 22: 225 fbprod2 = 22; 226 error = 0; 227 break; 228 case 21: 229 case 23: 230 regprod = 23; 231 fbprod = 21; 232 cl_64bit = 1; 233 error = 0; 234 break; 235 case 24: 236 regprod = 24; 237 fbprod = 24; 238 cl_64bit = 1; 239 error = 0; 240 break; 241 default: 242 error = 1; 243 break; 244 } 245 if (error == 1) 246 return (0); 247 else 248 break; 249 case SPECTRUM: 250 if (zap->prodid != 2 && zap->prodid != 1) 251 return (0); 252 regprod = 2; 253 fbprod = 1; 254 break; 255 case PICCOLO: 256 switch (zap->prodid) { 257 case 5: 258 case 6: 259 regprod = 6; 260 fbprod = 5; 261 error = 0; 262 break; 263 case 10: 264 case 11: 265 regprod = 11; 266 fbprod = 10; 267 cl_64bit = 1; 268 error = 0; 269 break; 270 default: 271 error = 1; 272 break; 273 } 274 if (error == 1) 275 return (0); 276 else 277 break; 278 default: 279 return (0); 280 } 281 cltype = zap->manid; 282 } else { 283 if (cltype != zap->manid) { 284 return (0); 285 } 286 } 287 288 /* Configure either registers or framebuffer in any order */ 289 if ((cltype == PICASSO) && (cl_64bit == 1)) { 290 switch (zap->prodid) { 291 case 21: 292 cl_fbaddr = zap->va; 293 cl_fbautosize = zap->size; 294 break; 295 case 22: 296 cl_fbautosize += zap->size; 297 break; 298 case 23: 299 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 300 break; 301 case 24: 302 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 303 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 304 cl_fbautosize = 0x400000; 305 break; 306 default: 307 return (0); 308 } 309 } 310 else { 311 if (zap->prodid == regprod) 312 cl_regaddr = zap->va; 313 else 314 if (zap->prodid == fbprod) { 315 cl_fbaddr = zap->va; 316 cl_fbautosize = zap->size; 317 } else 318 return (0); 319 } 320 321 #ifdef CL5426CONSOLE 322 if (amiga_realconfig == 0) { 323 cfdata = cfp; 324 } 325 #endif 326 327 return (1); 328 } 329 330 void 331 grfclattach(pdp, dp, auxp) 332 struct device *pdp, *dp; 333 void *auxp; 334 { 335 static struct grf_softc congrf; 336 struct zbus_args *zap; 337 struct grf_softc *gp; 338 static char attachflag = 0; 339 340 zap = auxp; 341 342 printf("\n"); 343 344 /* make sure both halves have matched */ 345 if (!cl_regaddr || !cl_fbaddr) 346 return; 347 348 /* do all that messy console/grf stuff */ 349 if (dp == NULL) 350 gp = &congrf; 351 else 352 gp = (struct grf_softc *) dp; 353 354 if (dp != NULL && congrf.g_regkva != 0) { 355 /* 356 * inited earlier, just copy (not device struct) 357 */ 358 bcopy(&congrf.g_display, &gp->g_display, 359 (char *) &gp[1] - (char *) &gp->g_display); 360 } else { 361 gp->g_regkva = (volatile caddr_t) cl_regaddr; 362 gp->g_fbkva = (volatile caddr_t) cl_fbaddr; 363 364 gp->g_unit = GRF_CL5426_UNIT; 365 gp->g_mode = cl_mode; 366 gp->g_conpri = grfcl_cnprobe(); 367 gp->g_flags = GF_ALIVE; 368 369 /* wakeup the board */ 370 cl_boardinit(gp); 371 #ifdef CL5426CONSOLE 372 grfcl_iteinit(gp); 373 (void) cl_load_mon(gp, &clconsole_mode); 374 #endif 375 376 } 377 378 /* 379 * attach grf (once) 380 */ 381 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 382 attachflag = 1; 383 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 384 switch (cltype) { 385 case PICASSO: 386 if (cl_64bit == 1) { 387 printf("Picasso IV"); 388 /* 135MHz will be supported if we 389 * have a palette doubling mode. 390 */ 391 cl_maxpixelclock = 86000000; 392 } 393 else { 394 printf("Picasso II"); 395 396 /* check for PicassoII+ (crest) */ 397 if(zap->serno == 0x00100000) 398 printf("+"); 399 400 /* determine used Gfx/chipset (crest) */ 401 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 402 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 403 case 0x24: 404 printf(" (with CL-GD5426)"); 405 break; 406 case 0x26: 407 printf(" (with CL-GD5428)"); 408 break; 409 case 0x27: 410 printf(" (with CL-GD5429)"); 411 break; 412 } 413 cl_maxpixelclock = 86000000; 414 } 415 break; 416 case SPECTRUM: 417 printf("Spectrum"); 418 cl_maxpixelclock = 90000000; 419 break; 420 case PICCOLO: 421 if (cl_64bit == 1) { 422 printf("Piccolo SD64"); 423 /* 110MHz will be supported if we 424 * have a palette doubling mode. 425 */ 426 cl_maxpixelclock = 90000000; 427 } else { 428 printf("Piccolo"); 429 cl_maxpixelclock = 90000000; 430 } 431 break; 432 } 433 printf(" being used\n"); 434 #ifdef CL_OVERCLOCK 435 cl_maxpixelclock = 115000000; 436 #endif 437 } else { 438 if (!attachflag) 439 printf("grfcl unattached!!\n"); 440 } 441 } 442 443 int 444 grfclprint(auxp, pnp) 445 void *auxp; 446 const char *pnp; 447 { 448 if (pnp) 449 printf("ite at %s: ", pnp); 450 return (UNCONF); 451 } 452 453 void 454 cl_boardinit(gp) 455 struct grf_softc *gp; 456 { 457 unsigned char *ba = gp->g_regkva; 458 int x; 459 460 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 461 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 462 delay(200000); /* wait some time (two frames as of now) */ 463 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 464 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 465 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 466 cl_fbsize = cl_fbautosize; 467 } else { 468 469 /* wakeup board and flip passthru OFF */ 470 RegWakeup(ba); 471 RegOnpass(ba); 472 473 vgaw(ba, 0x46e8, 0x16); 474 vgaw(ba, 0x102, 1); 475 vgaw(ba, 0x46e8, 0x0e); 476 if (cl_64bit != 1) 477 vgaw(ba, 0x3c3, 1); 478 479 cl_fbsize = cl_fbautosize; 480 481 /* setup initial unchanging parameters */ 482 483 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 484 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 485 486 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 487 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 488 489 if (cl_64bit == 1) { 490 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 491 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 492 } else { 493 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 494 } 495 WSeq(ba, SEQ_ID_RESET, 0x03); 496 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 497 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 498 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 499 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 500 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 501 if (cl_64bit == 1) 502 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 503 else 504 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 505 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 506 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 507 508 if (cl_64bit == 1) 509 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 510 else 511 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 512 513 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 514 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 515 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 516 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 517 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 518 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 519 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 520 521 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 522 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 523 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 524 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 525 if (cl_64bit == 1) { 526 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 527 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 528 } 529 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 530 531 WGfx(ba, GCT_ID_SET_RESET, 0x00); 532 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 533 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 534 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 535 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 536 WGfx(ba, GCT_ID_MISC, 0x01); 537 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 538 WGfx(ba, GCT_ID_BITMASK, 0xff); 539 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 540 541 for (x = 0; x < 0x10; x++) 542 WAttr(ba, x, x); 543 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 544 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 545 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 546 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 547 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 548 WAttr(ba, 0x34, 0x00); 549 550 vgaw(ba, VDAC_MASK, 0xff); 551 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 552 553 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 554 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 555 } 556 557 /* colors initially set to greyscale */ 558 vgaw(ba, VDAC_ADDRESS_W, 0); 559 for (x = 255; x >= 0; x--) { 560 vgaw(ba, VDAC_DATA, x); 561 vgaw(ba, VDAC_DATA, x); 562 vgaw(ba, VDAC_DATA, x); 563 } 564 /* set sprite bitmap pointers */ 565 cl_cursprite.image = cl_imageptr; 566 cl_cursprite.mask = cl_maskptr; 567 cl_cursprite.cmap.red = cl_sprred; 568 cl_cursprite.cmap.green = cl_sprgreen; 569 cl_cursprite.cmap.blue = cl_sprblue; 570 571 if (cl_64bit == 0) { 572 573 /* check for 1MB or 2MB board (crest) */ 574 volatile unsigned long *cl_fbtestaddr; 575 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 576 577 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 578 *cl_fbtestaddr = 0x12345678; 579 580 if (*cl_fbtestaddr != 0x12345678) { 581 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 582 cl_fbsize = 0x100000; 583 } 584 else 585 { 586 cl_fbsize = 0x200000; 587 } 588 } 589 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 590 } 591 592 593 int 594 cl_getvmode(gp, vm) 595 struct grf_softc *gp; 596 struct grfvideo_mode *vm; 597 { 598 struct grfvideo_mode *gv; 599 600 #ifdef CL5426CONSOLE 601 /* Handle grabbing console mode */ 602 if (vm->mode_num == 255) { 603 bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode)); 604 /* XXX so grfconfig can tell us the correct text dimensions. */ 605 vm->depth = clconsole_mode.fy; 606 } else 607 #endif 608 { 609 if (vm->mode_num == 0) 610 vm->mode_num = (monitor_current - monitor_def) + 1; 611 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 612 return (EINVAL); 613 gv = monitor_def + (vm->mode_num - 1); 614 if (gv->mode_num == 0) 615 return (EINVAL); 616 617 bcopy(gv, vm, sizeof(struct grfvideo_mode)); 618 } 619 620 /* adjust internal values to pixel values */ 621 622 vm->hblank_start *= 8; 623 vm->hblank_stop *= 8; 624 vm->hsync_start *= 8; 625 vm->hsync_stop *= 8; 626 vm->htotal *= 8; 627 628 return (0); 629 } 630 631 632 int 633 cl_setvmode(gp, mode) 634 struct grf_softc *gp; 635 unsigned mode; 636 { 637 if (!mode || (mode > monitor_def_max) || 638 monitor_def[mode - 1].mode_num == 0) 639 return (EINVAL); 640 641 monitor_current = monitor_def + (mode - 1); 642 643 return (0); 644 } 645 646 #ifndef CL5426CONSOLE 647 void 648 cl_off(gp) 649 struct grf_softc *gp; 650 { 651 char *ba = gp->g_regkva; 652 653 /* 654 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 655 * on just in case it didn't work...but then it doesn't matter does 656 * it? =) 657 */ 658 RegOnpass(ba); 659 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 660 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 661 } 662 #endif 663 664 int 665 cl_blank(gp, on) 666 struct grf_softc *gp; 667 int *on; 668 { 669 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 670 return(0); 671 } 672 673 /* 674 * Change the mode of the display. 675 * Return a UNIX error number or 0 for success. 676 */ 677 int 678 cl_mode(gp, cmd, arg, a2, a3) 679 register struct grf_softc *gp; 680 u_long cmd; 681 void *arg; 682 u_long a2; 683 int a3; 684 { 685 int error; 686 687 switch (cmd) { 688 case GM_GRFON: 689 error = cl_load_mon(gp, 690 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 691 return (error); 692 693 case GM_GRFOFF: 694 #ifndef CL5426CONSOLE 695 cl_off(gp); 696 #else 697 cl_load_mon(gp, &clconsole_mode); 698 #endif 699 return (0); 700 701 case GM_GRFCONFIG: 702 return (0); 703 704 case GM_GRFGETVMODE: 705 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 706 707 case GM_GRFSETVMODE: 708 error = cl_setvmode(gp, *(unsigned *) arg); 709 if (!error && (gp->g_flags & GF_GRFON)) 710 cl_load_mon(gp, 711 (struct grfcltext_mode *) monitor_current); 712 return (error); 713 714 case GM_GRFGETNUMVM: 715 *(int *) arg = monitor_def_max; 716 return (0); 717 718 case GM_GRFIOCTL: 719 return (cl_ioctl(gp, a2, arg)); 720 721 default: 722 break; 723 } 724 725 return (EINVAL); 726 } 727 728 int 729 cl_ioctl(gp, cmd, data) 730 register struct grf_softc *gp; 731 u_long cmd; 732 void *data; 733 { 734 switch (cmd) { 735 case GRFIOCGSPRITEPOS: 736 return (cl_getmousepos(gp, (struct grf_position *) data)); 737 738 case GRFIOCSSPRITEPOS: 739 return (cl_setmousepos(gp, (struct grf_position *) data)); 740 741 case GRFIOCSSPRITEINF: 742 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 743 744 case GRFIOCGSPRITEINF: 745 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 746 747 case GRFIOCGSPRITEMAX: 748 return (cl_getspritemax(gp, (struct grf_position *) data)); 749 750 case GRFIOCGETCMAP: 751 return (cl_getcmap(gp, (struct grf_colormap *) data)); 752 753 case GRFIOCPUTCMAP: 754 return (cl_putcmap(gp, (struct grf_colormap *) data)); 755 756 case GRFIOCBITBLT: 757 break; 758 759 case GRFTOGGLE: 760 return (cl_toggle(gp, 0)); 761 762 case GRFIOCSETMON: 763 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 764 765 case GRFIOCBLANK: 766 return (cl_blank(gp, (int *)data)); 767 768 } 769 return (EINVAL); 770 } 771 772 int 773 cl_getmousepos(gp, data) 774 struct grf_softc *gp; 775 struct grf_position *data; 776 { 777 data->x = cl_cursprite.pos.x; 778 data->y = cl_cursprite.pos.y; 779 return (0); 780 } 781 782 void 783 cl_writesprpos(ba, x, y) 784 volatile char *ba; 785 short x; 786 short y; 787 { 788 /* we want to use a 16-bit write to 3c4 so no macros used */ 789 volatile unsigned char *cwp; 790 volatile unsigned short *wp; 791 792 cwp = ba + 0x3c4; 793 wp = (unsigned short *)cwp; 794 795 /* 796 * don't ask me why, but apparently you can't do a 16-bit write with 797 * x-position like with y-position below (dagge) 798 */ 799 cwp[0] = 0x10 | ((x << 5) & 0xff); 800 cwp[1] = (x >> 3) & 0xff; 801 802 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 803 } 804 805 void 806 writeshifted(to, shiftx, shifty) 807 volatile char *to; 808 char shiftx; 809 char shifty; 810 { 811 register char y; 812 unsigned long long *tptr, *iptr, *mptr, line; 813 814 tptr = (unsigned long long *) to; 815 iptr = (unsigned long long *) cl_cursprite.image; 816 mptr = (unsigned long long *) cl_cursprite.mask; 817 818 shiftx = shiftx < 0 ? 0 : shiftx; 819 shifty = shifty < 0 ? 0 : shifty; 820 821 /* start reading shifty lines down, and 822 * shift each line in by shiftx 823 */ 824 for (y = shifty; y < 64; y++) { 825 826 /* image */ 827 line = iptr[y]; 828 *tptr++ = line << shiftx; 829 830 /* mask */ 831 line = mptr[y]; 832 *tptr++ = line << shiftx; 833 } 834 835 /* clear the remainder */ 836 for (y = shifty; y > 0; y--) { 837 *tptr++ = 0; 838 *tptr++ = 0; 839 } 840 } 841 842 int 843 cl_setmousepos(gp, data) 844 struct grf_softc *gp; 845 struct grf_position *data; 846 { 847 volatile char *ba = gp->g_regkva; 848 short rx, ry, prx, pry; 849 #ifdef CL_SHIFTSPRITE 850 volatile char *fb = gp->g_fbkva; 851 volatile char *sprite = fb + (cl_fbsize - 1024); 852 #endif 853 854 /* no movement */ 855 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 856 return (0); 857 858 /* current and previous real coordinates */ 859 rx = data->x - cl_cursprite.hot.x; 860 ry = data->y - cl_cursprite.hot.y; 861 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 862 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 863 864 /* 865 * if we are/were on an edge, create (un)shifted bitmap -- 866 * ripped out optimization (not extremely worthwhile, 867 * and kind of buggy anyhow). 868 */ 869 #ifdef CL_SHIFTSPRITE 870 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 871 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 872 } 873 #endif 874 875 /* do movement, save position */ 876 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 877 cl_cursprite.pos.x = data->x; 878 cl_cursprite.pos.y = data->y; 879 880 return (0); 881 } 882 883 int 884 cl_getspriteinfo(gp, data) 885 struct grf_softc *gp; 886 struct grf_spriteinfo *data; 887 { 888 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 889 copyout(cl_cursprite.image, data->image, 64 * 8); 890 copyout(cl_cursprite.mask, data->mask, 64 * 8); 891 return (0); 892 } 893 894 static int 895 cl_setspriteinfo(gp, data) 896 struct grf_softc *gp; 897 struct grf_spriteinfo *data; 898 { 899 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 900 volatile char *sprite = fb + (cl_fbsize - 1024); 901 902 if (data->set & GRFSPRSET_SHAPE) { 903 904 short dsx, dsy, i; 905 unsigned long *di, *dm, *si, *sm; 906 unsigned long ssi[128], ssm[128]; 907 struct grf_position gpos; 908 909 910 /* check for a too large sprite (no clipping!) */ 911 dsy = data->size.y; 912 dsx = data->size.x; 913 if (dsy > 64 || dsx > 64) 914 return(EINVAL); 915 916 /* prepare destination */ 917 di = (unsigned long *)cl_cursprite.image; 918 dm = (unsigned long *)cl_cursprite.mask; 919 cl_memset((unsigned char *)di, 0, 8*64); 920 cl_memset((unsigned char *)dm, 0, 8*64); 921 922 /* two alternatives: 64 across, then it's 923 * the same format we use, just copy. Otherwise, 924 * copy into tmp buf and recopy skipping the 925 * unused 32 bits. 926 */ 927 if ((dsx - 1) / 32) { 928 copyin(data->image, di, 8 * dsy); 929 copyin(data->mask, dm, 8 * dsy); 930 } else { 931 si = ssi; sm = ssm; 932 copyin(data->image, si, 4 * dsy); 933 copyin(data->mask, sm, 4 * dsy); 934 for (i = 0; i < dsy; i++) { 935 *di = *si++; 936 *dm = *sm++; 937 di += 2; 938 dm += 2; 939 } 940 } 941 942 /* set size */ 943 cl_cursprite.size.x = data->size.x; 944 cl_cursprite.size.y = data->size.y; 945 946 /* forcably load into board */ 947 gpos.x = cl_cursprite.pos.x; 948 gpos.y = cl_cursprite.pos.y; 949 cl_cursprite.pos.x = -1; 950 cl_cursprite.pos.y = -1; 951 writeshifted(sprite, 0, 0); 952 cl_setmousepos(gp, &gpos); 953 954 } 955 if (data->set & GRFSPRSET_HOT) { 956 957 cl_cursprite.hot = data->hot; 958 959 } 960 if (data->set & GRFSPRSET_CMAP) { 961 962 u_char red[2], green[2], blue[2]; 963 964 copyin(data->cmap.red, red, 2); 965 copyin(data->cmap.green, green, 2); 966 copyin(data->cmap.blue, blue, 2); 967 bcopy(red, cl_cursprite.cmap.red, 2); 968 bcopy(green, cl_cursprite.cmap.green, 2); 969 bcopy(blue, cl_cursprite.cmap.blue, 2); 970 971 /* enable and load colors 256 & 257 */ 972 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 973 974 /* 256 */ 975 vgaw(ba, VDAC_ADDRESS_W, 0x00); 976 if (cltype == PICASSO) { 977 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 978 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 979 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 980 } else { 981 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 982 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 983 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 984 } 985 986 /* 257 */ 987 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 988 if (cltype == PICASSO) { 989 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 990 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 991 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 992 } else { 993 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 994 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 995 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 996 } 997 998 /* turn on/off sprite */ 999 if (cl_cursprite.enable) { 1000 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1001 } else { 1002 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1003 } 1004 1005 } 1006 if (data->set & GRFSPRSET_ENABLE) { 1007 1008 if (data->enable == 1) { 1009 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1010 cl_cursprite.enable = 1; 1011 } else { 1012 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1013 cl_cursprite.enable = 0; 1014 } 1015 1016 } 1017 if (data->set & GRFSPRSET_POS) { 1018 1019 /* force placement */ 1020 cl_cursprite.pos.x = -1; 1021 cl_cursprite.pos.y = -1; 1022 1023 /* do it */ 1024 cl_setmousepos(gp, &data->pos); 1025 1026 } 1027 return (0); 1028 } 1029 1030 static int 1031 cl_getspritemax(gp, data) 1032 struct grf_softc *gp; 1033 struct grf_position *data; 1034 { 1035 if (gp->g_display.gd_planes == 24) 1036 return (EINVAL); 1037 data->x = 64; 1038 data->y = 64; 1039 return (0); 1040 } 1041 1042 int 1043 cl_setmonitor(gp, gv) 1044 struct grf_softc *gp; 1045 struct grfvideo_mode *gv; 1046 { 1047 struct grfvideo_mode *md; 1048 1049 if (!cl_mondefok(gv)) 1050 return(EINVAL); 1051 1052 #ifdef CL5426CONSOLE 1053 /* handle interactive setting of console mode */ 1054 if (gv->mode_num == 255) { 1055 bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode)); 1056 clconsole_mode.gv.hblank_start /= 8; 1057 clconsole_mode.gv.hblank_stop /= 8; 1058 clconsole_mode.gv.hsync_start /= 8; 1059 clconsole_mode.gv.hsync_stop /= 8; 1060 clconsole_mode.gv.htotal /= 8; 1061 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1062 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1063 if (!(gp->g_flags & GF_GRFON)) 1064 cl_load_mon(gp, &clconsole_mode); 1065 ite_reinit(gp->g_itedev); 1066 return (0); 1067 } 1068 #endif 1069 1070 md = monitor_def + (gv->mode_num - 1); 1071 bcopy(gv, md, sizeof(struct grfvideo_mode)); 1072 1073 /* adjust pixel oriented values to internal rep. */ 1074 1075 md->hblank_start /= 8; 1076 md->hblank_stop /= 8; 1077 md->hsync_start /= 8; 1078 md->hsync_stop /= 8; 1079 md->htotal /= 8; 1080 1081 return (0); 1082 } 1083 1084 int 1085 cl_getcmap(gfp, cmap) 1086 struct grf_softc *gfp; 1087 struct grf_colormap *cmap; 1088 { 1089 volatile unsigned char *ba; 1090 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1091 short x; 1092 int error; 1093 1094 if (cmap->count == 0 || cmap->index >= 256) 1095 return 0; 1096 1097 if (cmap->index + cmap->count > 256) 1098 cmap->count = 256 - cmap->index; 1099 1100 ba = gfp->g_regkva; 1101 /* first read colors out of the chip, then copyout to userspace */ 1102 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1103 x = cmap->count - 1; 1104 1105 /* 1106 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1107 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1108 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1109 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1110 */ 1111 1112 /* 1113 * The source for the above comment is somewhat unknow to me. 1114 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1115 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1116 * be native to the chipset. This requires special programming for the 1117 * CLUT in 8BPP to compensate and avoid false colors. 1118 * I didn't find any special stuff for 15 and 16BPP though, crest. 1119 */ 1120 1121 switch (cltype) { 1122 case SPECTRUM: 1123 case PICCOLO: 1124 rp = blue + cmap->index; 1125 gp = green + cmap->index; 1126 bp = red + cmap->index; 1127 break; 1128 case PICASSO: 1129 rp = red + cmap->index; 1130 gp = green + cmap->index; 1131 bp = blue + cmap->index; 1132 break; 1133 default: 1134 rp = gp = bp = 0; 1135 break; 1136 } 1137 1138 do { 1139 *rp++ = vgar(ba, VDAC_DATA) << 2; 1140 *gp++ = vgar(ba, VDAC_DATA) << 2; 1141 *bp++ = vgar(ba, VDAC_DATA) << 2; 1142 } while (x-- > 0); 1143 1144 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1145 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1146 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1147 return (0); 1148 1149 return (error); 1150 } 1151 1152 int 1153 cl_putcmap(gfp, cmap) 1154 struct grf_softc *gfp; 1155 struct grf_colormap *cmap; 1156 { 1157 volatile unsigned char *ba; 1158 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1159 short x; 1160 int error; 1161 1162 if (cmap->count == 0 || cmap->index >= 256) 1163 return (0); 1164 1165 if (cmap->index + cmap->count > 256) 1166 cmap->count = 256 - cmap->index; 1167 1168 /* first copy the colors into kernelspace */ 1169 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1170 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1171 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1172 ba = gfp->g_regkva; 1173 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1174 x = cmap->count - 1; 1175 1176 switch (cltype) { 1177 case SPECTRUM: 1178 case PICCOLO: 1179 rp = blue + cmap->index; 1180 gp = green + cmap->index; 1181 bp = red + cmap->index; 1182 break; 1183 case PICASSO: 1184 rp = red + cmap->index; 1185 gp = green + cmap->index; 1186 bp = blue + cmap->index; 1187 break; 1188 default: 1189 rp = gp = bp = 0; 1190 break; 1191 } 1192 1193 do { 1194 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1195 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1196 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1197 } while (x-- > 0); 1198 return (0); 1199 } else 1200 return (error); 1201 } 1202 1203 1204 int 1205 cl_toggle(gp, wopp) 1206 struct grf_softc *gp; 1207 unsigned short wopp; /* don't need that one yet, ill */ 1208 { 1209 volatile caddr_t ba; 1210 1211 ba = gp->g_regkva; 1212 1213 if (pass_toggle) { 1214 RegOffpass(ba); 1215 } else { 1216 RegOnpass(ba); 1217 } 1218 return (0); 1219 } 1220 1221 static void 1222 cl_CompFQ(fq, num, denom, clkdoub) 1223 u_int fq; 1224 u_char *num; 1225 u_char *denom; 1226 u_char *clkdoub; 1227 { 1228 #define OSC 14318180 1229 /* OK, here's what we're doing here: 1230 * 1231 * OSC * NUMERATOR 1232 * VCLK = ------------------- Hz 1233 * DENOMINATOR * (1+P) 1234 * 1235 * so we're given VCLK and we should give out some useful 1236 * values.... 1237 * 1238 * NUMERATOR is 7 bits wide 1239 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1240 * 1241 * We run through all the possible combinations and 1242 * return the values which deviate the least from the chosen frequency. 1243 * 1244 */ 1245 #define OSC 14318180 1246 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1247 1248 unsigned char n, d, p, minn, mind, minp = 0; 1249 unsigned long err, minerr; 1250 1251 /* 1252 numer = 0x00 - 0x7f 1253 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1254 */ 1255 1256 /* find lowest error in 6144 iterations. */ 1257 minerr = fq; 1258 minn = 0; 1259 mind = 0; 1260 p = 0; 1261 1262 if ((cl_64bit == 1) && (fq >= 86000000)) 1263 { 1264 for (d = 1; d < 0x20; d++) { 1265 for (n = 1; n < 0x80; n++) { 1266 err = abs(count(n, d, 0) - fq); 1267 if (err < minerr) { 1268 minerr = err; 1269 minn = n; 1270 mind = d; 1271 minp = 1; 1272 } 1273 } 1274 } 1275 *clkdoub = 1; 1276 } 1277 else { 1278 for (d = 1; d < 0x20; d++) { 1279 for (n = 1; n < 0x80; n++) { 1280 err = abs(count(n, d, p) - fq); 1281 if (err < minerr) { 1282 minerr = err; 1283 minn = n; 1284 mind = d; 1285 minp = p; 1286 } 1287 } 1288 if (d == 0x1f && p == 0) { 1289 p = 1; 1290 d = 0x0f; 1291 } 1292 } 1293 *clkdoub = 0; 1294 } 1295 1296 *num = minn; 1297 *denom = (mind << 1) | minp; 1298 if (minerr > 500000) 1299 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1300 return; 1301 } 1302 1303 int 1304 cl_mondefok(gv) 1305 struct grfvideo_mode *gv; 1306 { 1307 unsigned long maxpix; 1308 1309 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1310 if (gv->mode_num != 255 || gv->depth != 4) 1311 return(0); 1312 1313 switch (gv->depth) { 1314 case 4: 1315 if (gv->mode_num != 255) 1316 return(0); 1317 case 1: 1318 case 8: 1319 maxpix = cl_maxpixelclock; 1320 if (cl_64bit == 1) 1321 { 1322 if (cltype == PICASSO) /* Picasso IV */ 1323 maxpix = 135000000; 1324 else /* Piccolo SD64 */ 1325 maxpix = 110000000; 1326 } 1327 break; 1328 case 15: 1329 case 16: 1330 if (cl_64bit == 1) 1331 maxpix = 85000000; 1332 else 1333 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1334 break; 1335 case 24: 1336 if ((cltype == PICASSO) && (cl_64bit == 1)) 1337 maxpix = 85000000; 1338 else 1339 maxpix = cl_maxpixelclock / 3; 1340 break; 1341 case 32: 1342 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1343 maxpix = 50000000; 1344 else 1345 maxpix = 0; 1346 break; 1347 default: 1348 return (0); 1349 } 1350 if (gv->pixel_clock > maxpix) 1351 return (0); 1352 return (1); 1353 } 1354 1355 int 1356 cl_load_mon(gp, md) 1357 struct grf_softc *gp; 1358 struct grfcltext_mode *md; 1359 { 1360 struct grfvideo_mode *gv; 1361 struct grfinfo *gi; 1362 volatile caddr_t ba, fb; 1363 unsigned char num0, denom0, clkdoub; 1364 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1365 VSE, VT; 1366 char LACE, DBLSCAN, TEXT; 1367 int uplim, lowlim; 1368 int sr15; 1369 int clkmul, offsmul, clkmode; 1370 1371 /* identity */ 1372 gv = &md->gv; 1373 TEXT = (gv->depth == 4); 1374 1375 if (!cl_mondefok(gv)) { 1376 printf("mondef not ok\n"); 1377 return (0); 1378 } 1379 ba = gp->g_regkva; 1380 fb = gp->g_fbkva; 1381 1382 /* provide all needed information in grf device-independant locations */ 1383 gp->g_data = (caddr_t) gv; 1384 gi = &gp->g_display; 1385 gi->gd_regaddr = (caddr_t) kvtop(ba); 1386 gi->gd_regsize = 64 * 1024; 1387 gi->gd_fbaddr = (caddr_t) kvtop(fb); 1388 gi->gd_fbsize = cl_fbsize; 1389 gi->gd_colors = 1 << gv->depth; 1390 gi->gd_planes = gv->depth; 1391 gi->gd_fbwidth = gv->disp_width; 1392 gi->gd_fbheight = gv->disp_height; 1393 gi->gd_fbx = 0; 1394 gi->gd_fby = 0; 1395 if (TEXT) { 1396 gi->gd_dwidth = md->fx * md->cols; 1397 gi->gd_dheight = md->fy * md->rows; 1398 } else { 1399 gi->gd_dwidth = gv->disp_width; 1400 gi->gd_dheight = gv->disp_height; 1401 } 1402 gi->gd_dx = 0; 1403 gi->gd_dy = 0; 1404 1405 /* get display mode parameters */ 1406 1407 HBS = gv->hblank_start; 1408 HBE = gv->hblank_stop; 1409 HSS = gv->hsync_start; 1410 HSE = gv->hsync_stop; 1411 HT = gv->htotal; 1412 VBS = gv->vblank_start; 1413 VSS = gv->vsync_start; 1414 VSE = gv->vsync_stop; 1415 VBE = gv->vblank_stop; 1416 VT = gv->vtotal; 1417 1418 if (TEXT) 1419 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1420 else 1421 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1422 VDE = gv->disp_height - 1; 1423 1424 /* figure out whether lace or dblscan is needed */ 1425 1426 uplim = gv->disp_height + (gv->disp_height / 4); 1427 lowlim = gv->disp_height - (gv->disp_height / 4); 1428 LACE = (((VT * 2) > lowlim) && ((VT * 2) < uplim)) ? 1 : 0; 1429 DBLSCAN = (((VT / 2) > lowlim) && ((VT / 2) < uplim)) ? 1 : 0; 1430 1431 /* adjustments */ 1432 switch (gv->depth) { 1433 case 8: 1434 clkmul = 1; 1435 offsmul = 1; 1436 clkmode = 0x0; 1437 break; 1438 case 15: 1439 case 16: 1440 clkmul = 1; 1441 offsmul = 2; 1442 clkmode = 0x6; 1443 break; 1444 case 24: 1445 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1446 clkmul = 1; 1447 else 1448 clkmul = 3; 1449 offsmul = 3; 1450 clkmode = 0x4; 1451 break; 1452 case 32: 1453 clkmul = 1; 1454 offsmul = 2; 1455 clkmode = 0x8; 1456 break; 1457 default: 1458 clkmul = 1; 1459 offsmul = 1; 1460 clkmode = 0x0; 1461 break; 1462 } 1463 1464 if (LACE) 1465 VDE /= 2; 1466 1467 if (DBLSCAN) 1468 VDE *= 2; 1469 1470 if ((VT > 1023) && (!LACE)) { 1471 VDE /= 2; 1472 VBS /= 2; 1473 VSS /= 2; 1474 VSE /= 2; 1475 VBE /= 2; 1476 VT /= 2; 1477 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1478 } 1479 else 1480 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1481 1482 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1483 if (cl_64bit == 1) { 1484 if (TEXT || (gv->depth == 1)) 1485 sr15 = 0xd0; 1486 else 1487 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1488 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1489 } else { 1490 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1491 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1492 } 1493 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1494 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1495 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1496 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1497 1498 /* Set clock */ 1499 1500 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1501 1502 if (clkdoub) { 1503 HDE /= 2; 1504 HBS /= 2; 1505 HSS /= 2; 1506 HSE /= 2; 1507 HBE /= 2; 1508 HT /= 2; 1509 clkmode = 0x6; 1510 } 1511 1512 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1513 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1514 1515 /* load display parameters into board */ 1516 1517 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1518 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1519 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1520 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1521 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1522 WCrt(ba, CRT_ID_END_HOR_RETR, 1523 (HSE & 0x1f) | 1524 ((HBE & 0x20) ? 0x80 : 0x00)); 1525 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1526 WCrt(ba, CRT_ID_OVERFLOW, 1527 0x10 | 1528 ((VT & 0x100) ? 0x01 : 0x00) | 1529 ((VDE & 0x100) ? 0x02 : 0x00) | 1530 ((VSS & 0x100) ? 0x04 : 0x00) | 1531 ((VBS & 0x100) ? 0x08 : 0x00) | 1532 ((VT & 0x200) ? 0x20 : 0x00) | 1533 ((VDE & 0x200) ? 0x40 : 0x00) | 1534 ((VSS & 0x200) ? 0x80 : 0x00)); 1535 1536 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1537 0x40 | /* TEXT ? 0x00 ??? */ 1538 (DBLSCAN ? 0x80 : 0x00) | 1539 ((VBS & 0x200) ? 0x20 : 0x00) | 1540 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1541 1542 /* text cursor */ 1543 1544 if (TEXT) { 1545 #if CL_ULCURSOR 1546 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1547 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1548 #else 1549 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1550 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1551 #endif 1552 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1553 1554 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1555 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1556 } 1557 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1558 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1559 1560 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1561 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1562 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1563 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1564 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1565 1566 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1567 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1568 WCrt(ba, CRT_ID_LACE_CNTL, 1569 (LACE ? 0x01 : 0x00) | 1570 ((HBE & 0x40) ? 0x10 : 0x00) | 1571 ((HBE & 0x80) ? 0x20 : 0x00) | 1572 ((VBE & 0x100) ? 0x40 : 0x00) | 1573 ((VBE & 0x200) ? 0x80 : 0x00)); 1574 1575 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1576 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1577 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1578 1579 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1580 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1581 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1582 1583 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1584 sometimes, out of "secret" application note (crest) */ 1585 vgaw(ba, VDAC_MASK, 0); 1586 /* reset HDR "magic" access counter (crest) */ 1587 vgar(ba, VDAC_ADDRESS); 1588 1589 delay(200000); 1590 vgar(ba, VDAC_MASK); 1591 delay(200000); 1592 vgar(ba, VDAC_MASK); 1593 delay(200000); 1594 vgar(ba, VDAC_MASK); 1595 delay(200000); 1596 vgar(ba, VDAC_MASK); 1597 delay(200000); 1598 switch (gv->depth) { 1599 case 1: 1600 case 4: /* text */ 1601 vgaw(ba, VDAC_MASK, 0); 1602 HDE = gv->disp_width / 16; 1603 break; 1604 case 8: 1605 if (clkdoub) 1606 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1607 else 1608 vgaw(ba, VDAC_MASK, 0); 1609 HDE = gv->disp_width / 8; 1610 break; 1611 case 15: 1612 vgaw(ba, VDAC_MASK, 0xd0); 1613 HDE = gv->disp_width / 4; 1614 break; 1615 case 16: 1616 vgaw(ba, VDAC_MASK, 0xc1); 1617 HDE = gv->disp_width / 4; 1618 break; 1619 case 24: 1620 vgaw(ba, VDAC_MASK, 0xc5); 1621 HDE = (gv->disp_width / 8) * 3; 1622 break; 1623 case 32: 1624 vgaw(ba, VDAC_MASK, 0xc5); 1625 HDE = (gv->disp_width / 4); 1626 break; 1627 } 1628 1629 /* reset HDR "magic" access counter (crest) */ 1630 vgar(ba, VDAC_ADDRESS); 1631 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1632 vgaw(ba, VDAC_MASK, 0xff); 1633 1634 WCrt(ba, CRT_ID_OFFSET, HDE); 1635 if (cl_64bit == 1) { 1636 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1637 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1638 } 1639 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1640 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1641 0x22 | 1642 ((HDE > 0xff) ? 0x10 : 0x00)); 1643 1644 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1645 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1646 (gv->depth == 1) ? 0x01 : 0x0f); 1647 1648 /* text initialization */ 1649 1650 if (TEXT) { 1651 cl_inittextmode(gp); 1652 } 1653 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1654 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1655 1656 /* Pass-through */ 1657 1658 RegOffpass(ba); 1659 1660 return (1); 1661 } 1662 1663 void 1664 cl_inittextmode(gp) 1665 struct grf_softc *gp; 1666 { 1667 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1668 volatile unsigned char *ba = gp->g_regkva; 1669 unsigned char *fb = gp->g_fbkva; 1670 unsigned char *c, *f, y; 1671 unsigned short z; 1672 1673 1674 /* load text font into beginning of display memory. Each character 1675 * cell is 32 bytes long (enough for 4 planes) */ 1676 1677 SetTextPlane(ba, 0x02); 1678 cl_memset(fb, 0, 256 * 32); 1679 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1680 f = tm->fdata; 1681 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1682 for (y = 0; y < tm->fy; y++) 1683 *c++ = *f++; 1684 1685 /* clear out text/attr planes (three screens worth) */ 1686 1687 SetTextPlane(ba, 0x01); 1688 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1689 SetTextPlane(ba, 0x00); 1690 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1691 1692 /* print out a little init msg */ 1693 1694 c = (unsigned char *) (fb) + (tm->cols - 16); 1695 strcpy(c, "CIRRUS"); 1696 c[6] = 0x20; 1697 1698 /* set colors (B&W) */ 1699 1700 vgaw(ba, VDAC_ADDRESS_W, 0); 1701 for (z = 0; z < 256; z++) { 1702 unsigned char r, g, b; 1703 1704 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1705 1706 if (cltype == PICASSO) { 1707 r = clconscolors[y][0]; 1708 g = clconscolors[y][1]; 1709 b = clconscolors[y][2]; 1710 } else { 1711 b = clconscolors[y][0]; 1712 g = clconscolors[y][1]; 1713 r = clconscolors[y][2]; 1714 } 1715 vgaw(ba, VDAC_DATA, r >> 2); 1716 vgaw(ba, VDAC_DATA, g >> 2); 1717 vgaw(ba, VDAC_DATA, b >> 2); 1718 } 1719 } 1720 1721 void 1722 cl_memset(d, c, l) 1723 unsigned char *d; 1724 unsigned char c; 1725 int l; 1726 { 1727 for (; l > 0; l--) 1728 *d++ = c; 1729 } 1730 1731 /* 1732 * Special wakeup/passthrough registers on graphics boards 1733 * 1734 * The methods have diverged a bit for each board, so 1735 * WPass(P) has been converted into a set of specific 1736 * inline functions. 1737 */ 1738 static void 1739 RegWakeup(ba) 1740 volatile caddr_t ba; 1741 { 1742 1743 switch (cltype) { 1744 case SPECTRUM: 1745 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1746 break; 1747 case PICASSO: 1748 /* Picasso needs no wakeup */ 1749 break; 1750 case PICCOLO: 1751 if (cl_64bit == 1) 1752 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1753 else 1754 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1755 break; 1756 } 1757 delay(200000); 1758 } 1759 1760 static void 1761 RegOnpass(ba) 1762 volatile caddr_t ba; 1763 { 1764 1765 switch (cltype) { 1766 case SPECTRUM: 1767 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1768 break; 1769 case PICASSO: 1770 if (cl_64bit == 0) 1771 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1772 break; 1773 case PICCOLO: 1774 if (cl_64bit == 1) 1775 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1776 else 1777 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1778 break; 1779 } 1780 pass_toggle = 1; 1781 delay(200000); 1782 } 1783 1784 static void 1785 RegOffpass(ba) 1786 volatile caddr_t ba; 1787 { 1788 1789 switch (cltype) { 1790 case SPECTRUM: 1791 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1792 break; 1793 case PICASSO: 1794 if (cl_64bit == 0) 1795 vgaw(ba, PASS_ADDRESS_W, 0xff); 1796 break; 1797 case PICCOLO: 1798 if (cl_64bit == 1) 1799 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1800 else 1801 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1802 break; 1803 } 1804 pass_toggle = 0; 1805 delay(200000); 1806 } 1807 1808 #endif /* NGRFCL */ 1809
Indexes created Sun Sep 28 16:09:52 GMT 2025