grf_cl.c revision 1.20
1 /* $NetBSD: grf_cl.c,v 1.20 1997/07/29 17:46:24 veego Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "grfcl.h" 37 #if NGRFCL > 0 38 39 /* 40 * Graphics routines for Cirrus CL GD 5426 boards, 41 * 42 * This code offers low-level routines to access Cirrus Cl GD 5426 43 * graphics-boards from within NetBSD for the Amiga. 44 * No warranties for any kind of function at all - this 45 * code may crash your hardware and scratch your harddisk. Use at your 46 * own risk. Freely distributable. 47 * 48 * Modified for Cirrus CL GD 5426 from 49 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 50 * Contributions by Ill, ScottE, MiL 51 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 52 * Picasso/040 patches (wee!) by crest 01/96 53 * 54 * PicassoIV support bz Klaus "crest" Burkert. 55 * Fixed interlace and doublescan, added clockdoubling and 56 * HiColor&TrueColor suuport by crest 01/97 57 * 58 * Thanks to Village Tronic Marketing Gmbh for providing me with 59 * a Picasso-II board. 60 * Thanks for Integrated Electronics Oy Ab for providing me with 61 * Cirrus CL GD 542x family documentation. 62 * 63 * TODO: 64 * Mouse support (almost there! :-)) 65 * Blitter support 66 * 67 */ 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/errno.h> 72 #include <sys/ioctl.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 76 #include <machine/cpu.h> 77 #include <dev/cons.h> 78 #include <amiga/dev/itevar.h> 79 #include <amiga/amiga/device.h> 80 #include <amiga/dev/grfioctl.h> 81 #include <amiga/dev/grfvar.h> 82 #include <amiga/dev/grf_clreg.h> 83 #include <amiga/dev/zbusvar.h> 84 85 int cl_mondefok __P((struct grfvideo_mode *)); 86 void cl_boardinit __P((struct grf_softc *)); 87 static void cl_CompFQ __P((u_int, u_char *, u_char *, u_char *)); 88 int cl_getvmode __P((struct grf_softc *, struct grfvideo_mode *)); 89 int cl_setvmode __P((struct grf_softc *, unsigned int)); 90 int cl_toggle __P((struct grf_softc *, unsigned short)); 91 int cl_getcmap __P((struct grf_softc *, struct grf_colormap *)); 92 int cl_putcmap __P((struct grf_softc *, struct grf_colormap *)); 93 #ifndef CL5426CONSOLE 94 void cl_off __P((struct grf_softc *)); 95 #endif 96 void cl_inittextmode __P((struct grf_softc *)); 97 int cl_ioctl __P((register struct grf_softc *, u_long, void *)); 98 int cl_getmousepos __P((struct grf_softc *, struct grf_position *)); 99 int cl_setmousepos __P((struct grf_softc *, struct grf_position *)); 100 static int cl_setspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 101 int cl_getspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 102 static int cl_getspritemax __P((struct grf_softc *, struct grf_position *)); 103 int cl_blank __P((struct grf_softc *, int *)); 104 int cl_setmonitor __P((struct grf_softc *, struct grfvideo_mode *)); 105 void cl_writesprpos __P((volatile char *, short, short)); 106 void writeshifted __P((volatile char *, char, char)); 107 108 static void RegWakeup __P((volatile caddr_t)); 109 static void RegOnpass __P((volatile caddr_t)); 110 static void RegOffpass __P((volatile caddr_t)); 111 112 void grfclattach __P((struct device *, struct device *, void *)); 113 int grfclprint __P((void *, const char *)); 114 int grfclmatch __P((struct device *, struct cfdata *, void *)); 115 void cl_memset __P((unsigned char *, unsigned char, int)); 116 117 /* Graphics display definitions. 118 * These are filled by 'grfconfig' using GRFIOCSETMON. 119 */ 120 #define monitor_def_max 24 121 static struct grfvideo_mode monitor_def[24] = { 122 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 123 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 124 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 125 }; 126 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 127 128 /* Patchable maximum pixel clock */ 129 unsigned long cl_maxpixelclock = 86000000; 130 131 /* Console display definition. 132 * Default hardcoded text mode. This grf_cl is set up to 133 * use one text mode only, and this is it. You may use 134 * grfconfig to change the mode after boot. 135 */ 136 /* Console font */ 137 #ifdef KFONT_8X11 138 #define CIRRUSFONT kernel_font_8x11 139 #define CIRRUSFONTY 11 140 #else 141 #define CIRRUSFONT kernel_font_8x8 142 #define CIRRUSFONTY 8 143 #endif 144 extern unsigned char CIRRUSFONT[]; 145 146 struct grfcltext_mode clconsole_mode = { 147 {255, "", 25200000, 640, 480, 4, 640/8, 752/8, 792/8, 800/8, 148 481, 490, 498, 522, 0}, 149 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 150 }; 151 /* Console colors */ 152 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 153 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 154 }; 155 156 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 157 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 158 unsigned char pass_toggle; /* passthru status tracker */ 159 160 /* 161 * because all 542x-boards have 2 configdev entries, one for 162 * framebuffer mem and the other for regs, we have to hold onto 163 * the pointers globally until we match on both. This and 'cltype' 164 * are the primary obsticles to multiple board support, but if you 165 * have multiple boards you have bigger problems than grf_cl. 166 */ 167 static void *cl_fbaddr = 0; /* framebuffer */ 168 static void *cl_regaddr = 0; /* registers */ 169 static int cl_fbsize; /* framebuffer size */ 170 static int cl_fbautosize; /* framebuffer autoconfig size */ 171 172 173 /* 174 * current sprite info, if you add support for multiple boards 175 * make this an array or something 176 */ 177 struct grf_spriteinfo cl_cursprite; 178 179 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 180 * you add multiple board support 181 */ 182 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 183 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 184 185 /* standard driver stuff */ 186 struct cfattach grfcl_ca = { 187 sizeof(struct grf_softc), grfclmatch, grfclattach 188 }; 189 190 struct cfdriver grfcl_cd = { 191 NULL, "grfcl", DV_DULL, NULL, 0 192 }; 193 static struct cfdata *cfdata; 194 195 int 196 grfclmatch(pdp, cfp, auxp) 197 struct device *pdp; 198 struct cfdata *cfp; 199 void *auxp; 200 { 201 struct zbus_args *zap; 202 static int regprod, fbprod, fbprod2; 203 int error; 204 205 fbprod2 = 0; 206 zap = auxp; 207 208 #ifndef CL5426CONSOLE 209 if (amiga_realconfig == 0) 210 return (0); 211 #endif 212 213 /* Grab the first board we encounter as the preferred one. This will 214 * allow one board to work in a multiple 5426 board system, but not 215 * multiple boards at the same time. */ 216 if (cltype == 0) { 217 switch (zap->manid) { 218 case PICASSO: 219 switch (zap->prodid) { 220 case 11: 221 case 12: 222 regprod = 12; 223 fbprod = 11; 224 error = 0; 225 break; 226 case 22: 227 fbprod2 = 22; 228 error = 0; 229 break; 230 case 21: 231 case 23: 232 regprod = 23; 233 fbprod = 21; 234 cl_64bit = 1; 235 error = 0; 236 break; 237 case 24: 238 regprod = 24; 239 fbprod = 24; 240 cl_64bit = 1; 241 error = 0; 242 break; 243 default: 244 error = 1; 245 break; 246 } 247 if (error == 1) 248 return (0); 249 else 250 break; 251 case SPECTRUM: 252 if (zap->prodid != 2 && zap->prodid != 1) 253 return (0); 254 regprod = 2; 255 fbprod = 1; 256 break; 257 case PICCOLO: 258 switch (zap->prodid) { 259 case 5: 260 case 6: 261 regprod = 6; 262 fbprod = 5; 263 error = 0; 264 break; 265 case 10: 266 case 11: 267 regprod = 11; 268 fbprod = 10; 269 cl_64bit = 1; 270 error = 0; 271 break; 272 default: 273 error = 1; 274 break; 275 } 276 if (error == 1) 277 return (0); 278 else 279 break; 280 default: 281 return (0); 282 } 283 cltype = zap->manid; 284 } else { 285 if (cltype != zap->manid) { 286 return (0); 287 } 288 } 289 290 /* Configure either registers or framebuffer in any order */ 291 if ((cltype == PICASSO) && (cl_64bit == 1)) { 292 switch (zap->prodid) { 293 case 21: 294 cl_fbaddr = zap->va; 295 cl_fbautosize = zap->size; 296 break; 297 case 22: 298 cl_fbautosize += zap->size; 299 break; 300 case 23: 301 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 302 break; 303 case 24: 304 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 305 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 306 cl_fbautosize = 0x400000; 307 break; 308 default: 309 return (0); 310 } 311 } 312 else { 313 if (zap->prodid == regprod) 314 cl_regaddr = zap->va; 315 else 316 if (zap->prodid == fbprod) { 317 cl_fbaddr = zap->va; 318 cl_fbautosize = zap->size; 319 } else 320 return (0); 321 } 322 323 #ifdef CL5426CONSOLE 324 if (amiga_realconfig == 0) { 325 cfdata = cfp; 326 } 327 #endif 328 329 return (1); 330 } 331 332 void 333 grfclattach(pdp, dp, auxp) 334 struct device *pdp, *dp; 335 void *auxp; 336 { 337 static struct grf_softc congrf; 338 struct zbus_args *zap; 339 struct grf_softc *gp; 340 static char attachflag = 0; 341 342 zap = auxp; 343 344 printf("\n"); 345 346 /* make sure both halves have matched */ 347 if (!cl_regaddr || !cl_fbaddr) 348 return; 349 350 /* do all that messy console/grf stuff */ 351 if (dp == NULL) 352 gp = &congrf; 353 else 354 gp = (struct grf_softc *) dp; 355 356 if (dp != NULL && congrf.g_regkva != 0) { 357 /* 358 * inited earlier, just copy (not device struct) 359 */ 360 bcopy(&congrf.g_display, &gp->g_display, 361 (char *) &gp[1] - (char *) &gp->g_display); 362 } else { 363 gp->g_regkva = (volatile caddr_t) cl_regaddr; 364 gp->g_fbkva = (volatile caddr_t) cl_fbaddr; 365 366 gp->g_unit = GRF_CL5426_UNIT; 367 gp->g_mode = cl_mode; 368 gp->g_conpri = grfcl_cnprobe(); 369 gp->g_flags = GF_ALIVE; 370 371 /* wakeup the board */ 372 cl_boardinit(gp); 373 #ifdef CL5426CONSOLE 374 grfcl_iteinit(gp); 375 (void) cl_load_mon(gp, &clconsole_mode); 376 #endif 377 378 } 379 380 /* 381 * attach grf (once) 382 */ 383 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 384 attachflag = 1; 385 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 386 switch (cltype) { 387 case PICASSO: 388 if (cl_64bit == 1) { 389 printf("Picasso IV"); 390 /* 135MHz will be supported if we 391 * have a palette doubling mode. 392 */ 393 cl_maxpixelclock = 86000000; 394 } 395 else { 396 printf("Picasso II"); 397 398 /* check for PicassoII+ (crest) */ 399 if(zap->serno == 0x00100000) 400 printf("+"); 401 402 /* determine used Gfx/chipset (crest) */ 403 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 404 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 405 case 0x24: 406 printf(" (with CL-GD5426)"); 407 break; 408 case 0x26: 409 printf(" (with CL-GD5428)"); 410 break; 411 case 0x27: 412 printf(" (with CL-GD5429)"); 413 break; 414 } 415 cl_maxpixelclock = 86000000; 416 } 417 break; 418 case SPECTRUM: 419 printf("Spectrum"); 420 cl_maxpixelclock = 90000000; 421 break; 422 case PICCOLO: 423 if (cl_64bit == 1) { 424 printf("Piccolo SD64"); 425 /* 110MHz will be supported if we 426 * have a palette doubling mode. 427 */ 428 cl_maxpixelclock = 90000000; 429 } else { 430 printf("Piccolo"); 431 cl_maxpixelclock = 90000000; 432 } 433 break; 434 } 435 printf(" being used\n"); 436 #ifdef CL_OVERCLOCK 437 cl_maxpixelclock = 115000000; 438 #endif 439 } else { 440 if (!attachflag) 441 printf("grfcl unattached!!\n"); 442 } 443 } 444 445 int 446 grfclprint(auxp, pnp) 447 void *auxp; 448 const char *pnp; 449 { 450 if (pnp) 451 printf("ite at %s: ", pnp); 452 return (UNCONF); 453 } 454 455 void 456 cl_boardinit(gp) 457 struct grf_softc *gp; 458 { 459 unsigned char *ba = gp->g_regkva; 460 int x; 461 462 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 463 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 464 delay(200000); /* wait some time (two frames as of now) */ 465 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 466 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 467 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 468 cl_fbsize = cl_fbautosize; 469 } else { 470 471 /* wakeup board and flip passthru OFF */ 472 RegWakeup(ba); 473 RegOnpass(ba); 474 475 vgaw(ba, 0x46e8, 0x16); 476 vgaw(ba, 0x102, 1); 477 vgaw(ba, 0x46e8, 0x0e); 478 if (cl_64bit != 1) 479 vgaw(ba, 0x3c3, 1); 480 481 cl_fbsize = cl_fbautosize; 482 483 /* setup initial unchanging parameters */ 484 485 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 486 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 487 488 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 489 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 490 491 if (cl_64bit == 1) { 492 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 493 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 494 } else { 495 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 496 } 497 WSeq(ba, SEQ_ID_RESET, 0x03); 498 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 499 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 500 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 501 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 502 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 503 if (cl_64bit == 1) 504 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 505 else 506 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 507 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 508 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 509 510 if (cl_64bit == 1) 511 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 512 else 513 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 514 515 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 516 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 517 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 518 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 519 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 520 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 521 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 522 523 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 524 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 525 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 526 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 527 if (cl_64bit == 1) { 528 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 529 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 530 } 531 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 532 533 WGfx(ba, GCT_ID_SET_RESET, 0x00); 534 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 535 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 536 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 537 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 538 WGfx(ba, GCT_ID_MISC, 0x01); 539 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 540 WGfx(ba, GCT_ID_BITMASK, 0xff); 541 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 542 543 for (x = 0; x < 0x10; x++) 544 WAttr(ba, x, x); 545 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 546 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 547 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 548 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 549 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 550 WAttr(ba, 0x34, 0x00); 551 552 vgaw(ba, VDAC_MASK, 0xff); 553 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 554 555 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 556 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 557 } 558 559 /* colors initially set to greyscale */ 560 vgaw(ba, VDAC_ADDRESS_W, 0); 561 for (x = 255; x >= 0; x--) { 562 vgaw(ba, VDAC_DATA, x); 563 vgaw(ba, VDAC_DATA, x); 564 vgaw(ba, VDAC_DATA, x); 565 } 566 /* set sprite bitmap pointers */ 567 cl_cursprite.image = cl_imageptr; 568 cl_cursprite.mask = cl_maskptr; 569 cl_cursprite.cmap.red = cl_sprred; 570 cl_cursprite.cmap.green = cl_sprgreen; 571 cl_cursprite.cmap.blue = cl_sprblue; 572 573 if (cl_64bit == 0) { 574 575 /* check for 1MB or 2MB board (crest) */ 576 volatile unsigned long *cl_fbtestaddr; 577 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 578 579 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 580 *cl_fbtestaddr = 0x12345678; 581 582 if (*cl_fbtestaddr != 0x12345678) { 583 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 584 cl_fbsize = 0x100000; 585 } 586 else 587 { 588 cl_fbsize = 0x200000; 589 } 590 } 591 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 592 } 593 594 595 int 596 cl_getvmode(gp, vm) 597 struct grf_softc *gp; 598 struct grfvideo_mode *vm; 599 { 600 struct grfvideo_mode *gv; 601 602 #ifdef CL5426CONSOLE 603 /* Handle grabbing console mode */ 604 if (vm->mode_num == 255) { 605 bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode)); 606 /* XXX so grfconfig can tell us the correct text dimensions. */ 607 vm->depth = clconsole_mode.fy; 608 } else 609 #endif 610 { 611 if (vm->mode_num == 0) 612 vm->mode_num = (monitor_current - monitor_def) + 1; 613 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 614 return (EINVAL); 615 gv = monitor_def + (vm->mode_num - 1); 616 if (gv->mode_num == 0) 617 return (EINVAL); 618 619 bcopy(gv, vm, sizeof(struct grfvideo_mode)); 620 } 621 622 /* adjust internal values to pixel values */ 623 624 vm->hblank_start *= 8; 625 vm->hsync_start *= 8; 626 vm->hsync_stop *= 8; 627 vm->htotal *= 8; 628 629 return (0); 630 } 631 632 633 int 634 cl_setvmode(gp, mode) 635 struct grf_softc *gp; 636 unsigned mode; 637 { 638 if (!mode || (mode > monitor_def_max) || 639 monitor_def[mode - 1].mode_num == 0) 640 return (EINVAL); 641 642 monitor_current = monitor_def + (mode - 1); 643 644 return (0); 645 } 646 647 #ifndef CL5426CONSOLE 648 void 649 cl_off(gp) 650 struct grf_softc *gp; 651 { 652 char *ba = gp->g_regkva; 653 654 /* 655 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 656 * on just in case it didn't work...but then it doesn't matter does 657 * it? =) 658 */ 659 RegOnpass(ba); 660 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 661 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 662 } 663 #endif 664 665 int 666 cl_blank(gp, on) 667 struct grf_softc *gp; 668 int *on; 669 { 670 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 671 return(0); 672 } 673 674 /* 675 * Change the mode of the display. 676 * Return a UNIX error number or 0 for success. 677 */ 678 int 679 cl_mode(gp, cmd, arg, a2, a3) 680 register struct grf_softc *gp; 681 u_long cmd; 682 void *arg; 683 u_long a2; 684 int a3; 685 { 686 int error; 687 688 switch (cmd) { 689 case GM_GRFON: 690 error = cl_load_mon(gp, 691 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 692 return (error); 693 694 case GM_GRFOFF: 695 #ifndef CL5426CONSOLE 696 cl_off(gp); 697 #else 698 cl_load_mon(gp, &clconsole_mode); 699 #endif 700 return (0); 701 702 case GM_GRFCONFIG: 703 return (0); 704 705 case GM_GRFGETVMODE: 706 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 707 708 case GM_GRFSETVMODE: 709 error = cl_setvmode(gp, *(unsigned *) arg); 710 if (!error && (gp->g_flags & GF_GRFON)) 711 cl_load_mon(gp, 712 (struct grfcltext_mode *) monitor_current); 713 return (error); 714 715 case GM_GRFGETNUMVM: 716 *(int *) arg = monitor_def_max; 717 return (0); 718 719 case GM_GRFIOCTL: 720 return (cl_ioctl(gp, a2, arg)); 721 722 default: 723 break; 724 } 725 726 return (EINVAL); 727 } 728 729 int 730 cl_ioctl(gp, cmd, data) 731 register struct grf_softc *gp; 732 u_long cmd; 733 void *data; 734 { 735 switch (cmd) { 736 case GRFIOCGSPRITEPOS: 737 return (cl_getmousepos(gp, (struct grf_position *) data)); 738 739 case GRFIOCSSPRITEPOS: 740 return (cl_setmousepos(gp, (struct grf_position *) data)); 741 742 case GRFIOCSSPRITEINF: 743 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 744 745 case GRFIOCGSPRITEINF: 746 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 747 748 case GRFIOCGSPRITEMAX: 749 return (cl_getspritemax(gp, (struct grf_position *) data)); 750 751 case GRFIOCGETCMAP: 752 return (cl_getcmap(gp, (struct grf_colormap *) data)); 753 754 case GRFIOCPUTCMAP: 755 return (cl_putcmap(gp, (struct grf_colormap *) data)); 756 757 case GRFIOCBITBLT: 758 break; 759 760 case GRFTOGGLE: 761 return (cl_toggle(gp, 0)); 762 763 case GRFIOCSETMON: 764 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 765 766 case GRFIOCBLANK: 767 return (cl_blank(gp, (int *)data)); 768 769 } 770 return (EINVAL); 771 } 772 773 int 774 cl_getmousepos(gp, data) 775 struct grf_softc *gp; 776 struct grf_position *data; 777 { 778 data->x = cl_cursprite.pos.x; 779 data->y = cl_cursprite.pos.y; 780 return (0); 781 } 782 783 void 784 cl_writesprpos(ba, x, y) 785 volatile char *ba; 786 short x; 787 short y; 788 { 789 /* we want to use a 16-bit write to 3c4 so no macros used */ 790 volatile unsigned char *cwp; 791 volatile unsigned short *wp; 792 793 cwp = ba + 0x3c4; 794 wp = (unsigned short *)cwp; 795 796 /* 797 * don't ask me why, but apparently you can't do a 16-bit write with 798 * x-position like with y-position below (dagge) 799 */ 800 cwp[0] = 0x10 | ((x << 5) & 0xff); 801 cwp[1] = (x >> 3) & 0xff; 802 803 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 804 } 805 806 void 807 writeshifted(to, shiftx, shifty) 808 volatile char *to; 809 char shiftx; 810 char shifty; 811 { 812 register char y; 813 unsigned long long *tptr, *iptr, *mptr, line; 814 815 tptr = (unsigned long long *) to; 816 iptr = (unsigned long long *) cl_cursprite.image; 817 mptr = (unsigned long long *) cl_cursprite.mask; 818 819 shiftx = shiftx < 0 ? 0 : shiftx; 820 shifty = shifty < 0 ? 0 : shifty; 821 822 /* start reading shifty lines down, and 823 * shift each line in by shiftx 824 */ 825 for (y = shifty; y < 64; y++) { 826 827 /* image */ 828 line = iptr[y]; 829 *tptr++ = line << shiftx; 830 831 /* mask */ 832 line = mptr[y]; 833 *tptr++ = line << shiftx; 834 } 835 836 /* clear the remainder */ 837 for (y = shifty; y > 0; y--) { 838 *tptr++ = 0; 839 *tptr++ = 0; 840 } 841 } 842 843 int 844 cl_setmousepos(gp, data) 845 struct grf_softc *gp; 846 struct grf_position *data; 847 { 848 volatile char *ba = gp->g_regkva; 849 short rx, ry, prx, pry; 850 #ifdef CL_SHIFTSPRITE 851 volatile char *fb = gp->g_fbkva; 852 volatile char *sprite = fb + (cl_fbsize - 1024); 853 #endif 854 855 /* no movement */ 856 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 857 return (0); 858 859 /* current and previous real coordinates */ 860 rx = data->x - cl_cursprite.hot.x; 861 ry = data->y - cl_cursprite.hot.y; 862 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 863 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 864 865 /* 866 * if we are/were on an edge, create (un)shifted bitmap -- 867 * ripped out optimization (not extremely worthwhile, 868 * and kind of buggy anyhow). 869 */ 870 #ifdef CL_SHIFTSPRITE 871 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 872 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 873 } 874 #endif 875 876 /* do movement, save position */ 877 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 878 cl_cursprite.pos.x = data->x; 879 cl_cursprite.pos.y = data->y; 880 881 return (0); 882 } 883 884 int 885 cl_getspriteinfo(gp, data) 886 struct grf_softc *gp; 887 struct grf_spriteinfo *data; 888 { 889 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 890 copyout(cl_cursprite.image, data->image, 64 * 8); 891 copyout(cl_cursprite.mask, data->mask, 64 * 8); 892 return (0); 893 } 894 895 static int 896 cl_setspriteinfo(gp, data) 897 struct grf_softc *gp; 898 struct grf_spriteinfo *data; 899 { 900 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 901 volatile char *sprite = fb + (cl_fbsize - 1024); 902 903 if (data->set & GRFSPRSET_SHAPE) { 904 905 short dsx, dsy, i; 906 unsigned long *di, *dm, *si, *sm; 907 unsigned long ssi[128], ssm[128]; 908 struct grf_position gpos; 909 910 911 /* check for a too large sprite (no clipping!) */ 912 dsy = data->size.y; 913 dsx = data->size.x; 914 if (dsy > 64 || dsx > 64) 915 return(EINVAL); 916 917 /* prepare destination */ 918 di = (unsigned long *)cl_cursprite.image; 919 dm = (unsigned long *)cl_cursprite.mask; 920 cl_memset((unsigned char *)di, 0, 8*64); 921 cl_memset((unsigned char *)dm, 0, 8*64); 922 923 /* two alternatives: 64 across, then it's 924 * the same format we use, just copy. Otherwise, 925 * copy into tmp buf and recopy skipping the 926 * unused 32 bits. 927 */ 928 if ((dsx - 1) / 32) { 929 copyin(data->image, di, 8 * dsy); 930 copyin(data->mask, dm, 8 * dsy); 931 } else { 932 si = ssi; sm = ssm; 933 copyin(data->image, si, 4 * dsy); 934 copyin(data->mask, sm, 4 * dsy); 935 for (i = 0; i < dsy; i++) { 936 *di = *si++; 937 *dm = *sm++; 938 di += 2; 939 dm += 2; 940 } 941 } 942 943 /* set size */ 944 cl_cursprite.size.x = data->size.x; 945 cl_cursprite.size.y = data->size.y; 946 947 /* forcably load into board */ 948 gpos.x = cl_cursprite.pos.x; 949 gpos.y = cl_cursprite.pos.y; 950 cl_cursprite.pos.x = -1; 951 cl_cursprite.pos.y = -1; 952 writeshifted(sprite, 0, 0); 953 cl_setmousepos(gp, &gpos); 954 955 } 956 if (data->set & GRFSPRSET_HOT) { 957 958 cl_cursprite.hot = data->hot; 959 960 } 961 if (data->set & GRFSPRSET_CMAP) { 962 963 u_char red[2], green[2], blue[2]; 964 965 copyin(data->cmap.red, red, 2); 966 copyin(data->cmap.green, green, 2); 967 copyin(data->cmap.blue, blue, 2); 968 bcopy(red, cl_cursprite.cmap.red, 2); 969 bcopy(green, cl_cursprite.cmap.green, 2); 970 bcopy(blue, cl_cursprite.cmap.blue, 2); 971 972 /* enable and load colors 256 & 257 */ 973 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 974 975 /* 256 */ 976 vgaw(ba, VDAC_ADDRESS_W, 0x00); 977 if (cltype == PICASSO) { 978 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 979 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 980 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 981 } else { 982 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 983 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 984 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 985 } 986 987 /* 257 */ 988 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 989 if (cltype == PICASSO) { 990 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 991 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 992 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 993 } else { 994 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 995 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 996 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 997 } 998 999 /* turn on/off sprite */ 1000 if (cl_cursprite.enable) { 1001 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1002 } else { 1003 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1004 } 1005 1006 } 1007 if (data->set & GRFSPRSET_ENABLE) { 1008 1009 if (data->enable == 1) { 1010 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1011 cl_cursprite.enable = 1; 1012 } else { 1013 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1014 cl_cursprite.enable = 0; 1015 } 1016 1017 } 1018 if (data->set & GRFSPRSET_POS) { 1019 1020 /* force placement */ 1021 cl_cursprite.pos.x = -1; 1022 cl_cursprite.pos.y = -1; 1023 1024 /* do it */ 1025 cl_setmousepos(gp, &data->pos); 1026 1027 } 1028 return (0); 1029 } 1030 1031 static int 1032 cl_getspritemax(gp, data) 1033 struct grf_softc *gp; 1034 struct grf_position *data; 1035 { 1036 if (gp->g_display.gd_planes == 24) 1037 return (EINVAL); 1038 data->x = 64; 1039 data->y = 64; 1040 return (0); 1041 } 1042 1043 int 1044 cl_setmonitor(gp, gv) 1045 struct grf_softc *gp; 1046 struct grfvideo_mode *gv; 1047 { 1048 struct grfvideo_mode *md; 1049 1050 if (!cl_mondefok(gv)) 1051 return(EINVAL); 1052 1053 #ifdef CL5426CONSOLE 1054 /* handle interactive setting of console mode */ 1055 if (gv->mode_num == 255) { 1056 bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode)); 1057 clconsole_mode.gv.hblank_start /= 8; 1058 clconsole_mode.gv.hsync_start /= 8; 1059 clconsole_mode.gv.hsync_stop /= 8; 1060 clconsole_mode.gv.htotal /= 8; 1061 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1062 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1063 if (!(gp->g_flags & GF_GRFON)) 1064 cl_load_mon(gp, &clconsole_mode); 1065 ite_reinit(gp->g_itedev); 1066 return (0); 1067 } 1068 #endif 1069 1070 md = monitor_def + (gv->mode_num - 1); 1071 bcopy(gv, md, sizeof(struct grfvideo_mode)); 1072 1073 /* adjust pixel oriented values to internal rep. */ 1074 1075 md->hblank_start /= 8; 1076 md->hsync_start /= 8; 1077 md->hsync_stop /= 8; 1078 md->htotal /= 8; 1079 1080 return (0); 1081 } 1082 1083 int 1084 cl_getcmap(gfp, cmap) 1085 struct grf_softc *gfp; 1086 struct grf_colormap *cmap; 1087 { 1088 volatile unsigned char *ba; 1089 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1090 short x; 1091 int error; 1092 1093 if (cmap->count == 0 || cmap->index >= 256) 1094 return 0; 1095 1096 if (cmap->index + cmap->count > 256) 1097 cmap->count = 256 - cmap->index; 1098 1099 ba = gfp->g_regkva; 1100 /* first read colors out of the chip, then copyout to userspace */ 1101 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1102 x = cmap->count - 1; 1103 1104 /* 1105 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1106 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1107 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1108 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1109 */ 1110 1111 /* 1112 * The source for the above comment is somewhat unknow to me. 1113 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1114 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1115 * be native to the chipset. This requires special programming for the 1116 * CLUT in 8BPP to compensate and avoid false colors. 1117 * I didn't find any special stuff for 15 and 16BPP though, crest. 1118 */ 1119 1120 switch (cltype) { 1121 case SPECTRUM: 1122 case PICCOLO: 1123 rp = blue + cmap->index; 1124 gp = green + cmap->index; 1125 bp = red + cmap->index; 1126 break; 1127 case PICASSO: 1128 rp = red + cmap->index; 1129 gp = green + cmap->index; 1130 bp = blue + cmap->index; 1131 break; 1132 default: 1133 rp = gp = bp = 0; 1134 break; 1135 } 1136 1137 do { 1138 *rp++ = vgar(ba, VDAC_DATA) << 2; 1139 *gp++ = vgar(ba, VDAC_DATA) << 2; 1140 *bp++ = vgar(ba, VDAC_DATA) << 2; 1141 } while (x-- > 0); 1142 1143 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1144 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1145 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1146 return (0); 1147 1148 return (error); 1149 } 1150 1151 int 1152 cl_putcmap(gfp, cmap) 1153 struct grf_softc *gfp; 1154 struct grf_colormap *cmap; 1155 { 1156 volatile unsigned char *ba; 1157 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1158 short x; 1159 int error; 1160 1161 if (cmap->count == 0 || cmap->index >= 256) 1162 return (0); 1163 1164 if (cmap->index + cmap->count > 256) 1165 cmap->count = 256 - cmap->index; 1166 1167 /* first copy the colors into kernelspace */ 1168 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1169 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1170 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1171 ba = gfp->g_regkva; 1172 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1173 x = cmap->count - 1; 1174 1175 switch (cltype) { 1176 case SPECTRUM: 1177 case PICCOLO: 1178 rp = blue + cmap->index; 1179 gp = green + cmap->index; 1180 bp = red + cmap->index; 1181 break; 1182 case PICASSO: 1183 rp = red + cmap->index; 1184 gp = green + cmap->index; 1185 bp = blue + cmap->index; 1186 break; 1187 default: 1188 rp = gp = bp = 0; 1189 break; 1190 } 1191 1192 do { 1193 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1194 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1195 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1196 } while (x-- > 0); 1197 return (0); 1198 } else 1199 return (error); 1200 } 1201 1202 1203 int 1204 cl_toggle(gp, wopp) 1205 struct grf_softc *gp; 1206 unsigned short wopp; /* don't need that one yet, ill */ 1207 { 1208 volatile caddr_t ba; 1209 1210 ba = gp->g_regkva; 1211 1212 if (pass_toggle) { 1213 RegOffpass(ba); 1214 } else { 1215 RegOnpass(ba); 1216 } 1217 return (0); 1218 } 1219 1220 static void 1221 cl_CompFQ(fq, num, denom, clkdoub) 1222 u_int fq; 1223 u_char *num; 1224 u_char *denom; 1225 u_char *clkdoub; 1226 { 1227 #define OSC 14318180 1228 /* OK, here's what we're doing here: 1229 * 1230 * OSC * NUMERATOR 1231 * VCLK = ------------------- Hz 1232 * DENOMINATOR * (1+P) 1233 * 1234 * so we're given VCLK and we should give out some useful 1235 * values.... 1236 * 1237 * NUMERATOR is 7 bits wide 1238 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1239 * 1240 * We run through all the possible combinations and 1241 * return the values which deviate the least from the chosen frequency. 1242 * 1243 */ 1244 #define OSC 14318180 1245 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1246 1247 unsigned char n, d, p, minn, mind, minp = 0; 1248 unsigned long err, minerr; 1249 1250 /* 1251 numer = 0x00 - 0x7f 1252 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1253 */ 1254 1255 /* find lowest error in 6144 iterations. */ 1256 minerr = fq; 1257 minn = 0; 1258 mind = 0; 1259 p = 0; 1260 1261 if ((cl_64bit == 1) && (fq >= 86000000)) 1262 { 1263 for (d = 1; d < 0x20; d++) { 1264 for (n = 1; n < 0x80; n++) { 1265 err = abs(count(n, d, 0) - fq); 1266 if (err < minerr) { 1267 minerr = err; 1268 minn = n; 1269 mind = d; 1270 minp = 1; 1271 } 1272 } 1273 } 1274 *clkdoub = 1; 1275 } 1276 else { 1277 for (d = 1; d < 0x20; d++) { 1278 for (n = 1; n < 0x80; n++) { 1279 err = abs(count(n, d, p) - fq); 1280 if (err < minerr) { 1281 minerr = err; 1282 minn = n; 1283 mind = d; 1284 minp = p; 1285 } 1286 } 1287 if (d == 0x1f && p == 0) { 1288 p = 1; 1289 d = 0x0f; 1290 } 1291 } 1292 *clkdoub = 0; 1293 } 1294 1295 *num = minn; 1296 *denom = (mind << 1) | minp; 1297 if (minerr > 500000) 1298 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1299 return; 1300 } 1301 1302 int 1303 cl_mondefok(gv) 1304 struct grfvideo_mode *gv; 1305 { 1306 unsigned long maxpix; 1307 1308 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1309 if (gv->mode_num != 255 || gv->depth != 4) 1310 return(0); 1311 1312 switch (gv->depth) { 1313 case 4: 1314 if (gv->mode_num != 255) 1315 return(0); 1316 case 1: 1317 case 8: 1318 maxpix = cl_maxpixelclock; 1319 if (cl_64bit == 1) 1320 { 1321 if (cltype == PICASSO) /* Picasso IV */ 1322 maxpix = 135000000; 1323 else /* Piccolo SD64 */ 1324 maxpix = 110000000; 1325 } 1326 break; 1327 case 15: 1328 case 16: 1329 if (cl_64bit == 1) 1330 maxpix = 85000000; 1331 else 1332 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1333 break; 1334 case 24: 1335 if ((cltype == PICASSO) && (cl_64bit == 1)) 1336 maxpix = 85000000; 1337 else 1338 maxpix = cl_maxpixelclock / 3; 1339 break; 1340 case 32: 1341 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1342 maxpix = 50000000; 1343 else 1344 maxpix = 0; 1345 break; 1346 default: 1347 printf("grfcl: Illegal depth in mode %d\n", 1348 (int) gv->mode_num); 1349 return (0); 1350 } 1351 1352 if (gv->pixel_clock > maxpix) { 1353 printf("grfcl: Pixelclock too high in mode %d\n", 1354 (int) gv->mode_num); 1355 return (0); 1356 } 1357 1358 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1359 printf("grfcl: sync-on-green is not supported\n"); 1360 return (0); 1361 } 1362 1363 return (1); 1364 } 1365 1366 int 1367 cl_load_mon(gp, md) 1368 struct grf_softc *gp; 1369 struct grfcltext_mode *md; 1370 { 1371 struct grfvideo_mode *gv; 1372 struct grfinfo *gi; 1373 volatile caddr_t ba, fb; 1374 unsigned char num0, denom0, clkdoub; 1375 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1376 VSE, VT; 1377 int clkmul, offsmul, clkmode; 1378 int vmul; 1379 int sr15; 1380 unsigned char hvsync_pulse; 1381 char TEXT; 1382 1383 /* identity */ 1384 gv = &md->gv; 1385 TEXT = (gv->depth == 4); 1386 1387 if (!cl_mondefok(gv)) { 1388 printf("grfcl: Monitor definition not ok\n"); 1389 return (0); 1390 } 1391 1392 ba = gp->g_regkva; 1393 fb = gp->g_fbkva; 1394 1395 /* provide all needed information in grf device-independant locations */ 1396 gp->g_data = (caddr_t) gv; 1397 gi = &gp->g_display; 1398 gi->gd_regaddr = (caddr_t) kvtop(ba); 1399 gi->gd_regsize = 64 * 1024; 1400 gi->gd_fbaddr = (caddr_t) kvtop(fb); 1401 gi->gd_fbsize = cl_fbsize; 1402 gi->gd_colors = 1 << gv->depth; 1403 gi->gd_planes = gv->depth; 1404 gi->gd_fbwidth = gv->disp_width; 1405 gi->gd_fbheight = gv->disp_height; 1406 gi->gd_fbx = 0; 1407 gi->gd_fby = 0; 1408 if (TEXT) { 1409 gi->gd_dwidth = md->fx * md->cols; 1410 gi->gd_dheight = md->fy * md->rows; 1411 } else { 1412 gi->gd_dwidth = gv->disp_width; 1413 gi->gd_dheight = gv->disp_height; 1414 } 1415 gi->gd_dx = 0; 1416 gi->gd_dy = 0; 1417 1418 /* get display mode parameters */ 1419 1420 HBS = gv->hblank_start; 1421 HSS = gv->hsync_start; 1422 HSE = gv->hsync_stop; 1423 HBE = gv->htotal - 1; 1424 HT = gv->htotal; 1425 VBS = gv->vblank_start; 1426 VSS = gv->vsync_start; 1427 VSE = gv->vsync_stop; 1428 VBE = gv->vtotal - 1; 1429 VT = gv->vtotal; 1430 1431 if (TEXT) 1432 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1433 else 1434 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1435 VDE = gv->disp_height - 1; 1436 1437 /* adjustments */ 1438 switch (gv->depth) { 1439 case 8: 1440 clkmul = 1; 1441 offsmul = 1; 1442 clkmode = 0x0; 1443 break; 1444 case 15: 1445 case 16: 1446 clkmul = 1; 1447 offsmul = 2; 1448 clkmode = 0x6; 1449 break; 1450 case 24: 1451 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1452 clkmul = 1; 1453 else 1454 clkmul = 3; 1455 offsmul = 3; 1456 clkmode = 0x4; 1457 break; 1458 case 32: 1459 clkmul = 1; 1460 offsmul = 2; 1461 clkmode = 0x8; 1462 break; 1463 default: 1464 clkmul = 1; 1465 offsmul = 1; 1466 clkmode = 0x0; 1467 break; 1468 } 1469 1470 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1471 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1472 } else 1473 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1474 1475 vmul = 2; 1476 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1477 vmul = 1; 1478 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1479 vmul = 4; 1480 1481 VDE = VDE * vmul / 2; 1482 VBS = VBS * vmul / 2; 1483 VSS = VSS * vmul / 2; 1484 VSE = VSE * vmul / 2; 1485 VBE = VBE * vmul / 2; 1486 VT = VT * vmul / 2; 1487 1488 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1489 if (cl_64bit == 1) { 1490 if (TEXT || (gv->depth == 1)) 1491 sr15 = 0xd0; 1492 else 1493 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1494 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1495 } else { 1496 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1497 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1498 } 1499 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1500 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1501 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1502 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1503 1504 /* Set clock */ 1505 1506 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1507 1508 /* Horizontal/Vertical Sync Pulse */ 1509 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1510 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1511 hvsync_pulse &= ~0x40; 1512 else 1513 hvsync_pulse |= 0x40; 1514 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1515 hvsync_pulse &= ~0x80; 1516 else 1517 hvsync_pulse |= 0x80; 1518 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1519 1520 if (clkdoub) { 1521 HDE /= 2; 1522 HBS /= 2; 1523 HSS /= 2; 1524 HSE /= 2; 1525 HBE /= 2; 1526 HT /= 2; 1527 clkmode = 0x6; 1528 } 1529 1530 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1531 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1532 1533 /* load display parameters into board */ 1534 1535 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1536 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1537 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1538 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1539 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1540 WCrt(ba, CRT_ID_END_HOR_RETR, 1541 (HSE & 0x1f) | 1542 ((HBE & 0x20) ? 0x80 : 0x00)); 1543 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1544 WCrt(ba, CRT_ID_OVERFLOW, 1545 0x10 | 1546 ((VT & 0x100) ? 0x01 : 0x00) | 1547 ((VDE & 0x100) ? 0x02 : 0x00) | 1548 ((VSS & 0x100) ? 0x04 : 0x00) | 1549 ((VBS & 0x100) ? 0x08 : 0x00) | 1550 ((VT & 0x200) ? 0x20 : 0x00) | 1551 ((VDE & 0x200) ? 0x40 : 0x00) | 1552 ((VSS & 0x200) ? 0x80 : 0x00)); 1553 1554 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1555 0x40 | /* TEXT ? 0x00 ??? */ 1556 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1557 ((VBS & 0x200) ? 0x20 : 0x00) | 1558 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1559 1560 /* text cursor */ 1561 1562 if (TEXT) { 1563 #if CL_ULCURSOR 1564 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1565 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1566 #else 1567 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1568 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1569 #endif 1570 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1571 1572 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1573 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1574 } 1575 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1576 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1577 1578 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1579 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1580 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1581 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1582 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1583 1584 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1585 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1586 WCrt(ba, CRT_ID_LACE_CNTL, 1587 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1588 ((HBE & 0x40) ? 0x10 : 0x00) | 1589 ((HBE & 0x80) ? 0x20 : 0x00) | 1590 ((VBE & 0x100) ? 0x40 : 0x00) | 1591 ((VBE & 0x200) ? 0x80 : 0x00)); 1592 1593 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1594 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1595 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1596 1597 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1598 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1599 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1600 1601 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1602 sometimes, out of "secret" application note (crest) */ 1603 vgaw(ba, VDAC_MASK, 0); 1604 /* reset HDR "magic" access counter (crest) */ 1605 vgar(ba, VDAC_ADDRESS); 1606 1607 delay(200000); 1608 vgar(ba, VDAC_MASK); 1609 delay(200000); 1610 vgar(ba, VDAC_MASK); 1611 delay(200000); 1612 vgar(ba, VDAC_MASK); 1613 delay(200000); 1614 vgar(ba, VDAC_MASK); 1615 delay(200000); 1616 switch (gv->depth) { 1617 case 1: 1618 case 4: /* text */ 1619 vgaw(ba, VDAC_MASK, 0); 1620 HDE = gv->disp_width / 16; 1621 break; 1622 case 8: 1623 if (clkdoub) 1624 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1625 else 1626 vgaw(ba, VDAC_MASK, 0); 1627 HDE = gv->disp_width / 8; 1628 break; 1629 case 15: 1630 vgaw(ba, VDAC_MASK, 0xd0); 1631 HDE = gv->disp_width / 4; 1632 break; 1633 case 16: 1634 vgaw(ba, VDAC_MASK, 0xc1); 1635 HDE = gv->disp_width / 4; 1636 break; 1637 case 24: 1638 vgaw(ba, VDAC_MASK, 0xc5); 1639 HDE = (gv->disp_width / 8) * 3; 1640 break; 1641 case 32: 1642 vgaw(ba, VDAC_MASK, 0xc5); 1643 HDE = (gv->disp_width / 4); 1644 break; 1645 } 1646 1647 /* reset HDR "magic" access counter (crest) */ 1648 vgar(ba, VDAC_ADDRESS); 1649 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1650 vgaw(ba, VDAC_MASK, 0xff); 1651 1652 WCrt(ba, CRT_ID_OFFSET, HDE); 1653 if (cl_64bit == 1) { 1654 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1655 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1656 } 1657 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1658 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1659 0x22 | 1660 ((HDE > 0xff) ? 0x10 : 0x00)); 1661 1662 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1663 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1664 (gv->depth == 1) ? 0x01 : 0x0f); 1665 1666 /* text initialization */ 1667 1668 if (TEXT) { 1669 cl_inittextmode(gp); 1670 } 1671 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1672 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1673 1674 /* Pass-through */ 1675 1676 RegOffpass(ba); 1677 1678 return (1); 1679 } 1680 1681 void 1682 cl_inittextmode(gp) 1683 struct grf_softc *gp; 1684 { 1685 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1686 volatile unsigned char *ba = gp->g_regkva; 1687 unsigned char *fb = gp->g_fbkva; 1688 unsigned char *c, *f, y; 1689 unsigned short z; 1690 1691 1692 /* load text font into beginning of display memory. Each character 1693 * cell is 32 bytes long (enough for 4 planes) */ 1694 1695 SetTextPlane(ba, 0x02); 1696 cl_memset(fb, 0, 256 * 32); 1697 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1698 f = tm->fdata; 1699 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1700 for (y = 0; y < tm->fy; y++) 1701 *c++ = *f++; 1702 1703 /* clear out text/attr planes (three screens worth) */ 1704 1705 SetTextPlane(ba, 0x01); 1706 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1707 SetTextPlane(ba, 0x00); 1708 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1709 1710 /* print out a little init msg */ 1711 1712 c = (unsigned char *) (fb) + (tm->cols - 16); 1713 strcpy(c, "CIRRUS"); 1714 c[6] = 0x20; 1715 1716 /* set colors (B&W) */ 1717 1718 vgaw(ba, VDAC_ADDRESS_W, 0); 1719 for (z = 0; z < 256; z++) { 1720 unsigned char r, g, b; 1721 1722 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1723 1724 if (cltype == PICASSO) { 1725 r = clconscolors[y][0]; 1726 g = clconscolors[y][1]; 1727 b = clconscolors[y][2]; 1728 } else { 1729 b = clconscolors[y][0]; 1730 g = clconscolors[y][1]; 1731 r = clconscolors[y][2]; 1732 } 1733 vgaw(ba, VDAC_DATA, r >> 2); 1734 vgaw(ba, VDAC_DATA, g >> 2); 1735 vgaw(ba, VDAC_DATA, b >> 2); 1736 } 1737 } 1738 1739 void 1740 cl_memset(d, c, l) 1741 unsigned char *d; 1742 unsigned char c; 1743 int l; 1744 { 1745 for (; l > 0; l--) 1746 *d++ = c; 1747 } 1748 1749 /* 1750 * Special wakeup/passthrough registers on graphics boards 1751 * 1752 * The methods have diverged a bit for each board, so 1753 * WPass(P) has been converted into a set of specific 1754 * inline functions. 1755 */ 1756 static void 1757 RegWakeup(ba) 1758 volatile caddr_t ba; 1759 { 1760 1761 switch (cltype) { 1762 case SPECTRUM: 1763 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1764 break; 1765 case PICASSO: 1766 /* Picasso needs no wakeup */ 1767 break; 1768 case PICCOLO: 1769 if (cl_64bit == 1) 1770 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1771 else 1772 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1773 break; 1774 } 1775 delay(200000); 1776 } 1777 1778 static void 1779 RegOnpass(ba) 1780 volatile caddr_t ba; 1781 { 1782 1783 switch (cltype) { 1784 case SPECTRUM: 1785 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1786 break; 1787 case PICASSO: 1788 if (cl_64bit == 0) 1789 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1790 break; 1791 case PICCOLO: 1792 if (cl_64bit == 1) 1793 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1794 else 1795 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1796 break; 1797 } 1798 pass_toggle = 1; 1799 delay(200000); 1800 } 1801 1802 static void 1803 RegOffpass(ba) 1804 volatile caddr_t ba; 1805 { 1806 1807 switch (cltype) { 1808 case SPECTRUM: 1809 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1810 break; 1811 case PICASSO: 1812 if (cl_64bit == 0) 1813 vgaw(ba, PASS_ADDRESS_W, 0xff); 1814 break; 1815 case PICCOLO: 1816 if (cl_64bit == 1) 1817 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1818 else 1819 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1820 break; 1821 } 1822 pass_toggle = 0; 1823 delay(200000); 1824 } 1825 1826 #endif /* NGRFCL */ 1827
Indexes created Sun Sep 28 16:09:52 GMT 2025