grf_cl.c revision 1.21
1 /* $NetBSD: grf_cl.c,v 1.21 1998/01/12 10:39:31 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "grfcl.h" 37 #if NGRFCL > 0 38 39 /* 40 * Graphics routines for Cirrus CL GD 5426 boards, 41 * 42 * This code offers low-level routines to access Cirrus Cl GD 5426 43 * graphics-boards from within NetBSD for the Amiga. 44 * No warranties for any kind of function at all - this 45 * code may crash your hardware and scratch your harddisk. Use at your 46 * own risk. Freely distributable. 47 * 48 * Modified for Cirrus CL GD 5426 from 49 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 50 * Contributions by Ill, ScottE, MiL 51 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 52 * Picasso/040 patches (wee!) by crest 01/96 53 * 54 * PicassoIV support bz Klaus "crest" Burkert. 55 * Fixed interlace and doublescan, added clockdoubling and 56 * HiColor&TrueColor suuport by crest 01/97 57 * 58 * Thanks to Village Tronic Marketing Gmbh for providing me with 59 * a Picasso-II board. 60 * Thanks for Integrated Electronics Oy Ab for providing me with 61 * Cirrus CL GD 542x family documentation. 62 * 63 * TODO: 64 * Mouse support (almost there! :-)) 65 * Blitter support 66 * 67 */ 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/errno.h> 72 #include <sys/ioctl.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 76 #include <machine/cpu.h> 77 #include <dev/cons.h> 78 #include <amiga/dev/itevar.h> 79 #include <amiga/amiga/device.h> 80 #include <amiga/dev/grfioctl.h> 81 #include <amiga/dev/grfvar.h> 82 #include <amiga/dev/grf_clreg.h> 83 #include <amiga/dev/zbusvar.h> 84 85 int cl_mondefok __P((struct grfvideo_mode *)); 86 void cl_boardinit __P((struct grf_softc *)); 87 static void cl_CompFQ __P((u_int, u_char *, u_char *, u_char *)); 88 int cl_getvmode __P((struct grf_softc *, struct grfvideo_mode *)); 89 int cl_setvmode __P((struct grf_softc *, unsigned int)); 90 int cl_toggle __P((struct grf_softc *, unsigned short)); 91 int cl_getcmap __P((struct grf_softc *, struct grf_colormap *)); 92 int cl_putcmap __P((struct grf_softc *, struct grf_colormap *)); 93 #ifndef CL5426CONSOLE 94 void cl_off __P((struct grf_softc *)); 95 #endif 96 void cl_inittextmode __P((struct grf_softc *)); 97 int cl_ioctl __P((register struct grf_softc *, u_long, void *)); 98 int cl_getmousepos __P((struct grf_softc *, struct grf_position *)); 99 int cl_setmousepos __P((struct grf_softc *, struct grf_position *)); 100 static int cl_setspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 101 int cl_getspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 102 static int cl_getspritemax __P((struct grf_softc *, struct grf_position *)); 103 int cl_blank __P((struct grf_softc *, int *)); 104 int cl_setmonitor __P((struct grf_softc *, struct grfvideo_mode *)); 105 void cl_writesprpos __P((volatile char *, short, short)); 106 void writeshifted __P((volatile char *, char, char)); 107 108 static void RegWakeup __P((volatile caddr_t)); 109 static void RegOnpass __P((volatile caddr_t)); 110 static void RegOffpass __P((volatile caddr_t)); 111 112 void grfclattach __P((struct device *, struct device *, void *)); 113 int grfclprint __P((void *, const char *)); 114 int grfclmatch __P((struct device *, struct cfdata *, void *)); 115 void cl_memset __P((unsigned char *, unsigned char, int)); 116 117 /* Graphics display definitions. 118 * These are filled by 'grfconfig' using GRFIOCSETMON. 119 */ 120 #define monitor_def_max 24 121 static struct grfvideo_mode monitor_def[24] = { 122 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 123 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 124 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 125 }; 126 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 127 128 /* Patchable maximum pixel clock */ 129 unsigned long cl_maxpixelclock = 86000000; 130 131 /* Console display definition. 132 * Default hardcoded text mode. This grf_cl is set up to 133 * use one text mode only, and this is it. You may use 134 * grfconfig to change the mode after boot. 135 */ 136 /* Console font */ 137 #ifdef KFONT_8X11 138 #define CIRRUSFONT kernel_font_8x11 139 #define CIRRUSFONTY 11 140 #else 141 #define CIRRUSFONT kernel_font_8x8 142 #define CIRRUSFONTY 8 143 #endif 144 extern unsigned char CIRRUSFONT[]; 145 146 struct grfcltext_mode clconsole_mode = { 147 {255, "", 25200000, 640, 480, 4, 640/8, 752/8, 792/8, 800/8, 148 481, 490, 498, 522, 0}, 149 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 150 }; 151 /* Console colors */ 152 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 153 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 154 }; 155 156 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 157 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 158 unsigned char pass_toggle; /* passthru status tracker */ 159 160 /* 161 * because all 542x-boards have 2 configdev entries, one for 162 * framebuffer mem and the other for regs, we have to hold onto 163 * the pointers globally until we match on both. This and 'cltype' 164 * are the primary obsticles to multiple board support, but if you 165 * have multiple boards you have bigger problems than grf_cl. 166 */ 167 static void *cl_fbaddr = 0; /* framebuffer */ 168 static void *cl_regaddr = 0; /* registers */ 169 static int cl_fbsize; /* framebuffer size */ 170 static int cl_fbautosize; /* framebuffer autoconfig size */ 171 172 173 /* 174 * current sprite info, if you add support for multiple boards 175 * make this an array or something 176 */ 177 struct grf_spriteinfo cl_cursprite; 178 179 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 180 * you add multiple board support 181 */ 182 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 183 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 184 185 /* standard driver stuff */ 186 struct cfattach grfcl_ca = { 187 sizeof(struct grf_softc), grfclmatch, grfclattach 188 }; 189 190 static struct cfdata *cfdata; 191 192 int 193 grfclmatch(pdp, cfp, auxp) 194 struct device *pdp; 195 struct cfdata *cfp; 196 void *auxp; 197 { 198 struct zbus_args *zap; 199 static int regprod, fbprod, fbprod2; 200 int error; 201 202 fbprod2 = 0; 203 zap = auxp; 204 205 #ifndef CL5426CONSOLE 206 if (amiga_realconfig == 0) 207 return (0); 208 #endif 209 210 /* Grab the first board we encounter as the preferred one. This will 211 * allow one board to work in a multiple 5426 board system, but not 212 * multiple boards at the same time. */ 213 if (cltype == 0) { 214 switch (zap->manid) { 215 case PICASSO: 216 switch (zap->prodid) { 217 case 11: 218 case 12: 219 regprod = 12; 220 fbprod = 11; 221 error = 0; 222 break; 223 case 22: 224 fbprod2 = 22; 225 error = 0; 226 break; 227 case 21: 228 case 23: 229 regprod = 23; 230 fbprod = 21; 231 cl_64bit = 1; 232 error = 0; 233 break; 234 case 24: 235 regprod = 24; 236 fbprod = 24; 237 cl_64bit = 1; 238 error = 0; 239 break; 240 default: 241 error = 1; 242 break; 243 } 244 if (error == 1) 245 return (0); 246 else 247 break; 248 case SPECTRUM: 249 if (zap->prodid != 2 && zap->prodid != 1) 250 return (0); 251 regprod = 2; 252 fbprod = 1; 253 break; 254 case PICCOLO: 255 switch (zap->prodid) { 256 case 5: 257 case 6: 258 regprod = 6; 259 fbprod = 5; 260 error = 0; 261 break; 262 case 10: 263 case 11: 264 regprod = 11; 265 fbprod = 10; 266 cl_64bit = 1; 267 error = 0; 268 break; 269 default: 270 error = 1; 271 break; 272 } 273 if (error == 1) 274 return (0); 275 else 276 break; 277 default: 278 return (0); 279 } 280 cltype = zap->manid; 281 } else { 282 if (cltype != zap->manid) { 283 return (0); 284 } 285 } 286 287 /* Configure either registers or framebuffer in any order */ 288 if ((cltype == PICASSO) && (cl_64bit == 1)) { 289 switch (zap->prodid) { 290 case 21: 291 cl_fbaddr = zap->va; 292 cl_fbautosize = zap->size; 293 break; 294 case 22: 295 cl_fbautosize += zap->size; 296 break; 297 case 23: 298 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 299 break; 300 case 24: 301 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 302 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 303 cl_fbautosize = 0x400000; 304 break; 305 default: 306 return (0); 307 } 308 } 309 else { 310 if (zap->prodid == regprod) 311 cl_regaddr = zap->va; 312 else 313 if (zap->prodid == fbprod) { 314 cl_fbaddr = zap->va; 315 cl_fbautosize = zap->size; 316 } else 317 return (0); 318 } 319 320 #ifdef CL5426CONSOLE 321 if (amiga_realconfig == 0) { 322 cfdata = cfp; 323 } 324 #endif 325 326 return (1); 327 } 328 329 void 330 grfclattach(pdp, dp, auxp) 331 struct device *pdp, *dp; 332 void *auxp; 333 { 334 static struct grf_softc congrf; 335 struct zbus_args *zap; 336 struct grf_softc *gp; 337 static char attachflag = 0; 338 339 zap = auxp; 340 341 printf("\n"); 342 343 /* make sure both halves have matched */ 344 if (!cl_regaddr || !cl_fbaddr) 345 return; 346 347 /* do all that messy console/grf stuff */ 348 if (dp == NULL) 349 gp = &congrf; 350 else 351 gp = (struct grf_softc *) dp; 352 353 if (dp != NULL && congrf.g_regkva != 0) { 354 /* 355 * inited earlier, just copy (not device struct) 356 */ 357 bcopy(&congrf.g_display, &gp->g_display, 358 (char *) &gp[1] - (char *) &gp->g_display); 359 } else { 360 gp->g_regkva = (volatile caddr_t) cl_regaddr; 361 gp->g_fbkva = (volatile caddr_t) cl_fbaddr; 362 363 gp->g_unit = GRF_CL5426_UNIT; 364 gp->g_mode = cl_mode; 365 gp->g_conpri = grfcl_cnprobe(); 366 gp->g_flags = GF_ALIVE; 367 368 /* wakeup the board */ 369 cl_boardinit(gp); 370 #ifdef CL5426CONSOLE 371 grfcl_iteinit(gp); 372 (void) cl_load_mon(gp, &clconsole_mode); 373 #endif 374 375 } 376 377 /* 378 * attach grf (once) 379 */ 380 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 381 attachflag = 1; 382 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 383 switch (cltype) { 384 case PICASSO: 385 if (cl_64bit == 1) { 386 printf("Picasso IV"); 387 /* 135MHz will be supported if we 388 * have a palette doubling mode. 389 */ 390 cl_maxpixelclock = 86000000; 391 } 392 else { 393 printf("Picasso II"); 394 395 /* check for PicassoII+ (crest) */ 396 if(zap->serno == 0x00100000) 397 printf("+"); 398 399 /* determine used Gfx/chipset (crest) */ 400 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 401 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 402 case 0x24: 403 printf(" (with CL-GD5426)"); 404 break; 405 case 0x26: 406 printf(" (with CL-GD5428)"); 407 break; 408 case 0x27: 409 printf(" (with CL-GD5429)"); 410 break; 411 } 412 cl_maxpixelclock = 86000000; 413 } 414 break; 415 case SPECTRUM: 416 printf("Spectrum"); 417 cl_maxpixelclock = 90000000; 418 break; 419 case PICCOLO: 420 if (cl_64bit == 1) { 421 printf("Piccolo SD64"); 422 /* 110MHz will be supported if we 423 * have a palette doubling mode. 424 */ 425 cl_maxpixelclock = 90000000; 426 } else { 427 printf("Piccolo"); 428 cl_maxpixelclock = 90000000; 429 } 430 break; 431 } 432 printf(" being used\n"); 433 #ifdef CL_OVERCLOCK 434 cl_maxpixelclock = 115000000; 435 #endif 436 } else { 437 if (!attachflag) 438 printf("grfcl unattached!!\n"); 439 } 440 } 441 442 int 443 grfclprint(auxp, pnp) 444 void *auxp; 445 const char *pnp; 446 { 447 if (pnp) 448 printf("ite at %s: ", pnp); 449 return (UNCONF); 450 } 451 452 void 453 cl_boardinit(gp) 454 struct grf_softc *gp; 455 { 456 unsigned char *ba = gp->g_regkva; 457 int x; 458 459 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 460 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 461 delay(200000); /* wait some time (two frames as of now) */ 462 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 463 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 464 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 465 cl_fbsize = cl_fbautosize; 466 } else { 467 468 /* wakeup board and flip passthru OFF */ 469 RegWakeup(ba); 470 RegOnpass(ba); 471 472 vgaw(ba, 0x46e8, 0x16); 473 vgaw(ba, 0x102, 1); 474 vgaw(ba, 0x46e8, 0x0e); 475 if (cl_64bit != 1) 476 vgaw(ba, 0x3c3, 1); 477 478 cl_fbsize = cl_fbautosize; 479 480 /* setup initial unchanging parameters */ 481 482 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 483 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 484 485 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 486 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 487 488 if (cl_64bit == 1) { 489 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 490 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 491 } else { 492 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 493 } 494 WSeq(ba, SEQ_ID_RESET, 0x03); 495 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 496 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 497 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 498 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 499 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 500 if (cl_64bit == 1) 501 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 502 else 503 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 504 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 505 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 506 507 if (cl_64bit == 1) 508 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 509 else 510 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 511 512 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 513 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 514 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 515 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 516 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 517 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 518 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 519 520 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 521 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 522 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 523 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 524 if (cl_64bit == 1) { 525 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 526 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 527 } 528 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 529 530 WGfx(ba, GCT_ID_SET_RESET, 0x00); 531 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 532 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 533 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 534 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 535 WGfx(ba, GCT_ID_MISC, 0x01); 536 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 537 WGfx(ba, GCT_ID_BITMASK, 0xff); 538 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 539 540 for (x = 0; x < 0x10; x++) 541 WAttr(ba, x, x); 542 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 543 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 544 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 545 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 546 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 547 WAttr(ba, 0x34, 0x00); 548 549 vgaw(ba, VDAC_MASK, 0xff); 550 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 551 552 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 553 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 554 } 555 556 /* colors initially set to greyscale */ 557 vgaw(ba, VDAC_ADDRESS_W, 0); 558 for (x = 255; x >= 0; x--) { 559 vgaw(ba, VDAC_DATA, x); 560 vgaw(ba, VDAC_DATA, x); 561 vgaw(ba, VDAC_DATA, x); 562 } 563 /* set sprite bitmap pointers */ 564 cl_cursprite.image = cl_imageptr; 565 cl_cursprite.mask = cl_maskptr; 566 cl_cursprite.cmap.red = cl_sprred; 567 cl_cursprite.cmap.green = cl_sprgreen; 568 cl_cursprite.cmap.blue = cl_sprblue; 569 570 if (cl_64bit == 0) { 571 572 /* check for 1MB or 2MB board (crest) */ 573 volatile unsigned long *cl_fbtestaddr; 574 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 575 576 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 577 *cl_fbtestaddr = 0x12345678; 578 579 if (*cl_fbtestaddr != 0x12345678) { 580 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 581 cl_fbsize = 0x100000; 582 } 583 else 584 { 585 cl_fbsize = 0x200000; 586 } 587 } 588 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 589 } 590 591 592 int 593 cl_getvmode(gp, vm) 594 struct grf_softc *gp; 595 struct grfvideo_mode *vm; 596 { 597 struct grfvideo_mode *gv; 598 599 #ifdef CL5426CONSOLE 600 /* Handle grabbing console mode */ 601 if (vm->mode_num == 255) { 602 bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode)); 603 /* XXX so grfconfig can tell us the correct text dimensions. */ 604 vm->depth = clconsole_mode.fy; 605 } else 606 #endif 607 { 608 if (vm->mode_num == 0) 609 vm->mode_num = (monitor_current - monitor_def) + 1; 610 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 611 return (EINVAL); 612 gv = monitor_def + (vm->mode_num - 1); 613 if (gv->mode_num == 0) 614 return (EINVAL); 615 616 bcopy(gv, vm, sizeof(struct grfvideo_mode)); 617 } 618 619 /* adjust internal values to pixel values */ 620 621 vm->hblank_start *= 8; 622 vm->hsync_start *= 8; 623 vm->hsync_stop *= 8; 624 vm->htotal *= 8; 625 626 return (0); 627 } 628 629 630 int 631 cl_setvmode(gp, mode) 632 struct grf_softc *gp; 633 unsigned mode; 634 { 635 if (!mode || (mode > monitor_def_max) || 636 monitor_def[mode - 1].mode_num == 0) 637 return (EINVAL); 638 639 monitor_current = monitor_def + (mode - 1); 640 641 return (0); 642 } 643 644 #ifndef CL5426CONSOLE 645 void 646 cl_off(gp) 647 struct grf_softc *gp; 648 { 649 char *ba = gp->g_regkva; 650 651 /* 652 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 653 * on just in case it didn't work...but then it doesn't matter does 654 * it? =) 655 */ 656 RegOnpass(ba); 657 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 658 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 659 } 660 #endif 661 662 int 663 cl_blank(gp, on) 664 struct grf_softc *gp; 665 int *on; 666 { 667 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 668 return(0); 669 } 670 671 /* 672 * Change the mode of the display. 673 * Return a UNIX error number or 0 for success. 674 */ 675 int 676 cl_mode(gp, cmd, arg, a2, a3) 677 register struct grf_softc *gp; 678 u_long cmd; 679 void *arg; 680 u_long a2; 681 int a3; 682 { 683 int error; 684 685 switch (cmd) { 686 case GM_GRFON: 687 error = cl_load_mon(gp, 688 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 689 return (error); 690 691 case GM_GRFOFF: 692 #ifndef CL5426CONSOLE 693 cl_off(gp); 694 #else 695 cl_load_mon(gp, &clconsole_mode); 696 #endif 697 return (0); 698 699 case GM_GRFCONFIG: 700 return (0); 701 702 case GM_GRFGETVMODE: 703 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 704 705 case GM_GRFSETVMODE: 706 error = cl_setvmode(gp, *(unsigned *) arg); 707 if (!error && (gp->g_flags & GF_GRFON)) 708 cl_load_mon(gp, 709 (struct grfcltext_mode *) monitor_current); 710 return (error); 711 712 case GM_GRFGETNUMVM: 713 *(int *) arg = monitor_def_max; 714 return (0); 715 716 case GM_GRFIOCTL: 717 return (cl_ioctl(gp, a2, arg)); 718 719 default: 720 break; 721 } 722 723 return (EINVAL); 724 } 725 726 int 727 cl_ioctl(gp, cmd, data) 728 register struct grf_softc *gp; 729 u_long cmd; 730 void *data; 731 { 732 switch (cmd) { 733 case GRFIOCGSPRITEPOS: 734 return (cl_getmousepos(gp, (struct grf_position *) data)); 735 736 case GRFIOCSSPRITEPOS: 737 return (cl_setmousepos(gp, (struct grf_position *) data)); 738 739 case GRFIOCSSPRITEINF: 740 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 741 742 case GRFIOCGSPRITEINF: 743 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 744 745 case GRFIOCGSPRITEMAX: 746 return (cl_getspritemax(gp, (struct grf_position *) data)); 747 748 case GRFIOCGETCMAP: 749 return (cl_getcmap(gp, (struct grf_colormap *) data)); 750 751 case GRFIOCPUTCMAP: 752 return (cl_putcmap(gp, (struct grf_colormap *) data)); 753 754 case GRFIOCBITBLT: 755 break; 756 757 case GRFTOGGLE: 758 return (cl_toggle(gp, 0)); 759 760 case GRFIOCSETMON: 761 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 762 763 case GRFIOCBLANK: 764 return (cl_blank(gp, (int *)data)); 765 766 } 767 return (EINVAL); 768 } 769 770 int 771 cl_getmousepos(gp, data) 772 struct grf_softc *gp; 773 struct grf_position *data; 774 { 775 data->x = cl_cursprite.pos.x; 776 data->y = cl_cursprite.pos.y; 777 return (0); 778 } 779 780 void 781 cl_writesprpos(ba, x, y) 782 volatile char *ba; 783 short x; 784 short y; 785 { 786 /* we want to use a 16-bit write to 3c4 so no macros used */ 787 volatile unsigned char *cwp; 788 volatile unsigned short *wp; 789 790 cwp = ba + 0x3c4; 791 wp = (unsigned short *)cwp; 792 793 /* 794 * don't ask me why, but apparently you can't do a 16-bit write with 795 * x-position like with y-position below (dagge) 796 */ 797 cwp[0] = 0x10 | ((x << 5) & 0xff); 798 cwp[1] = (x >> 3) & 0xff; 799 800 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 801 } 802 803 void 804 writeshifted(to, shiftx, shifty) 805 volatile char *to; 806 char shiftx; 807 char shifty; 808 { 809 register char y; 810 unsigned long long *tptr, *iptr, *mptr, line; 811 812 tptr = (unsigned long long *) to; 813 iptr = (unsigned long long *) cl_cursprite.image; 814 mptr = (unsigned long long *) cl_cursprite.mask; 815 816 shiftx = shiftx < 0 ? 0 : shiftx; 817 shifty = shifty < 0 ? 0 : shifty; 818 819 /* start reading shifty lines down, and 820 * shift each line in by shiftx 821 */ 822 for (y = shifty; y < 64; y++) { 823 824 /* image */ 825 line = iptr[y]; 826 *tptr++ = line << shiftx; 827 828 /* mask */ 829 line = mptr[y]; 830 *tptr++ = line << shiftx; 831 } 832 833 /* clear the remainder */ 834 for (y = shifty; y > 0; y--) { 835 *tptr++ = 0; 836 *tptr++ = 0; 837 } 838 } 839 840 int 841 cl_setmousepos(gp, data) 842 struct grf_softc *gp; 843 struct grf_position *data; 844 { 845 volatile char *ba = gp->g_regkva; 846 short rx, ry, prx, pry; 847 #ifdef CL_SHIFTSPRITE 848 volatile char *fb = gp->g_fbkva; 849 volatile char *sprite = fb + (cl_fbsize - 1024); 850 #endif 851 852 /* no movement */ 853 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 854 return (0); 855 856 /* current and previous real coordinates */ 857 rx = data->x - cl_cursprite.hot.x; 858 ry = data->y - cl_cursprite.hot.y; 859 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 860 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 861 862 /* 863 * if we are/were on an edge, create (un)shifted bitmap -- 864 * ripped out optimization (not extremely worthwhile, 865 * and kind of buggy anyhow). 866 */ 867 #ifdef CL_SHIFTSPRITE 868 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 869 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 870 } 871 #endif 872 873 /* do movement, save position */ 874 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 875 cl_cursprite.pos.x = data->x; 876 cl_cursprite.pos.y = data->y; 877 878 return (0); 879 } 880 881 int 882 cl_getspriteinfo(gp, data) 883 struct grf_softc *gp; 884 struct grf_spriteinfo *data; 885 { 886 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 887 copyout(cl_cursprite.image, data->image, 64 * 8); 888 copyout(cl_cursprite.mask, data->mask, 64 * 8); 889 return (0); 890 } 891 892 static int 893 cl_setspriteinfo(gp, data) 894 struct grf_softc *gp; 895 struct grf_spriteinfo *data; 896 { 897 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 898 volatile char *sprite = fb + (cl_fbsize - 1024); 899 900 if (data->set & GRFSPRSET_SHAPE) { 901 902 short dsx, dsy, i; 903 unsigned long *di, *dm, *si, *sm; 904 unsigned long ssi[128], ssm[128]; 905 struct grf_position gpos; 906 907 908 /* check for a too large sprite (no clipping!) */ 909 dsy = data->size.y; 910 dsx = data->size.x; 911 if (dsy > 64 || dsx > 64) 912 return(EINVAL); 913 914 /* prepare destination */ 915 di = (unsigned long *)cl_cursprite.image; 916 dm = (unsigned long *)cl_cursprite.mask; 917 cl_memset((unsigned char *)di, 0, 8*64); 918 cl_memset((unsigned char *)dm, 0, 8*64); 919 920 /* two alternatives: 64 across, then it's 921 * the same format we use, just copy. Otherwise, 922 * copy into tmp buf and recopy skipping the 923 * unused 32 bits. 924 */ 925 if ((dsx - 1) / 32) { 926 copyin(data->image, di, 8 * dsy); 927 copyin(data->mask, dm, 8 * dsy); 928 } else { 929 si = ssi; sm = ssm; 930 copyin(data->image, si, 4 * dsy); 931 copyin(data->mask, sm, 4 * dsy); 932 for (i = 0; i < dsy; i++) { 933 *di = *si++; 934 *dm = *sm++; 935 di += 2; 936 dm += 2; 937 } 938 } 939 940 /* set size */ 941 cl_cursprite.size.x = data->size.x; 942 cl_cursprite.size.y = data->size.y; 943 944 /* forcably load into board */ 945 gpos.x = cl_cursprite.pos.x; 946 gpos.y = cl_cursprite.pos.y; 947 cl_cursprite.pos.x = -1; 948 cl_cursprite.pos.y = -1; 949 writeshifted(sprite, 0, 0); 950 cl_setmousepos(gp, &gpos); 951 952 } 953 if (data->set & GRFSPRSET_HOT) { 954 955 cl_cursprite.hot = data->hot; 956 957 } 958 if (data->set & GRFSPRSET_CMAP) { 959 960 u_char red[2], green[2], blue[2]; 961 962 copyin(data->cmap.red, red, 2); 963 copyin(data->cmap.green, green, 2); 964 copyin(data->cmap.blue, blue, 2); 965 bcopy(red, cl_cursprite.cmap.red, 2); 966 bcopy(green, cl_cursprite.cmap.green, 2); 967 bcopy(blue, cl_cursprite.cmap.blue, 2); 968 969 /* enable and load colors 256 & 257 */ 970 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 971 972 /* 256 */ 973 vgaw(ba, VDAC_ADDRESS_W, 0x00); 974 if (cltype == PICASSO) { 975 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 976 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 977 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 978 } else { 979 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 980 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 981 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 982 } 983 984 /* 257 */ 985 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 986 if (cltype == PICASSO) { 987 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 988 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 989 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 990 } else { 991 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 992 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 993 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 994 } 995 996 /* turn on/off sprite */ 997 if (cl_cursprite.enable) { 998 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 999 } else { 1000 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1001 } 1002 1003 } 1004 if (data->set & GRFSPRSET_ENABLE) { 1005 1006 if (data->enable == 1) { 1007 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1008 cl_cursprite.enable = 1; 1009 } else { 1010 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1011 cl_cursprite.enable = 0; 1012 } 1013 1014 } 1015 if (data->set & GRFSPRSET_POS) { 1016 1017 /* force placement */ 1018 cl_cursprite.pos.x = -1; 1019 cl_cursprite.pos.y = -1; 1020 1021 /* do it */ 1022 cl_setmousepos(gp, &data->pos); 1023 1024 } 1025 return (0); 1026 } 1027 1028 static int 1029 cl_getspritemax(gp, data) 1030 struct grf_softc *gp; 1031 struct grf_position *data; 1032 { 1033 if (gp->g_display.gd_planes == 24) 1034 return (EINVAL); 1035 data->x = 64; 1036 data->y = 64; 1037 return (0); 1038 } 1039 1040 int 1041 cl_setmonitor(gp, gv) 1042 struct grf_softc *gp; 1043 struct grfvideo_mode *gv; 1044 { 1045 struct grfvideo_mode *md; 1046 1047 if (!cl_mondefok(gv)) 1048 return(EINVAL); 1049 1050 #ifdef CL5426CONSOLE 1051 /* handle interactive setting of console mode */ 1052 if (gv->mode_num == 255) { 1053 bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode)); 1054 clconsole_mode.gv.hblank_start /= 8; 1055 clconsole_mode.gv.hsync_start /= 8; 1056 clconsole_mode.gv.hsync_stop /= 8; 1057 clconsole_mode.gv.htotal /= 8; 1058 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1059 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1060 if (!(gp->g_flags & GF_GRFON)) 1061 cl_load_mon(gp, &clconsole_mode); 1062 ite_reinit(gp->g_itedev); 1063 return (0); 1064 } 1065 #endif 1066 1067 md = monitor_def + (gv->mode_num - 1); 1068 bcopy(gv, md, sizeof(struct grfvideo_mode)); 1069 1070 /* adjust pixel oriented values to internal rep. */ 1071 1072 md->hblank_start /= 8; 1073 md->hsync_start /= 8; 1074 md->hsync_stop /= 8; 1075 md->htotal /= 8; 1076 1077 return (0); 1078 } 1079 1080 int 1081 cl_getcmap(gfp, cmap) 1082 struct grf_softc *gfp; 1083 struct grf_colormap *cmap; 1084 { 1085 volatile unsigned char *ba; 1086 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1087 short x; 1088 int error; 1089 1090 if (cmap->count == 0 || cmap->index >= 256) 1091 return 0; 1092 1093 if (cmap->index + cmap->count > 256) 1094 cmap->count = 256 - cmap->index; 1095 1096 ba = gfp->g_regkva; 1097 /* first read colors out of the chip, then copyout to userspace */ 1098 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1099 x = cmap->count - 1; 1100 1101 /* 1102 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1103 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1104 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1105 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1106 */ 1107 1108 /* 1109 * The source for the above comment is somewhat unknow to me. 1110 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1111 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1112 * be native to the chipset. This requires special programming for the 1113 * CLUT in 8BPP to compensate and avoid false colors. 1114 * I didn't find any special stuff for 15 and 16BPP though, crest. 1115 */ 1116 1117 switch (cltype) { 1118 case SPECTRUM: 1119 case PICCOLO: 1120 rp = blue + cmap->index; 1121 gp = green + cmap->index; 1122 bp = red + cmap->index; 1123 break; 1124 case PICASSO: 1125 rp = red + cmap->index; 1126 gp = green + cmap->index; 1127 bp = blue + cmap->index; 1128 break; 1129 default: 1130 rp = gp = bp = 0; 1131 break; 1132 } 1133 1134 do { 1135 *rp++ = vgar(ba, VDAC_DATA) << 2; 1136 *gp++ = vgar(ba, VDAC_DATA) << 2; 1137 *bp++ = vgar(ba, VDAC_DATA) << 2; 1138 } while (x-- > 0); 1139 1140 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1141 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1142 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1143 return (0); 1144 1145 return (error); 1146 } 1147 1148 int 1149 cl_putcmap(gfp, cmap) 1150 struct grf_softc *gfp; 1151 struct grf_colormap *cmap; 1152 { 1153 volatile unsigned char *ba; 1154 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1155 short x; 1156 int error; 1157 1158 if (cmap->count == 0 || cmap->index >= 256) 1159 return (0); 1160 1161 if (cmap->index + cmap->count > 256) 1162 cmap->count = 256 - cmap->index; 1163 1164 /* first copy the colors into kernelspace */ 1165 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1166 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1167 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1168 ba = gfp->g_regkva; 1169 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1170 x = cmap->count - 1; 1171 1172 switch (cltype) { 1173 case SPECTRUM: 1174 case PICCOLO: 1175 rp = blue + cmap->index; 1176 gp = green + cmap->index; 1177 bp = red + cmap->index; 1178 break; 1179 case PICASSO: 1180 rp = red + cmap->index; 1181 gp = green + cmap->index; 1182 bp = blue + cmap->index; 1183 break; 1184 default: 1185 rp = gp = bp = 0; 1186 break; 1187 } 1188 1189 do { 1190 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1191 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1192 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1193 } while (x-- > 0); 1194 return (0); 1195 } else 1196 return (error); 1197 } 1198 1199 1200 int 1201 cl_toggle(gp, wopp) 1202 struct grf_softc *gp; 1203 unsigned short wopp; /* don't need that one yet, ill */ 1204 { 1205 volatile caddr_t ba; 1206 1207 ba = gp->g_regkva; 1208 1209 if (pass_toggle) { 1210 RegOffpass(ba); 1211 } else { 1212 RegOnpass(ba); 1213 } 1214 return (0); 1215 } 1216 1217 static void 1218 cl_CompFQ(fq, num, denom, clkdoub) 1219 u_int fq; 1220 u_char *num; 1221 u_char *denom; 1222 u_char *clkdoub; 1223 { 1224 #define OSC 14318180 1225 /* OK, here's what we're doing here: 1226 * 1227 * OSC * NUMERATOR 1228 * VCLK = ------------------- Hz 1229 * DENOMINATOR * (1+P) 1230 * 1231 * so we're given VCLK and we should give out some useful 1232 * values.... 1233 * 1234 * NUMERATOR is 7 bits wide 1235 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1236 * 1237 * We run through all the possible combinations and 1238 * return the values which deviate the least from the chosen frequency. 1239 * 1240 */ 1241 #define OSC 14318180 1242 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1243 1244 unsigned char n, d, p, minn, mind, minp = 0; 1245 unsigned long err, minerr; 1246 1247 /* 1248 numer = 0x00 - 0x7f 1249 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1250 */ 1251 1252 /* find lowest error in 6144 iterations. */ 1253 minerr = fq; 1254 minn = 0; 1255 mind = 0; 1256 p = 0; 1257 1258 if ((cl_64bit == 1) && (fq >= 86000000)) 1259 { 1260 for (d = 1; d < 0x20; d++) { 1261 for (n = 1; n < 0x80; n++) { 1262 err = abs(count(n, d, 0) - fq); 1263 if (err < minerr) { 1264 minerr = err; 1265 minn = n; 1266 mind = d; 1267 minp = 1; 1268 } 1269 } 1270 } 1271 *clkdoub = 1; 1272 } 1273 else { 1274 for (d = 1; d < 0x20; d++) { 1275 for (n = 1; n < 0x80; n++) { 1276 err = abs(count(n, d, p) - fq); 1277 if (err < minerr) { 1278 minerr = err; 1279 minn = n; 1280 mind = d; 1281 minp = p; 1282 } 1283 } 1284 if (d == 0x1f && p == 0) { 1285 p = 1; 1286 d = 0x0f; 1287 } 1288 } 1289 *clkdoub = 0; 1290 } 1291 1292 *num = minn; 1293 *denom = (mind << 1) | minp; 1294 if (minerr > 500000) 1295 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1296 return; 1297 } 1298 1299 int 1300 cl_mondefok(gv) 1301 struct grfvideo_mode *gv; 1302 { 1303 unsigned long maxpix; 1304 1305 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1306 if (gv->mode_num != 255 || gv->depth != 4) 1307 return(0); 1308 1309 switch (gv->depth) { 1310 case 4: 1311 if (gv->mode_num != 255) 1312 return(0); 1313 case 1: 1314 case 8: 1315 maxpix = cl_maxpixelclock; 1316 if (cl_64bit == 1) 1317 { 1318 if (cltype == PICASSO) /* Picasso IV */ 1319 maxpix = 135000000; 1320 else /* Piccolo SD64 */ 1321 maxpix = 110000000; 1322 } 1323 break; 1324 case 15: 1325 case 16: 1326 if (cl_64bit == 1) 1327 maxpix = 85000000; 1328 else 1329 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1330 break; 1331 case 24: 1332 if ((cltype == PICASSO) && (cl_64bit == 1)) 1333 maxpix = 85000000; 1334 else 1335 maxpix = cl_maxpixelclock / 3; 1336 break; 1337 case 32: 1338 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1339 maxpix = 50000000; 1340 else 1341 maxpix = 0; 1342 break; 1343 default: 1344 printf("grfcl: Illegal depth in mode %d\n", 1345 (int) gv->mode_num); 1346 return (0); 1347 } 1348 1349 if (gv->pixel_clock > maxpix) { 1350 printf("grfcl: Pixelclock too high in mode %d\n", 1351 (int) gv->mode_num); 1352 return (0); 1353 } 1354 1355 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1356 printf("grfcl: sync-on-green is not supported\n"); 1357 return (0); 1358 } 1359 1360 return (1); 1361 } 1362 1363 int 1364 cl_load_mon(gp, md) 1365 struct grf_softc *gp; 1366 struct grfcltext_mode *md; 1367 { 1368 struct grfvideo_mode *gv; 1369 struct grfinfo *gi; 1370 volatile caddr_t ba, fb; 1371 unsigned char num0, denom0, clkdoub; 1372 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1373 VSE, VT; 1374 int clkmul, offsmul, clkmode; 1375 int vmul; 1376 int sr15; 1377 unsigned char hvsync_pulse; 1378 char TEXT; 1379 1380 /* identity */ 1381 gv = &md->gv; 1382 TEXT = (gv->depth == 4); 1383 1384 if (!cl_mondefok(gv)) { 1385 printf("grfcl: Monitor definition not ok\n"); 1386 return (0); 1387 } 1388 1389 ba = gp->g_regkva; 1390 fb = gp->g_fbkva; 1391 1392 /* provide all needed information in grf device-independant locations */ 1393 gp->g_data = (caddr_t) gv; 1394 gi = &gp->g_display; 1395 gi->gd_regaddr = (caddr_t) kvtop(ba); 1396 gi->gd_regsize = 64 * 1024; 1397 gi->gd_fbaddr = (caddr_t) kvtop(fb); 1398 gi->gd_fbsize = cl_fbsize; 1399 gi->gd_colors = 1 << gv->depth; 1400 gi->gd_planes = gv->depth; 1401 gi->gd_fbwidth = gv->disp_width; 1402 gi->gd_fbheight = gv->disp_height; 1403 gi->gd_fbx = 0; 1404 gi->gd_fby = 0; 1405 if (TEXT) { 1406 gi->gd_dwidth = md->fx * md->cols; 1407 gi->gd_dheight = md->fy * md->rows; 1408 } else { 1409 gi->gd_dwidth = gv->disp_width; 1410 gi->gd_dheight = gv->disp_height; 1411 } 1412 gi->gd_dx = 0; 1413 gi->gd_dy = 0; 1414 1415 /* get display mode parameters */ 1416 1417 HBS = gv->hblank_start; 1418 HSS = gv->hsync_start; 1419 HSE = gv->hsync_stop; 1420 HBE = gv->htotal - 1; 1421 HT = gv->htotal; 1422 VBS = gv->vblank_start; 1423 VSS = gv->vsync_start; 1424 VSE = gv->vsync_stop; 1425 VBE = gv->vtotal - 1; 1426 VT = gv->vtotal; 1427 1428 if (TEXT) 1429 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1430 else 1431 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1432 VDE = gv->disp_height - 1; 1433 1434 /* adjustments */ 1435 switch (gv->depth) { 1436 case 8: 1437 clkmul = 1; 1438 offsmul = 1; 1439 clkmode = 0x0; 1440 break; 1441 case 15: 1442 case 16: 1443 clkmul = 1; 1444 offsmul = 2; 1445 clkmode = 0x6; 1446 break; 1447 case 24: 1448 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1449 clkmul = 1; 1450 else 1451 clkmul = 3; 1452 offsmul = 3; 1453 clkmode = 0x4; 1454 break; 1455 case 32: 1456 clkmul = 1; 1457 offsmul = 2; 1458 clkmode = 0x8; 1459 break; 1460 default: 1461 clkmul = 1; 1462 offsmul = 1; 1463 clkmode = 0x0; 1464 break; 1465 } 1466 1467 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1468 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1469 } else 1470 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1471 1472 vmul = 2; 1473 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1474 vmul = 1; 1475 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1476 vmul = 4; 1477 1478 VDE = VDE * vmul / 2; 1479 VBS = VBS * vmul / 2; 1480 VSS = VSS * vmul / 2; 1481 VSE = VSE * vmul / 2; 1482 VBE = VBE * vmul / 2; 1483 VT = VT * vmul / 2; 1484 1485 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1486 if (cl_64bit == 1) { 1487 if (TEXT || (gv->depth == 1)) 1488 sr15 = 0xd0; 1489 else 1490 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1491 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1492 } else { 1493 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1494 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1495 } 1496 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1497 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1498 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1499 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1500 1501 /* Set clock */ 1502 1503 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1504 1505 /* Horizontal/Vertical Sync Pulse */ 1506 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1507 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1508 hvsync_pulse &= ~0x40; 1509 else 1510 hvsync_pulse |= 0x40; 1511 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1512 hvsync_pulse &= ~0x80; 1513 else 1514 hvsync_pulse |= 0x80; 1515 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1516 1517 if (clkdoub) { 1518 HDE /= 2; 1519 HBS /= 2; 1520 HSS /= 2; 1521 HSE /= 2; 1522 HBE /= 2; 1523 HT /= 2; 1524 clkmode = 0x6; 1525 } 1526 1527 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1528 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1529 1530 /* load display parameters into board */ 1531 1532 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1533 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1534 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1535 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1536 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1537 WCrt(ba, CRT_ID_END_HOR_RETR, 1538 (HSE & 0x1f) | 1539 ((HBE & 0x20) ? 0x80 : 0x00)); 1540 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1541 WCrt(ba, CRT_ID_OVERFLOW, 1542 0x10 | 1543 ((VT & 0x100) ? 0x01 : 0x00) | 1544 ((VDE & 0x100) ? 0x02 : 0x00) | 1545 ((VSS & 0x100) ? 0x04 : 0x00) | 1546 ((VBS & 0x100) ? 0x08 : 0x00) | 1547 ((VT & 0x200) ? 0x20 : 0x00) | 1548 ((VDE & 0x200) ? 0x40 : 0x00) | 1549 ((VSS & 0x200) ? 0x80 : 0x00)); 1550 1551 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1552 0x40 | /* TEXT ? 0x00 ??? */ 1553 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1554 ((VBS & 0x200) ? 0x20 : 0x00) | 1555 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1556 1557 /* text cursor */ 1558 1559 if (TEXT) { 1560 #if CL_ULCURSOR 1561 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1562 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1563 #else 1564 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1565 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1566 #endif 1567 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1568 1569 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1570 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1571 } 1572 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1573 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1574 1575 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1576 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1577 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1578 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1579 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1580 1581 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1582 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1583 WCrt(ba, CRT_ID_LACE_CNTL, 1584 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1585 ((HBE & 0x40) ? 0x10 : 0x00) | 1586 ((HBE & 0x80) ? 0x20 : 0x00) | 1587 ((VBE & 0x100) ? 0x40 : 0x00) | 1588 ((VBE & 0x200) ? 0x80 : 0x00)); 1589 1590 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1591 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1592 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1593 1594 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1595 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1596 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1597 1598 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1599 sometimes, out of "secret" application note (crest) */ 1600 vgaw(ba, VDAC_MASK, 0); 1601 /* reset HDR "magic" access counter (crest) */ 1602 vgar(ba, VDAC_ADDRESS); 1603 1604 delay(200000); 1605 vgar(ba, VDAC_MASK); 1606 delay(200000); 1607 vgar(ba, VDAC_MASK); 1608 delay(200000); 1609 vgar(ba, VDAC_MASK); 1610 delay(200000); 1611 vgar(ba, VDAC_MASK); 1612 delay(200000); 1613 switch (gv->depth) { 1614 case 1: 1615 case 4: /* text */ 1616 vgaw(ba, VDAC_MASK, 0); 1617 HDE = gv->disp_width / 16; 1618 break; 1619 case 8: 1620 if (clkdoub) 1621 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1622 else 1623 vgaw(ba, VDAC_MASK, 0); 1624 HDE = gv->disp_width / 8; 1625 break; 1626 case 15: 1627 vgaw(ba, VDAC_MASK, 0xd0); 1628 HDE = gv->disp_width / 4; 1629 break; 1630 case 16: 1631 vgaw(ba, VDAC_MASK, 0xc1); 1632 HDE = gv->disp_width / 4; 1633 break; 1634 case 24: 1635 vgaw(ba, VDAC_MASK, 0xc5); 1636 HDE = (gv->disp_width / 8) * 3; 1637 break; 1638 case 32: 1639 vgaw(ba, VDAC_MASK, 0xc5); 1640 HDE = (gv->disp_width / 4); 1641 break; 1642 } 1643 1644 /* reset HDR "magic" access counter (crest) */ 1645 vgar(ba, VDAC_ADDRESS); 1646 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1647 vgaw(ba, VDAC_MASK, 0xff); 1648 1649 WCrt(ba, CRT_ID_OFFSET, HDE); 1650 if (cl_64bit == 1) { 1651 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1652 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1653 } 1654 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1655 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1656 0x22 | 1657 ((HDE > 0xff) ? 0x10 : 0x00)); 1658 1659 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1660 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1661 (gv->depth == 1) ? 0x01 : 0x0f); 1662 1663 /* text initialization */ 1664 1665 if (TEXT) { 1666 cl_inittextmode(gp); 1667 } 1668 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1669 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1670 1671 /* Pass-through */ 1672 1673 RegOffpass(ba); 1674 1675 return (1); 1676 } 1677 1678 void 1679 cl_inittextmode(gp) 1680 struct grf_softc *gp; 1681 { 1682 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1683 volatile unsigned char *ba = gp->g_regkva; 1684 unsigned char *fb = gp->g_fbkva; 1685 unsigned char *c, *f, y; 1686 unsigned short z; 1687 1688 1689 /* load text font into beginning of display memory. Each character 1690 * cell is 32 bytes long (enough for 4 planes) */ 1691 1692 SetTextPlane(ba, 0x02); 1693 cl_memset(fb, 0, 256 * 32); 1694 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1695 f = tm->fdata; 1696 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1697 for (y = 0; y < tm->fy; y++) 1698 *c++ = *f++; 1699 1700 /* clear out text/attr planes (three screens worth) */ 1701 1702 SetTextPlane(ba, 0x01); 1703 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1704 SetTextPlane(ba, 0x00); 1705 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1706 1707 /* print out a little init msg */ 1708 1709 c = (unsigned char *) (fb) + (tm->cols - 16); 1710 strcpy(c, "CIRRUS"); 1711 c[6] = 0x20; 1712 1713 /* set colors (B&W) */ 1714 1715 vgaw(ba, VDAC_ADDRESS_W, 0); 1716 for (z = 0; z < 256; z++) { 1717 unsigned char r, g, b; 1718 1719 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1720 1721 if (cltype == PICASSO) { 1722 r = clconscolors[y][0]; 1723 g = clconscolors[y][1]; 1724 b = clconscolors[y][2]; 1725 } else { 1726 b = clconscolors[y][0]; 1727 g = clconscolors[y][1]; 1728 r = clconscolors[y][2]; 1729 } 1730 vgaw(ba, VDAC_DATA, r >> 2); 1731 vgaw(ba, VDAC_DATA, g >> 2); 1732 vgaw(ba, VDAC_DATA, b >> 2); 1733 } 1734 } 1735 1736 void 1737 cl_memset(d, c, l) 1738 unsigned char *d; 1739 unsigned char c; 1740 int l; 1741 { 1742 for (; l > 0; l--) 1743 *d++ = c; 1744 } 1745 1746 /* 1747 * Special wakeup/passthrough registers on graphics boards 1748 * 1749 * The methods have diverged a bit for each board, so 1750 * WPass(P) has been converted into a set of specific 1751 * inline functions. 1752 */ 1753 static void 1754 RegWakeup(ba) 1755 volatile caddr_t ba; 1756 { 1757 1758 switch (cltype) { 1759 case SPECTRUM: 1760 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1761 break; 1762 case PICASSO: 1763 /* Picasso needs no wakeup */ 1764 break; 1765 case PICCOLO: 1766 if (cl_64bit == 1) 1767 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1768 else 1769 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1770 break; 1771 } 1772 delay(200000); 1773 } 1774 1775 static void 1776 RegOnpass(ba) 1777 volatile caddr_t ba; 1778 { 1779 1780 switch (cltype) { 1781 case SPECTRUM: 1782 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1783 break; 1784 case PICASSO: 1785 if (cl_64bit == 0) 1786 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1787 break; 1788 case PICCOLO: 1789 if (cl_64bit == 1) 1790 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1791 else 1792 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1793 break; 1794 } 1795 pass_toggle = 1; 1796 delay(200000); 1797 } 1798 1799 static void 1800 RegOffpass(ba) 1801 volatile caddr_t ba; 1802 { 1803 1804 switch (cltype) { 1805 case SPECTRUM: 1806 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1807 break; 1808 case PICASSO: 1809 if (cl_64bit == 0) 1810 vgaw(ba, PASS_ADDRESS_W, 0xff); 1811 break; 1812 case PICCOLO: 1813 if (cl_64bit == 1) 1814 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1815 else 1816 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1817 break; 1818 } 1819 pass_toggle = 0; 1820 delay(200000); 1821 } 1822 1823 #endif /* NGRFCL */ 1824
Indexes created Sun Sep 28 16:09:52 GMT 2025