grf_cl.c revision 1.25.16.1
1 /* $NetBSD: grf_cl.c,v 1.25.16.1 2001/08/25 06:15:04 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "opt_amigacons.h" 37 #include "grfcl.h" 38 #if NGRFCL > 0 39 40 /* 41 * Graphics routines for Cirrus CL GD 5426 boards, 42 * 43 * This code offers low-level routines to access Cirrus Cl GD 5426 44 * graphics-boards from within NetBSD for the Amiga. 45 * No warranties for any kind of function at all - this 46 * code may crash your hardware and scratch your harddisk. Use at your 47 * own risk. Freely distributable. 48 * 49 * Modified for Cirrus CL GD 5426 from 50 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 51 * Contributions by Ill, ScottE, MiL 52 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 53 * Picasso/040 patches (wee!) by crest 01/96 54 * 55 * PicassoIV support bz Klaus "crest" Burkert. 56 * Fixed interlace and doublescan, added clockdoubling and 57 * HiColor&TrueColor suuport by crest 01/97 58 * 59 * Thanks to Village Tronic Marketing Gmbh for providing me with 60 * a Picasso-II board. 61 * Thanks for Integrated Electronics Oy Ab for providing me with 62 * Cirrus CL GD 542x family documentation. 63 * 64 * TODO: 65 * Mouse support (almost there! :-)) 66 * Blitter support 67 * 68 */ 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/errno.h> 73 #include <sys/ioctl.h> 74 #include <sys/device.h> 75 #include <sys/malloc.h> 76 77 #include <machine/cpu.h> 78 #include <dev/cons.h> 79 #include <amiga/dev/itevar.h> 80 #include <amiga/amiga/device.h> 81 #include <amiga/dev/grfioctl.h> 82 #include <amiga/dev/grfvar.h> 83 #include <amiga/dev/grf_clreg.h> 84 #include <amiga/dev/zbusvar.h> 85 86 int cl_mondefok __P((struct grfvideo_mode *)); 87 void cl_boardinit __P((struct grf_softc *)); 88 static void cl_CompFQ __P((u_int, u_char *, u_char *, u_char *)); 89 int cl_getvmode __P((struct grf_softc *, struct grfvideo_mode *)); 90 int cl_setvmode __P((struct grf_softc *, unsigned int)); 91 int cl_toggle __P((struct grf_softc *, unsigned short)); 92 int cl_getcmap __P((struct grf_softc *, struct grf_colormap *)); 93 int cl_putcmap __P((struct grf_softc *, struct grf_colormap *)); 94 #ifndef CL5426CONSOLE 95 void cl_off __P((struct grf_softc *)); 96 #endif 97 void cl_inittextmode __P((struct grf_softc *)); 98 int cl_ioctl __P((register struct grf_softc *, u_long, void *)); 99 int cl_getmousepos __P((struct grf_softc *, struct grf_position *)); 100 int cl_setmousepos __P((struct grf_softc *, struct grf_position *)); 101 static int cl_setspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 102 int cl_getspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 103 static int cl_getspritemax __P((struct grf_softc *, struct grf_position *)); 104 int cl_blank __P((struct grf_softc *, int *)); 105 int cl_setmonitor __P((struct grf_softc *, struct grfvideo_mode *)); 106 void cl_writesprpos __P((volatile char *, short, short)); 107 void writeshifted __P((volatile char *, char, char)); 108 109 static void RegWakeup __P((volatile caddr_t)); 110 static void RegOnpass __P((volatile caddr_t)); 111 static void RegOffpass __P((volatile caddr_t)); 112 113 void grfclattach __P((struct device *, struct device *, void *)); 114 int grfclprint __P((void *, const char *)); 115 int grfclmatch __P((struct device *, struct cfdata *, void *)); 116 void cl_memset __P((unsigned char *, unsigned char, int)); 117 118 /* Graphics display definitions. 119 * These are filled by 'grfconfig' using GRFIOCSETMON. 120 */ 121 #define monitor_def_max 24 122 static struct grfvideo_mode monitor_def[24] = { 123 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 124 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 125 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 126 }; 127 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 128 129 /* Patchable maximum pixel clock */ 130 unsigned long cl_maxpixelclock = 86000000; 131 132 /* Console display definition. 133 * Default hardcoded text mode. This grf_cl is set up to 134 * use one text mode only, and this is it. You may use 135 * grfconfig to change the mode after boot. 136 */ 137 /* Console font */ 138 #ifdef KFONT_8X11 139 #define CIRRUSFONT kernel_font_8x11 140 #define CIRRUSFONTY 11 141 #else 142 #define CIRRUSFONT kernel_font_8x8 143 #define CIRRUSFONTY 8 144 #endif 145 extern unsigned char CIRRUSFONT[]; 146 147 struct grfcltext_mode clconsole_mode = { 148 {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8, 149 481, 490, 498, 522, 0}, 150 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 151 }; 152 /* Console colors */ 153 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 154 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 155 }; 156 157 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 158 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 159 unsigned char pass_toggle; /* passthru status tracker */ 160 161 /* 162 * because all 542x-boards have 2 configdev entries, one for 163 * framebuffer mem and the other for regs, we have to hold onto 164 * the pointers globally until we match on both. This and 'cltype' 165 * are the primary obsticles to multiple board support, but if you 166 * have multiple boards you have bigger problems than grf_cl. 167 */ 168 static void *cl_fbaddr = 0; /* framebuffer */ 169 static void *cl_regaddr = 0; /* registers */ 170 static int cl_fbsize; /* framebuffer size */ 171 static int cl_fbautosize; /* framebuffer autoconfig size */ 172 173 174 /* 175 * current sprite info, if you add support for multiple boards 176 * make this an array or something 177 */ 178 struct grf_spriteinfo cl_cursprite; 179 180 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 181 * you add multiple board support 182 */ 183 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 184 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 185 186 /* standard driver stuff */ 187 struct cfattach grfcl_ca = { 188 sizeof(struct grf_softc), grfclmatch, grfclattach 189 }; 190 191 static struct cfdata *cfdata; 192 193 int 194 grfclmatch(pdp, cfp, auxp) 195 struct device *pdp; 196 struct cfdata *cfp; 197 void *auxp; 198 { 199 struct zbus_args *zap; 200 static int regprod, fbprod, fbprod2; 201 int error; 202 203 fbprod2 = 0; 204 zap = auxp; 205 206 #ifndef CL5426CONSOLE 207 if (amiga_realconfig == 0) 208 return (0); 209 #endif 210 211 /* Grab the first board we encounter as the preferred one. This will 212 * allow one board to work in a multiple 5426 board system, but not 213 * multiple boards at the same time. */ 214 if (cltype == 0) { 215 switch (zap->manid) { 216 case PICASSO: 217 switch (zap->prodid) { 218 case 11: 219 case 12: 220 regprod = 12; 221 fbprod = 11; 222 error = 0; 223 break; 224 case 22: 225 fbprod2 = 22; 226 error = 0; 227 break; 228 case 21: 229 case 23: 230 regprod = 23; 231 fbprod = 21; 232 cl_64bit = 1; 233 error = 0; 234 break; 235 case 24: 236 regprod = 24; 237 fbprod = 24; 238 cl_64bit = 1; 239 error = 0; 240 break; 241 default: 242 error = 1; 243 break; 244 } 245 if (error == 1) 246 return (0); 247 else 248 break; 249 case SPECTRUM: 250 if (zap->prodid != 2 && zap->prodid != 1) 251 return (0); 252 regprod = 2; 253 fbprod = 1; 254 break; 255 case PICCOLO: 256 switch (zap->prodid) { 257 case 5: 258 case 6: 259 regprod = 6; 260 fbprod = 5; 261 error = 0; 262 break; 263 case 10: 264 case 11: 265 regprod = 11; 266 fbprod = 10; 267 cl_64bit = 1; 268 error = 0; 269 break; 270 default: 271 error = 1; 272 break; 273 } 274 if (error == 1) 275 return (0); 276 else 277 break; 278 default: 279 return (0); 280 } 281 cltype = zap->manid; 282 } else { 283 if (cltype != zap->manid) { 284 return (0); 285 } 286 } 287 288 /* Configure either registers or framebuffer in any order */ 289 if ((cltype == PICASSO) && (cl_64bit == 1)) { 290 switch (zap->prodid) { 291 case 21: 292 cl_fbaddr = zap->va; 293 cl_fbautosize = zap->size; 294 break; 295 case 22: 296 cl_fbautosize += zap->size; 297 break; 298 case 23: 299 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 300 break; 301 case 24: 302 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 303 /* check for PicassoIV with 64MB config and handle it */ 304 if (zap->size == 0x04000000) { 305 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000); 306 } else { 307 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 308 } 309 cl_fbautosize = 0x400000; 310 break; 311 default: 312 return (0); 313 } 314 } 315 else { 316 if (zap->prodid == regprod) 317 cl_regaddr = zap->va; 318 else 319 if (zap->prodid == fbprod) { 320 cl_fbaddr = zap->va; 321 cl_fbautosize = zap->size; 322 } else 323 return (0); 324 } 325 326 #ifdef CL5426CONSOLE 327 if (amiga_realconfig == 0) { 328 cfdata = cfp; 329 } 330 #endif 331 332 return (1); 333 } 334 335 void 336 grfclattach(pdp, dp, auxp) 337 struct device *pdp, *dp; 338 void *auxp; 339 { 340 static struct grf_softc congrf; 341 struct zbus_args *zap; 342 struct grf_softc *gp; 343 static char attachflag = 0; 344 345 zap = auxp; 346 347 printf("\n"); 348 349 /* make sure both halves have matched */ 350 if (!cl_regaddr || !cl_fbaddr) 351 return; 352 353 /* do all that messy console/grf stuff */ 354 if (dp == NULL) 355 gp = &congrf; 356 else 357 gp = (struct grf_softc *) dp; 358 359 if (dp != NULL && congrf.g_regkva != 0) { 360 /* 361 * inited earlier, just copy (not device struct) 362 */ 363 bcopy(&congrf.g_display, &gp->g_display, 364 (char *) &gp[1] - (char *) &gp->g_display); 365 } else { 366 gp->g_regkva = (volatile caddr_t) cl_regaddr; 367 gp->g_fbkva = (volatile caddr_t) cl_fbaddr; 368 369 gp->g_unit = GRF_CL5426_UNIT; 370 gp->g_mode = cl_mode; 371 gp->g_conpri = grfcl_cnprobe(); 372 gp->g_flags = GF_ALIVE; 373 374 /* wakeup the board */ 375 cl_boardinit(gp); 376 #ifdef CL5426CONSOLE 377 grfcl_iteinit(gp); 378 (void) cl_load_mon(gp, &clconsole_mode); 379 #endif 380 381 } 382 383 /* 384 * attach grf (once) 385 */ 386 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 387 attachflag = 1; 388 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 389 switch (cltype) { 390 case PICASSO: 391 if (cl_64bit == 1) { 392 printf("Picasso IV"); 393 /* 135MHz will be supported if we 394 * have a palette doubling mode. 395 */ 396 cl_maxpixelclock = 86000000; 397 } 398 else { 399 printf("Picasso II"); 400 401 /* check for PicassoII+ (crest) */ 402 if(zap->serno == 0x00100000) 403 printf("+"); 404 405 /* determine used Gfx/chipset (crest) */ 406 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 407 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 408 case 0x24: 409 printf(" (with CL-GD5426)"); 410 break; 411 case 0x26: 412 printf(" (with CL-GD5428)"); 413 break; 414 case 0x27: 415 printf(" (with CL-GD5429)"); 416 break; 417 } 418 cl_maxpixelclock = 86000000; 419 } 420 break; 421 case SPECTRUM: 422 printf("Spectrum"); 423 cl_maxpixelclock = 90000000; 424 break; 425 case PICCOLO: 426 if (cl_64bit == 1) { 427 printf("Piccolo SD64"); 428 /* 110MHz will be supported if we 429 * have a palette doubling mode. 430 */ 431 cl_maxpixelclock = 90000000; 432 } else { 433 printf("Piccolo"); 434 cl_maxpixelclock = 90000000; 435 } 436 break; 437 } 438 printf(" being used\n"); 439 #ifdef CL_OVERCLOCK 440 cl_maxpixelclock = 115000000; 441 #endif 442 } else { 443 if (!attachflag) 444 printf("grfcl unattached!!\n"); 445 } 446 } 447 448 int 449 grfclprint(auxp, pnp) 450 void *auxp; 451 const char *pnp; 452 { 453 if (pnp) 454 printf("ite at %s: ", pnp); 455 return (UNCONF); 456 } 457 458 void 459 cl_boardinit(gp) 460 struct grf_softc *gp; 461 { 462 unsigned char *ba = gp->g_regkva; 463 int x; 464 465 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 466 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 467 delay(200000); /* wait some time (two frames as of now) */ 468 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 469 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 470 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 471 cl_fbsize = cl_fbautosize; 472 } else { 473 474 /* wakeup board and flip passthru OFF */ 475 RegWakeup(ba); 476 RegOnpass(ba); 477 478 vgaw(ba, 0x46e8, 0x16); 479 vgaw(ba, 0x102, 1); 480 vgaw(ba, 0x46e8, 0x0e); 481 if (cl_64bit != 1) 482 vgaw(ba, 0x3c3, 1); 483 484 cl_fbsize = cl_fbautosize; 485 486 /* setup initial unchanging parameters */ 487 488 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 489 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 490 491 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 492 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 493 494 if (cl_64bit == 1) { 495 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 496 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 497 } else { 498 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 499 } 500 WSeq(ba, SEQ_ID_RESET, 0x03); 501 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 502 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 503 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 504 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 505 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 506 if (cl_64bit == 1) 507 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 508 else 509 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 510 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 511 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 512 513 if (cl_64bit == 1) 514 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 515 else 516 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 517 518 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 519 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 520 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 521 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 522 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 523 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 524 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 525 526 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 527 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 528 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 529 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 530 if (cl_64bit == 1) { 531 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 532 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 533 } 534 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 535 536 WGfx(ba, GCT_ID_SET_RESET, 0x00); 537 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 538 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 539 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 540 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 541 WGfx(ba, GCT_ID_MISC, 0x01); 542 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 543 WGfx(ba, GCT_ID_BITMASK, 0xff); 544 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 545 546 for (x = 0; x < 0x10; x++) 547 WAttr(ba, x, x); 548 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 549 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 550 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 551 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 552 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 553 WAttr(ba, 0x34, 0x00); 554 555 vgaw(ba, VDAC_MASK, 0xff); 556 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 557 558 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 559 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 560 } 561 562 /* colors initially set to greyscale */ 563 vgaw(ba, VDAC_ADDRESS_W, 0); 564 for (x = 255; x >= 0; x--) { 565 vgaw(ba, VDAC_DATA, x); 566 vgaw(ba, VDAC_DATA, x); 567 vgaw(ba, VDAC_DATA, x); 568 } 569 /* set sprite bitmap pointers */ 570 cl_cursprite.image = cl_imageptr; 571 cl_cursprite.mask = cl_maskptr; 572 cl_cursprite.cmap.red = cl_sprred; 573 cl_cursprite.cmap.green = cl_sprgreen; 574 cl_cursprite.cmap.blue = cl_sprblue; 575 576 if (cl_64bit == 0) { 577 578 /* check for 1MB or 2MB board (crest) */ 579 volatile unsigned long *cl_fbtestaddr; 580 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 581 582 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 583 *cl_fbtestaddr = 0x12345678; 584 585 if (*cl_fbtestaddr != 0x12345678) { 586 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 587 cl_fbsize = 0x100000; 588 } 589 else 590 { 591 cl_fbsize = 0x200000; 592 } 593 } 594 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 595 } 596 597 598 int 599 cl_getvmode(gp, vm) 600 struct grf_softc *gp; 601 struct grfvideo_mode *vm; 602 { 603 struct grfvideo_mode *gv; 604 605 #ifdef CL5426CONSOLE 606 /* Handle grabbing console mode */ 607 if (vm->mode_num == 255) { 608 bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode)); 609 /* XXX so grfconfig can tell us the correct text dimensions. */ 610 vm->depth = clconsole_mode.fy; 611 } else 612 #endif 613 { 614 if (vm->mode_num == 0) 615 vm->mode_num = (monitor_current - monitor_def) + 1; 616 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 617 return (EINVAL); 618 gv = monitor_def + (vm->mode_num - 1); 619 if (gv->mode_num == 0) 620 return (EINVAL); 621 622 bcopy(gv, vm, sizeof(struct grfvideo_mode)); 623 } 624 625 /* adjust internal values to pixel values */ 626 627 vm->hblank_start *= 8; 628 vm->hsync_start *= 8; 629 vm->hsync_stop *= 8; 630 vm->htotal *= 8; 631 632 return (0); 633 } 634 635 636 int 637 cl_setvmode(gp, mode) 638 struct grf_softc *gp; 639 unsigned mode; 640 { 641 if (!mode || (mode > monitor_def_max) || 642 monitor_def[mode - 1].mode_num == 0) 643 return (EINVAL); 644 645 monitor_current = monitor_def + (mode - 1); 646 647 return (0); 648 } 649 650 #ifndef CL5426CONSOLE 651 void 652 cl_off(gp) 653 struct grf_softc *gp; 654 { 655 char *ba = gp->g_regkva; 656 657 /* 658 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 659 * on just in case it didn't work...but then it doesn't matter does 660 * it? =) 661 */ 662 RegOnpass(ba); 663 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 664 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 665 } 666 #endif 667 668 int 669 cl_blank(gp, on) 670 struct grf_softc *gp; 671 int *on; 672 { 673 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 674 return(0); 675 } 676 677 /* 678 * Change the mode of the display. 679 * Return a UNIX error number or 0 for success. 680 */ 681 int 682 cl_mode(gp, cmd, arg, a2, a3) 683 register struct grf_softc *gp; 684 u_long cmd; 685 void *arg; 686 u_long a2; 687 int a3; 688 { 689 int error; 690 691 switch (cmd) { 692 case GM_GRFON: 693 error = cl_load_mon(gp, 694 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 695 return (error); 696 697 case GM_GRFOFF: 698 #ifndef CL5426CONSOLE 699 cl_off(gp); 700 #else 701 cl_load_mon(gp, &clconsole_mode); 702 #endif 703 return (0); 704 705 case GM_GRFCONFIG: 706 return (0); 707 708 case GM_GRFGETVMODE: 709 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 710 711 case GM_GRFSETVMODE: 712 error = cl_setvmode(gp, *(unsigned *) arg); 713 if (!error && (gp->g_flags & GF_GRFON)) 714 cl_load_mon(gp, 715 (struct grfcltext_mode *) monitor_current); 716 return (error); 717 718 case GM_GRFGETNUMVM: 719 *(int *) arg = monitor_def_max; 720 return (0); 721 722 case GM_GRFIOCTL: 723 return (cl_ioctl(gp, a2, arg)); 724 725 default: 726 break; 727 } 728 729 return (EINVAL); 730 } 731 732 int 733 cl_ioctl(gp, cmd, data) 734 register struct grf_softc *gp; 735 u_long cmd; 736 void *data; 737 { 738 switch (cmd) { 739 case GRFIOCGSPRITEPOS: 740 return (cl_getmousepos(gp, (struct grf_position *) data)); 741 742 case GRFIOCSSPRITEPOS: 743 return (cl_setmousepos(gp, (struct grf_position *) data)); 744 745 case GRFIOCSSPRITEINF: 746 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 747 748 case GRFIOCGSPRITEINF: 749 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 750 751 case GRFIOCGSPRITEMAX: 752 return (cl_getspritemax(gp, (struct grf_position *) data)); 753 754 case GRFIOCGETCMAP: 755 return (cl_getcmap(gp, (struct grf_colormap *) data)); 756 757 case GRFIOCPUTCMAP: 758 return (cl_putcmap(gp, (struct grf_colormap *) data)); 759 760 case GRFIOCBITBLT: 761 break; 762 763 case GRFTOGGLE: 764 return (cl_toggle(gp, 0)); 765 766 case GRFIOCSETMON: 767 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 768 769 case GRFIOCBLANK: 770 return (cl_blank(gp, (int *)data)); 771 772 } 773 return (EINVAL); 774 } 775 776 int 777 cl_getmousepos(gp, data) 778 struct grf_softc *gp; 779 struct grf_position *data; 780 { 781 data->x = cl_cursprite.pos.x; 782 data->y = cl_cursprite.pos.y; 783 return (0); 784 } 785 786 void 787 cl_writesprpos(ba, x, y) 788 volatile char *ba; 789 short x; 790 short y; 791 { 792 /* we want to use a 16-bit write to 3c4 so no macros used */ 793 volatile unsigned char *cwp; 794 volatile unsigned short *wp; 795 796 cwp = ba + 0x3c4; 797 wp = (unsigned short *)cwp; 798 799 /* 800 * don't ask me why, but apparently you can't do a 16-bit write with 801 * x-position like with y-position below (dagge) 802 */ 803 cwp[0] = 0x10 | ((x << 5) & 0xff); 804 cwp[1] = (x >> 3) & 0xff; 805 806 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 807 } 808 809 void 810 writeshifted(to, shiftx, shifty) 811 volatile char *to; 812 char shiftx; 813 char shifty; 814 { 815 int y; 816 unsigned long long *tptr, *iptr, *mptr, line; 817 818 tptr = (unsigned long long *) to; 819 iptr = (unsigned long long *) cl_cursprite.image; 820 mptr = (unsigned long long *) cl_cursprite.mask; 821 822 shiftx = shiftx < 0 ? 0 : shiftx; 823 shifty = shifty < 0 ? 0 : shifty; 824 825 /* start reading shifty lines down, and 826 * shift each line in by shiftx 827 */ 828 for (y = shifty; y < 64; y++) { 829 830 /* image */ 831 line = iptr[y]; 832 *tptr++ = line << shiftx; 833 834 /* mask */ 835 line = mptr[y]; 836 *tptr++ = line << shiftx; 837 } 838 839 /* clear the remainder */ 840 for (y = shifty; y > 0; y--) { 841 *tptr++ = 0; 842 *tptr++ = 0; 843 } 844 } 845 846 int 847 cl_setmousepos(gp, data) 848 struct grf_softc *gp; 849 struct grf_position *data; 850 { 851 volatile char *ba = gp->g_regkva; 852 short rx, ry, prx, pry; 853 #ifdef CL_SHIFTSPRITE 854 volatile char *fb = gp->g_fbkva; 855 volatile char *sprite = fb + (cl_fbsize - 1024); 856 #endif 857 858 /* no movement */ 859 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 860 return (0); 861 862 /* current and previous real coordinates */ 863 rx = data->x - cl_cursprite.hot.x; 864 ry = data->y - cl_cursprite.hot.y; 865 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 866 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 867 868 /* 869 * if we are/were on an edge, create (un)shifted bitmap -- 870 * ripped out optimization (not extremely worthwhile, 871 * and kind of buggy anyhow). 872 */ 873 #ifdef CL_SHIFTSPRITE 874 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 875 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 876 } 877 #endif 878 879 /* do movement, save position */ 880 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 881 cl_cursprite.pos.x = data->x; 882 cl_cursprite.pos.y = data->y; 883 884 return (0); 885 } 886 887 int 888 cl_getspriteinfo(gp, data) 889 struct grf_softc *gp; 890 struct grf_spriteinfo *data; 891 { 892 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 893 copyout(cl_cursprite.image, data->image, 64 * 8); 894 copyout(cl_cursprite.mask, data->mask, 64 * 8); 895 return (0); 896 } 897 898 static int 899 cl_setspriteinfo(gp, data) 900 struct grf_softc *gp; 901 struct grf_spriteinfo *data; 902 { 903 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 904 volatile char *sprite = fb + (cl_fbsize - 1024); 905 906 if (data->set & GRFSPRSET_SHAPE) { 907 908 unsigned short dsx, dsy, i; 909 unsigned long *di, *dm, *si, *sm; 910 unsigned long ssi[128], ssm[128]; 911 struct grf_position gpos; 912 913 914 /* check for a too large sprite (no clipping!) */ 915 dsy = data->size.y; 916 dsx = data->size.x; 917 if (dsy > 64 || dsx > 64) 918 return(EINVAL); 919 920 /* prepare destination */ 921 di = (unsigned long *)cl_cursprite.image; 922 dm = (unsigned long *)cl_cursprite.mask; 923 cl_memset((unsigned char *)di, 0, 8*64); 924 cl_memset((unsigned char *)dm, 0, 8*64); 925 926 /* two alternatives: 64 across, then it's 927 * the same format we use, just copy. Otherwise, 928 * copy into tmp buf and recopy skipping the 929 * unused 32 bits. 930 */ 931 if ((dsx - 1) / 32) { 932 copyin(data->image, di, 8 * dsy); 933 copyin(data->mask, dm, 8 * dsy); 934 } else { 935 si = ssi; sm = ssm; 936 copyin(data->image, si, 4 * dsy); 937 copyin(data->mask, sm, 4 * dsy); 938 for (i = 0; i < dsy; i++) { 939 *di = *si++; 940 *dm = *sm++; 941 di += 2; 942 dm += 2; 943 } 944 } 945 946 /* set size */ 947 cl_cursprite.size.x = data->size.x; 948 cl_cursprite.size.y = data->size.y; 949 950 /* forcably load into board */ 951 gpos.x = cl_cursprite.pos.x; 952 gpos.y = cl_cursprite.pos.y; 953 cl_cursprite.pos.x = -1; 954 cl_cursprite.pos.y = -1; 955 writeshifted(sprite, 0, 0); 956 cl_setmousepos(gp, &gpos); 957 958 } 959 if (data->set & GRFSPRSET_HOT) { 960 961 cl_cursprite.hot = data->hot; 962 963 } 964 if (data->set & GRFSPRSET_CMAP) { 965 966 u_char red[2], green[2], blue[2]; 967 968 copyin(data->cmap.red, red, 2); 969 copyin(data->cmap.green, green, 2); 970 copyin(data->cmap.blue, blue, 2); 971 bcopy(red, cl_cursprite.cmap.red, 2); 972 bcopy(green, cl_cursprite.cmap.green, 2); 973 bcopy(blue, cl_cursprite.cmap.blue, 2); 974 975 /* enable and load colors 256 & 257 */ 976 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 977 978 /* 256 */ 979 vgaw(ba, VDAC_ADDRESS_W, 0x00); 980 if (cltype == PICASSO) { 981 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 982 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 983 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 984 } else { 985 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 986 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 987 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 988 } 989 990 /* 257 */ 991 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 992 if (cltype == PICASSO) { 993 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 994 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 995 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 996 } else { 997 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 998 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 999 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 1000 } 1001 1002 /* turn on/off sprite */ 1003 if (cl_cursprite.enable) { 1004 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1005 } else { 1006 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1007 } 1008 1009 } 1010 if (data->set & GRFSPRSET_ENABLE) { 1011 1012 if (data->enable == 1) { 1013 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1014 cl_cursprite.enable = 1; 1015 } else { 1016 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1017 cl_cursprite.enable = 0; 1018 } 1019 1020 } 1021 if (data->set & GRFSPRSET_POS) { 1022 1023 /* force placement */ 1024 cl_cursprite.pos.x = -1; 1025 cl_cursprite.pos.y = -1; 1026 1027 /* do it */ 1028 cl_setmousepos(gp, &data->pos); 1029 1030 } 1031 return (0); 1032 } 1033 1034 static int 1035 cl_getspritemax(gp, data) 1036 struct grf_softc *gp; 1037 struct grf_position *data; 1038 { 1039 if (gp->g_display.gd_planes == 24) 1040 return (EINVAL); 1041 data->x = 64; 1042 data->y = 64; 1043 return (0); 1044 } 1045 1046 int 1047 cl_setmonitor(gp, gv) 1048 struct grf_softc *gp; 1049 struct grfvideo_mode *gv; 1050 { 1051 struct grfvideo_mode *md; 1052 1053 if (!cl_mondefok(gv)) 1054 return(EINVAL); 1055 1056 #ifdef CL5426CONSOLE 1057 /* handle interactive setting of console mode */ 1058 if (gv->mode_num == 255) { 1059 bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode)); 1060 clconsole_mode.gv.hblank_start /= 8; 1061 clconsole_mode.gv.hsync_start /= 8; 1062 clconsole_mode.gv.hsync_stop /= 8; 1063 clconsole_mode.gv.htotal /= 8; 1064 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1065 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1066 if (!(gp->g_flags & GF_GRFON)) 1067 cl_load_mon(gp, &clconsole_mode); 1068 ite_reinit(gp->g_itedev); 1069 return (0); 1070 } 1071 #endif 1072 1073 md = monitor_def + (gv->mode_num - 1); 1074 bcopy(gv, md, sizeof(struct grfvideo_mode)); 1075 1076 /* adjust pixel oriented values to internal rep. */ 1077 1078 md->hblank_start /= 8; 1079 md->hsync_start /= 8; 1080 md->hsync_stop /= 8; 1081 md->htotal /= 8; 1082 1083 return (0); 1084 } 1085 1086 int 1087 cl_getcmap(gfp, cmap) 1088 struct grf_softc *gfp; 1089 struct grf_colormap *cmap; 1090 { 1091 volatile unsigned char *ba; 1092 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1093 short x; 1094 int error; 1095 1096 if (cmap->count == 0 || cmap->index >= 256) 1097 return 0; 1098 1099 if (cmap->index + cmap->count > 256) 1100 cmap->count = 256 - cmap->index; 1101 1102 ba = gfp->g_regkva; 1103 /* first read colors out of the chip, then copyout to userspace */ 1104 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1105 x = cmap->count - 1; 1106 1107 /* 1108 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1109 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1110 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1111 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1112 */ 1113 1114 /* 1115 * The source for the above comment is somewhat unknow to me. 1116 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1117 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1118 * be native to the chipset. This requires special programming for the 1119 * CLUT in 8BPP to compensate and avoid false colors. 1120 * I didn't find any special stuff for 15 and 16BPP though, crest. 1121 */ 1122 1123 switch (cltype) { 1124 case SPECTRUM: 1125 case PICCOLO: 1126 rp = blue + cmap->index; 1127 gp = green + cmap->index; 1128 bp = red + cmap->index; 1129 break; 1130 case PICASSO: 1131 rp = red + cmap->index; 1132 gp = green + cmap->index; 1133 bp = blue + cmap->index; 1134 break; 1135 default: 1136 rp = gp = bp = 0; 1137 break; 1138 } 1139 1140 do { 1141 *rp++ = vgar(ba, VDAC_DATA) << 2; 1142 *gp++ = vgar(ba, VDAC_DATA) << 2; 1143 *bp++ = vgar(ba, VDAC_DATA) << 2; 1144 } while (x-- > 0); 1145 1146 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1147 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1148 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1149 return (0); 1150 1151 return (error); 1152 } 1153 1154 int 1155 cl_putcmap(gfp, cmap) 1156 struct grf_softc *gfp; 1157 struct grf_colormap *cmap; 1158 { 1159 volatile unsigned char *ba; 1160 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1161 short x; 1162 int error; 1163 1164 if (cmap->count == 0 || cmap->index >= 256) 1165 return (0); 1166 1167 if (cmap->index + cmap->count > 256) 1168 cmap->count = 256 - cmap->index; 1169 1170 /* first copy the colors into kernelspace */ 1171 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1172 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1173 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1174 ba = gfp->g_regkva; 1175 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1176 x = cmap->count - 1; 1177 1178 switch (cltype) { 1179 case SPECTRUM: 1180 case PICCOLO: 1181 rp = blue + cmap->index; 1182 gp = green + cmap->index; 1183 bp = red + cmap->index; 1184 break; 1185 case PICASSO: 1186 rp = red + cmap->index; 1187 gp = green + cmap->index; 1188 bp = blue + cmap->index; 1189 break; 1190 default: 1191 rp = gp = bp = 0; 1192 break; 1193 } 1194 1195 do { 1196 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1197 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1198 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1199 } while (x-- > 0); 1200 return (0); 1201 } else 1202 return (error); 1203 } 1204 1205 1206 int 1207 cl_toggle(gp, wopp) 1208 struct grf_softc *gp; 1209 unsigned short wopp; /* don't need that one yet, ill */ 1210 { 1211 volatile caddr_t ba; 1212 1213 ba = gp->g_regkva; 1214 1215 if (pass_toggle) { 1216 RegOffpass(ba); 1217 } else { 1218 RegOnpass(ba); 1219 } 1220 return (0); 1221 } 1222 1223 static void 1224 cl_CompFQ(fq, num, denom, clkdoub) 1225 u_int fq; 1226 u_char *num; 1227 u_char *denom; 1228 u_char *clkdoub; 1229 { 1230 #define OSC 14318180 1231 /* OK, here's what we're doing here: 1232 * 1233 * OSC * NUMERATOR 1234 * VCLK = ------------------- Hz 1235 * DENOMINATOR * (1+P) 1236 * 1237 * so we're given VCLK and we should give out some useful 1238 * values.... 1239 * 1240 * NUMERATOR is 7 bits wide 1241 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1242 * 1243 * We run through all the possible combinations and 1244 * return the values which deviate the least from the chosen frequency. 1245 * 1246 */ 1247 #define OSC 14318180 1248 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1249 1250 unsigned char n, d, p, minn, mind, minp = 0; 1251 unsigned long err, minerr; 1252 1253 /* 1254 numer = 0x00 - 0x7f 1255 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1256 */ 1257 1258 /* find lowest error in 6144 iterations. */ 1259 minerr = fq; 1260 minn = 0; 1261 mind = 0; 1262 p = 0; 1263 1264 if ((cl_64bit == 1) && (fq >= 86000000)) 1265 { 1266 for (d = 1; d < 0x20; d++) { 1267 for (n = 1; n < 0x80; n++) { 1268 err = abs(count(n, d, 0) - fq); 1269 if (err < minerr) { 1270 minerr = err; 1271 minn = n; 1272 mind = d; 1273 minp = 1; 1274 } 1275 } 1276 } 1277 *clkdoub = 1; 1278 } 1279 else { 1280 for (d = 1; d < 0x20; d++) { 1281 for (n = 1; n < 0x80; n++) { 1282 err = abs(count(n, d, p) - fq); 1283 if (err < minerr) { 1284 minerr = err; 1285 minn = n; 1286 mind = d; 1287 minp = p; 1288 } 1289 } 1290 if (d == 0x1f && p == 0) { 1291 p = 1; 1292 d = 0x0f; 1293 } 1294 } 1295 *clkdoub = 0; 1296 } 1297 1298 *num = minn; 1299 *denom = (mind << 1) | minp; 1300 if (minerr > 500000) 1301 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1302 return; 1303 } 1304 1305 int 1306 cl_mondefok(gv) 1307 struct grfvideo_mode *gv; 1308 { 1309 unsigned long maxpix; 1310 1311 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1312 if (gv->mode_num != 255 || gv->depth != 4) 1313 return(0); 1314 1315 switch (gv->depth) { 1316 case 4: 1317 if (gv->mode_num != 255) 1318 return(0); 1319 case 1: 1320 case 8: 1321 maxpix = cl_maxpixelclock; 1322 if (cl_64bit == 1) 1323 { 1324 if (cltype == PICASSO) /* Picasso IV */ 1325 maxpix = 135000000; 1326 else /* Piccolo SD64 */ 1327 maxpix = 110000000; 1328 } 1329 break; 1330 case 15: 1331 case 16: 1332 if (cl_64bit == 1) 1333 maxpix = 85000000; 1334 else 1335 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1336 break; 1337 case 24: 1338 if ((cltype == PICASSO) && (cl_64bit == 1)) 1339 maxpix = 85000000; 1340 else 1341 maxpix = cl_maxpixelclock / 3; 1342 break; 1343 case 32: 1344 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1345 maxpix = 50000000; 1346 else 1347 maxpix = 0; 1348 break; 1349 default: 1350 printf("grfcl: Illegal depth in mode %d\n", 1351 (int) gv->mode_num); 1352 return (0); 1353 } 1354 1355 if (gv->pixel_clock > maxpix) { 1356 printf("grfcl: Pixelclock too high in mode %d\n", 1357 (int) gv->mode_num); 1358 return (0); 1359 } 1360 1361 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1362 printf("grfcl: sync-on-green is not supported\n"); 1363 return (0); 1364 } 1365 1366 return (1); 1367 } 1368 1369 int 1370 cl_load_mon(gp, md) 1371 struct grf_softc *gp; 1372 struct grfcltext_mode *md; 1373 { 1374 struct grfvideo_mode *gv; 1375 struct grfinfo *gi; 1376 volatile caddr_t ba, fb; 1377 unsigned char num0, denom0, clkdoub; 1378 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1379 VSE, VT; 1380 int clkmul, offsmul, clkmode; 1381 int vmul; 1382 int sr15; 1383 unsigned char hvsync_pulse; 1384 char TEXT; 1385 1386 /* identity */ 1387 gv = &md->gv; 1388 TEXT = (gv->depth == 4); 1389 1390 if (!cl_mondefok(gv)) { 1391 printf("grfcl: Monitor definition not ok\n"); 1392 return (0); 1393 } 1394 1395 ba = gp->g_regkva; 1396 fb = gp->g_fbkva; 1397 1398 /* provide all needed information in grf device-independant locations */ 1399 gp->g_data = (caddr_t) gv; 1400 gi = &gp->g_display; 1401 gi->gd_regaddr = (caddr_t) kvtop(ba); 1402 gi->gd_regsize = 64 * 1024; 1403 gi->gd_fbaddr = (caddr_t) kvtop(fb); 1404 gi->gd_fbsize = cl_fbsize; 1405 gi->gd_colors = 1 << gv->depth; 1406 gi->gd_planes = gv->depth; 1407 gi->gd_fbwidth = gv->disp_width; 1408 gi->gd_fbheight = gv->disp_height; 1409 gi->gd_fbx = 0; 1410 gi->gd_fby = 0; 1411 if (TEXT) { 1412 gi->gd_dwidth = md->fx * md->cols; 1413 gi->gd_dheight = md->fy * md->rows; 1414 } else { 1415 gi->gd_dwidth = gv->disp_width; 1416 gi->gd_dheight = gv->disp_height; 1417 } 1418 gi->gd_dx = 0; 1419 gi->gd_dy = 0; 1420 1421 /* get display mode parameters */ 1422 1423 HBS = gv->hblank_start; 1424 HSS = gv->hsync_start; 1425 HSE = gv->hsync_stop; 1426 HBE = gv->htotal - 1; 1427 HT = gv->htotal; 1428 VBS = gv->vblank_start; 1429 VSS = gv->vsync_start; 1430 VSE = gv->vsync_stop; 1431 VBE = gv->vtotal - 1; 1432 VT = gv->vtotal; 1433 1434 if (TEXT) 1435 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1436 else 1437 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1438 VDE = gv->disp_height - 1; 1439 1440 /* adjustments */ 1441 switch (gv->depth) { 1442 case 8: 1443 clkmul = 1; 1444 offsmul = 1; 1445 clkmode = 0x0; 1446 break; 1447 case 15: 1448 case 16: 1449 clkmul = 1; 1450 offsmul = 2; 1451 clkmode = 0x6; 1452 break; 1453 case 24: 1454 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1455 clkmul = 1; 1456 else 1457 clkmul = 3; 1458 offsmul = 3; 1459 clkmode = 0x4; 1460 break; 1461 case 32: 1462 clkmul = 1; 1463 offsmul = 2; 1464 clkmode = 0x8; 1465 break; 1466 default: 1467 clkmul = 1; 1468 offsmul = 1; 1469 clkmode = 0x0; 1470 break; 1471 } 1472 1473 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1474 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1475 } else 1476 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1477 1478 vmul = 2; 1479 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1480 vmul = 1; 1481 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1482 vmul = 4; 1483 1484 VDE = VDE * vmul / 2; 1485 VBS = VBS * vmul / 2; 1486 VSS = VSS * vmul / 2; 1487 VSE = VSE * vmul / 2; 1488 VBE = VBE * vmul / 2; 1489 VT = VT * vmul / 2; 1490 1491 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1492 if (cl_64bit == 1) { 1493 if (TEXT || (gv->depth == 1)) 1494 sr15 = 0xd0; 1495 else 1496 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1497 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1498 } else { 1499 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1500 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1501 } 1502 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1503 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1504 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1505 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1506 1507 /* Set clock */ 1508 1509 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1510 1511 /* Horizontal/Vertical Sync Pulse */ 1512 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1513 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1514 hvsync_pulse &= ~0x40; 1515 else 1516 hvsync_pulse |= 0x40; 1517 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1518 hvsync_pulse &= ~0x80; 1519 else 1520 hvsync_pulse |= 0x80; 1521 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1522 1523 if (clkdoub) { 1524 HDE /= 2; 1525 HBS /= 2; 1526 HSS /= 2; 1527 HSE /= 2; 1528 HBE /= 2; 1529 HT /= 2; 1530 clkmode = 0x6; 1531 } 1532 1533 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1534 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1535 1536 /* load display parameters into board */ 1537 1538 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1539 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1540 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1541 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1542 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1543 WCrt(ba, CRT_ID_END_HOR_RETR, 1544 (HSE & 0x1f) | 1545 ((HBE & 0x20) ? 0x80 : 0x00)); 1546 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1547 WCrt(ba, CRT_ID_OVERFLOW, 1548 0x10 | 1549 ((VT & 0x100) ? 0x01 : 0x00) | 1550 ((VDE & 0x100) ? 0x02 : 0x00) | 1551 ((VSS & 0x100) ? 0x04 : 0x00) | 1552 ((VBS & 0x100) ? 0x08 : 0x00) | 1553 ((VT & 0x200) ? 0x20 : 0x00) | 1554 ((VDE & 0x200) ? 0x40 : 0x00) | 1555 ((VSS & 0x200) ? 0x80 : 0x00)); 1556 1557 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1558 0x40 | /* TEXT ? 0x00 ??? */ 1559 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1560 ((VBS & 0x200) ? 0x20 : 0x00) | 1561 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1562 1563 /* text cursor */ 1564 1565 if (TEXT) { 1566 #if CL_ULCURSOR 1567 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1568 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1569 #else 1570 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1571 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1572 #endif 1573 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1574 1575 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1576 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1577 } 1578 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1579 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1580 1581 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1582 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1583 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1584 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1585 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1586 1587 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1588 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1589 WCrt(ba, CRT_ID_LACE_CNTL, 1590 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1591 ((HBE & 0x40) ? 0x10 : 0x00) | 1592 ((HBE & 0x80) ? 0x20 : 0x00) | 1593 ((VBE & 0x100) ? 0x40 : 0x00) | 1594 ((VBE & 0x200) ? 0x80 : 0x00)); 1595 1596 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1597 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1598 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1599 1600 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1601 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1602 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1603 1604 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1605 sometimes, out of "secret" application note (crest) */ 1606 vgaw(ba, VDAC_MASK, 0); 1607 /* reset HDR "magic" access counter (crest) */ 1608 vgar(ba, VDAC_ADDRESS); 1609 1610 delay(200000); 1611 vgar(ba, VDAC_MASK); 1612 delay(200000); 1613 vgar(ba, VDAC_MASK); 1614 delay(200000); 1615 vgar(ba, VDAC_MASK); 1616 delay(200000); 1617 vgar(ba, VDAC_MASK); 1618 delay(200000); 1619 switch (gv->depth) { 1620 case 1: 1621 case 4: /* text */ 1622 vgaw(ba, VDAC_MASK, 0); 1623 HDE = gv->disp_width / 16; 1624 break; 1625 case 8: 1626 if (clkdoub) 1627 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1628 else 1629 vgaw(ba, VDAC_MASK, 0); 1630 HDE = gv->disp_width / 8; 1631 break; 1632 case 15: 1633 vgaw(ba, VDAC_MASK, 0xd0); 1634 HDE = gv->disp_width / 4; 1635 break; 1636 case 16: 1637 vgaw(ba, VDAC_MASK, 0xc1); 1638 HDE = gv->disp_width / 4; 1639 break; 1640 case 24: 1641 vgaw(ba, VDAC_MASK, 0xc5); 1642 HDE = (gv->disp_width / 8) * 3; 1643 break; 1644 case 32: 1645 vgaw(ba, VDAC_MASK, 0xc5); 1646 HDE = (gv->disp_width / 4); 1647 break; 1648 } 1649 1650 /* reset HDR "magic" access counter (crest) */ 1651 vgar(ba, VDAC_ADDRESS); 1652 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1653 vgaw(ba, VDAC_MASK, 0xff); 1654 1655 WCrt(ba, CRT_ID_OFFSET, HDE); 1656 if (cl_64bit == 1) { 1657 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1658 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1659 } 1660 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1661 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1662 0x22 | 1663 ((HDE > 0xff) ? 0x10 : 0x00)); 1664 1665 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1666 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1667 (gv->depth == 1) ? 0x01 : 0x0f); 1668 1669 /* text initialization */ 1670 1671 if (TEXT) { 1672 cl_inittextmode(gp); 1673 } 1674 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1675 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1676 1677 /* Pass-through */ 1678 1679 RegOffpass(ba); 1680 1681 return (1); 1682 } 1683 1684 void 1685 cl_inittextmode(gp) 1686 struct grf_softc *gp; 1687 { 1688 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1689 volatile unsigned char *ba = gp->g_regkva; 1690 unsigned char *fb = gp->g_fbkva; 1691 unsigned char *c, *f, y; 1692 unsigned short z; 1693 1694 1695 /* load text font into beginning of display memory. Each character 1696 * cell is 32 bytes long (enough for 4 planes) */ 1697 1698 SetTextPlane(ba, 0x02); 1699 cl_memset(fb, 0, 256 * 32); 1700 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1701 f = tm->fdata; 1702 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1703 for (y = 0; y < tm->fy; y++) 1704 *c++ = *f++; 1705 1706 /* clear out text/attr planes (three screens worth) */ 1707 1708 SetTextPlane(ba, 0x01); 1709 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1710 SetTextPlane(ba, 0x00); 1711 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1712 1713 /* print out a little init msg */ 1714 1715 c = (unsigned char *) (fb) + (tm->cols - 16); 1716 strcpy(c, "CIRRUS"); 1717 c[6] = 0x20; 1718 1719 /* set colors (B&W) */ 1720 1721 vgaw(ba, VDAC_ADDRESS_W, 0); 1722 for (z = 0; z < 256; z++) { 1723 unsigned char r, g, b; 1724 1725 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1726 1727 if (cltype == PICASSO) { 1728 r = clconscolors[y][0]; 1729 g = clconscolors[y][1]; 1730 b = clconscolors[y][2]; 1731 } else { 1732 b = clconscolors[y][0]; 1733 g = clconscolors[y][1]; 1734 r = clconscolors[y][2]; 1735 } 1736 vgaw(ba, VDAC_DATA, r >> 2); 1737 vgaw(ba, VDAC_DATA, g >> 2); 1738 vgaw(ba, VDAC_DATA, b >> 2); 1739 } 1740 } 1741 1742 void 1743 cl_memset(d, c, l) 1744 unsigned char *d; 1745 unsigned char c; 1746 int l; 1747 { 1748 for (; l > 0; l--) 1749 *d++ = c; 1750 } 1751 1752 /* 1753 * Special wakeup/passthrough registers on graphics boards 1754 * 1755 * The methods have diverged a bit for each board, so 1756 * WPass(P) has been converted into a set of specific 1757 * inline functions. 1758 */ 1759 static void 1760 RegWakeup(ba) 1761 volatile caddr_t ba; 1762 { 1763 1764 switch (cltype) { 1765 case SPECTRUM: 1766 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1767 break; 1768 case PICASSO: 1769 /* Picasso needs no wakeup */ 1770 break; 1771 case PICCOLO: 1772 if (cl_64bit == 1) 1773 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1774 else 1775 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1776 break; 1777 } 1778 delay(200000); 1779 } 1780 1781 static void 1782 RegOnpass(ba) 1783 volatile caddr_t ba; 1784 { 1785 1786 switch (cltype) { 1787 case SPECTRUM: 1788 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1789 break; 1790 case PICASSO: 1791 if (cl_64bit == 0) 1792 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1793 break; 1794 case PICCOLO: 1795 if (cl_64bit == 1) 1796 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1797 else 1798 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1799 break; 1800 } 1801 pass_toggle = 1; 1802 delay(200000); 1803 } 1804 1805 static void 1806 RegOffpass(ba) 1807 volatile caddr_t ba; 1808 { 1809 1810 switch (cltype) { 1811 case SPECTRUM: 1812 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1813 break; 1814 case PICASSO: 1815 if (cl_64bit == 0) 1816 vgaw(ba, PASS_ADDRESS_W, 0xff); 1817 break; 1818 case PICCOLO: 1819 if (cl_64bit == 1) 1820 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1821 else 1822 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1823 break; 1824 } 1825 pass_toggle = 0; 1826 delay(200000); 1827 } 1828 1829 #endif /* NGRFCL */ 1830
Indexes created Sun Sep 28 16:09:52 GMT 2025