grf_cl.c revision 1.41.34.1
1 /* $NetBSD: grf_cl.c,v 1.41.34.1 2009/05/13 17:16:09 jym Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "opt_amigacons.h" 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: grf_cl.c,v 1.41.34.1 2009/05/13 17:16:09 jym Exp $"); 40 41 #include "grfcl.h" 42 #if NGRFCL > 0 43 44 /* 45 * Graphics routines for Cirrus CL GD 5426 boards, 46 * 47 * This code offers low-level routines to access Cirrus Cl GD 5426 48 * graphics-boards from within NetBSD for the Amiga. 49 * No warranties for any kind of function at all - this 50 * code may crash your hardware and scratch your harddisk. Use at your 51 * own risk. Freely distributable. 52 * 53 * Modified for Cirrus CL GD 5426 from 54 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 55 * Contributions by Ill, ScottE, MiL 56 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 57 * Picasso/040 patches (wee!) by crest 01/96 58 * 59 * PicassoIV support bz Klaus "crest" Burkert. 60 * Fixed interlace and doublescan, added clockdoubling and 61 * HiColor&TrueColor suuport by crest 01/97 62 * 63 * Thanks to Village Tronic Marketing Gmbh for providing me with 64 * a Picasso-II board. 65 * Thanks for Integrated Electronics Oy Ab for providing me with 66 * Cirrus CL GD 542x family documentation. 67 * 68 * TODO: 69 * Mouse support (almost there! :-)) 70 * Blitter support 71 * 72 */ 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/errno.h> 77 #include <sys/ioctl.h> 78 #include <sys/device.h> 79 #include <sys/malloc.h> 80 81 #include <machine/cpu.h> 82 #include <dev/cons.h> 83 #include <amiga/dev/itevar.h> 84 #include <amiga/amiga/device.h> 85 #include <amiga/dev/grfioctl.h> 86 #include <amiga/dev/grfvar.h> 87 #include <amiga/dev/grf_clreg.h> 88 #include <amiga/dev/zbusvar.h> 89 90 int cl_mondefok(struct grfvideo_mode *); 91 void cl_boardinit(struct grf_softc *); 92 static void cl_CompFQ(u_int, u_char *, u_char *, u_char *); 93 int cl_getvmode(struct grf_softc *, struct grfvideo_mode *); 94 int cl_setvmode(struct grf_softc *, unsigned int); 95 int cl_toggle(struct grf_softc *, unsigned short); 96 int cl_getcmap(struct grf_softc *, struct grf_colormap *); 97 int cl_putcmap(struct grf_softc *, struct grf_colormap *); 98 #ifndef CL5426CONSOLE 99 void cl_off(struct grf_softc *); 100 #endif 101 void cl_inittextmode(struct grf_softc *); 102 int cl_ioctl(register struct grf_softc *, u_long, void *); 103 int cl_getmousepos(struct grf_softc *, struct grf_position *); 104 int cl_setmousepos(struct grf_softc *, struct grf_position *); 105 static int cl_setspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 106 int cl_getspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 107 static int cl_getspritemax(struct grf_softc *, struct grf_position *); 108 int cl_blank(struct grf_softc *, int *); 109 int cl_setmonitor(struct grf_softc *, struct grfvideo_mode *); 110 void cl_writesprpos(volatile char *, short, short); 111 void writeshifted(volatile char *, signed char, signed char); 112 113 static void RegWakeup(volatile void *); 114 static void RegOnpass(volatile void *); 115 static void RegOffpass(volatile void *); 116 117 void grfclattach(struct device *, struct device *, void *); 118 int grfclprint(void *, const char *); 119 int grfclmatch(struct device *, struct cfdata *, void *); 120 void cl_memset(unsigned char *, unsigned char, int); 121 122 /* Graphics display definitions. 123 * These are filled by 'grfconfig' using GRFIOCSETMON. 124 */ 125 #define monitor_def_max 24 126 static struct grfvideo_mode monitor_def[24] = { 127 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 128 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 129 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 130 }; 131 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 132 133 /* Patchable maximum pixel clock */ 134 unsigned long cl_maxpixelclock = 86000000; 135 136 /* Console display definition. 137 * Default hardcoded text mode. This grf_cl is set up to 138 * use one text mode only, and this is it. You may use 139 * grfconfig to change the mode after boot. 140 */ 141 /* Console font */ 142 #ifdef KFONT_8X11 143 #define CIRRUSFONT kernel_font_8x11 144 #define CIRRUSFONTY 11 145 #else 146 #define CIRRUSFONT kernel_font_8x8 147 #define CIRRUSFONTY 8 148 #endif 149 extern unsigned char CIRRUSFONT[]; 150 151 struct grfcltext_mode clconsole_mode = { 152 {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8, 153 481, 490, 498, 522, 0}, 154 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 155 }; 156 /* Console colors */ 157 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 158 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 159 }; 160 161 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 162 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 163 unsigned char cl_pass_toggle; /* passthru status tracker */ 164 165 /* 166 * because all 542x-boards have 2 configdev entries, one for 167 * framebuffer mem and the other for regs, we have to hold onto 168 * the pointers globally until we match on both. This and 'cltype' 169 * are the primary obsticles to multiple board support, but if you 170 * have multiple boards you have bigger problems than grf_cl. 171 */ 172 static void *cl_fbaddr = 0; /* framebuffer */ 173 static void *cl_regaddr = 0; /* registers */ 174 static int cl_fbsize; /* framebuffer size */ 175 static int cl_fbautosize; /* framebuffer autoconfig size */ 176 177 178 /* 179 * current sprite info, if you add support for multiple boards 180 * make this an array or something 181 */ 182 struct grf_spriteinfo cl_cursprite; 183 184 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 185 * you add multiple board support 186 */ 187 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 188 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 189 190 /* standard driver stuff */ 191 CFATTACH_DECL(grfcl, sizeof(struct grf_softc), 192 grfclmatch, grfclattach, NULL, NULL); 193 194 static struct cfdata *cfdata; 195 196 int 197 grfclmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 198 { 199 struct zbus_args *zap; 200 static int regprod, fbprod, fbprod2; 201 int error; 202 203 fbprod2 = 0; 204 zap = auxp; 205 206 #ifndef CL5426CONSOLE 207 if (amiga_realconfig == 0) 208 return (0); 209 #endif 210 211 /* Grab the first board we encounter as the preferred one. This will 212 * allow one board to work in a multiple 5426 board system, but not 213 * multiple boards at the same time. */ 214 if (cltype == 0) { 215 switch (zap->manid) { 216 case PICASSO: 217 switch (zap->prodid) { 218 case 11: 219 case 12: 220 regprod = 12; 221 fbprod = 11; 222 error = 0; 223 break; 224 case 22: 225 fbprod2 = 22; 226 error = 0; 227 break; 228 case 21: 229 case 23: 230 regprod = 23; 231 fbprod = 21; 232 cl_64bit = 1; 233 error = 0; 234 break; 235 case 24: 236 regprod = 24; 237 fbprod = 24; 238 cl_64bit = 1; 239 error = 0; 240 break; 241 default: 242 error = 1; 243 break; 244 } 245 if (error == 1) 246 return (0); 247 else 248 break; 249 case SPECTRUM: 250 if (zap->prodid != 2 && zap->prodid != 1) 251 return (0); 252 regprod = 2; 253 fbprod = 1; 254 break; 255 case PICCOLO: 256 switch (zap->prodid) { 257 case 5: 258 case 6: 259 regprod = 6; 260 fbprod = 5; 261 error = 0; 262 break; 263 case 10: 264 case 11: 265 regprod = 11; 266 fbprod = 10; 267 cl_64bit = 1; 268 error = 0; 269 break; 270 default: 271 error = 1; 272 break; 273 } 274 if (error == 1) 275 return (0); 276 else 277 break; 278 default: 279 return (0); 280 } 281 cltype = zap->manid; 282 } else { 283 if (cltype != zap->manid) { 284 return (0); 285 } 286 } 287 288 /* Configure either registers or framebuffer in any order */ 289 if ((cltype == PICASSO) && (cl_64bit == 1)) { 290 switch (zap->prodid) { 291 case 21: 292 cl_fbaddr = zap->va; 293 cl_fbautosize = zap->size; 294 break; 295 case 22: 296 cl_fbautosize += zap->size; 297 break; 298 case 23: 299 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 300 break; 301 case 24: 302 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 303 /* check for PicassoIV with 64MB config and handle it */ 304 if (zap->size == 0x04000000) { 305 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000); 306 } else { 307 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 308 } 309 cl_fbautosize = 0x400000; 310 break; 311 default: 312 return (0); 313 } 314 } 315 else { 316 if (zap->prodid == regprod) 317 cl_regaddr = zap->va; 318 else 319 if (zap->prodid == fbprod) { 320 cl_fbaddr = zap->va; 321 cl_fbautosize = zap->size; 322 } else 323 return (0); 324 } 325 326 #ifdef CL5426CONSOLE 327 if (amiga_realconfig == 0) { 328 cfdata = cfp; 329 } 330 #endif 331 332 return (1); 333 } 334 335 void 336 grfclattach(struct device *pdp, struct device *dp, void *auxp) 337 { 338 static struct grf_softc congrf; 339 struct zbus_args *zap; 340 struct grf_softc *gp; 341 static char attachflag = 0; 342 343 zap = auxp; 344 345 printf("\n"); 346 347 /* make sure both halves have matched */ 348 if (!cl_regaddr || !cl_fbaddr) 349 return; 350 351 /* do all that messy console/grf stuff */ 352 if (dp == NULL) 353 gp = &congrf; 354 else 355 gp = (struct grf_softc *) dp; 356 357 if (dp != NULL && congrf.g_regkva != 0) { 358 /* 359 * inited earlier, just copy (not device struct) 360 */ 361 memcpy( &gp->g_display, &congrf.g_display, 362 (char *) &gp[1] - (char *) &gp->g_display); 363 } else { 364 gp->g_regkva = (volatile void *) cl_regaddr; 365 gp->g_fbkva = (volatile void *) cl_fbaddr; 366 367 gp->g_unit = GRF_CL5426_UNIT; 368 gp->g_mode = cl_mode; 369 gp->g_conpri = grfcl_cnprobe(); 370 gp->g_flags = GF_ALIVE; 371 372 /* wakeup the board */ 373 cl_boardinit(gp); 374 #ifdef CL5426CONSOLE 375 grfcl_iteinit(gp); 376 (void) cl_load_mon(gp, &clconsole_mode); 377 #endif 378 379 } 380 381 /* 382 * attach grf (once) 383 */ 384 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 385 attachflag = 1; 386 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 387 switch (cltype) { 388 case PICASSO: 389 if (cl_64bit == 1) { 390 printf("Picasso IV"); 391 /* 135MHz will be supported if we 392 * have a palette doubling mode. 393 */ 394 cl_maxpixelclock = 86000000; 395 } 396 else { 397 printf("Picasso II"); 398 399 /* check for PicassoII+ (crest) */ 400 if(zap->serno == 0x00100000) 401 printf("+"); 402 403 /* determine used Gfx/chipset (crest) */ 404 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 405 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 406 case 0x24: 407 printf(" (with CL-GD5426)"); 408 break; 409 case 0x26: 410 printf(" (with CL-GD5428)"); 411 break; 412 case 0x27: 413 printf(" (with CL-GD5429)"); 414 break; 415 } 416 cl_maxpixelclock = 86000000; 417 } 418 break; 419 case SPECTRUM: 420 printf("Spectrum"); 421 cl_maxpixelclock = 90000000; 422 break; 423 case PICCOLO: 424 if (cl_64bit == 1) { 425 printf("Piccolo SD64"); 426 /* 110MHz will be supported if we 427 * have a palette doubling mode. 428 */ 429 cl_maxpixelclock = 90000000; 430 } else { 431 printf("Piccolo"); 432 cl_maxpixelclock = 90000000; 433 } 434 break; 435 } 436 printf(" being used\n"); 437 #ifdef CL_OVERCLOCK 438 cl_maxpixelclock = 115000000; 439 #endif 440 } else { 441 if (!attachflag) 442 printf("grfcl unattached!!\n"); 443 } 444 } 445 446 int 447 grfclprint(void *auxp, const char *pnp) 448 { 449 if (pnp) 450 aprint_normal("ite at %s: ", pnp); 451 return (UNCONF); 452 } 453 454 void 455 cl_boardinit(struct grf_softc *gp) 456 { 457 volatile unsigned char *ba = gp->g_regkva; 458 int x; 459 460 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 461 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 462 delay(200000); /* wait some time (two frames as of now) */ 463 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 464 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 465 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 466 cl_fbsize = cl_fbautosize; 467 } else { 468 469 /* wakeup board and flip passthru OFF */ 470 RegWakeup(ba); 471 RegOnpass(ba); 472 473 vgaw(ba, 0x46e8, 0x16); 474 vgaw(ba, 0x102, 1); 475 vgaw(ba, 0x46e8, 0x0e); 476 if (cl_64bit != 1) 477 vgaw(ba, 0x3c3, 1); 478 479 cl_fbsize = cl_fbautosize; 480 481 /* setup initial unchanging parameters */ 482 483 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 484 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 485 486 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 487 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 488 489 if (cl_64bit == 1) { 490 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 491 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 492 } else { 493 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 494 } 495 WSeq(ba, SEQ_ID_RESET, 0x03); 496 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 497 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 498 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 499 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 500 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 501 if (cl_64bit == 1) 502 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 503 else 504 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 505 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 506 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 507 508 if (cl_64bit == 1) 509 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 510 else 511 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 512 513 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 514 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 515 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 516 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 517 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 518 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 519 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 520 521 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 522 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 523 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 524 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 525 if (cl_64bit == 1) { 526 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 527 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 528 } 529 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 530 531 WGfx(ba, GCT_ID_SET_RESET, 0x00); 532 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 533 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 534 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 535 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 536 WGfx(ba, GCT_ID_MISC, 0x01); 537 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 538 WGfx(ba, GCT_ID_BITMASK, 0xff); 539 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 540 541 for (x = 0; x < 0x10; x++) 542 WAttr(ba, x, x); 543 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 544 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 545 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 546 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 547 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 548 WAttr(ba, 0x34, 0x00); 549 550 vgaw(ba, VDAC_MASK, 0xff); 551 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 552 553 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 554 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 555 } 556 557 /* colors initially set to greyscale */ 558 vgaw(ba, VDAC_ADDRESS_W, 0); 559 for (x = 255; x >= 0; x--) { 560 vgaw(ba, VDAC_DATA, x); 561 vgaw(ba, VDAC_DATA, x); 562 vgaw(ba, VDAC_DATA, x); 563 } 564 /* set sprite bitmap pointers */ 565 cl_cursprite.image = cl_imageptr; 566 cl_cursprite.mask = cl_maskptr; 567 cl_cursprite.cmap.red = cl_sprred; 568 cl_cursprite.cmap.green = cl_sprgreen; 569 cl_cursprite.cmap.blue = cl_sprblue; 570 571 if (cl_64bit == 0) { 572 573 /* check for 1MB or 2MB board (crest) */ 574 volatile unsigned long *cl_fbtestaddr; 575 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 576 577 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 578 *cl_fbtestaddr = 0x12345678; 579 580 if (*cl_fbtestaddr != 0x12345678) { 581 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 582 cl_fbsize = 0x100000; 583 } 584 else 585 { 586 cl_fbsize = 0x200000; 587 } 588 } 589 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 590 } 591 592 593 int 594 cl_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm) 595 { 596 struct grfvideo_mode *gv; 597 598 #ifdef CL5426CONSOLE 599 /* Handle grabbing console mode */ 600 if (vm->mode_num == 255) { 601 memcpy( vm, &clconsole_mode, sizeof(struct grfvideo_mode)); 602 /* XXX so grfconfig can tell us the correct text dimensions. */ 603 vm->depth = clconsole_mode.fy; 604 } else 605 #endif 606 { 607 if (vm->mode_num == 0) 608 vm->mode_num = (monitor_current - monitor_def) + 1; 609 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 610 return (EINVAL); 611 gv = monitor_def + (vm->mode_num - 1); 612 if (gv->mode_num == 0) 613 return (EINVAL); 614 615 memcpy( vm, gv, sizeof(struct grfvideo_mode)); 616 } 617 618 /* adjust internal values to pixel values */ 619 620 vm->hblank_start *= 8; 621 vm->hsync_start *= 8; 622 vm->hsync_stop *= 8; 623 vm->htotal *= 8; 624 625 return (0); 626 } 627 628 629 int 630 cl_setvmode(struct grf_softc *gp, unsigned mode) 631 { 632 if (!mode || (mode > monitor_def_max) || 633 monitor_def[mode - 1].mode_num == 0) 634 return (EINVAL); 635 636 monitor_current = monitor_def + (mode - 1); 637 638 return (0); 639 } 640 641 #ifndef CL5426CONSOLE 642 void 643 cl_off(struct grf_softc *gp) 644 { 645 char *ba = gp->g_regkva; 646 647 /* 648 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 649 * on just in case it didn't work...but then it doesn't matter does 650 * it? =) 651 */ 652 RegOnpass(ba); 653 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 654 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 655 } 656 #endif 657 658 int 659 cl_blank(struct grf_softc *gp, int *on) 660 { 661 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 662 return(0); 663 } 664 665 /* 666 * Change the mode of the display. 667 * Return a UNIX error number or 0 for success. 668 */ 669 int 670 cl_mode(register struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3) 671 { 672 int error; 673 674 switch (cmd) { 675 case GM_GRFON: 676 error = cl_load_mon(gp, 677 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 678 return (error); 679 680 case GM_GRFOFF: 681 #ifndef CL5426CONSOLE 682 cl_off(gp); 683 #else 684 cl_load_mon(gp, &clconsole_mode); 685 #endif 686 return (0); 687 688 case GM_GRFCONFIG: 689 return (0); 690 691 case GM_GRFGETVMODE: 692 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 693 694 case GM_GRFSETVMODE: 695 error = cl_setvmode(gp, *(unsigned *) arg); 696 if (!error && (gp->g_flags & GF_GRFON)) 697 cl_load_mon(gp, 698 (struct grfcltext_mode *) monitor_current); 699 return (error); 700 701 case GM_GRFGETNUMVM: 702 *(int *) arg = monitor_def_max; 703 return (0); 704 705 case GM_GRFIOCTL: 706 return (cl_ioctl(gp, a2, arg)); 707 708 default: 709 break; 710 } 711 712 return (EPASSTHROUGH); 713 } 714 715 int 716 cl_ioctl(register struct grf_softc *gp, u_long cmd, void *data) 717 { 718 switch (cmd) { 719 case GRFIOCGSPRITEPOS: 720 return (cl_getmousepos(gp, (struct grf_position *) data)); 721 722 case GRFIOCSSPRITEPOS: 723 return (cl_setmousepos(gp, (struct grf_position *) data)); 724 725 case GRFIOCSSPRITEINF: 726 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 727 728 case GRFIOCGSPRITEINF: 729 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 730 731 case GRFIOCGSPRITEMAX: 732 return (cl_getspritemax(gp, (struct grf_position *) data)); 733 734 case GRFIOCGETCMAP: 735 return (cl_getcmap(gp, (struct grf_colormap *) data)); 736 737 case GRFIOCPUTCMAP: 738 return (cl_putcmap(gp, (struct grf_colormap *) data)); 739 740 case GRFIOCBITBLT: 741 break; 742 743 case GRFTOGGLE: 744 return (cl_toggle(gp, 0)); 745 746 case GRFIOCSETMON: 747 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 748 749 case GRFIOCBLANK: 750 return (cl_blank(gp, (int *)data)); 751 752 } 753 return (EPASSTHROUGH); 754 } 755 756 int 757 cl_getmousepos(struct grf_softc *gp, struct grf_position *data) 758 { 759 data->x = cl_cursprite.pos.x; 760 data->y = cl_cursprite.pos.y; 761 return (0); 762 } 763 764 void 765 cl_writesprpos(volatile char *ba, short x, short y) 766 { 767 /* we want to use a 16-bit write to 3c4 so no macros used */ 768 volatile unsigned char *cwp; 769 volatile unsigned short *wp; 770 771 cwp = ba + 0x3c4; 772 wp = (volatile unsigned short *)cwp; 773 774 /* 775 * don't ask me why, but apparently you can't do a 16-bit write with 776 * x-position like with y-position below (dagge) 777 */ 778 cwp[0] = 0x10 | ((x << 5) & 0xff); 779 cwp[1] = (x >> 3) & 0xff; 780 781 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 782 } 783 784 void 785 writeshifted(volatile char *to, signed char shiftx, signed char shifty) 786 { 787 int y; 788 unsigned long long *tptr, *iptr, *mptr, line; 789 790 tptr = (unsigned long long *) __UNVOLATILE(to); 791 iptr = (unsigned long long *) cl_cursprite.image; 792 mptr = (unsigned long long *) cl_cursprite.mask; 793 794 shiftx = shiftx < 0 ? 0 : shiftx; 795 shifty = shifty < 0 ? 0 : shifty; 796 797 /* start reading shifty lines down, and 798 * shift each line in by shiftx 799 */ 800 for (y = shifty; y < 64; y++) { 801 802 /* image */ 803 line = iptr[y]; 804 *tptr++ = line << shiftx; 805 806 /* mask */ 807 line = mptr[y]; 808 *tptr++ = line << shiftx; 809 } 810 811 /* clear the remainder */ 812 for (y = shifty; y > 0; y--) { 813 *tptr++ = 0; 814 *tptr++ = 0; 815 } 816 } 817 818 int 819 cl_setmousepos(struct grf_softc *gp, struct grf_position *data) 820 { 821 volatile char *ba = gp->g_regkva; 822 short rx, ry, prx, pry; 823 #ifdef CL_SHIFTSPRITE 824 volatile char *fb = gp->g_fbkva; 825 volatile char *sprite = fb + (cl_fbsize - 1024); 826 #endif 827 828 /* no movement */ 829 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 830 return (0); 831 832 /* current and previous real coordinates */ 833 rx = data->x - cl_cursprite.hot.x; 834 ry = data->y - cl_cursprite.hot.y; 835 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 836 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 837 838 /* 839 * if we are/were on an edge, create (un)shifted bitmap -- 840 * ripped out optimization (not extremely worthwhile, 841 * and kind of buggy anyhow). 842 */ 843 #ifdef CL_SHIFTSPRITE 844 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 845 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 846 } 847 #endif 848 849 /* do movement, save position */ 850 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 851 cl_cursprite.pos.x = data->x; 852 cl_cursprite.pos.y = data->y; 853 854 return (0); 855 } 856 857 int 858 cl_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 859 { 860 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 861 copyout(cl_cursprite.image, data->image, 64 * 8); 862 copyout(cl_cursprite.mask, data->mask, 64 * 8); 863 return (0); 864 } 865 866 static int 867 cl_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 868 { 869 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 870 volatile char *sprite = fb + (cl_fbsize - 1024); 871 872 if (data->set & GRFSPRSET_SHAPE) { 873 874 unsigned short dsx, dsy, i; 875 unsigned long *di, *dm, *si, *sm; 876 unsigned long ssi[128], ssm[128]; 877 struct grf_position gpos; 878 879 880 /* check for a too large sprite (no clipping!) */ 881 dsy = data->size.y; 882 dsx = data->size.x; 883 if (dsy > 64 || dsx > 64) 884 return(EINVAL); 885 886 /* prepare destination */ 887 di = (unsigned long *)cl_cursprite.image; 888 dm = (unsigned long *)cl_cursprite.mask; 889 cl_memset((unsigned char *)di, 0, 8*64); 890 cl_memset((unsigned char *)dm, 0, 8*64); 891 892 /* two alternatives: 64 across, then it's 893 * the same format we use, just copy. Otherwise, 894 * copy into tmp buf and recopy skipping the 895 * unused 32 bits. 896 */ 897 if ((dsx - 1) / 32) { 898 copyin(data->image, di, 8 * dsy); 899 copyin(data->mask, dm, 8 * dsy); 900 } else { 901 si = ssi; sm = ssm; 902 copyin(data->image, si, 4 * dsy); 903 copyin(data->mask, sm, 4 * dsy); 904 for (i = 0; i < dsy; i++) { 905 *di = *si++; 906 *dm = *sm++; 907 di += 2; 908 dm += 2; 909 } 910 } 911 912 /* set size */ 913 cl_cursprite.size.x = data->size.x; 914 cl_cursprite.size.y = data->size.y; 915 916 /* forcably load into board */ 917 gpos.x = cl_cursprite.pos.x; 918 gpos.y = cl_cursprite.pos.y; 919 cl_cursprite.pos.x = -1; 920 cl_cursprite.pos.y = -1; 921 writeshifted(sprite, 0, 0); 922 cl_setmousepos(gp, &gpos); 923 924 } 925 if (data->set & GRFSPRSET_HOT) { 926 927 cl_cursprite.hot = data->hot; 928 929 } 930 if (data->set & GRFSPRSET_CMAP) { 931 932 u_char red[2], green[2], blue[2]; 933 934 copyin(data->cmap.red, red, 2); 935 copyin(data->cmap.green, green, 2); 936 copyin(data->cmap.blue, blue, 2); 937 memcpy( cl_cursprite.cmap.red, red, 2); 938 memcpy( cl_cursprite.cmap.green, green, 2); 939 memcpy( cl_cursprite.cmap.blue, blue, 2); 940 941 /* enable and load colors 256 & 257 */ 942 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 943 944 /* 256 */ 945 vgaw(ba, VDAC_ADDRESS_W, 0x00); 946 if (cltype == PICASSO) { 947 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 948 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 949 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 950 } else { 951 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 952 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 953 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 954 } 955 956 /* 257 */ 957 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 958 if (cltype == PICASSO) { 959 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 960 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 961 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 962 } else { 963 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 964 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 965 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 966 } 967 968 /* turn on/off sprite */ 969 if (cl_cursprite.enable) { 970 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 971 } else { 972 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 973 } 974 975 } 976 if (data->set & GRFSPRSET_ENABLE) { 977 978 if (data->enable == 1) { 979 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 980 cl_cursprite.enable = 1; 981 } else { 982 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 983 cl_cursprite.enable = 0; 984 } 985 986 } 987 if (data->set & GRFSPRSET_POS) { 988 989 /* force placement */ 990 cl_cursprite.pos.x = -1; 991 cl_cursprite.pos.y = -1; 992 993 /* do it */ 994 cl_setmousepos(gp, &data->pos); 995 996 } 997 return (0); 998 } 999 1000 static int 1001 cl_getspritemax(struct grf_softc *gp, struct grf_position *data) 1002 { 1003 if (gp->g_display.gd_planes == 24) 1004 return (EINVAL); 1005 data->x = 64; 1006 data->y = 64; 1007 return (0); 1008 } 1009 1010 int 1011 cl_setmonitor(struct grf_softc *gp, struct grfvideo_mode *gv) 1012 { 1013 struct grfvideo_mode *md; 1014 1015 if (!cl_mondefok(gv)) 1016 return(EINVAL); 1017 1018 #ifdef CL5426CONSOLE 1019 /* handle interactive setting of console mode */ 1020 if (gv->mode_num == 255) { 1021 memcpy( &clconsole_mode.gv, gv, sizeof(struct grfvideo_mode)); 1022 clconsole_mode.gv.hblank_start /= 8; 1023 clconsole_mode.gv.hsync_start /= 8; 1024 clconsole_mode.gv.hsync_stop /= 8; 1025 clconsole_mode.gv.htotal /= 8; 1026 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1027 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1028 if (!(gp->g_flags & GF_GRFON)) 1029 cl_load_mon(gp, &clconsole_mode); 1030 ite_reinit(gp->g_itedev); 1031 return (0); 1032 } 1033 #endif 1034 1035 md = monitor_def + (gv->mode_num - 1); 1036 memcpy( md, gv, sizeof(struct grfvideo_mode)); 1037 1038 /* adjust pixel oriented values to internal rep. */ 1039 1040 md->hblank_start /= 8; 1041 md->hsync_start /= 8; 1042 md->hsync_stop /= 8; 1043 md->htotal /= 8; 1044 1045 return (0); 1046 } 1047 1048 int 1049 cl_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1050 { 1051 volatile unsigned char *ba; 1052 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1053 short x; 1054 int error; 1055 1056 if (cmap->count == 0 || cmap->index >= 256) 1057 return 0; 1058 1059 if (cmap->count > 256 - cmap->index) 1060 cmap->count = 256 - cmap->index; 1061 1062 ba = gfp->g_regkva; 1063 /* first read colors out of the chip, then copyout to userspace */ 1064 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1065 x = cmap->count - 1; 1066 1067 /* 1068 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1069 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1070 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1071 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1072 */ 1073 1074 /* 1075 * The source for the above comment is somewhat unknow to me. 1076 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1077 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1078 * be native to the chipset. This requires special programming for the 1079 * CLUT in 8BPP to compensate and avoid false colors. 1080 * I didn't find any special stuff for 15 and 16BPP though, crest. 1081 */ 1082 1083 switch (cltype) { 1084 case SPECTRUM: 1085 case PICCOLO: 1086 rp = blue + cmap->index; 1087 gp = green + cmap->index; 1088 bp = red + cmap->index; 1089 break; 1090 case PICASSO: 1091 rp = red + cmap->index; 1092 gp = green + cmap->index; 1093 bp = blue + cmap->index; 1094 break; 1095 default: 1096 rp = gp = bp = 0; 1097 break; 1098 } 1099 1100 do { 1101 *rp++ = vgar(ba, VDAC_DATA) << 2; 1102 *gp++ = vgar(ba, VDAC_DATA) << 2; 1103 *bp++ = vgar(ba, VDAC_DATA) << 2; 1104 } while (x-- > 0); 1105 1106 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1107 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1108 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1109 return (0); 1110 1111 return (error); 1112 } 1113 1114 int 1115 cl_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1116 { 1117 volatile unsigned char *ba; 1118 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1119 short x; 1120 int error; 1121 1122 if (cmap->count == 0 || cmap->index >= 256) 1123 return (0); 1124 1125 if (cmap->count > 256 - cmap->index) 1126 cmap->count = 256 - cmap->index; 1127 1128 /* first copy the colors into kernelspace */ 1129 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1130 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1131 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1132 ba = gfp->g_regkva; 1133 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1134 x = cmap->count - 1; 1135 1136 switch (cltype) { 1137 case SPECTRUM: 1138 case PICCOLO: 1139 rp = blue + cmap->index; 1140 gp = green + cmap->index; 1141 bp = red + cmap->index; 1142 break; 1143 case PICASSO: 1144 rp = red + cmap->index; 1145 gp = green + cmap->index; 1146 bp = blue + cmap->index; 1147 break; 1148 default: 1149 rp = gp = bp = 0; 1150 break; 1151 } 1152 1153 do { 1154 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1155 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1156 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1157 } while (x-- > 0); 1158 return (0); 1159 } else 1160 return (error); 1161 } 1162 1163 1164 int 1165 cl_toggle(struct grf_softc *gp, unsigned short wopp) 1166 /* wopp: don't need that one yet, ill */ 1167 { 1168 volatile void *ba; 1169 1170 ba = gp->g_regkva; 1171 1172 if (cl_pass_toggle) { 1173 RegOffpass(ba); 1174 } else { 1175 RegOnpass(ba); 1176 } 1177 return (0); 1178 } 1179 1180 static void 1181 cl_CompFQ(u_int fq, u_char *num, u_char *denom, u_char *clkdoub) 1182 { 1183 #define OSC 14318180 1184 /* OK, here's what we're doing here: 1185 * 1186 * OSC * NUMERATOR 1187 * VCLK = ------------------- Hz 1188 * DENOMINATOR * (1+P) 1189 * 1190 * so we're given VCLK and we should give out some useful 1191 * values.... 1192 * 1193 * NUMERATOR is 7 bits wide 1194 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1195 * 1196 * We run through all the possible combinations and 1197 * return the values which deviate the least from the chosen frequency. 1198 * 1199 */ 1200 #define OSC 14318180 1201 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1202 1203 unsigned char n, d, p, minn, mind, minp = 0; 1204 unsigned long err, minerr; 1205 1206 /* 1207 numer = 0x00 - 0x7f 1208 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1209 */ 1210 1211 /* find lowest error in 6144 iterations. */ 1212 minerr = fq; 1213 minn = 0; 1214 mind = 0; 1215 p = 0; 1216 1217 if ((cl_64bit == 1) && (fq >= 86000000)) 1218 { 1219 for (d = 1; d < 0x20; d++) { 1220 for (n = 1; n < 0x80; n++) { 1221 err = abs(count(n, d, 0) - fq); 1222 if (err < minerr) { 1223 minerr = err; 1224 minn = n; 1225 mind = d; 1226 minp = 1; 1227 } 1228 } 1229 } 1230 *clkdoub = 1; 1231 } 1232 else { 1233 for (d = 1; d < 0x20; d++) { 1234 for (n = 1; n < 0x80; n++) { 1235 err = abs(count(n, d, p) - fq); 1236 if (err < minerr) { 1237 minerr = err; 1238 minn = n; 1239 mind = d; 1240 minp = p; 1241 } 1242 } 1243 if (d == 0x1f && p == 0) { 1244 p = 1; 1245 d = 0x0f; 1246 } 1247 } 1248 *clkdoub = 0; 1249 } 1250 1251 *num = minn; 1252 *denom = (mind << 1) | minp; 1253 if (minerr > 500000) 1254 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1255 return; 1256 } 1257 1258 int 1259 cl_mondefok(struct grfvideo_mode *gv) 1260 { 1261 unsigned long maxpix; 1262 1263 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1264 if (gv->mode_num != 255 || gv->depth != 4) 1265 return(0); 1266 1267 switch (gv->depth) { 1268 case 4: 1269 if (gv->mode_num != 255) 1270 return(0); 1271 case 1: 1272 case 8: 1273 maxpix = cl_maxpixelclock; 1274 if (cl_64bit == 1) 1275 { 1276 if (cltype == PICASSO) /* Picasso IV */ 1277 maxpix = 135000000; 1278 else /* Piccolo SD64 */ 1279 maxpix = 110000000; 1280 } 1281 break; 1282 case 15: 1283 case 16: 1284 if (cl_64bit == 1) 1285 maxpix = 85000000; 1286 else 1287 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1288 break; 1289 case 24: 1290 if ((cltype == PICASSO) && (cl_64bit == 1)) 1291 maxpix = 85000000; 1292 else 1293 maxpix = cl_maxpixelclock / 3; 1294 break; 1295 case 32: 1296 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1297 maxpix = 50000000; 1298 else 1299 maxpix = 0; 1300 break; 1301 default: 1302 printf("grfcl: Illegal depth in mode %d\n", 1303 (int) gv->mode_num); 1304 return (0); 1305 } 1306 1307 if (gv->pixel_clock > maxpix) { 1308 printf("grfcl: Pixelclock too high in mode %d\n", 1309 (int) gv->mode_num); 1310 return (0); 1311 } 1312 1313 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1314 printf("grfcl: sync-on-green is not supported\n"); 1315 return (0); 1316 } 1317 1318 return (1); 1319 } 1320 1321 int 1322 cl_load_mon(struct grf_softc *gp, struct grfcltext_mode *md) 1323 { 1324 struct grfvideo_mode *gv; 1325 struct grfinfo *gi; 1326 volatile void *ba, *fb; 1327 unsigned char num0, denom0, clkdoub; 1328 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1329 VSE, VT; 1330 int clkmul, offsmul, clkmode; 1331 int vmul; 1332 int sr15; 1333 unsigned char hvsync_pulse; 1334 char TEXT; 1335 1336 /* identity */ 1337 gv = &md->gv; 1338 TEXT = (gv->depth == 4); 1339 1340 if (!cl_mondefok(gv)) { 1341 printf("grfcl: Monitor definition not ok\n"); 1342 return (0); 1343 } 1344 1345 ba = gp->g_regkva; 1346 fb = gp->g_fbkva; 1347 1348 /* provide all needed information in grf device-independent locations */ 1349 gp->g_data = (void *) gv; 1350 gi = &gp->g_display; 1351 gi->gd_regaddr = (void *) kvtop(__UNVOLATILE(ba)); 1352 gi->gd_regsize = 64 * 1024; 1353 gi->gd_fbaddr = (void *) kvtop(__UNVOLATILE(fb)); 1354 gi->gd_fbsize = cl_fbsize; 1355 gi->gd_colors = 1 << gv->depth; 1356 gi->gd_planes = gv->depth; 1357 gi->gd_fbwidth = gv->disp_width; 1358 gi->gd_fbheight = gv->disp_height; 1359 gi->gd_fbx = 0; 1360 gi->gd_fby = 0; 1361 if (TEXT) { 1362 gi->gd_dwidth = md->fx * md->cols; 1363 gi->gd_dheight = md->fy * md->rows; 1364 } else { 1365 gi->gd_dwidth = gv->disp_width; 1366 gi->gd_dheight = gv->disp_height; 1367 } 1368 gi->gd_dx = 0; 1369 gi->gd_dy = 0; 1370 1371 /* get display mode parameters */ 1372 1373 HBS = gv->hblank_start; 1374 HSS = gv->hsync_start; 1375 HSE = gv->hsync_stop; 1376 HBE = gv->htotal - 1; 1377 HT = gv->htotal; 1378 VBS = gv->vblank_start; 1379 VSS = gv->vsync_start; 1380 VSE = gv->vsync_stop; 1381 VBE = gv->vtotal - 1; 1382 VT = gv->vtotal; 1383 1384 if (TEXT) 1385 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1386 else 1387 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1388 VDE = gv->disp_height - 1; 1389 1390 /* adjustments */ 1391 switch (gv->depth) { 1392 case 8: 1393 clkmul = 1; 1394 offsmul = 1; 1395 clkmode = 0x0; 1396 break; 1397 case 15: 1398 case 16: 1399 clkmul = 1; 1400 offsmul = 2; 1401 clkmode = 0x6; 1402 break; 1403 case 24: 1404 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1405 clkmul = 1; 1406 else 1407 clkmul = 3; 1408 offsmul = 3; 1409 clkmode = 0x4; 1410 break; 1411 case 32: 1412 clkmul = 1; 1413 offsmul = 2; 1414 clkmode = 0x8; 1415 break; 1416 default: 1417 clkmul = 1; 1418 offsmul = 1; 1419 clkmode = 0x0; 1420 break; 1421 } 1422 1423 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1424 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1425 } else 1426 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1427 1428 vmul = 2; 1429 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1430 vmul = 1; 1431 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1432 vmul = 4; 1433 1434 VDE = VDE * vmul / 2; 1435 VBS = VBS * vmul / 2; 1436 VSS = VSS * vmul / 2; 1437 VSE = VSE * vmul / 2; 1438 VBE = VBE * vmul / 2; 1439 VT = VT * vmul / 2; 1440 1441 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1442 if (cl_64bit == 1) { 1443 if (TEXT || (gv->depth == 1)) 1444 sr15 = 0xd0; 1445 else 1446 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1447 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1448 } else { 1449 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1450 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1451 } 1452 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1453 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1454 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1455 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1456 1457 /* Set clock */ 1458 1459 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1460 1461 /* Horizontal/Vertical Sync Pulse */ 1462 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1463 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1464 hvsync_pulse &= ~0x40; 1465 else 1466 hvsync_pulse |= 0x40; 1467 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1468 hvsync_pulse &= ~0x80; 1469 else 1470 hvsync_pulse |= 0x80; 1471 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1472 1473 if (clkdoub) { 1474 HDE /= 2; 1475 HBS /= 2; 1476 HSS /= 2; 1477 HSE /= 2; 1478 HBE /= 2; 1479 HT /= 2; 1480 clkmode = 0x6; 1481 } 1482 1483 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1484 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1485 1486 /* load display parameters into board */ 1487 1488 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1489 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1490 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1491 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1492 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1493 WCrt(ba, CRT_ID_END_HOR_RETR, 1494 (HSE & 0x1f) | 1495 ((HBE & 0x20) ? 0x80 : 0x00)); 1496 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1497 WCrt(ba, CRT_ID_OVERFLOW, 1498 0x10 | 1499 ((VT & 0x100) ? 0x01 : 0x00) | 1500 ((VDE & 0x100) ? 0x02 : 0x00) | 1501 ((VSS & 0x100) ? 0x04 : 0x00) | 1502 ((VBS & 0x100) ? 0x08 : 0x00) | 1503 ((VT & 0x200) ? 0x20 : 0x00) | 1504 ((VDE & 0x200) ? 0x40 : 0x00) | 1505 ((VSS & 0x200) ? 0x80 : 0x00)); 1506 1507 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1508 0x40 | /* TEXT ? 0x00 ??? */ 1509 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1510 ((VBS & 0x200) ? 0x20 : 0x00) | 1511 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1512 1513 /* text cursor */ 1514 1515 if (TEXT) { 1516 #if CL_ULCURSOR 1517 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1518 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1519 #else 1520 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1521 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1522 #endif 1523 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1524 1525 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1526 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1527 } 1528 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1529 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1530 1531 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1532 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1533 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1534 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1535 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1536 1537 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1538 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1539 WCrt(ba, CRT_ID_LACE_CNTL, 1540 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1541 ((HBE & 0x40) ? 0x10 : 0x00) | 1542 ((HBE & 0x80) ? 0x20 : 0x00) | 1543 ((VBE & 0x100) ? 0x40 : 0x00) | 1544 ((VBE & 0x200) ? 0x80 : 0x00)); 1545 1546 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1547 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1548 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1549 1550 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1551 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1552 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1553 1554 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1555 sometimes, out of "secret" application note (crest) */ 1556 vgaw(ba, VDAC_MASK, 0); 1557 /* reset HDR "magic" access counter (crest) */ 1558 vgar(ba, VDAC_ADDRESS); 1559 1560 delay(200000); 1561 vgar(ba, VDAC_MASK); 1562 delay(200000); 1563 vgar(ba, VDAC_MASK); 1564 delay(200000); 1565 vgar(ba, VDAC_MASK); 1566 delay(200000); 1567 vgar(ba, VDAC_MASK); 1568 delay(200000); 1569 switch (gv->depth) { 1570 case 1: 1571 case 4: /* text */ 1572 vgaw(ba, VDAC_MASK, 0); 1573 HDE = gv->disp_width / 16; 1574 break; 1575 case 8: 1576 if (clkdoub) 1577 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1578 else 1579 vgaw(ba, VDAC_MASK, 0); 1580 HDE = gv->disp_width / 8; 1581 break; 1582 case 15: 1583 vgaw(ba, VDAC_MASK, 0xd0); 1584 HDE = gv->disp_width / 4; 1585 break; 1586 case 16: 1587 vgaw(ba, VDAC_MASK, 0xc1); 1588 HDE = gv->disp_width / 4; 1589 break; 1590 case 24: 1591 vgaw(ba, VDAC_MASK, 0xc5); 1592 HDE = (gv->disp_width / 8) * 3; 1593 break; 1594 case 32: 1595 vgaw(ba, VDAC_MASK, 0xc5); 1596 HDE = (gv->disp_width / 4); 1597 break; 1598 } 1599 1600 /* reset HDR "magic" access counter (crest) */ 1601 vgar(ba, VDAC_ADDRESS); 1602 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1603 vgaw(ba, VDAC_MASK, 0xff); 1604 1605 WCrt(ba, CRT_ID_OFFSET, HDE); 1606 if (cl_64bit == 1) { 1607 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1608 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1609 } 1610 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1611 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1612 0x22 | 1613 ((HDE > 0xff) ? 0x10 : 0x00)); 1614 1615 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1616 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1617 (gv->depth == 1) ? 0x01 : 0x0f); 1618 1619 /* text initialization */ 1620 1621 if (TEXT) { 1622 cl_inittextmode(gp); 1623 } 1624 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1625 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1626 1627 /* Pass-through */ 1628 1629 RegOffpass(ba); 1630 1631 return (1); 1632 } 1633 1634 void 1635 cl_inittextmode(struct grf_softc *gp) 1636 { 1637 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1638 volatile unsigned char *ba = gp->g_regkva; 1639 unsigned char *fb = __UNVOLATILE(gp->g_fbkva); 1640 unsigned char *c, *f, y; 1641 unsigned short z; 1642 1643 1644 /* load text font into beginning of display memory. Each character 1645 * cell is 32 bytes long (enough for 4 planes) */ 1646 1647 SetTextPlane(ba, 0x02); 1648 cl_memset(fb, 0, 256 * 32); 1649 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1650 f = tm->fdata; 1651 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1652 for (y = 0; y < tm->fy; y++) 1653 *c++ = *f++; 1654 1655 /* clear out text/attr planes (three screens worth) */ 1656 1657 SetTextPlane(ba, 0x01); 1658 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1659 SetTextPlane(ba, 0x00); 1660 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1661 1662 /* print out a little init msg */ 1663 1664 c = (unsigned char *) (fb) + (tm->cols - 16); 1665 strcpy(c, "CIRRUS"); 1666 c[6] = 0x20; 1667 1668 /* set colors (B&W) */ 1669 1670 vgaw(ba, VDAC_ADDRESS_W, 0); 1671 for (z = 0; z < 256; z++) { 1672 unsigned char r, g, b; 1673 1674 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1675 1676 if (cltype == PICASSO) { 1677 r = clconscolors[y][0]; 1678 g = clconscolors[y][1]; 1679 b = clconscolors[y][2]; 1680 } else { 1681 b = clconscolors[y][0]; 1682 g = clconscolors[y][1]; 1683 r = clconscolors[y][2]; 1684 } 1685 vgaw(ba, VDAC_DATA, r >> 2); 1686 vgaw(ba, VDAC_DATA, g >> 2); 1687 vgaw(ba, VDAC_DATA, b >> 2); 1688 } 1689 } 1690 1691 void 1692 cl_memset(unsigned char *d, unsigned char c, int l) 1693 { 1694 for (; l > 0; l--) 1695 *d++ = c; 1696 } 1697 1698 /* 1699 * Special wakeup/passthrough registers on graphics boards 1700 * 1701 * The methods have diverged a bit for each board, so 1702 * WPass(P) has been converted into a set of specific 1703 * inline functions. 1704 */ 1705 static void 1706 RegWakeup(volatile void *ba) 1707 { 1708 1709 switch (cltype) { 1710 case SPECTRUM: 1711 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1712 break; 1713 case PICASSO: 1714 /* Picasso needs no wakeup */ 1715 break; 1716 case PICCOLO: 1717 if (cl_64bit == 1) 1718 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1719 else 1720 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1721 break; 1722 } 1723 delay(200000); 1724 } 1725 1726 static void 1727 RegOnpass(volatile void *ba) 1728 { 1729 1730 switch (cltype) { 1731 case SPECTRUM: 1732 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1733 break; 1734 case PICASSO: 1735 if (cl_64bit == 0) 1736 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1737 break; 1738 case PICCOLO: 1739 if (cl_64bit == 1) 1740 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1741 else 1742 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1743 break; 1744 } 1745 cl_pass_toggle = 1; 1746 delay(200000); 1747 } 1748 1749 static void 1750 RegOffpass(volatile void *ba) 1751 { 1752 1753 switch (cltype) { 1754 case SPECTRUM: 1755 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1756 break; 1757 case PICASSO: 1758 if (cl_64bit == 0) 1759 vgaw(ba, PASS_ADDRESS_W, 0xff); 1760 break; 1761 case PICCOLO: 1762 if (cl_64bit == 1) 1763 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1764 else 1765 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1766 break; 1767 } 1768 cl_pass_toggle = 0; 1769 delay(200000); 1770 } 1771 1772 #endif /* NGRFCL */ 1773
Indexes created Sun Sep 28 16:09:52 GMT 2025