grf_cl.c revision 1.42
1 /* $NetBSD: grf_cl.c,v 1.42 2009/03/14 15:36:00 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "opt_amigacons.h" 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: grf_cl.c,v 1.42 2009/03/14 15:36:00 dsl Exp $"); 40 41 #include "grfcl.h" 42 #if NGRFCL > 0 43 44 /* 45 * Graphics routines for Cirrus CL GD 5426 boards, 46 * 47 * This code offers low-level routines to access Cirrus Cl GD 5426 48 * graphics-boards from within NetBSD for the Amiga. 49 * No warranties for any kind of function at all - this 50 * code may crash your hardware and scratch your harddisk. Use at your 51 * own risk. Freely distributable. 52 * 53 * Modified for Cirrus CL GD 5426 from 54 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 55 * Contributions by Ill, ScottE, MiL 56 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 57 * Picasso/040 patches (wee!) by crest 01/96 58 * 59 * PicassoIV support bz Klaus "crest" Burkert. 60 * Fixed interlace and doublescan, added clockdoubling and 61 * HiColor&TrueColor suuport by crest 01/97 62 * 63 * Thanks to Village Tronic Marketing Gmbh for providing me with 64 * a Picasso-II board. 65 * Thanks for Integrated Electronics Oy Ab for providing me with 66 * Cirrus CL GD 542x family documentation. 67 * 68 * TODO: 69 * Mouse support (almost there! :-)) 70 * Blitter support 71 * 72 */ 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/errno.h> 77 #include <sys/ioctl.h> 78 #include <sys/device.h> 79 #include <sys/malloc.h> 80 81 #include <machine/cpu.h> 82 #include <dev/cons.h> 83 #include <amiga/dev/itevar.h> 84 #include <amiga/amiga/device.h> 85 #include <amiga/dev/grfioctl.h> 86 #include <amiga/dev/grfvar.h> 87 #include <amiga/dev/grf_clreg.h> 88 #include <amiga/dev/zbusvar.h> 89 90 int cl_mondefok(struct grfvideo_mode *); 91 void cl_boardinit(struct grf_softc *); 92 static void cl_CompFQ(u_int, u_char *, u_char *, u_char *); 93 int cl_getvmode(struct grf_softc *, struct grfvideo_mode *); 94 int cl_setvmode(struct grf_softc *, unsigned int); 95 int cl_toggle(struct grf_softc *, unsigned short); 96 int cl_getcmap(struct grf_softc *, struct grf_colormap *); 97 int cl_putcmap(struct grf_softc *, struct grf_colormap *); 98 #ifndef CL5426CONSOLE 99 void cl_off(struct grf_softc *); 100 #endif 101 void cl_inittextmode(struct grf_softc *); 102 int cl_ioctl(register struct grf_softc *, u_long, void *); 103 int cl_getmousepos(struct grf_softc *, struct grf_position *); 104 int cl_setmousepos(struct grf_softc *, struct grf_position *); 105 static int cl_setspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 106 int cl_getspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 107 static int cl_getspritemax(struct grf_softc *, struct grf_position *); 108 int cl_blank(struct grf_softc *, int *); 109 int cl_setmonitor(struct grf_softc *, struct grfvideo_mode *); 110 void cl_writesprpos(volatile char *, short, short); 111 void writeshifted(volatile char *, signed char, signed char); 112 113 static void RegWakeup(volatile void *); 114 static void RegOnpass(volatile void *); 115 static void RegOffpass(volatile void *); 116 117 void grfclattach(struct device *, struct device *, void *); 118 int grfclprint(void *, const char *); 119 int grfclmatch(struct device *, struct cfdata *, void *); 120 void cl_memset(unsigned char *, unsigned char, int); 121 122 /* Graphics display definitions. 123 * These are filled by 'grfconfig' using GRFIOCSETMON. 124 */ 125 #define monitor_def_max 24 126 static struct grfvideo_mode monitor_def[24] = { 127 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 128 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 129 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 130 }; 131 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 132 133 /* Patchable maximum pixel clock */ 134 unsigned long cl_maxpixelclock = 86000000; 135 136 /* Console display definition. 137 * Default hardcoded text mode. This grf_cl is set up to 138 * use one text mode only, and this is it. You may use 139 * grfconfig to change the mode after boot. 140 */ 141 /* Console font */ 142 #ifdef KFONT_8X11 143 #define CIRRUSFONT kernel_font_8x11 144 #define CIRRUSFONTY 11 145 #else 146 #define CIRRUSFONT kernel_font_8x8 147 #define CIRRUSFONTY 8 148 #endif 149 extern unsigned char CIRRUSFONT[]; 150 151 struct grfcltext_mode clconsole_mode = { 152 {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8, 153 481, 490, 498, 522, 0}, 154 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 155 }; 156 /* Console colors */ 157 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 158 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 159 }; 160 161 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 162 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 163 unsigned char cl_pass_toggle; /* passthru status tracker */ 164 165 /* 166 * because all 542x-boards have 2 configdev entries, one for 167 * framebuffer mem and the other for regs, we have to hold onto 168 * the pointers globally until we match on both. This and 'cltype' 169 * are the primary obsticles to multiple board support, but if you 170 * have multiple boards you have bigger problems than grf_cl. 171 */ 172 static void *cl_fbaddr = 0; /* framebuffer */ 173 static void *cl_regaddr = 0; /* registers */ 174 static int cl_fbsize; /* framebuffer size */ 175 static int cl_fbautosize; /* framebuffer autoconfig size */ 176 177 178 /* 179 * current sprite info, if you add support for multiple boards 180 * make this an array or something 181 */ 182 struct grf_spriteinfo cl_cursprite; 183 184 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 185 * you add multiple board support 186 */ 187 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 188 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 189 190 /* standard driver stuff */ 191 CFATTACH_DECL(grfcl, sizeof(struct grf_softc), 192 grfclmatch, grfclattach, NULL, NULL); 193 194 static struct cfdata *cfdata; 195 196 int 197 grfclmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 198 { 199 struct zbus_args *zap; 200 static int regprod, fbprod, fbprod2; 201 int error; 202 203 fbprod2 = 0; 204 zap = auxp; 205 206 #ifndef CL5426CONSOLE 207 if (amiga_realconfig == 0) 208 return (0); 209 #endif 210 211 /* Grab the first board we encounter as the preferred one. This will 212 * allow one board to work in a multiple 5426 board system, but not 213 * multiple boards at the same time. */ 214 if (cltype == 0) { 215 switch (zap->manid) { 216 case PICASSO: 217 switch (zap->prodid) { 218 case 11: 219 case 12: 220 regprod = 12; 221 fbprod = 11; 222 error = 0; 223 break; 224 case 22: 225 fbprod2 = 22; 226 error = 0; 227 break; 228 case 21: 229 case 23: 230 regprod = 23; 231 fbprod = 21; 232 cl_64bit = 1; 233 error = 0; 234 break; 235 case 24: 236 regprod = 24; 237 fbprod = 24; 238 cl_64bit = 1; 239 error = 0; 240 break; 241 default: 242 error = 1; 243 break; 244 } 245 if (error == 1) 246 return (0); 247 else 248 break; 249 case SPECTRUM: 250 if (zap->prodid != 2 && zap->prodid != 1) 251 return (0); 252 regprod = 2; 253 fbprod = 1; 254 break; 255 case PICCOLO: 256 switch (zap->prodid) { 257 case 5: 258 case 6: 259 regprod = 6; 260 fbprod = 5; 261 error = 0; 262 break; 263 case 10: 264 case 11: 265 regprod = 11; 266 fbprod = 10; 267 cl_64bit = 1; 268 error = 0; 269 break; 270 default: 271 error = 1; 272 break; 273 } 274 if (error == 1) 275 return (0); 276 else 277 break; 278 default: 279 return (0); 280 } 281 cltype = zap->manid; 282 } else { 283 if (cltype != zap->manid) { 284 return (0); 285 } 286 } 287 288 /* Configure either registers or framebuffer in any order */ 289 if ((cltype == PICASSO) && (cl_64bit == 1)) { 290 switch (zap->prodid) { 291 case 21: 292 cl_fbaddr = zap->va; 293 cl_fbautosize = zap->size; 294 break; 295 case 22: 296 cl_fbautosize += zap->size; 297 break; 298 case 23: 299 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 300 break; 301 case 24: 302 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 303 /* check for PicassoIV with 64MB config and handle it */ 304 if (zap->size == 0x04000000) { 305 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000); 306 } else { 307 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 308 } 309 cl_fbautosize = 0x400000; 310 break; 311 default: 312 return (0); 313 } 314 } 315 else { 316 if (zap->prodid == regprod) 317 cl_regaddr = zap->va; 318 else 319 if (zap->prodid == fbprod) { 320 cl_fbaddr = zap->va; 321 cl_fbautosize = zap->size; 322 } else 323 return (0); 324 } 325 326 #ifdef CL5426CONSOLE 327 if (amiga_realconfig == 0) { 328 cfdata = cfp; 329 } 330 #endif 331 332 return (1); 333 } 334 335 void 336 grfclattach(pdp, dp, auxp) 337 struct device *pdp, *dp; 338 void *auxp; 339 { 340 static struct grf_softc congrf; 341 struct zbus_args *zap; 342 struct grf_softc *gp; 343 static char attachflag = 0; 344 345 zap = auxp; 346 347 printf("\n"); 348 349 /* make sure both halves have matched */ 350 if (!cl_regaddr || !cl_fbaddr) 351 return; 352 353 /* do all that messy console/grf stuff */ 354 if (dp == NULL) 355 gp = &congrf; 356 else 357 gp = (struct grf_softc *) dp; 358 359 if (dp != NULL && congrf.g_regkva != 0) { 360 /* 361 * inited earlier, just copy (not device struct) 362 */ 363 bcopy(&congrf.g_display, &gp->g_display, 364 (char *) &gp[1] - (char *) &gp->g_display); 365 } else { 366 gp->g_regkva = (volatile void *) cl_regaddr; 367 gp->g_fbkva = (volatile void *) cl_fbaddr; 368 369 gp->g_unit = GRF_CL5426_UNIT; 370 gp->g_mode = cl_mode; 371 gp->g_conpri = grfcl_cnprobe(); 372 gp->g_flags = GF_ALIVE; 373 374 /* wakeup the board */ 375 cl_boardinit(gp); 376 #ifdef CL5426CONSOLE 377 grfcl_iteinit(gp); 378 (void) cl_load_mon(gp, &clconsole_mode); 379 #endif 380 381 } 382 383 /* 384 * attach grf (once) 385 */ 386 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 387 attachflag = 1; 388 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 389 switch (cltype) { 390 case PICASSO: 391 if (cl_64bit == 1) { 392 printf("Picasso IV"); 393 /* 135MHz will be supported if we 394 * have a palette doubling mode. 395 */ 396 cl_maxpixelclock = 86000000; 397 } 398 else { 399 printf("Picasso II"); 400 401 /* check for PicassoII+ (crest) */ 402 if(zap->serno == 0x00100000) 403 printf("+"); 404 405 /* determine used Gfx/chipset (crest) */ 406 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 407 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 408 case 0x24: 409 printf(" (with CL-GD5426)"); 410 break; 411 case 0x26: 412 printf(" (with CL-GD5428)"); 413 break; 414 case 0x27: 415 printf(" (with CL-GD5429)"); 416 break; 417 } 418 cl_maxpixelclock = 86000000; 419 } 420 break; 421 case SPECTRUM: 422 printf("Spectrum"); 423 cl_maxpixelclock = 90000000; 424 break; 425 case PICCOLO: 426 if (cl_64bit == 1) { 427 printf("Piccolo SD64"); 428 /* 110MHz will be supported if we 429 * have a palette doubling mode. 430 */ 431 cl_maxpixelclock = 90000000; 432 } else { 433 printf("Piccolo"); 434 cl_maxpixelclock = 90000000; 435 } 436 break; 437 } 438 printf(" being used\n"); 439 #ifdef CL_OVERCLOCK 440 cl_maxpixelclock = 115000000; 441 #endif 442 } else { 443 if (!attachflag) 444 printf("grfcl unattached!!\n"); 445 } 446 } 447 448 int 449 grfclprint(void *auxp, const char *pnp) 450 { 451 if (pnp) 452 aprint_normal("ite at %s: ", pnp); 453 return (UNCONF); 454 } 455 456 void 457 cl_boardinit(struct grf_softc *gp) 458 { 459 volatile unsigned char *ba = gp->g_regkva; 460 int x; 461 462 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 463 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 464 delay(200000); /* wait some time (two frames as of now) */ 465 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 466 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 467 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 468 cl_fbsize = cl_fbautosize; 469 } else { 470 471 /* wakeup board and flip passthru OFF */ 472 RegWakeup(ba); 473 RegOnpass(ba); 474 475 vgaw(ba, 0x46e8, 0x16); 476 vgaw(ba, 0x102, 1); 477 vgaw(ba, 0x46e8, 0x0e); 478 if (cl_64bit != 1) 479 vgaw(ba, 0x3c3, 1); 480 481 cl_fbsize = cl_fbautosize; 482 483 /* setup initial unchanging parameters */ 484 485 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 486 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 487 488 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 489 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 490 491 if (cl_64bit == 1) { 492 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 493 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 494 } else { 495 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 496 } 497 WSeq(ba, SEQ_ID_RESET, 0x03); 498 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 499 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 500 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 501 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 502 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 503 if (cl_64bit == 1) 504 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 505 else 506 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 507 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 508 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 509 510 if (cl_64bit == 1) 511 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 512 else 513 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 514 515 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 516 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 517 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 518 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 519 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 520 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 521 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 522 523 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 524 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 525 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 526 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 527 if (cl_64bit == 1) { 528 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 529 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 530 } 531 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 532 533 WGfx(ba, GCT_ID_SET_RESET, 0x00); 534 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 535 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 536 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 537 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 538 WGfx(ba, GCT_ID_MISC, 0x01); 539 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 540 WGfx(ba, GCT_ID_BITMASK, 0xff); 541 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 542 543 for (x = 0; x < 0x10; x++) 544 WAttr(ba, x, x); 545 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 546 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 547 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 548 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 549 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 550 WAttr(ba, 0x34, 0x00); 551 552 vgaw(ba, VDAC_MASK, 0xff); 553 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 554 555 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 556 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 557 } 558 559 /* colors initially set to greyscale */ 560 vgaw(ba, VDAC_ADDRESS_W, 0); 561 for (x = 255; x >= 0; x--) { 562 vgaw(ba, VDAC_DATA, x); 563 vgaw(ba, VDAC_DATA, x); 564 vgaw(ba, VDAC_DATA, x); 565 } 566 /* set sprite bitmap pointers */ 567 cl_cursprite.image = cl_imageptr; 568 cl_cursprite.mask = cl_maskptr; 569 cl_cursprite.cmap.red = cl_sprred; 570 cl_cursprite.cmap.green = cl_sprgreen; 571 cl_cursprite.cmap.blue = cl_sprblue; 572 573 if (cl_64bit == 0) { 574 575 /* check for 1MB or 2MB board (crest) */ 576 volatile unsigned long *cl_fbtestaddr; 577 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 578 579 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 580 *cl_fbtestaddr = 0x12345678; 581 582 if (*cl_fbtestaddr != 0x12345678) { 583 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 584 cl_fbsize = 0x100000; 585 } 586 else 587 { 588 cl_fbsize = 0x200000; 589 } 590 } 591 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 592 } 593 594 595 int 596 cl_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm) 597 { 598 struct grfvideo_mode *gv; 599 600 #ifdef CL5426CONSOLE 601 /* Handle grabbing console mode */ 602 if (vm->mode_num == 255) { 603 bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode)); 604 /* XXX so grfconfig can tell us the correct text dimensions. */ 605 vm->depth = clconsole_mode.fy; 606 } else 607 #endif 608 { 609 if (vm->mode_num == 0) 610 vm->mode_num = (monitor_current - monitor_def) + 1; 611 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 612 return (EINVAL); 613 gv = monitor_def + (vm->mode_num - 1); 614 if (gv->mode_num == 0) 615 return (EINVAL); 616 617 bcopy(gv, vm, sizeof(struct grfvideo_mode)); 618 } 619 620 /* adjust internal values to pixel values */ 621 622 vm->hblank_start *= 8; 623 vm->hsync_start *= 8; 624 vm->hsync_stop *= 8; 625 vm->htotal *= 8; 626 627 return (0); 628 } 629 630 631 int 632 cl_setvmode(struct grf_softc *gp, unsigned mode) 633 { 634 if (!mode || (mode > monitor_def_max) || 635 monitor_def[mode - 1].mode_num == 0) 636 return (EINVAL); 637 638 monitor_current = monitor_def + (mode - 1); 639 640 return (0); 641 } 642 643 #ifndef CL5426CONSOLE 644 void 645 cl_off(struct grf_softc *gp) 646 { 647 char *ba = gp->g_regkva; 648 649 /* 650 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 651 * on just in case it didn't work...but then it doesn't matter does 652 * it? =) 653 */ 654 RegOnpass(ba); 655 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 656 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 657 } 658 #endif 659 660 int 661 cl_blank(struct grf_softc *gp, int *on) 662 { 663 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 664 return(0); 665 } 666 667 /* 668 * Change the mode of the display. 669 * Return a UNIX error number or 0 for success. 670 */ 671 int 672 cl_mode(register struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3) 673 { 674 int error; 675 676 switch (cmd) { 677 case GM_GRFON: 678 error = cl_load_mon(gp, 679 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 680 return (error); 681 682 case GM_GRFOFF: 683 #ifndef CL5426CONSOLE 684 cl_off(gp); 685 #else 686 cl_load_mon(gp, &clconsole_mode); 687 #endif 688 return (0); 689 690 case GM_GRFCONFIG: 691 return (0); 692 693 case GM_GRFGETVMODE: 694 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 695 696 case GM_GRFSETVMODE: 697 error = cl_setvmode(gp, *(unsigned *) arg); 698 if (!error && (gp->g_flags & GF_GRFON)) 699 cl_load_mon(gp, 700 (struct grfcltext_mode *) monitor_current); 701 return (error); 702 703 case GM_GRFGETNUMVM: 704 *(int *) arg = monitor_def_max; 705 return (0); 706 707 case GM_GRFIOCTL: 708 return (cl_ioctl(gp, a2, arg)); 709 710 default: 711 break; 712 } 713 714 return (EPASSTHROUGH); 715 } 716 717 int 718 cl_ioctl(register struct grf_softc *gp, u_long cmd, void *data) 719 { 720 switch (cmd) { 721 case GRFIOCGSPRITEPOS: 722 return (cl_getmousepos(gp, (struct grf_position *) data)); 723 724 case GRFIOCSSPRITEPOS: 725 return (cl_setmousepos(gp, (struct grf_position *) data)); 726 727 case GRFIOCSSPRITEINF: 728 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 729 730 case GRFIOCGSPRITEINF: 731 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 732 733 case GRFIOCGSPRITEMAX: 734 return (cl_getspritemax(gp, (struct grf_position *) data)); 735 736 case GRFIOCGETCMAP: 737 return (cl_getcmap(gp, (struct grf_colormap *) data)); 738 739 case GRFIOCPUTCMAP: 740 return (cl_putcmap(gp, (struct grf_colormap *) data)); 741 742 case GRFIOCBITBLT: 743 break; 744 745 case GRFTOGGLE: 746 return (cl_toggle(gp, 0)); 747 748 case GRFIOCSETMON: 749 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 750 751 case GRFIOCBLANK: 752 return (cl_blank(gp, (int *)data)); 753 754 } 755 return (EPASSTHROUGH); 756 } 757 758 int 759 cl_getmousepos(struct grf_softc *gp, struct grf_position *data) 760 { 761 data->x = cl_cursprite.pos.x; 762 data->y = cl_cursprite.pos.y; 763 return (0); 764 } 765 766 void 767 cl_writesprpos(volatile char *ba, short x, short y) 768 { 769 /* we want to use a 16-bit write to 3c4 so no macros used */ 770 volatile unsigned char *cwp; 771 volatile unsigned short *wp; 772 773 cwp = ba + 0x3c4; 774 wp = (volatile unsigned short *)cwp; 775 776 /* 777 * don't ask me why, but apparently you can't do a 16-bit write with 778 * x-position like with y-position below (dagge) 779 */ 780 cwp[0] = 0x10 | ((x << 5) & 0xff); 781 cwp[1] = (x >> 3) & 0xff; 782 783 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 784 } 785 786 void 787 writeshifted(volatile char *to, signed char shiftx, signed char shifty) 788 { 789 int y; 790 unsigned long long *tptr, *iptr, *mptr, line; 791 792 tptr = (unsigned long long *) __UNVOLATILE(to); 793 iptr = (unsigned long long *) cl_cursprite.image; 794 mptr = (unsigned long long *) cl_cursprite.mask; 795 796 shiftx = shiftx < 0 ? 0 : shiftx; 797 shifty = shifty < 0 ? 0 : shifty; 798 799 /* start reading shifty lines down, and 800 * shift each line in by shiftx 801 */ 802 for (y = shifty; y < 64; y++) { 803 804 /* image */ 805 line = iptr[y]; 806 *tptr++ = line << shiftx; 807 808 /* mask */ 809 line = mptr[y]; 810 *tptr++ = line << shiftx; 811 } 812 813 /* clear the remainder */ 814 for (y = shifty; y > 0; y--) { 815 *tptr++ = 0; 816 *tptr++ = 0; 817 } 818 } 819 820 int 821 cl_setmousepos(struct grf_softc *gp, struct grf_position *data) 822 { 823 volatile char *ba = gp->g_regkva; 824 short rx, ry, prx, pry; 825 #ifdef CL_SHIFTSPRITE 826 volatile char *fb = gp->g_fbkva; 827 volatile char *sprite = fb + (cl_fbsize - 1024); 828 #endif 829 830 /* no movement */ 831 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 832 return (0); 833 834 /* current and previous real coordinates */ 835 rx = data->x - cl_cursprite.hot.x; 836 ry = data->y - cl_cursprite.hot.y; 837 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 838 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 839 840 /* 841 * if we are/were on an edge, create (un)shifted bitmap -- 842 * ripped out optimization (not extremely worthwhile, 843 * and kind of buggy anyhow). 844 */ 845 #ifdef CL_SHIFTSPRITE 846 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 847 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 848 } 849 #endif 850 851 /* do movement, save position */ 852 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 853 cl_cursprite.pos.x = data->x; 854 cl_cursprite.pos.y = data->y; 855 856 return (0); 857 } 858 859 int 860 cl_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 861 { 862 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 863 copyout(cl_cursprite.image, data->image, 64 * 8); 864 copyout(cl_cursprite.mask, data->mask, 64 * 8); 865 return (0); 866 } 867 868 static int 869 cl_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 870 { 871 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 872 volatile char *sprite = fb + (cl_fbsize - 1024); 873 874 if (data->set & GRFSPRSET_SHAPE) { 875 876 unsigned short dsx, dsy, i; 877 unsigned long *di, *dm, *si, *sm; 878 unsigned long ssi[128], ssm[128]; 879 struct grf_position gpos; 880 881 882 /* check for a too large sprite (no clipping!) */ 883 dsy = data->size.y; 884 dsx = data->size.x; 885 if (dsy > 64 || dsx > 64) 886 return(EINVAL); 887 888 /* prepare destination */ 889 di = (unsigned long *)cl_cursprite.image; 890 dm = (unsigned long *)cl_cursprite.mask; 891 cl_memset((unsigned char *)di, 0, 8*64); 892 cl_memset((unsigned char *)dm, 0, 8*64); 893 894 /* two alternatives: 64 across, then it's 895 * the same format we use, just copy. Otherwise, 896 * copy into tmp buf and recopy skipping the 897 * unused 32 bits. 898 */ 899 if ((dsx - 1) / 32) { 900 copyin(data->image, di, 8 * dsy); 901 copyin(data->mask, dm, 8 * dsy); 902 } else { 903 si = ssi; sm = ssm; 904 copyin(data->image, si, 4 * dsy); 905 copyin(data->mask, sm, 4 * dsy); 906 for (i = 0; i < dsy; i++) { 907 *di = *si++; 908 *dm = *sm++; 909 di += 2; 910 dm += 2; 911 } 912 } 913 914 /* set size */ 915 cl_cursprite.size.x = data->size.x; 916 cl_cursprite.size.y = data->size.y; 917 918 /* forcably load into board */ 919 gpos.x = cl_cursprite.pos.x; 920 gpos.y = cl_cursprite.pos.y; 921 cl_cursprite.pos.x = -1; 922 cl_cursprite.pos.y = -1; 923 writeshifted(sprite, 0, 0); 924 cl_setmousepos(gp, &gpos); 925 926 } 927 if (data->set & GRFSPRSET_HOT) { 928 929 cl_cursprite.hot = data->hot; 930 931 } 932 if (data->set & GRFSPRSET_CMAP) { 933 934 u_char red[2], green[2], blue[2]; 935 936 copyin(data->cmap.red, red, 2); 937 copyin(data->cmap.green, green, 2); 938 copyin(data->cmap.blue, blue, 2); 939 bcopy(red, cl_cursprite.cmap.red, 2); 940 bcopy(green, cl_cursprite.cmap.green, 2); 941 bcopy(blue, cl_cursprite.cmap.blue, 2); 942 943 /* enable and load colors 256 & 257 */ 944 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 945 946 /* 256 */ 947 vgaw(ba, VDAC_ADDRESS_W, 0x00); 948 if (cltype == PICASSO) { 949 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 950 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 951 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 952 } else { 953 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 954 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 955 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 956 } 957 958 /* 257 */ 959 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 960 if (cltype == PICASSO) { 961 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 962 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 963 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 964 } else { 965 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 966 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 967 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 968 } 969 970 /* turn on/off sprite */ 971 if (cl_cursprite.enable) { 972 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 973 } else { 974 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 975 } 976 977 } 978 if (data->set & GRFSPRSET_ENABLE) { 979 980 if (data->enable == 1) { 981 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 982 cl_cursprite.enable = 1; 983 } else { 984 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 985 cl_cursprite.enable = 0; 986 } 987 988 } 989 if (data->set & GRFSPRSET_POS) { 990 991 /* force placement */ 992 cl_cursprite.pos.x = -1; 993 cl_cursprite.pos.y = -1; 994 995 /* do it */ 996 cl_setmousepos(gp, &data->pos); 997 998 } 999 return (0); 1000 } 1001 1002 static int 1003 cl_getspritemax(struct grf_softc *gp, struct grf_position *data) 1004 { 1005 if (gp->g_display.gd_planes == 24) 1006 return (EINVAL); 1007 data->x = 64; 1008 data->y = 64; 1009 return (0); 1010 } 1011 1012 int 1013 cl_setmonitor(struct grf_softc *gp, struct grfvideo_mode *gv) 1014 { 1015 struct grfvideo_mode *md; 1016 1017 if (!cl_mondefok(gv)) 1018 return(EINVAL); 1019 1020 #ifdef CL5426CONSOLE 1021 /* handle interactive setting of console mode */ 1022 if (gv->mode_num == 255) { 1023 bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode)); 1024 clconsole_mode.gv.hblank_start /= 8; 1025 clconsole_mode.gv.hsync_start /= 8; 1026 clconsole_mode.gv.hsync_stop /= 8; 1027 clconsole_mode.gv.htotal /= 8; 1028 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1029 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1030 if (!(gp->g_flags & GF_GRFON)) 1031 cl_load_mon(gp, &clconsole_mode); 1032 ite_reinit(gp->g_itedev); 1033 return (0); 1034 } 1035 #endif 1036 1037 md = monitor_def + (gv->mode_num - 1); 1038 bcopy(gv, md, sizeof(struct grfvideo_mode)); 1039 1040 /* adjust pixel oriented values to internal rep. */ 1041 1042 md->hblank_start /= 8; 1043 md->hsync_start /= 8; 1044 md->hsync_stop /= 8; 1045 md->htotal /= 8; 1046 1047 return (0); 1048 } 1049 1050 int 1051 cl_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1052 { 1053 volatile unsigned char *ba; 1054 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1055 short x; 1056 int error; 1057 1058 if (cmap->count == 0 || cmap->index >= 256) 1059 return 0; 1060 1061 if (cmap->count > 256 - cmap->index) 1062 cmap->count = 256 - cmap->index; 1063 1064 ba = gfp->g_regkva; 1065 /* first read colors out of the chip, then copyout to userspace */ 1066 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1067 x = cmap->count - 1; 1068 1069 /* 1070 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1071 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1072 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1073 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1074 */ 1075 1076 /* 1077 * The source for the above comment is somewhat unknow to me. 1078 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1079 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1080 * be native to the chipset. This requires special programming for the 1081 * CLUT in 8BPP to compensate and avoid false colors. 1082 * I didn't find any special stuff for 15 and 16BPP though, crest. 1083 */ 1084 1085 switch (cltype) { 1086 case SPECTRUM: 1087 case PICCOLO: 1088 rp = blue + cmap->index; 1089 gp = green + cmap->index; 1090 bp = red + cmap->index; 1091 break; 1092 case PICASSO: 1093 rp = red + cmap->index; 1094 gp = green + cmap->index; 1095 bp = blue + cmap->index; 1096 break; 1097 default: 1098 rp = gp = bp = 0; 1099 break; 1100 } 1101 1102 do { 1103 *rp++ = vgar(ba, VDAC_DATA) << 2; 1104 *gp++ = vgar(ba, VDAC_DATA) << 2; 1105 *bp++ = vgar(ba, VDAC_DATA) << 2; 1106 } while (x-- > 0); 1107 1108 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1109 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1110 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1111 return (0); 1112 1113 return (error); 1114 } 1115 1116 int 1117 cl_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1118 { 1119 volatile unsigned char *ba; 1120 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1121 short x; 1122 int error; 1123 1124 if (cmap->count == 0 || cmap->index >= 256) 1125 return (0); 1126 1127 if (cmap->count > 256 - cmap->index) 1128 cmap->count = 256 - cmap->index; 1129 1130 /* first copy the colors into kernelspace */ 1131 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1132 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1133 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1134 ba = gfp->g_regkva; 1135 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1136 x = cmap->count - 1; 1137 1138 switch (cltype) { 1139 case SPECTRUM: 1140 case PICCOLO: 1141 rp = blue + cmap->index; 1142 gp = green + cmap->index; 1143 bp = red + cmap->index; 1144 break; 1145 case PICASSO: 1146 rp = red + cmap->index; 1147 gp = green + cmap->index; 1148 bp = blue + cmap->index; 1149 break; 1150 default: 1151 rp = gp = bp = 0; 1152 break; 1153 } 1154 1155 do { 1156 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1157 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1158 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1159 } while (x-- > 0); 1160 return (0); 1161 } else 1162 return (error); 1163 } 1164 1165 1166 int 1167 cl_toggle(gp, wopp) 1168 struct grf_softc *gp; 1169 unsigned short wopp; /* don't need that one yet, ill */ 1170 { 1171 volatile void *ba; 1172 1173 ba = gp->g_regkva; 1174 1175 if (cl_pass_toggle) { 1176 RegOffpass(ba); 1177 } else { 1178 RegOnpass(ba); 1179 } 1180 return (0); 1181 } 1182 1183 static void 1184 cl_CompFQ(u_int fq, u_char *num, u_char *denom, u_char *clkdoub) 1185 { 1186 #define OSC 14318180 1187 /* OK, here's what we're doing here: 1188 * 1189 * OSC * NUMERATOR 1190 * VCLK = ------------------- Hz 1191 * DENOMINATOR * (1+P) 1192 * 1193 * so we're given VCLK and we should give out some useful 1194 * values.... 1195 * 1196 * NUMERATOR is 7 bits wide 1197 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1198 * 1199 * We run through all the possible combinations and 1200 * return the values which deviate the least from the chosen frequency. 1201 * 1202 */ 1203 #define OSC 14318180 1204 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1205 1206 unsigned char n, d, p, minn, mind, minp = 0; 1207 unsigned long err, minerr; 1208 1209 /* 1210 numer = 0x00 - 0x7f 1211 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1212 */ 1213 1214 /* find lowest error in 6144 iterations. */ 1215 minerr = fq; 1216 minn = 0; 1217 mind = 0; 1218 p = 0; 1219 1220 if ((cl_64bit == 1) && (fq >= 86000000)) 1221 { 1222 for (d = 1; d < 0x20; d++) { 1223 for (n = 1; n < 0x80; n++) { 1224 err = abs(count(n, d, 0) - fq); 1225 if (err < minerr) { 1226 minerr = err; 1227 minn = n; 1228 mind = d; 1229 minp = 1; 1230 } 1231 } 1232 } 1233 *clkdoub = 1; 1234 } 1235 else { 1236 for (d = 1; d < 0x20; d++) { 1237 for (n = 1; n < 0x80; n++) { 1238 err = abs(count(n, d, p) - fq); 1239 if (err < minerr) { 1240 minerr = err; 1241 minn = n; 1242 mind = d; 1243 minp = p; 1244 } 1245 } 1246 if (d == 0x1f && p == 0) { 1247 p = 1; 1248 d = 0x0f; 1249 } 1250 } 1251 *clkdoub = 0; 1252 } 1253 1254 *num = minn; 1255 *denom = (mind << 1) | minp; 1256 if (minerr > 500000) 1257 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1258 return; 1259 } 1260 1261 int 1262 cl_mondefok(struct grfvideo_mode *gv) 1263 { 1264 unsigned long maxpix; 1265 1266 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1267 if (gv->mode_num != 255 || gv->depth != 4) 1268 return(0); 1269 1270 switch (gv->depth) { 1271 case 4: 1272 if (gv->mode_num != 255) 1273 return(0); 1274 case 1: 1275 case 8: 1276 maxpix = cl_maxpixelclock; 1277 if (cl_64bit == 1) 1278 { 1279 if (cltype == PICASSO) /* Picasso IV */ 1280 maxpix = 135000000; 1281 else /* Piccolo SD64 */ 1282 maxpix = 110000000; 1283 } 1284 break; 1285 case 15: 1286 case 16: 1287 if (cl_64bit == 1) 1288 maxpix = 85000000; 1289 else 1290 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1291 break; 1292 case 24: 1293 if ((cltype == PICASSO) && (cl_64bit == 1)) 1294 maxpix = 85000000; 1295 else 1296 maxpix = cl_maxpixelclock / 3; 1297 break; 1298 case 32: 1299 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1300 maxpix = 50000000; 1301 else 1302 maxpix = 0; 1303 break; 1304 default: 1305 printf("grfcl: Illegal depth in mode %d\n", 1306 (int) gv->mode_num); 1307 return (0); 1308 } 1309 1310 if (gv->pixel_clock > maxpix) { 1311 printf("grfcl: Pixelclock too high in mode %d\n", 1312 (int) gv->mode_num); 1313 return (0); 1314 } 1315 1316 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1317 printf("grfcl: sync-on-green is not supported\n"); 1318 return (0); 1319 } 1320 1321 return (1); 1322 } 1323 1324 int 1325 cl_load_mon(struct grf_softc *gp, struct grfcltext_mode *md) 1326 { 1327 struct grfvideo_mode *gv; 1328 struct grfinfo *gi; 1329 volatile void *ba, *fb; 1330 unsigned char num0, denom0, clkdoub; 1331 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1332 VSE, VT; 1333 int clkmul, offsmul, clkmode; 1334 int vmul; 1335 int sr15; 1336 unsigned char hvsync_pulse; 1337 char TEXT; 1338 1339 /* identity */ 1340 gv = &md->gv; 1341 TEXT = (gv->depth == 4); 1342 1343 if (!cl_mondefok(gv)) { 1344 printf("grfcl: Monitor definition not ok\n"); 1345 return (0); 1346 } 1347 1348 ba = gp->g_regkva; 1349 fb = gp->g_fbkva; 1350 1351 /* provide all needed information in grf device-independent locations */ 1352 gp->g_data = (void *) gv; 1353 gi = &gp->g_display; 1354 gi->gd_regaddr = (void *) kvtop(__UNVOLATILE(ba)); 1355 gi->gd_regsize = 64 * 1024; 1356 gi->gd_fbaddr = (void *) kvtop(__UNVOLATILE(fb)); 1357 gi->gd_fbsize = cl_fbsize; 1358 gi->gd_colors = 1 << gv->depth; 1359 gi->gd_planes = gv->depth; 1360 gi->gd_fbwidth = gv->disp_width; 1361 gi->gd_fbheight = gv->disp_height; 1362 gi->gd_fbx = 0; 1363 gi->gd_fby = 0; 1364 if (TEXT) { 1365 gi->gd_dwidth = md->fx * md->cols; 1366 gi->gd_dheight = md->fy * md->rows; 1367 } else { 1368 gi->gd_dwidth = gv->disp_width; 1369 gi->gd_dheight = gv->disp_height; 1370 } 1371 gi->gd_dx = 0; 1372 gi->gd_dy = 0; 1373 1374 /* get display mode parameters */ 1375 1376 HBS = gv->hblank_start; 1377 HSS = gv->hsync_start; 1378 HSE = gv->hsync_stop; 1379 HBE = gv->htotal - 1; 1380 HT = gv->htotal; 1381 VBS = gv->vblank_start; 1382 VSS = gv->vsync_start; 1383 VSE = gv->vsync_stop; 1384 VBE = gv->vtotal - 1; 1385 VT = gv->vtotal; 1386 1387 if (TEXT) 1388 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1389 else 1390 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1391 VDE = gv->disp_height - 1; 1392 1393 /* adjustments */ 1394 switch (gv->depth) { 1395 case 8: 1396 clkmul = 1; 1397 offsmul = 1; 1398 clkmode = 0x0; 1399 break; 1400 case 15: 1401 case 16: 1402 clkmul = 1; 1403 offsmul = 2; 1404 clkmode = 0x6; 1405 break; 1406 case 24: 1407 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1408 clkmul = 1; 1409 else 1410 clkmul = 3; 1411 offsmul = 3; 1412 clkmode = 0x4; 1413 break; 1414 case 32: 1415 clkmul = 1; 1416 offsmul = 2; 1417 clkmode = 0x8; 1418 break; 1419 default: 1420 clkmul = 1; 1421 offsmul = 1; 1422 clkmode = 0x0; 1423 break; 1424 } 1425 1426 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1427 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1428 } else 1429 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1430 1431 vmul = 2; 1432 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1433 vmul = 1; 1434 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1435 vmul = 4; 1436 1437 VDE = VDE * vmul / 2; 1438 VBS = VBS * vmul / 2; 1439 VSS = VSS * vmul / 2; 1440 VSE = VSE * vmul / 2; 1441 VBE = VBE * vmul / 2; 1442 VT = VT * vmul / 2; 1443 1444 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1445 if (cl_64bit == 1) { 1446 if (TEXT || (gv->depth == 1)) 1447 sr15 = 0xd0; 1448 else 1449 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1450 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1451 } else { 1452 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1453 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1454 } 1455 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1456 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1457 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1458 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1459 1460 /* Set clock */ 1461 1462 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1463 1464 /* Horizontal/Vertical Sync Pulse */ 1465 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1466 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1467 hvsync_pulse &= ~0x40; 1468 else 1469 hvsync_pulse |= 0x40; 1470 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1471 hvsync_pulse &= ~0x80; 1472 else 1473 hvsync_pulse |= 0x80; 1474 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1475 1476 if (clkdoub) { 1477 HDE /= 2; 1478 HBS /= 2; 1479 HSS /= 2; 1480 HSE /= 2; 1481 HBE /= 2; 1482 HT /= 2; 1483 clkmode = 0x6; 1484 } 1485 1486 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1487 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1488 1489 /* load display parameters into board */ 1490 1491 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1492 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1493 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1494 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1495 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1496 WCrt(ba, CRT_ID_END_HOR_RETR, 1497 (HSE & 0x1f) | 1498 ((HBE & 0x20) ? 0x80 : 0x00)); 1499 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1500 WCrt(ba, CRT_ID_OVERFLOW, 1501 0x10 | 1502 ((VT & 0x100) ? 0x01 : 0x00) | 1503 ((VDE & 0x100) ? 0x02 : 0x00) | 1504 ((VSS & 0x100) ? 0x04 : 0x00) | 1505 ((VBS & 0x100) ? 0x08 : 0x00) | 1506 ((VT & 0x200) ? 0x20 : 0x00) | 1507 ((VDE & 0x200) ? 0x40 : 0x00) | 1508 ((VSS & 0x200) ? 0x80 : 0x00)); 1509 1510 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1511 0x40 | /* TEXT ? 0x00 ??? */ 1512 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1513 ((VBS & 0x200) ? 0x20 : 0x00) | 1514 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1515 1516 /* text cursor */ 1517 1518 if (TEXT) { 1519 #if CL_ULCURSOR 1520 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1521 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1522 #else 1523 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1524 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1525 #endif 1526 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1527 1528 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1529 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1530 } 1531 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1532 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1533 1534 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1535 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1536 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1537 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1538 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1539 1540 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1541 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1542 WCrt(ba, CRT_ID_LACE_CNTL, 1543 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1544 ((HBE & 0x40) ? 0x10 : 0x00) | 1545 ((HBE & 0x80) ? 0x20 : 0x00) | 1546 ((VBE & 0x100) ? 0x40 : 0x00) | 1547 ((VBE & 0x200) ? 0x80 : 0x00)); 1548 1549 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1550 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1551 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1552 1553 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1554 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1555 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1556 1557 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1558 sometimes, out of "secret" application note (crest) */ 1559 vgaw(ba, VDAC_MASK, 0); 1560 /* reset HDR "magic" access counter (crest) */ 1561 vgar(ba, VDAC_ADDRESS); 1562 1563 delay(200000); 1564 vgar(ba, VDAC_MASK); 1565 delay(200000); 1566 vgar(ba, VDAC_MASK); 1567 delay(200000); 1568 vgar(ba, VDAC_MASK); 1569 delay(200000); 1570 vgar(ba, VDAC_MASK); 1571 delay(200000); 1572 switch (gv->depth) { 1573 case 1: 1574 case 4: /* text */ 1575 vgaw(ba, VDAC_MASK, 0); 1576 HDE = gv->disp_width / 16; 1577 break; 1578 case 8: 1579 if (clkdoub) 1580 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1581 else 1582 vgaw(ba, VDAC_MASK, 0); 1583 HDE = gv->disp_width / 8; 1584 break; 1585 case 15: 1586 vgaw(ba, VDAC_MASK, 0xd0); 1587 HDE = gv->disp_width / 4; 1588 break; 1589 case 16: 1590 vgaw(ba, VDAC_MASK, 0xc1); 1591 HDE = gv->disp_width / 4; 1592 break; 1593 case 24: 1594 vgaw(ba, VDAC_MASK, 0xc5); 1595 HDE = (gv->disp_width / 8) * 3; 1596 break; 1597 case 32: 1598 vgaw(ba, VDAC_MASK, 0xc5); 1599 HDE = (gv->disp_width / 4); 1600 break; 1601 } 1602 1603 /* reset HDR "magic" access counter (crest) */ 1604 vgar(ba, VDAC_ADDRESS); 1605 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1606 vgaw(ba, VDAC_MASK, 0xff); 1607 1608 WCrt(ba, CRT_ID_OFFSET, HDE); 1609 if (cl_64bit == 1) { 1610 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1611 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1612 } 1613 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1614 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1615 0x22 | 1616 ((HDE > 0xff) ? 0x10 : 0x00)); 1617 1618 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1619 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1620 (gv->depth == 1) ? 0x01 : 0x0f); 1621 1622 /* text initialization */ 1623 1624 if (TEXT) { 1625 cl_inittextmode(gp); 1626 } 1627 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1628 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1629 1630 /* Pass-through */ 1631 1632 RegOffpass(ba); 1633 1634 return (1); 1635 } 1636 1637 void 1638 cl_inittextmode(struct grf_softc *gp) 1639 { 1640 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1641 volatile unsigned char *ba = gp->g_regkva; 1642 unsigned char *fb = __UNVOLATILE(gp->g_fbkva); 1643 unsigned char *c, *f, y; 1644 unsigned short z; 1645 1646 1647 /* load text font into beginning of display memory. Each character 1648 * cell is 32 bytes long (enough for 4 planes) */ 1649 1650 SetTextPlane(ba, 0x02); 1651 cl_memset(fb, 0, 256 * 32); 1652 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1653 f = tm->fdata; 1654 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1655 for (y = 0; y < tm->fy; y++) 1656 *c++ = *f++; 1657 1658 /* clear out text/attr planes (three screens worth) */ 1659 1660 SetTextPlane(ba, 0x01); 1661 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1662 SetTextPlane(ba, 0x00); 1663 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1664 1665 /* print out a little init msg */ 1666 1667 c = (unsigned char *) (fb) + (tm->cols - 16); 1668 strcpy(c, "CIRRUS"); 1669 c[6] = 0x20; 1670 1671 /* set colors (B&W) */ 1672 1673 vgaw(ba, VDAC_ADDRESS_W, 0); 1674 for (z = 0; z < 256; z++) { 1675 unsigned char r, g, b; 1676 1677 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1678 1679 if (cltype == PICASSO) { 1680 r = clconscolors[y][0]; 1681 g = clconscolors[y][1]; 1682 b = clconscolors[y][2]; 1683 } else { 1684 b = clconscolors[y][0]; 1685 g = clconscolors[y][1]; 1686 r = clconscolors[y][2]; 1687 } 1688 vgaw(ba, VDAC_DATA, r >> 2); 1689 vgaw(ba, VDAC_DATA, g >> 2); 1690 vgaw(ba, VDAC_DATA, b >> 2); 1691 } 1692 } 1693 1694 void 1695 cl_memset(unsigned char *d, unsigned char c, int l) 1696 { 1697 for (; l > 0; l--) 1698 *d++ = c; 1699 } 1700 1701 /* 1702 * Special wakeup/passthrough registers on graphics boards 1703 * 1704 * The methods have diverged a bit for each board, so 1705 * WPass(P) has been converted into a set of specific 1706 * inline functions. 1707 */ 1708 static void 1709 RegWakeup(volatile void *ba) 1710 { 1711 1712 switch (cltype) { 1713 case SPECTRUM: 1714 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1715 break; 1716 case PICASSO: 1717 /* Picasso needs no wakeup */ 1718 break; 1719 case PICCOLO: 1720 if (cl_64bit == 1) 1721 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1722 else 1723 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1724 break; 1725 } 1726 delay(200000); 1727 } 1728 1729 static void 1730 RegOnpass(volatile void *ba) 1731 { 1732 1733 switch (cltype) { 1734 case SPECTRUM: 1735 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1736 break; 1737 case PICASSO: 1738 if (cl_64bit == 0) 1739 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1740 break; 1741 case PICCOLO: 1742 if (cl_64bit == 1) 1743 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1744 else 1745 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1746 break; 1747 } 1748 cl_pass_toggle = 1; 1749 delay(200000); 1750 } 1751 1752 static void 1753 RegOffpass(volatile void *ba) 1754 { 1755 1756 switch (cltype) { 1757 case SPECTRUM: 1758 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1759 break; 1760 case PICASSO: 1761 if (cl_64bit == 0) 1762 vgaw(ba, PASS_ADDRESS_W, 0xff); 1763 break; 1764 case PICCOLO: 1765 if (cl_64bit == 1) 1766 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1767 else 1768 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1769 break; 1770 } 1771 cl_pass_toggle = 0; 1772 delay(200000); 1773 } 1774 1775 #endif /* NGRFCL */ 1776
Indexes created Mon Sep 29 13:09:55 GMT 2025