grf_cl.c revision 1.48
1 /* $NetBSD: grf_cl.c,v 1.48 2012/11/08 18:04:56 rkujawa Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "opt_amigacons.h" 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: grf_cl.c,v 1.48 2012/11/08 18:04:56 rkujawa Exp $"); 40 41 #include "grfcl.h" 42 #include "ite.h" 43 #if NGRFCL > 0 44 45 /* 46 * Graphics routines for Cirrus CL GD 5426 boards, 47 * 48 * This code offers low-level routines to access Cirrus Cl GD 5426 49 * graphics-boards from within NetBSD for the Amiga. 50 * No warranties for any kind of function at all - this 51 * code may crash your hardware and scratch your harddisk. Use at your 52 * own risk. Freely distributable. 53 * 54 * Modified for Cirrus CL GD 5426 from 55 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 56 * Contributions by Ill, ScottE, MiL 57 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 58 * Picasso/040 patches (wee!) by crest 01/96 59 * 60 * PicassoIV support bz Klaus "crest" Burkert. 61 * Fixed interlace and doublescan, added clockdoubling and 62 * HiColor&TrueColor suuport by crest 01/97 63 * 64 * Thanks to Village Tronic Marketing Gmbh for providing me with 65 * a Picasso-II board. 66 * Thanks for Integrated Electronics Oy Ab for providing me with 67 * Cirrus CL GD 542x family documentation. 68 * 69 * TODO: 70 * Mouse support (almost there! :-)) 71 * Blitter support 72 * 73 */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/errno.h> 78 #include <sys/ioctl.h> 79 #include <sys/device.h> 80 #include <sys/malloc.h> 81 82 #include <machine/cpu.h> 83 #include <dev/cons.h> 84 #include <amiga/dev/itevar.h> 85 #include <amiga/amiga/device.h> 86 #include <amiga/dev/grfioctl.h> 87 #include <amiga/dev/grfvar.h> 88 #include <amiga/dev/grf_clreg.h> 89 #include <amiga/dev/zbusvar.h> 90 91 int cl_mondefok(struct grfvideo_mode *); 92 void cl_boardinit(struct grf_softc *); 93 static void cl_CompFQ(u_int, u_char *, u_char *, u_char *); 94 int cl_getvmode(struct grf_softc *, struct grfvideo_mode *); 95 int cl_setvmode(struct grf_softc *, unsigned int); 96 int cl_toggle(struct grf_softc *, unsigned short); 97 int cl_getcmap(struct grf_softc *, struct grf_colormap *); 98 int cl_putcmap(struct grf_softc *, struct grf_colormap *); 99 #ifndef CL5426CONSOLE 100 void cl_off(struct grf_softc *); 101 #endif 102 void cl_inittextmode(struct grf_softc *); 103 int cl_ioctl(register struct grf_softc *, u_long, void *); 104 int cl_getmousepos(struct grf_softc *, struct grf_position *); 105 int cl_setmousepos(struct grf_softc *, struct grf_position *); 106 static int cl_setspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 107 int cl_getspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 108 static int cl_getspritemax(struct grf_softc *, struct grf_position *); 109 int cl_blank(struct grf_softc *, int *); 110 int cl_setmonitor(struct grf_softc *, struct grfvideo_mode *); 111 void cl_writesprpos(volatile char *, short, short); 112 void writeshifted(volatile char *, signed char, signed char); 113 114 static void RegWakeup(volatile void *); 115 static void RegOnpass(volatile void *); 116 static void RegOffpass(volatile void *); 117 118 void grfclattach(device_t, device_t, void *); 119 int grfclprint(void *, const char *); 120 int grfclmatch(device_t, cfdata_t, void *); 121 void cl_memset(unsigned char *, unsigned char, int); 122 123 /* Graphics display definitions. 124 * These are filled by 'grfconfig' using GRFIOCSETMON. 125 */ 126 #define monitor_def_max 24 127 static struct grfvideo_mode monitor_def[24] = { 128 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 129 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 130 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 131 }; 132 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 133 134 /* Patchable maximum pixel clock */ 135 unsigned long cl_maxpixelclock = 86000000; 136 137 /* Console display definition. 138 * Default hardcoded text mode. This grf_cl is set up to 139 * use one text mode only, and this is it. You may use 140 * grfconfig to change the mode after boot. 141 */ 142 /* Console font */ 143 #ifdef KFONT_8X11 144 #define CIRRUSFONT kernel_font_8x11 145 #define CIRRUSFONTY 11 146 #else 147 #define CIRRUSFONT kernel_font_8x8 148 #define CIRRUSFONTY 8 149 #endif 150 extern unsigned char CIRRUSFONT[]; 151 152 struct grfcltext_mode clconsole_mode = { 153 {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8, 154 481, 490, 498, 522, 0}, 155 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 156 }; 157 /* Console colors */ 158 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 159 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 160 }; 161 162 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 163 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 164 unsigned char cl_pass_toggle; /* passthru status tracker */ 165 166 /* 167 * because all 542x-boards have 2 configdev entries, one for 168 * framebuffer mem and the other for regs, we have to hold onto 169 * the pointers globally until we match on both. This and 'cltype' 170 * are the primary obsticles to multiple board support, but if you 171 * have multiple boards you have bigger problems than grf_cl. 172 */ 173 static void *cl_fbaddr = 0; /* framebuffer */ 174 static void *cl_regaddr = 0; /* registers */ 175 static int cl_fbsize; /* framebuffer size */ 176 static int cl_fbautosize; /* framebuffer autoconfig size */ 177 178 179 /* 180 * current sprite info, if you add support for multiple boards 181 * make this an array or something 182 */ 183 struct grf_spriteinfo cl_cursprite; 184 185 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 186 * you add multiple board support 187 */ 188 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 189 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 190 191 /* standard driver stuff */ 192 CFATTACH_DECL_NEW(grfcl, sizeof(struct grf_softc), 193 grfclmatch, grfclattach, NULL, NULL); 194 195 static struct cfdata *cfdata; 196 197 int 198 grfclmatch(device_t parent, cfdata_t cf, void *aux) 199 { 200 struct zbus_args *zap; 201 static int regprod, fbprod, fbprod2; 202 int error; 203 204 fbprod2 = 0; 205 zap = aux; 206 207 #ifndef CL5426CONSOLE 208 if (amiga_realconfig == 0) 209 return (0); 210 #endif 211 212 /* Grab the first board we encounter as the preferred one. This will 213 * allow one board to work in a multiple 5426 board system, but not 214 * multiple boards at the same time. */ 215 if (cltype == 0) { 216 switch (zap->manid) { 217 case PICASSO: 218 switch (zap->prodid) { 219 case 11: 220 case 12: 221 regprod = 12; 222 fbprod = 11; 223 error = 0; 224 break; 225 case 22: 226 fbprod2 = 22; 227 error = 0; 228 break; 229 case 21: 230 case 23: 231 regprod = 23; 232 fbprod = 21; 233 cl_64bit = 1; 234 error = 0; 235 break; 236 case 24: 237 regprod = 24; 238 fbprod = 24; 239 cl_64bit = 1; 240 error = 0; 241 break; 242 default: 243 error = 1; 244 break; 245 } 246 if (error == 1) 247 return (0); 248 else 249 break; 250 case SPECTRUM: 251 if (zap->prodid != 2 && zap->prodid != 1) 252 return (0); 253 regprod = 2; 254 fbprod = 1; 255 break; 256 case PICCOLO: 257 switch (zap->prodid) { 258 case 5: 259 case 6: 260 regprod = 6; 261 fbprod = 5; 262 error = 0; 263 break; 264 case 10: 265 case 11: 266 regprod = 11; 267 fbprod = 10; 268 cl_64bit = 1; 269 error = 0; 270 break; 271 default: 272 error = 1; 273 break; 274 } 275 if (error == 1) 276 return (0); 277 else 278 break; 279 default: 280 return (0); 281 } 282 cltype = zap->manid; 283 } else { 284 if (cltype != zap->manid) { 285 return (0); 286 } 287 } 288 289 /* Configure either registers or framebuffer in any order */ 290 if ((cltype == PICASSO) && (cl_64bit == 1)) { 291 switch (zap->prodid) { 292 case 21: 293 cl_fbaddr = zap->va; 294 cl_fbautosize = zap->size; 295 break; 296 case 22: 297 cl_fbautosize += zap->size; 298 break; 299 case 23: 300 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 301 break; 302 case 24: 303 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 304 /* check for PicassoIV with 64MB config and handle it */ 305 if (zap->size == 0x04000000) { 306 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000); 307 } else { 308 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 309 } 310 cl_fbautosize = 0x400000; 311 break; 312 default: 313 return (0); 314 } 315 } 316 else { 317 if (zap->prodid == regprod) 318 cl_regaddr = zap->va; 319 else 320 if (zap->prodid == fbprod) { 321 cl_fbaddr = zap->va; 322 cl_fbautosize = zap->size; 323 } else 324 return (0); 325 } 326 327 #ifdef CL5426CONSOLE 328 if (amiga_realconfig == 0) { 329 cfdata = cf; 330 } 331 #endif 332 333 return (1); 334 } 335 336 void 337 grfclattach(device_t parent, device_t self, void *aux) 338 { 339 static struct grf_softc congrf; 340 struct zbus_args *zap; 341 struct grf_softc *gp; 342 struct device temp; 343 static char attachflag = 0; 344 345 zap = aux; 346 347 printf("\n"); 348 349 /* make sure both halves have matched */ 350 if (!cl_regaddr || !cl_fbaddr) 351 return; 352 353 /* do all that messy console/grf stuff */ 354 if (self == NULL) { 355 gp = &congrf; 356 gp->g_device = &temp; 357 temp.dv_private = gp; 358 } else { 359 gp = device_private(self); 360 gp->g_device = self; 361 } 362 363 if (self != NULL && congrf.g_regkva != 0) { 364 /* 365 * inited earlier, just copy (not device struct) 366 */ 367 memcpy(&gp->g_display, &congrf.g_display, 368 (char *) &gp[1] - (char *) &gp->g_display); 369 } else { 370 gp->g_regkva = (volatile void *) cl_regaddr; 371 gp->g_fbkva = (volatile void *) cl_fbaddr; 372 373 gp->g_unit = GRF_CL5426_UNIT; 374 gp->g_mode = cl_mode; 375 #if NITE > 0 376 gp->g_conpri = grfcl_cnprobe(); 377 #endif 378 gp->g_flags = GF_ALIVE; 379 380 /* wakeup the board */ 381 cl_boardinit(gp); 382 #ifdef CL5426CONSOLE 383 #if NITE > 0 384 grfcl_iteinit(gp); 385 #endif 386 (void) cl_load_mon(gp, &clconsole_mode); 387 #endif 388 389 } 390 391 /* 392 * attach grf (once) 393 */ 394 if (amiga_config_found(cfdata, gp->g_device, gp, grfclprint)) { 395 attachflag = 1; 396 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 397 switch (cltype) { 398 case PICASSO: 399 if (cl_64bit == 1) { 400 printf("Picasso IV"); 401 /* 135MHz will be supported if we 402 * have a palette doubling mode. 403 */ 404 cl_maxpixelclock = 86000000; 405 } 406 else { 407 printf("Picasso II"); 408 409 /* check for PicassoII+ (crest) */ 410 if(zap->serno == 0x00100000) 411 printf("+"); 412 413 /* determine used Gfx/chipset (crest) */ 414 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 415 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 416 case 0x24: 417 printf(" (with CL-GD5426)"); 418 break; 419 case 0x26: 420 printf(" (with CL-GD5428)"); 421 break; 422 case 0x27: 423 printf(" (with CL-GD5429)"); 424 break; 425 } 426 cl_maxpixelclock = 86000000; 427 } 428 break; 429 case SPECTRUM: 430 printf("Spectrum"); 431 cl_maxpixelclock = 90000000; 432 break; 433 case PICCOLO: 434 if (cl_64bit == 1) { 435 printf("Piccolo SD64"); 436 /* 110MHz will be supported if we 437 * have a palette doubling mode. 438 */ 439 cl_maxpixelclock = 90000000; 440 } else { 441 printf("Piccolo"); 442 cl_maxpixelclock = 90000000; 443 } 444 break; 445 } 446 printf(" being used\n"); 447 #ifdef CL_OVERCLOCK 448 cl_maxpixelclock = 115000000; 449 #endif 450 } else { 451 if (!attachflag) 452 printf("grfcl unattached!!\n"); 453 } 454 } 455 456 int 457 grfclprint(void *aux, const char *pnp) 458 { 459 if (pnp) 460 aprint_normal("ite at %s: ", pnp); 461 return (UNCONF); 462 } 463 464 void 465 cl_boardinit(struct grf_softc *gp) 466 { 467 volatile unsigned char *ba = gp->g_regkva; 468 int x; 469 470 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 471 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 472 delay(200000); /* wait some time (two frames as of now) */ 473 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 474 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 475 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 476 cl_fbsize = cl_fbautosize; 477 } else { 478 479 /* wakeup board and flip passthru OFF */ 480 RegWakeup(ba); 481 RegOnpass(ba); 482 483 vgaw(ba, 0x46e8, 0x16); 484 vgaw(ba, 0x102, 1); 485 vgaw(ba, 0x46e8, 0x0e); 486 if (cl_64bit != 1) 487 vgaw(ba, 0x3c3, 1); 488 489 cl_fbsize = cl_fbautosize; 490 491 /* setup initial unchanging parameters */ 492 493 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 494 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 495 496 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 497 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 498 499 if (cl_64bit == 1) { 500 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 501 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 502 } else { 503 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 504 } 505 WSeq(ba, SEQ_ID_RESET, 0x03); 506 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 507 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 508 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 509 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 510 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 511 if (cl_64bit == 1) 512 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 513 else 514 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 515 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 516 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 517 518 if (cl_64bit == 1) 519 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 520 else 521 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 522 523 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 524 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 525 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 526 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 527 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 528 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 529 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 530 531 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 532 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 533 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 534 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 535 if (cl_64bit == 1) { 536 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 537 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 538 } 539 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 540 541 WGfx(ba, GCT_ID_SET_RESET, 0x00); 542 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 543 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 544 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 545 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 546 WGfx(ba, GCT_ID_MISC, 0x01); 547 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 548 WGfx(ba, GCT_ID_BITMASK, 0xff); 549 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 550 551 for (x = 0; x < 0x10; x++) 552 WAttr(ba, x, x); 553 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 554 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 555 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 556 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 557 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 558 WAttr(ba, 0x34, 0x00); 559 560 vgaw(ba, VDAC_MASK, 0xff); 561 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 562 563 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 564 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 565 } 566 567 /* colors initially set to greyscale */ 568 vgaw(ba, VDAC_ADDRESS_W, 0); 569 for (x = 255; x >= 0; x--) { 570 vgaw(ba, VDAC_DATA, x); 571 vgaw(ba, VDAC_DATA, x); 572 vgaw(ba, VDAC_DATA, x); 573 } 574 /* set sprite bitmap pointers */ 575 cl_cursprite.image = cl_imageptr; 576 cl_cursprite.mask = cl_maskptr; 577 cl_cursprite.cmap.red = cl_sprred; 578 cl_cursprite.cmap.green = cl_sprgreen; 579 cl_cursprite.cmap.blue = cl_sprblue; 580 581 if (cl_64bit == 0) { 582 583 /* check for 1MB or 2MB board (crest) */ 584 volatile unsigned long *cl_fbtestaddr; 585 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 586 587 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 588 *cl_fbtestaddr = 0x12345678; 589 590 if (*cl_fbtestaddr != 0x12345678) { 591 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 592 cl_fbsize = 0x100000; 593 } 594 else 595 { 596 cl_fbsize = 0x200000; 597 } 598 } 599 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 600 } 601 602 603 int 604 cl_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm) 605 { 606 struct grfvideo_mode *gv; 607 608 #ifdef CL5426CONSOLE 609 /* Handle grabbing console mode */ 610 if (vm->mode_num == 255) { 611 memcpy(vm, &clconsole_mode, sizeof(struct grfvideo_mode)); 612 /* XXX so grfconfig can tell us the correct text dimensions. */ 613 vm->depth = clconsole_mode.fy; 614 } else 615 #endif 616 { 617 if (vm->mode_num == 0) 618 vm->mode_num = (monitor_current - monitor_def) + 1; 619 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 620 return (EINVAL); 621 gv = monitor_def + (vm->mode_num - 1); 622 if (gv->mode_num == 0) 623 return (EINVAL); 624 625 memcpy(vm, gv, sizeof(struct grfvideo_mode)); 626 } 627 628 /* adjust internal values to pixel values */ 629 630 vm->hblank_start *= 8; 631 vm->hsync_start *= 8; 632 vm->hsync_stop *= 8; 633 vm->htotal *= 8; 634 635 return (0); 636 } 637 638 639 int 640 cl_setvmode(struct grf_softc *gp, unsigned mode) 641 { 642 if (!mode || (mode > monitor_def_max) || 643 monitor_def[mode - 1].mode_num == 0) 644 return (EINVAL); 645 646 monitor_current = monitor_def + (mode - 1); 647 648 return (0); 649 } 650 651 #ifndef CL5426CONSOLE 652 void 653 cl_off(struct grf_softc *gp) 654 { 655 char *ba = gp->g_regkva; 656 657 /* 658 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 659 * on just in case it didn't work...but then it doesn't matter does 660 * it? =) 661 */ 662 RegOnpass(ba); 663 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 664 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 665 } 666 #endif 667 668 int 669 cl_blank(struct grf_softc *gp, int *on) 670 { 671 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 672 return(0); 673 } 674 675 /* 676 * Change the mode of the display. 677 * Return a UNIX error number or 0 for success. 678 */ 679 int 680 cl_mode(register struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3) 681 { 682 int error; 683 684 switch (cmd) { 685 case GM_GRFON: 686 error = cl_load_mon(gp, 687 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 688 return (error); 689 690 case GM_GRFOFF: 691 #ifndef CL5426CONSOLE 692 cl_off(gp); 693 #else 694 cl_load_mon(gp, &clconsole_mode); 695 #endif 696 return (0); 697 698 case GM_GRFCONFIG: 699 return (0); 700 701 case GM_GRFGETVMODE: 702 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 703 704 case GM_GRFSETVMODE: 705 error = cl_setvmode(gp, *(unsigned *) arg); 706 if (!error && (gp->g_flags & GF_GRFON)) 707 cl_load_mon(gp, 708 (struct grfcltext_mode *) monitor_current); 709 return (error); 710 711 case GM_GRFGETNUMVM: 712 *(int *) arg = monitor_def_max; 713 return (0); 714 715 case GM_GRFIOCTL: 716 return (cl_ioctl(gp, a2, arg)); 717 718 default: 719 break; 720 } 721 722 return (EPASSTHROUGH); 723 } 724 725 int 726 cl_ioctl(register struct grf_softc *gp, u_long cmd, void *data) 727 { 728 switch (cmd) { 729 case GRFIOCGSPRITEPOS: 730 return (cl_getmousepos(gp, (struct grf_position *) data)); 731 732 case GRFIOCSSPRITEPOS: 733 return (cl_setmousepos(gp, (struct grf_position *) data)); 734 735 case GRFIOCSSPRITEINF: 736 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 737 738 case GRFIOCGSPRITEINF: 739 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 740 741 case GRFIOCGSPRITEMAX: 742 return (cl_getspritemax(gp, (struct grf_position *) data)); 743 744 case GRFIOCGETCMAP: 745 return (cl_getcmap(gp, (struct grf_colormap *) data)); 746 747 case GRFIOCPUTCMAP: 748 return (cl_putcmap(gp, (struct grf_colormap *) data)); 749 750 case GRFIOCBITBLT: 751 break; 752 753 case GRFTOGGLE: 754 return (cl_toggle(gp, 0)); 755 756 case GRFIOCSETMON: 757 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 758 759 case GRFIOCBLANK: 760 return (cl_blank(gp, (int *)data)); 761 762 } 763 return (EPASSTHROUGH); 764 } 765 766 int 767 cl_getmousepos(struct grf_softc *gp, struct grf_position *data) 768 { 769 data->x = cl_cursprite.pos.x; 770 data->y = cl_cursprite.pos.y; 771 return (0); 772 } 773 774 void 775 cl_writesprpos(volatile char *ba, short x, short y) 776 { 777 /* we want to use a 16-bit write to 3c4 so no macros used */ 778 volatile unsigned char *cwp; 779 volatile unsigned short *wp; 780 781 cwp = ba + 0x3c4; 782 wp = (volatile unsigned short *)cwp; 783 784 /* 785 * don't ask me why, but apparently you can't do a 16-bit write with 786 * x-position like with y-position below (dagge) 787 */ 788 cwp[0] = 0x10 | ((x << 5) & 0xff); 789 cwp[1] = (x >> 3) & 0xff; 790 791 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 792 } 793 794 void 795 writeshifted(volatile char *to, signed char shiftx, signed char shifty) 796 { 797 int y; 798 unsigned long long *tptr, *iptr, *mptr, line; 799 800 tptr = (unsigned long long *) __UNVOLATILE(to); 801 iptr = (unsigned long long *) cl_cursprite.image; 802 mptr = (unsigned long long *) cl_cursprite.mask; 803 804 shiftx = shiftx < 0 ? 0 : shiftx; 805 shifty = shifty < 0 ? 0 : shifty; 806 807 /* start reading shifty lines down, and 808 * shift each line in by shiftx 809 */ 810 for (y = shifty; y < 64; y++) { 811 812 /* image */ 813 line = iptr[y]; 814 *tptr++ = line << shiftx; 815 816 /* mask */ 817 line = mptr[y]; 818 *tptr++ = line << shiftx; 819 } 820 821 /* clear the remainder */ 822 for (y = shifty; y > 0; y--) { 823 *tptr++ = 0; 824 *tptr++ = 0; 825 } 826 } 827 828 int 829 cl_setmousepos(struct grf_softc *gp, struct grf_position *data) 830 { 831 volatile char *ba = gp->g_regkva; 832 short rx, ry, prx, pry; 833 #ifdef CL_SHIFTSPRITE 834 volatile char *fb = gp->g_fbkva; 835 volatile char *sprite = fb + (cl_fbsize - 1024); 836 #endif 837 838 /* no movement */ 839 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 840 return (0); 841 842 /* current and previous real coordinates */ 843 rx = data->x - cl_cursprite.hot.x; 844 ry = data->y - cl_cursprite.hot.y; 845 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 846 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 847 848 /* 849 * if we are/were on an edge, create (un)shifted bitmap -- 850 * ripped out optimization (not extremely worthwhile, 851 * and kind of buggy anyhow). 852 */ 853 #ifdef CL_SHIFTSPRITE 854 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 855 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 856 } 857 #endif 858 859 /* do movement, save position */ 860 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 861 cl_cursprite.pos.x = data->x; 862 cl_cursprite.pos.y = data->y; 863 864 return (0); 865 } 866 867 int 868 cl_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 869 { 870 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 871 copyout(cl_cursprite.image, data->image, 64 * 8); 872 copyout(cl_cursprite.mask, data->mask, 64 * 8); 873 return (0); 874 } 875 876 static int 877 cl_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 878 { 879 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 880 volatile char *sprite = fb + (cl_fbsize - 1024); 881 882 if (data->set & GRFSPRSET_SHAPE) { 883 884 unsigned short dsx, dsy, i; 885 unsigned long *di, *dm, *si, *sm; 886 unsigned long ssi[128], ssm[128]; 887 struct grf_position gpos; 888 889 890 /* check for a too large sprite (no clipping!) */ 891 dsy = data->size.y; 892 dsx = data->size.x; 893 if (dsy > 64 || dsx > 64) 894 return(EINVAL); 895 896 /* prepare destination */ 897 di = (unsigned long *)cl_cursprite.image; 898 dm = (unsigned long *)cl_cursprite.mask; 899 cl_memset((unsigned char *)di, 0, 8*64); 900 cl_memset((unsigned char *)dm, 0, 8*64); 901 902 /* two alternatives: 64 across, then it's 903 * the same format we use, just copy. Otherwise, 904 * copy into tmp buf and recopy skipping the 905 * unused 32 bits. 906 */ 907 if ((dsx - 1) / 32) { 908 copyin(data->image, di, 8 * dsy); 909 copyin(data->mask, dm, 8 * dsy); 910 } else { 911 si = ssi; sm = ssm; 912 copyin(data->image, si, 4 * dsy); 913 copyin(data->mask, sm, 4 * dsy); 914 for (i = 0; i < dsy; i++) { 915 *di = *si++; 916 *dm = *sm++; 917 di += 2; 918 dm += 2; 919 } 920 } 921 922 /* set size */ 923 cl_cursprite.size.x = data->size.x; 924 cl_cursprite.size.y = data->size.y; 925 926 /* forcably load into board */ 927 gpos.x = cl_cursprite.pos.x; 928 gpos.y = cl_cursprite.pos.y; 929 cl_cursprite.pos.x = -1; 930 cl_cursprite.pos.y = -1; 931 writeshifted(sprite, 0, 0); 932 cl_setmousepos(gp, &gpos); 933 934 } 935 if (data->set & GRFSPRSET_HOT) { 936 937 cl_cursprite.hot = data->hot; 938 939 } 940 if (data->set & GRFSPRSET_CMAP) { 941 942 u_char red[2], green[2], blue[2]; 943 944 copyin(data->cmap.red, red, 2); 945 copyin(data->cmap.green, green, 2); 946 copyin(data->cmap.blue, blue, 2); 947 memcpy(cl_cursprite.cmap.red, red, 2); 948 memcpy(cl_cursprite.cmap.green, green, 2); 949 memcpy(cl_cursprite.cmap.blue, blue, 2); 950 951 /* enable and load colors 256 & 257 */ 952 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 953 954 /* 256 */ 955 vgaw(ba, VDAC_ADDRESS_W, 0x00); 956 if (cltype == PICASSO) { 957 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 958 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 959 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 960 } else { 961 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 962 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 963 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 964 } 965 966 /* 257 */ 967 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 968 if (cltype == PICASSO) { 969 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 970 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 971 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 972 } else { 973 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 974 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 975 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 976 } 977 978 /* turn on/off sprite */ 979 if (cl_cursprite.enable) { 980 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 981 } else { 982 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 983 } 984 985 } 986 if (data->set & GRFSPRSET_ENABLE) { 987 988 if (data->enable == 1) { 989 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 990 cl_cursprite.enable = 1; 991 } else { 992 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 993 cl_cursprite.enable = 0; 994 } 995 996 } 997 if (data->set & GRFSPRSET_POS) { 998 999 /* force placement */ 1000 cl_cursprite.pos.x = -1; 1001 cl_cursprite.pos.y = -1; 1002 1003 /* do it */ 1004 cl_setmousepos(gp, &data->pos); 1005 1006 } 1007 return (0); 1008 } 1009 1010 static int 1011 cl_getspritemax(struct grf_softc *gp, struct grf_position *data) 1012 { 1013 if (gp->g_display.gd_planes == 24) 1014 return (EINVAL); 1015 data->x = 64; 1016 data->y = 64; 1017 return (0); 1018 } 1019 1020 int 1021 cl_setmonitor(struct grf_softc *gp, struct grfvideo_mode *gv) 1022 { 1023 struct grfvideo_mode *md; 1024 1025 if (!cl_mondefok(gv)) 1026 return(EINVAL); 1027 1028 #ifdef CL5426CONSOLE 1029 /* handle interactive setting of console mode */ 1030 if (gv->mode_num == 255) { 1031 memcpy(&clconsole_mode.gv, gv, sizeof(struct grfvideo_mode)); 1032 clconsole_mode.gv.hblank_start /= 8; 1033 clconsole_mode.gv.hsync_start /= 8; 1034 clconsole_mode.gv.hsync_stop /= 8; 1035 clconsole_mode.gv.htotal /= 8; 1036 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1037 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1038 if (!(gp->g_flags & GF_GRFON)) 1039 cl_load_mon(gp, &clconsole_mode); 1040 #if NITE > 0 1041 ite_reinit(gp->g_itedev); 1042 #endif 1043 return (0); 1044 } 1045 #endif 1046 1047 md = monitor_def + (gv->mode_num - 1); 1048 memcpy(md, gv, sizeof(struct grfvideo_mode)); 1049 1050 /* adjust pixel oriented values to internal rep. */ 1051 1052 md->hblank_start /= 8; 1053 md->hsync_start /= 8; 1054 md->hsync_stop /= 8; 1055 md->htotal /= 8; 1056 1057 return (0); 1058 } 1059 1060 int 1061 cl_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1062 { 1063 volatile unsigned char *ba; 1064 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1065 short x; 1066 int error; 1067 1068 if (cmap->count == 0 || cmap->index >= 256) 1069 return 0; 1070 1071 if (cmap->count > 256 - cmap->index) 1072 cmap->count = 256 - cmap->index; 1073 1074 ba = gfp->g_regkva; 1075 /* first read colors out of the chip, then copyout to userspace */ 1076 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1077 x = cmap->count - 1; 1078 1079 /* 1080 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1081 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1082 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1083 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1084 */ 1085 1086 /* 1087 * The source for the above comment is somewhat unknow to me. 1088 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1089 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1090 * be native to the chipset. This requires special programming for the 1091 * CLUT in 8BPP to compensate and avoid false colors. 1092 * I didn't find any special stuff for 15 and 16BPP though, crest. 1093 */ 1094 1095 switch (cltype) { 1096 case SPECTRUM: 1097 case PICCOLO: 1098 rp = blue + cmap->index; 1099 gp = green + cmap->index; 1100 bp = red + cmap->index; 1101 break; 1102 case PICASSO: 1103 rp = red + cmap->index; 1104 gp = green + cmap->index; 1105 bp = blue + cmap->index; 1106 break; 1107 default: 1108 rp = gp = bp = 0; 1109 break; 1110 } 1111 1112 do { 1113 *rp++ = vgar(ba, VDAC_DATA) << 2; 1114 *gp++ = vgar(ba, VDAC_DATA) << 2; 1115 *bp++ = vgar(ba, VDAC_DATA) << 2; 1116 } while (x-- > 0); 1117 1118 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1119 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1120 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1121 return (0); 1122 1123 return (error); 1124 } 1125 1126 int 1127 cl_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1128 { 1129 volatile unsigned char *ba; 1130 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1131 short x; 1132 int error; 1133 1134 if (cmap->count == 0 || cmap->index >= 256) 1135 return (0); 1136 1137 if (cmap->count > 256 - cmap->index) 1138 cmap->count = 256 - cmap->index; 1139 1140 /* first copy the colors into kernelspace */ 1141 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1142 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1143 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1144 ba = gfp->g_regkva; 1145 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1146 x = cmap->count - 1; 1147 1148 switch (cltype) { 1149 case SPECTRUM: 1150 case PICCOLO: 1151 rp = blue + cmap->index; 1152 gp = green + cmap->index; 1153 bp = red + cmap->index; 1154 break; 1155 case PICASSO: 1156 rp = red + cmap->index; 1157 gp = green + cmap->index; 1158 bp = blue + cmap->index; 1159 break; 1160 default: 1161 rp = gp = bp = 0; 1162 break; 1163 } 1164 1165 do { 1166 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1167 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1168 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1169 } while (x-- > 0); 1170 return (0); 1171 } else 1172 return (error); 1173 } 1174 1175 1176 int 1177 cl_toggle(struct grf_softc *gp, unsigned short wopp) 1178 /* wopp: don't need that one yet, ill */ 1179 { 1180 volatile void *ba; 1181 1182 ba = gp->g_regkva; 1183 1184 if (cl_pass_toggle) { 1185 RegOffpass(ba); 1186 } else { 1187 RegOnpass(ba); 1188 } 1189 return (0); 1190 } 1191 1192 static void 1193 cl_CompFQ(u_int fq, u_char *num, u_char *denom, u_char *clkdoub) 1194 { 1195 #define OSC 14318180 1196 /* OK, here's what we're doing here: 1197 * 1198 * OSC * NUMERATOR 1199 * VCLK = ------------------- Hz 1200 * DENOMINATOR * (1+P) 1201 * 1202 * so we're given VCLK and we should give out some useful 1203 * values.... 1204 * 1205 * NUMERATOR is 7 bits wide 1206 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1207 * 1208 * We run through all the possible combinations and 1209 * return the values which deviate the least from the chosen frequency. 1210 * 1211 */ 1212 #define OSC 14318180 1213 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1214 1215 unsigned char n, d, p, minn, mind, minp = 0; 1216 unsigned long err, minerr; 1217 1218 /* 1219 numer = 0x00 - 0x7f 1220 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1221 */ 1222 1223 /* find lowest error in 6144 iterations. */ 1224 minerr = fq; 1225 minn = 0; 1226 mind = 0; 1227 p = 0; 1228 1229 if ((cl_64bit == 1) && (fq >= 86000000)) 1230 { 1231 for (d = 1; d < 0x20; d++) { 1232 for (n = 1; n < 0x80; n++) { 1233 err = abs(count(n, d, 0) - fq); 1234 if (err < minerr) { 1235 minerr = err; 1236 minn = n; 1237 mind = d; 1238 minp = 1; 1239 } 1240 } 1241 } 1242 *clkdoub = 1; 1243 } 1244 else { 1245 for (d = 1; d < 0x20; d++) { 1246 for (n = 1; n < 0x80; n++) { 1247 err = abs(count(n, d, p) - fq); 1248 if (err < minerr) { 1249 minerr = err; 1250 minn = n; 1251 mind = d; 1252 minp = p; 1253 } 1254 } 1255 if (d == 0x1f && p == 0) { 1256 p = 1; 1257 d = 0x0f; 1258 } 1259 } 1260 *clkdoub = 0; 1261 } 1262 1263 *num = minn; 1264 *denom = (mind << 1) | minp; 1265 if (minerr > 500000) 1266 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1267 return; 1268 } 1269 1270 int 1271 cl_mondefok(struct grfvideo_mode *gv) 1272 { 1273 unsigned long maxpix; 1274 1275 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1276 if (gv->mode_num != 255 || gv->depth != 4) 1277 return(0); 1278 1279 switch (gv->depth) { 1280 case 4: 1281 if (gv->mode_num != 255) 1282 return(0); 1283 case 1: 1284 case 8: 1285 maxpix = cl_maxpixelclock; 1286 if (cl_64bit == 1) 1287 { 1288 if (cltype == PICASSO) /* Picasso IV */ 1289 maxpix = 135000000; 1290 else /* Piccolo SD64 */ 1291 maxpix = 110000000; 1292 } 1293 break; 1294 case 15: 1295 case 16: 1296 if (cl_64bit == 1) 1297 maxpix = 85000000; 1298 else 1299 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1300 break; 1301 case 24: 1302 if ((cltype == PICASSO) && (cl_64bit == 1)) 1303 maxpix = 85000000; 1304 else 1305 maxpix = cl_maxpixelclock / 3; 1306 break; 1307 case 32: 1308 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1309 maxpix = 50000000; 1310 else 1311 maxpix = 0; 1312 break; 1313 default: 1314 printf("grfcl: Illegal depth in mode %d\n", 1315 (int) gv->mode_num); 1316 return (0); 1317 } 1318 1319 if (gv->pixel_clock > maxpix) { 1320 printf("grfcl: Pixelclock too high in mode %d\n", 1321 (int) gv->mode_num); 1322 return (0); 1323 } 1324 1325 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1326 printf("grfcl: sync-on-green is not supported\n"); 1327 return (0); 1328 } 1329 1330 return (1); 1331 } 1332 1333 int 1334 cl_load_mon(struct grf_softc *gp, struct grfcltext_mode *md) 1335 { 1336 struct grfvideo_mode *gv; 1337 struct grfinfo *gi; 1338 volatile void *ba, *fb; 1339 unsigned char num0, denom0, clkdoub; 1340 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1341 VSE, VT; 1342 int clkmul, offsmul, clkmode; 1343 int vmul; 1344 int sr15; 1345 unsigned char hvsync_pulse; 1346 char TEXT; 1347 1348 /* identity */ 1349 gv = &md->gv; 1350 TEXT = (gv->depth == 4); 1351 1352 if (!cl_mondefok(gv)) { 1353 printf("grfcl: Monitor definition not ok\n"); 1354 return (0); 1355 } 1356 1357 ba = gp->g_regkva; 1358 fb = gp->g_fbkva; 1359 1360 /* provide all needed information in grf device-independent locations */ 1361 gp->g_data = (void *) gv; 1362 gi = &gp->g_display; 1363 gi->gd_regaddr = (void *) kvtop(__UNVOLATILE(ba)); 1364 gi->gd_regsize = 64 * 1024; 1365 gi->gd_fbaddr = (void *) kvtop(__UNVOLATILE(fb)); 1366 gi->gd_fbsize = cl_fbsize; 1367 gi->gd_colors = 1 << gv->depth; 1368 gi->gd_planes = gv->depth; 1369 gi->gd_fbwidth = gv->disp_width; 1370 gi->gd_fbheight = gv->disp_height; 1371 gi->gd_fbx = 0; 1372 gi->gd_fby = 0; 1373 if (TEXT) { 1374 gi->gd_dwidth = md->fx * md->cols; 1375 gi->gd_dheight = md->fy * md->rows; 1376 } else { 1377 gi->gd_dwidth = gv->disp_width; 1378 gi->gd_dheight = gv->disp_height; 1379 } 1380 gi->gd_dx = 0; 1381 gi->gd_dy = 0; 1382 1383 /* get display mode parameters */ 1384 1385 HBS = gv->hblank_start; 1386 HSS = gv->hsync_start; 1387 HSE = gv->hsync_stop; 1388 HBE = gv->htotal - 1; 1389 HT = gv->htotal; 1390 VBS = gv->vblank_start; 1391 VSS = gv->vsync_start; 1392 VSE = gv->vsync_stop; 1393 VBE = gv->vtotal - 1; 1394 VT = gv->vtotal; 1395 1396 if (TEXT) 1397 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1398 else 1399 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1400 VDE = gv->disp_height - 1; 1401 1402 /* adjustments */ 1403 switch (gv->depth) { 1404 case 8: 1405 clkmul = 1; 1406 offsmul = 1; 1407 clkmode = 0x0; 1408 break; 1409 case 15: 1410 case 16: 1411 clkmul = 1; 1412 offsmul = 2; 1413 clkmode = 0x6; 1414 break; 1415 case 24: 1416 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1417 clkmul = 1; 1418 else 1419 clkmul = 3; 1420 offsmul = 3; 1421 clkmode = 0x4; 1422 break; 1423 case 32: 1424 clkmul = 1; 1425 offsmul = 2; 1426 clkmode = 0x8; 1427 break; 1428 default: 1429 clkmul = 1; 1430 offsmul = 1; 1431 clkmode = 0x0; 1432 break; 1433 } 1434 1435 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1436 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1437 } else 1438 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1439 1440 vmul = 2; 1441 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1442 vmul = 1; 1443 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1444 vmul = 4; 1445 1446 VDE = VDE * vmul / 2; 1447 VBS = VBS * vmul / 2; 1448 VSS = VSS * vmul / 2; 1449 VSE = VSE * vmul / 2; 1450 VBE = VBE * vmul / 2; 1451 VT = VT * vmul / 2; 1452 1453 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1454 if (cl_64bit == 1) { 1455 if (TEXT || (gv->depth == 1)) 1456 sr15 = 0xd0; 1457 else 1458 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1459 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1460 } else { 1461 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1462 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1463 } 1464 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1465 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1466 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1467 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1468 1469 /* Set clock */ 1470 1471 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1472 1473 /* Horizontal/Vertical Sync Pulse */ 1474 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1475 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1476 hvsync_pulse &= ~0x40; 1477 else 1478 hvsync_pulse |= 0x40; 1479 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1480 hvsync_pulse &= ~0x80; 1481 else 1482 hvsync_pulse |= 0x80; 1483 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1484 1485 if (clkdoub) { 1486 HDE /= 2; 1487 HBS /= 2; 1488 HSS /= 2; 1489 HSE /= 2; 1490 HBE /= 2; 1491 HT /= 2; 1492 clkmode = 0x6; 1493 } 1494 1495 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1496 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1497 1498 /* load display parameters into board */ 1499 1500 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1501 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1502 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1503 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1504 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1505 WCrt(ba, CRT_ID_END_HOR_RETR, 1506 (HSE & 0x1f) | 1507 ((HBE & 0x20) ? 0x80 : 0x00)); 1508 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1509 WCrt(ba, CRT_ID_OVERFLOW, 1510 0x10 | 1511 ((VT & 0x100) ? 0x01 : 0x00) | 1512 ((VDE & 0x100) ? 0x02 : 0x00) | 1513 ((VSS & 0x100) ? 0x04 : 0x00) | 1514 ((VBS & 0x100) ? 0x08 : 0x00) | 1515 ((VT & 0x200) ? 0x20 : 0x00) | 1516 ((VDE & 0x200) ? 0x40 : 0x00) | 1517 ((VSS & 0x200) ? 0x80 : 0x00)); 1518 1519 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1520 0x40 | /* TEXT ? 0x00 ??? */ 1521 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1522 ((VBS & 0x200) ? 0x20 : 0x00) | 1523 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1524 1525 /* text cursor */ 1526 1527 if (TEXT) { 1528 #if CL_ULCURSOR 1529 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1530 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1531 #else 1532 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1533 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1534 #endif 1535 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1536 1537 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1538 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1539 } 1540 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1541 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1542 1543 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1544 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1545 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1546 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1547 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1548 1549 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1550 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1551 WCrt(ba, CRT_ID_LACE_CNTL, 1552 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1553 ((HBE & 0x40) ? 0x10 : 0x00) | 1554 ((HBE & 0x80) ? 0x20 : 0x00) | 1555 ((VBE & 0x100) ? 0x40 : 0x00) | 1556 ((VBE & 0x200) ? 0x80 : 0x00)); 1557 1558 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1559 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1560 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1561 1562 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1563 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1564 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1565 1566 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1567 sometimes, out of "secret" application note (crest) */ 1568 vgaw(ba, VDAC_MASK, 0); 1569 /* reset HDR "magic" access counter (crest) */ 1570 vgar(ba, VDAC_ADDRESS); 1571 1572 delay(200000); 1573 vgar(ba, VDAC_MASK); 1574 delay(200000); 1575 vgar(ba, VDAC_MASK); 1576 delay(200000); 1577 vgar(ba, VDAC_MASK); 1578 delay(200000); 1579 vgar(ba, VDAC_MASK); 1580 delay(200000); 1581 switch (gv->depth) { 1582 case 1: 1583 case 4: /* text */ 1584 vgaw(ba, VDAC_MASK, 0); 1585 HDE = gv->disp_width / 16; 1586 break; 1587 case 8: 1588 if (clkdoub) 1589 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1590 else 1591 vgaw(ba, VDAC_MASK, 0); 1592 HDE = gv->disp_width / 8; 1593 break; 1594 case 15: 1595 vgaw(ba, VDAC_MASK, 0xd0); 1596 HDE = gv->disp_width / 4; 1597 break; 1598 case 16: 1599 vgaw(ba, VDAC_MASK, 0xc1); 1600 HDE = gv->disp_width / 4; 1601 break; 1602 case 24: 1603 vgaw(ba, VDAC_MASK, 0xc5); 1604 HDE = (gv->disp_width / 8) * 3; 1605 break; 1606 case 32: 1607 vgaw(ba, VDAC_MASK, 0xc5); 1608 HDE = (gv->disp_width / 4); 1609 break; 1610 } 1611 1612 /* reset HDR "magic" access counter (crest) */ 1613 vgar(ba, VDAC_ADDRESS); 1614 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1615 vgaw(ba, VDAC_MASK, 0xff); 1616 1617 WCrt(ba, CRT_ID_OFFSET, HDE); 1618 if (cl_64bit == 1) { 1619 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1620 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1621 } 1622 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1623 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1624 0x22 | 1625 ((HDE > 0xff) ? 0x10 : 0x00)); 1626 1627 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1628 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1629 (gv->depth == 1) ? 0x01 : 0x0f); 1630 1631 /* text initialization */ 1632 1633 if (TEXT) { 1634 cl_inittextmode(gp); 1635 } 1636 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1637 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1638 1639 /* Pass-through */ 1640 1641 RegOffpass(ba); 1642 1643 return (1); 1644 } 1645 1646 void 1647 cl_inittextmode(struct grf_softc *gp) 1648 { 1649 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1650 volatile unsigned char *ba = gp->g_regkva; 1651 unsigned char *fb = __UNVOLATILE(gp->g_fbkva); 1652 unsigned char *c, *f, y; 1653 unsigned short z; 1654 1655 1656 /* load text font into beginning of display memory. Each character 1657 * cell is 32 bytes long (enough for 4 planes) */ 1658 1659 SetTextPlane(ba, 0x02); 1660 cl_memset(fb, 0, 256 * 32); 1661 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1662 f = tm->fdata; 1663 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1664 for (y = 0; y < tm->fy; y++) 1665 *c++ = *f++; 1666 1667 /* clear out text/attr planes (three screens worth) */ 1668 1669 SetTextPlane(ba, 0x01); 1670 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1671 SetTextPlane(ba, 0x00); 1672 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1673 1674 /* print out a little init msg */ 1675 1676 c = (unsigned char *) (fb) + (tm->cols - 16); 1677 strcpy(c, "CIRRUS"); 1678 c[6] = 0x20; 1679 1680 /* set colors (B&W) */ 1681 1682 vgaw(ba, VDAC_ADDRESS_W, 0); 1683 for (z = 0; z < 256; z++) { 1684 unsigned char r, g, b; 1685 1686 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1687 1688 if (cltype == PICASSO) { 1689 r = clconscolors[y][0]; 1690 g = clconscolors[y][1]; 1691 b = clconscolors[y][2]; 1692 } else { 1693 b = clconscolors[y][0]; 1694 g = clconscolors[y][1]; 1695 r = clconscolors[y][2]; 1696 } 1697 vgaw(ba, VDAC_DATA, r >> 2); 1698 vgaw(ba, VDAC_DATA, g >> 2); 1699 vgaw(ba, VDAC_DATA, b >> 2); 1700 } 1701 } 1702 1703 void 1704 cl_memset(unsigned char *d, unsigned char c, int l) 1705 { 1706 for (; l > 0; l--) 1707 *d++ = c; 1708 } 1709 1710 /* 1711 * Special wakeup/passthrough registers on graphics boards 1712 * 1713 * The methods have diverged a bit for each board, so 1714 * WPass(P) has been converted into a set of specific 1715 * inline functions. 1716 */ 1717 static void 1718 RegWakeup(volatile void *ba) 1719 { 1720 1721 switch (cltype) { 1722 case SPECTRUM: 1723 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1724 break; 1725 case PICASSO: 1726 /* Picasso needs no wakeup */ 1727 break; 1728 case PICCOLO: 1729 if (cl_64bit == 1) 1730 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1731 else 1732 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1733 break; 1734 } 1735 delay(200000); 1736 } 1737 1738 static void 1739 RegOnpass(volatile void *ba) 1740 { 1741 1742 switch (cltype) { 1743 case SPECTRUM: 1744 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1745 break; 1746 case PICASSO: 1747 if (cl_64bit == 0) 1748 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1749 break; 1750 case PICCOLO: 1751 if (cl_64bit == 1) 1752 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1753 else 1754 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1755 break; 1756 } 1757 cl_pass_toggle = 1; 1758 delay(200000); 1759 } 1760 1761 static void 1762 RegOffpass(volatile void *ba) 1763 { 1764 1765 switch (cltype) { 1766 case SPECTRUM: 1767 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1768 break; 1769 case PICASSO: 1770 if (cl_64bit == 0) 1771 vgaw(ba, PASS_ADDRESS_W, 0xff); 1772 break; 1773 case PICCOLO: 1774 if (cl_64bit == 1) 1775 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1776 else 1777 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1778 break; 1779 } 1780 cl_pass_toggle = 0; 1781 delay(200000); 1782 } 1783 1784 #endif /* NGRFCL */ 1785
Indexes created Mon Sep 29 13:09:55 GMT 2025