grf_cl.c revision 1.48.2.1
1 /* $NetBSD: grf_cl.c,v 1.48.2.1 2014/05/18 17:44:55 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "opt_amigacons.h" 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: grf_cl.c,v 1.48.2.1 2014/05/18 17:44:55 rmind Exp $"); 40 41 #include "grfcl.h" 42 #include "ite.h" 43 #if NGRFCL > 0 44 45 /* 46 * Graphics routines for Cirrus CL GD 5426 boards, 47 * 48 * This code offers low-level routines to access Cirrus Cl GD 5426 49 * graphics-boards from within NetBSD for the Amiga. 50 * No warranties for any kind of function at all - this 51 * code may crash your hardware and scratch your harddisk. Use at your 52 * own risk. Freely distributable. 53 * 54 * Modified for Cirrus CL GD 5426 from 55 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 56 * Contributions by Ill, ScottE, MiL 57 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 58 * Picasso/040 patches (wee!) by crest 01/96 59 * 60 * PicassoIV support bz Klaus "crest" Burkert. 61 * Fixed interlace and doublescan, added clockdoubling and 62 * HiColor&TrueColor suuport by crest 01/97 63 * 64 * Thanks to Village Tronic Marketing Gmbh for providing me with 65 * a Picasso-II board. 66 * Thanks for Integrated Electronics Oy Ab for providing me with 67 * Cirrus CL GD 542x family documentation. 68 * 69 * TODO: 70 * Mouse support (almost there! :-)) 71 * Blitter support 72 * 73 */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/errno.h> 78 #include <sys/ioctl.h> 79 #include <sys/device.h> 80 #include <sys/malloc.h> 81 82 #include <machine/cpu.h> 83 #include <dev/cons.h> 84 #include <amiga/dev/itevar.h> 85 #include <amiga/amiga/device.h> 86 #include <amiga/dev/grfioctl.h> 87 #include <amiga/dev/grfvar.h> 88 #include <amiga/dev/grf_clreg.h> 89 #include <amiga/dev/zbusvar.h> 90 91 int cl_mondefok(struct grfvideo_mode *); 92 void cl_boardinit(struct grf_softc *); 93 static void cl_CompFQ(u_int, u_char *, u_char *, u_char *); 94 int cl_getvmode(struct grf_softc *, struct grfvideo_mode *); 95 int cl_setvmode(struct grf_softc *, unsigned int); 96 int cl_toggle(struct grf_softc *, unsigned short); 97 int cl_getcmap(struct grf_softc *, struct grf_colormap *); 98 int cl_putcmap(struct grf_softc *, struct grf_colormap *); 99 #ifndef CL5426CONSOLE 100 void cl_off(struct grf_softc *); 101 #endif 102 void cl_inittextmode(struct grf_softc *); 103 int cl_ioctl(register struct grf_softc *, u_long, void *); 104 int cl_getmousepos(struct grf_softc *, struct grf_position *); 105 int cl_setmousepos(struct grf_softc *, struct grf_position *); 106 static int cl_setspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 107 int cl_getspriteinfo(struct grf_softc *, struct grf_spriteinfo *); 108 static int cl_getspritemax(struct grf_softc *, struct grf_position *); 109 int cl_blank(struct grf_softc *, int *); 110 int cl_setmonitor(struct grf_softc *, struct grfvideo_mode *); 111 void cl_writesprpos(volatile char *, short, short); 112 void writeshifted(volatile char *, signed char, signed char); 113 114 static void RegWakeup(volatile void *); 115 static void RegOnpass(volatile void *); 116 static void RegOffpass(volatile void *); 117 118 void grfclattach(device_t, device_t, void *); 119 int grfclprint(void *, const char *); 120 int grfclmatch(device_t, cfdata_t, void *); 121 void cl_memset(unsigned char *, unsigned char, int); 122 123 /* Graphics display definitions. 124 * These are filled by 'grfconfig' using GRFIOCSETMON. 125 */ 126 #define monitor_def_max 24 127 static struct grfvideo_mode monitor_def[24] = { 128 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 129 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 130 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 131 }; 132 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 133 134 /* Patchable maximum pixel clock */ 135 unsigned long cl_maxpixelclock = 86000000; 136 137 /* Console display definition. 138 * Default hardcoded text mode. This grf_cl is set up to 139 * use one text mode only, and this is it. You may use 140 * grfconfig to change the mode after boot. 141 */ 142 /* Console font */ 143 #ifdef KFONT_8X11 144 #define CIRRUSFONT kernel_font_8x11 145 #define CIRRUSFONTY 11 146 #else 147 #define CIRRUSFONT kernel_font_8x8 148 #define CIRRUSFONTY 8 149 #endif 150 extern unsigned char CIRRUSFONT[]; 151 152 struct grfcltext_mode clconsole_mode = { 153 {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8, 154 481, 490, 498, 522, 0}, 155 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 156 }; 157 /* Console colors */ 158 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 159 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 160 }; 161 162 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 163 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 164 unsigned char cl_pass_toggle; /* passthru status tracker */ 165 166 /* 167 * because all 542x-boards have 2 configdev entries, one for 168 * framebuffer mem and the other for regs, we have to hold onto 169 * the pointers globally until we match on both. This and 'cltype' 170 * are the primary obsticles to multiple board support, but if you 171 * have multiple boards you have bigger problems than grf_cl. 172 */ 173 static void *cl_fbaddr = 0; /* framebuffer */ 174 static void *cl_regaddr = 0; /* registers */ 175 static int cl_fbsize; /* framebuffer size */ 176 static int cl_fbautosize; /* framebuffer autoconfig size */ 177 178 179 /* 180 * current sprite info, if you add support for multiple boards 181 * make this an array or something 182 */ 183 struct grf_spriteinfo cl_cursprite; 184 185 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 186 * you add multiple board support 187 */ 188 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 189 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 190 191 /* standard driver stuff */ 192 CFATTACH_DECL_NEW(grfcl, sizeof(struct grf_softc), 193 grfclmatch, grfclattach, NULL, NULL); 194 195 static struct cfdata *cfdata; 196 197 int 198 grfclmatch(device_t parent, cfdata_t cf, void *aux) 199 { 200 struct zbus_args *zap; 201 static int regprod, fbprod; 202 int error; 203 204 zap = aux; 205 206 #ifndef CL5426CONSOLE 207 if (amiga_realconfig == 0) 208 return (0); 209 #endif 210 211 /* Grab the first board we encounter as the preferred one. This will 212 * allow one board to work in a multiple 5426 board system, but not 213 * multiple boards at the same time. */ 214 if (cltype == 0) { 215 switch (zap->manid) { 216 case PICASSO: 217 switch (zap->prodid) { 218 case 11: 219 case 12: 220 regprod = 12; 221 fbprod = 11; 222 error = 0; 223 break; 224 case 22: 225 error = 0; 226 break; 227 case 21: 228 case 23: 229 regprod = 23; 230 fbprod = 21; 231 cl_64bit = 1; 232 error = 0; 233 break; 234 case 24: 235 regprod = 24; 236 fbprod = 24; 237 cl_64bit = 1; 238 error = 0; 239 break; 240 default: 241 error = 1; 242 break; 243 } 244 if (error == 1) 245 return (0); 246 else 247 break; 248 case SPECTRUM: 249 if (zap->prodid != 2 && zap->prodid != 1) 250 return (0); 251 regprod = 2; 252 fbprod = 1; 253 break; 254 case PICCOLO: 255 switch (zap->prodid) { 256 case 5: 257 case 6: 258 regprod = 6; 259 fbprod = 5; 260 error = 0; 261 break; 262 case 10: 263 case 11: 264 regprod = 11; 265 fbprod = 10; 266 cl_64bit = 1; 267 error = 0; 268 break; 269 default: 270 error = 1; 271 break; 272 } 273 if (error == 1) 274 return (0); 275 else 276 break; 277 default: 278 return (0); 279 } 280 cltype = zap->manid; 281 } else { 282 if (cltype != zap->manid) { 283 return (0); 284 } 285 } 286 287 /* Configure either registers or framebuffer in any order */ 288 if ((cltype == PICASSO) && (cl_64bit == 1)) { 289 switch (zap->prodid) { 290 case 21: 291 cl_fbaddr = zap->va; 292 cl_fbautosize = zap->size; 293 break; 294 case 22: 295 cl_fbautosize += zap->size; 296 break; 297 case 23: 298 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 299 break; 300 case 24: 301 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 302 /* check for PicassoIV with 64MB config and handle it */ 303 if (zap->size == 0x04000000) { 304 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000); 305 } else { 306 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 307 } 308 cl_fbautosize = 0x400000; 309 break; 310 default: 311 return (0); 312 } 313 } 314 else { 315 if (zap->prodid == regprod) 316 cl_regaddr = zap->va; 317 else 318 if (zap->prodid == fbprod) { 319 cl_fbaddr = zap->va; 320 cl_fbautosize = zap->size; 321 } else 322 return (0); 323 } 324 325 #ifdef CL5426CONSOLE 326 if (amiga_realconfig == 0) { 327 cfdata = cf; 328 } 329 #endif 330 331 return (1); 332 } 333 334 void 335 grfclattach(device_t parent, device_t self, void *aux) 336 { 337 static struct grf_softc congrf; 338 struct zbus_args *zap; 339 struct grf_softc *gp; 340 struct device temp; 341 static char attachflag = 0; 342 343 zap = aux; 344 345 printf("\n"); 346 347 /* make sure both halves have matched */ 348 if (!cl_regaddr || !cl_fbaddr) 349 return; 350 351 /* do all that messy console/grf stuff */ 352 if (self == NULL) { 353 gp = &congrf; 354 gp->g_device = &temp; 355 temp.dv_private = gp; 356 } else { 357 gp = device_private(self); 358 gp->g_device = self; 359 } 360 361 if (self != NULL && congrf.g_regkva != 0) { 362 /* 363 * inited earlier, just copy (not device struct) 364 */ 365 memcpy(&gp->g_display, &congrf.g_display, 366 (char *) &gp[1] - (char *) &gp->g_display); 367 } else { 368 gp->g_regkva = (volatile void *) cl_regaddr; 369 gp->g_fbkva = (volatile void *) cl_fbaddr; 370 371 gp->g_unit = GRF_CL5426_UNIT; 372 gp->g_mode = cl_mode; 373 #if NITE > 0 374 gp->g_conpri = grfcl_cnprobe(); 375 #endif 376 gp->g_flags = GF_ALIVE; 377 378 /* wakeup the board */ 379 cl_boardinit(gp); 380 #ifdef CL5426CONSOLE 381 #if NITE > 0 382 grfcl_iteinit(gp); 383 #endif 384 (void) cl_load_mon(gp, &clconsole_mode); 385 #endif 386 387 } 388 389 /* 390 * attach grf (once) 391 */ 392 if (amiga_config_found(cfdata, gp->g_device, gp, grfclprint)) { 393 attachflag = 1; 394 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 395 switch (cltype) { 396 case PICASSO: 397 if (cl_64bit == 1) { 398 printf("Picasso IV"); 399 /* 135MHz will be supported if we 400 * have a palette doubling mode. 401 */ 402 cl_maxpixelclock = 86000000; 403 } 404 else { 405 printf("Picasso II"); 406 407 /* check for PicassoII+ (crest) */ 408 if(zap->serno == 0x00100000) 409 printf("+"); 410 411 /* determine used Gfx/chipset (crest) */ 412 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 413 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 414 case 0x24: 415 printf(" (with CL-GD5426)"); 416 break; 417 case 0x26: 418 printf(" (with CL-GD5428)"); 419 break; 420 case 0x27: 421 printf(" (with CL-GD5429)"); 422 break; 423 } 424 cl_maxpixelclock = 86000000; 425 } 426 break; 427 case SPECTRUM: 428 printf("Spectrum"); 429 cl_maxpixelclock = 90000000; 430 break; 431 case PICCOLO: 432 if (cl_64bit == 1) { 433 printf("Piccolo SD64"); 434 /* 110MHz will be supported if we 435 * have a palette doubling mode. 436 */ 437 cl_maxpixelclock = 90000000; 438 } else { 439 printf("Piccolo"); 440 cl_maxpixelclock = 90000000; 441 } 442 break; 443 } 444 printf(" being used\n"); 445 #ifdef CL_OVERCLOCK 446 cl_maxpixelclock = 115000000; 447 #endif 448 } else { 449 if (!attachflag) 450 printf("grfcl unattached!!\n"); 451 } 452 } 453 454 int 455 grfclprint(void *aux, const char *pnp) 456 { 457 if (pnp) 458 aprint_normal("ite at %s: ", pnp); 459 return (UNCONF); 460 } 461 462 void 463 cl_boardinit(struct grf_softc *gp) 464 { 465 volatile unsigned char *ba = gp->g_regkva; 466 int x; 467 468 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 469 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 470 delay(200000); /* wait some time (two frames as of now) */ 471 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 472 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 473 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 474 cl_fbsize = cl_fbautosize; 475 } else { 476 477 /* wakeup board and flip passthru OFF */ 478 RegWakeup(ba); 479 RegOnpass(ba); 480 481 vgaw(ba, 0x46e8, 0x16); 482 vgaw(ba, 0x102, 1); 483 vgaw(ba, 0x46e8, 0x0e); 484 if (cl_64bit != 1) 485 vgaw(ba, 0x3c3, 1); 486 487 cl_fbsize = cl_fbautosize; 488 489 /* setup initial unchanging parameters */ 490 491 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 492 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 493 494 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 495 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 496 497 if (cl_64bit == 1) { 498 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 499 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 500 } else { 501 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 502 } 503 WSeq(ba, SEQ_ID_RESET, 0x03); 504 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 505 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 506 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 507 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 508 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 509 if (cl_64bit == 1) 510 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 511 else 512 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 513 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 514 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 515 516 if (cl_64bit == 1) 517 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 518 else 519 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 520 521 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 522 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 523 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 524 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 525 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 526 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 527 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 528 529 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 530 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 531 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 532 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 533 if (cl_64bit == 1) { 534 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 535 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 536 } 537 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 538 539 WGfx(ba, GCT_ID_SET_RESET, 0x00); 540 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 541 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 542 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 543 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 544 WGfx(ba, GCT_ID_MISC, 0x01); 545 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 546 WGfx(ba, GCT_ID_BITMASK, 0xff); 547 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 548 549 for (x = 0; x < 0x10; x++) 550 WAttr(ba, x, x); 551 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 552 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 553 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 554 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 555 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 556 WAttr(ba, 0x34, 0x00); 557 558 vgaw(ba, VDAC_MASK, 0xff); 559 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 560 561 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 562 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 563 } 564 565 /* colors initially set to greyscale */ 566 vgaw(ba, VDAC_ADDRESS_W, 0); 567 for (x = 255; x >= 0; x--) { 568 vgaw(ba, VDAC_DATA, x); 569 vgaw(ba, VDAC_DATA, x); 570 vgaw(ba, VDAC_DATA, x); 571 } 572 /* set sprite bitmap pointers */ 573 cl_cursprite.image = cl_imageptr; 574 cl_cursprite.mask = cl_maskptr; 575 cl_cursprite.cmap.red = cl_sprred; 576 cl_cursprite.cmap.green = cl_sprgreen; 577 cl_cursprite.cmap.blue = cl_sprblue; 578 579 if (cl_64bit == 0) { 580 581 /* check for 1MB or 2MB board (crest) */ 582 volatile unsigned long *cl_fbtestaddr; 583 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 584 585 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 586 *cl_fbtestaddr = 0x12345678; 587 588 if (*cl_fbtestaddr != 0x12345678) { 589 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 590 cl_fbsize = 0x100000; 591 } 592 else 593 { 594 cl_fbsize = 0x200000; 595 } 596 } 597 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 598 } 599 600 601 int 602 cl_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm) 603 { 604 struct grfvideo_mode *gv; 605 606 #ifdef CL5426CONSOLE 607 /* Handle grabbing console mode */ 608 if (vm->mode_num == 255) { 609 memcpy(vm, &clconsole_mode, sizeof(struct grfvideo_mode)); 610 /* XXX so grfconfig can tell us the correct text dimensions. */ 611 vm->depth = clconsole_mode.fy; 612 } else 613 #endif 614 { 615 if (vm->mode_num == 0) 616 vm->mode_num = (monitor_current - monitor_def) + 1; 617 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 618 return (EINVAL); 619 gv = monitor_def + (vm->mode_num - 1); 620 if (gv->mode_num == 0) 621 return (EINVAL); 622 623 memcpy(vm, gv, sizeof(struct grfvideo_mode)); 624 } 625 626 /* adjust internal values to pixel values */ 627 628 vm->hblank_start *= 8; 629 vm->hsync_start *= 8; 630 vm->hsync_stop *= 8; 631 vm->htotal *= 8; 632 633 return (0); 634 } 635 636 637 int 638 cl_setvmode(struct grf_softc *gp, unsigned mode) 639 { 640 if (!mode || (mode > monitor_def_max) || 641 monitor_def[mode - 1].mode_num == 0) 642 return (EINVAL); 643 644 monitor_current = monitor_def + (mode - 1); 645 646 return (0); 647 } 648 649 #ifndef CL5426CONSOLE 650 void 651 cl_off(struct grf_softc *gp) 652 { 653 char *ba = gp->g_regkva; 654 655 /* 656 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 657 * on just in case it didn't work...but then it doesn't matter does 658 * it? =) 659 */ 660 RegOnpass(ba); 661 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 662 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 663 } 664 #endif 665 666 int 667 cl_blank(struct grf_softc *gp, int *on) 668 { 669 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 670 return(0); 671 } 672 673 /* 674 * Change the mode of the display. 675 * Return a UNIX error number or 0 for success. 676 */ 677 int 678 cl_mode(register struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3) 679 { 680 int error; 681 682 switch (cmd) { 683 case GM_GRFON: 684 error = cl_load_mon(gp, 685 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 686 return (error); 687 688 case GM_GRFOFF: 689 #ifndef CL5426CONSOLE 690 cl_off(gp); 691 #else 692 cl_load_mon(gp, &clconsole_mode); 693 #endif 694 return (0); 695 696 case GM_GRFCONFIG: 697 return (0); 698 699 case GM_GRFGETVMODE: 700 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 701 702 case GM_GRFSETVMODE: 703 error = cl_setvmode(gp, *(unsigned *) arg); 704 if (!error && (gp->g_flags & GF_GRFON)) 705 cl_load_mon(gp, 706 (struct grfcltext_mode *) monitor_current); 707 return (error); 708 709 case GM_GRFGETNUMVM: 710 *(int *) arg = monitor_def_max; 711 return (0); 712 713 case GM_GRFIOCTL: 714 return (cl_ioctl(gp, a2, arg)); 715 716 default: 717 break; 718 } 719 720 return (EPASSTHROUGH); 721 } 722 723 int 724 cl_ioctl(register struct grf_softc *gp, u_long cmd, void *data) 725 { 726 switch (cmd) { 727 case GRFIOCGSPRITEPOS: 728 return (cl_getmousepos(gp, (struct grf_position *) data)); 729 730 case GRFIOCSSPRITEPOS: 731 return (cl_setmousepos(gp, (struct grf_position *) data)); 732 733 case GRFIOCSSPRITEINF: 734 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 735 736 case GRFIOCGSPRITEINF: 737 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 738 739 case GRFIOCGSPRITEMAX: 740 return (cl_getspritemax(gp, (struct grf_position *) data)); 741 742 case GRFIOCGETCMAP: 743 return (cl_getcmap(gp, (struct grf_colormap *) data)); 744 745 case GRFIOCPUTCMAP: 746 return (cl_putcmap(gp, (struct grf_colormap *) data)); 747 748 case GRFIOCBITBLT: 749 break; 750 751 case GRFTOGGLE: 752 return (cl_toggle(gp, 0)); 753 754 case GRFIOCSETMON: 755 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 756 757 case GRFIOCBLANK: 758 return (cl_blank(gp, (int *)data)); 759 760 } 761 return (EPASSTHROUGH); 762 } 763 764 int 765 cl_getmousepos(struct grf_softc *gp, struct grf_position *data) 766 { 767 data->x = cl_cursprite.pos.x; 768 data->y = cl_cursprite.pos.y; 769 return (0); 770 } 771 772 void 773 cl_writesprpos(volatile char *ba, short x, short y) 774 { 775 /* we want to use a 16-bit write to 3c4 so no macros used */ 776 volatile unsigned char *cwp; 777 volatile unsigned short *wp; 778 779 cwp = ba + 0x3c4; 780 wp = (volatile unsigned short *)cwp; 781 782 /* 783 * don't ask me why, but apparently you can't do a 16-bit write with 784 * x-position like with y-position below (dagge) 785 */ 786 cwp[0] = 0x10 | ((x << 5) & 0xff); 787 cwp[1] = (x >> 3) & 0xff; 788 789 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 790 } 791 792 void 793 writeshifted(volatile char *to, signed char shiftx, signed char shifty) 794 { 795 int y; 796 unsigned long long *tptr, *iptr, *mptr, line; 797 798 tptr = (unsigned long long *) __UNVOLATILE(to); 799 iptr = (unsigned long long *) cl_cursprite.image; 800 mptr = (unsigned long long *) cl_cursprite.mask; 801 802 shiftx = shiftx < 0 ? 0 : shiftx; 803 shifty = shifty < 0 ? 0 : shifty; 804 805 /* start reading shifty lines down, and 806 * shift each line in by shiftx 807 */ 808 for (y = shifty; y < 64; y++) { 809 810 /* image */ 811 line = iptr[y]; 812 *tptr++ = line << shiftx; 813 814 /* mask */ 815 line = mptr[y]; 816 *tptr++ = line << shiftx; 817 } 818 819 /* clear the remainder */ 820 for (y = shifty; y > 0; y--) { 821 *tptr++ = 0; 822 *tptr++ = 0; 823 } 824 } 825 826 int 827 cl_setmousepos(struct grf_softc *gp, struct grf_position *data) 828 { 829 volatile char *ba = gp->g_regkva; 830 short rx, ry; 831 #ifdef CL_SHIFTSPRITE 832 volatile char *fb = gp->g_fbkva; 833 volatile char *sprite = fb + (cl_fbsize - 1024); 834 #endif 835 836 /* no movement */ 837 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 838 return (0); 839 840 /* current and previous real coordinates */ 841 rx = data->x - cl_cursprite.hot.x; 842 ry = data->y - cl_cursprite.hot.y; 843 844 /* 845 * if we are/were on an edge, create (un)shifted bitmap -- 846 * ripped out optimization (not extremely worthwhile, 847 * and kind of buggy anyhow). 848 */ 849 #ifdef CL_SHIFTSPRITE 850 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 851 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 852 } 853 #endif 854 855 /* do movement, save position */ 856 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 857 cl_cursprite.pos.x = data->x; 858 cl_cursprite.pos.y = data->y; 859 860 return (0); 861 } 862 863 int 864 cl_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 865 { 866 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 867 copyout(cl_cursprite.image, data->image, 64 * 8); 868 copyout(cl_cursprite.mask, data->mask, 64 * 8); 869 return (0); 870 } 871 872 static int 873 cl_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data) 874 { 875 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 876 volatile char *sprite = fb + (cl_fbsize - 1024); 877 878 if (data->set & GRFSPRSET_SHAPE) { 879 880 unsigned short dsx, dsy, i; 881 unsigned long *di, *dm, *si, *sm; 882 unsigned long ssi[128], ssm[128]; 883 struct grf_position gpos; 884 885 886 /* check for a too large sprite (no clipping!) */ 887 dsy = data->size.y; 888 dsx = data->size.x; 889 if (dsy > 64 || dsx > 64) 890 return(EINVAL); 891 892 /* prepare destination */ 893 di = (unsigned long *)cl_cursprite.image; 894 dm = (unsigned long *)cl_cursprite.mask; 895 cl_memset((unsigned char *)di, 0, 8*64); 896 cl_memset((unsigned char *)dm, 0, 8*64); 897 898 /* two alternatives: 64 across, then it's 899 * the same format we use, just copy. Otherwise, 900 * copy into tmp buf and recopy skipping the 901 * unused 32 bits. 902 */ 903 if ((dsx - 1) / 32) { 904 copyin(data->image, di, 8 * dsy); 905 copyin(data->mask, dm, 8 * dsy); 906 } else { 907 si = ssi; sm = ssm; 908 copyin(data->image, si, 4 * dsy); 909 copyin(data->mask, sm, 4 * dsy); 910 for (i = 0; i < dsy; i++) { 911 *di = *si++; 912 *dm = *sm++; 913 di += 2; 914 dm += 2; 915 } 916 } 917 918 /* set size */ 919 cl_cursprite.size.x = data->size.x; 920 cl_cursprite.size.y = data->size.y; 921 922 /* forcably load into board */ 923 gpos.x = cl_cursprite.pos.x; 924 gpos.y = cl_cursprite.pos.y; 925 cl_cursprite.pos.x = -1; 926 cl_cursprite.pos.y = -1; 927 writeshifted(sprite, 0, 0); 928 cl_setmousepos(gp, &gpos); 929 930 } 931 if (data->set & GRFSPRSET_HOT) { 932 933 cl_cursprite.hot = data->hot; 934 935 } 936 if (data->set & GRFSPRSET_CMAP) { 937 938 u_char red[2], green[2], blue[2]; 939 940 copyin(data->cmap.red, red, 2); 941 copyin(data->cmap.green, green, 2); 942 copyin(data->cmap.blue, blue, 2); 943 memcpy(cl_cursprite.cmap.red, red, 2); 944 memcpy(cl_cursprite.cmap.green, green, 2); 945 memcpy(cl_cursprite.cmap.blue, blue, 2); 946 947 /* enable and load colors 256 & 257 */ 948 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 949 950 /* 256 */ 951 vgaw(ba, VDAC_ADDRESS_W, 0x00); 952 if (cltype == PICASSO) { 953 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 954 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 955 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 956 } else { 957 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 958 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 959 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 960 } 961 962 /* 257 */ 963 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 964 if (cltype == PICASSO) { 965 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 966 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 967 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 968 } else { 969 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 970 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 971 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 972 } 973 974 /* turn on/off sprite */ 975 if (cl_cursprite.enable) { 976 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 977 } else { 978 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 979 } 980 981 } 982 if (data->set & GRFSPRSET_ENABLE) { 983 984 if (data->enable == 1) { 985 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 986 cl_cursprite.enable = 1; 987 } else { 988 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 989 cl_cursprite.enable = 0; 990 } 991 992 } 993 if (data->set & GRFSPRSET_POS) { 994 995 /* force placement */ 996 cl_cursprite.pos.x = -1; 997 cl_cursprite.pos.y = -1; 998 999 /* do it */ 1000 cl_setmousepos(gp, &data->pos); 1001 1002 } 1003 return (0); 1004 } 1005 1006 static int 1007 cl_getspritemax(struct grf_softc *gp, struct grf_position *data) 1008 { 1009 if (gp->g_display.gd_planes == 24) 1010 return (EINVAL); 1011 data->x = 64; 1012 data->y = 64; 1013 return (0); 1014 } 1015 1016 int 1017 cl_setmonitor(struct grf_softc *gp, struct grfvideo_mode *gv) 1018 { 1019 struct grfvideo_mode *md; 1020 1021 if (!cl_mondefok(gv)) 1022 return(EINVAL); 1023 1024 #ifdef CL5426CONSOLE 1025 /* handle interactive setting of console mode */ 1026 if (gv->mode_num == 255) { 1027 memcpy(&clconsole_mode.gv, gv, sizeof(struct grfvideo_mode)); 1028 clconsole_mode.gv.hblank_start /= 8; 1029 clconsole_mode.gv.hsync_start /= 8; 1030 clconsole_mode.gv.hsync_stop /= 8; 1031 clconsole_mode.gv.htotal /= 8; 1032 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1033 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1034 if (!(gp->g_flags & GF_GRFON)) 1035 cl_load_mon(gp, &clconsole_mode); 1036 #if NITE > 0 1037 ite_reinit(gp->g_itedev); 1038 #endif 1039 return (0); 1040 } 1041 #endif 1042 1043 md = monitor_def + (gv->mode_num - 1); 1044 memcpy(md, gv, sizeof(struct grfvideo_mode)); 1045 1046 /* adjust pixel oriented values to internal rep. */ 1047 1048 md->hblank_start /= 8; 1049 md->hsync_start /= 8; 1050 md->hsync_stop /= 8; 1051 md->htotal /= 8; 1052 1053 return (0); 1054 } 1055 1056 int 1057 cl_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1058 { 1059 volatile unsigned char *ba; 1060 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1061 short x; 1062 int error; 1063 1064 if (cmap->count == 0 || cmap->index >= 256) 1065 return 0; 1066 1067 if (cmap->count > 256 - cmap->index) 1068 cmap->count = 256 - cmap->index; 1069 1070 ba = gfp->g_regkva; 1071 /* first read colors out of the chip, then copyout to userspace */ 1072 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1073 x = cmap->count - 1; 1074 1075 /* 1076 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1077 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1078 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1079 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1080 */ 1081 1082 /* 1083 * The source for the above comment is somewhat unknow to me. 1084 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1085 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1086 * be native to the chipset. This requires special programming for the 1087 * CLUT in 8BPP to compensate and avoid false colors. 1088 * I didn't find any special stuff for 15 and 16BPP though, crest. 1089 */ 1090 1091 switch (cltype) { 1092 case SPECTRUM: 1093 case PICCOLO: 1094 rp = blue + cmap->index; 1095 gp = green + cmap->index; 1096 bp = red + cmap->index; 1097 break; 1098 case PICASSO: 1099 rp = red + cmap->index; 1100 gp = green + cmap->index; 1101 bp = blue + cmap->index; 1102 break; 1103 default: 1104 rp = gp = bp = 0; 1105 break; 1106 } 1107 1108 do { 1109 *rp++ = vgar(ba, VDAC_DATA) << 2; 1110 *gp++ = vgar(ba, VDAC_DATA) << 2; 1111 *bp++ = vgar(ba, VDAC_DATA) << 2; 1112 } while (x-- > 0); 1113 1114 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1115 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1116 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1117 return (0); 1118 1119 return (error); 1120 } 1121 1122 int 1123 cl_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap) 1124 { 1125 volatile unsigned char *ba; 1126 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1127 short x; 1128 int error; 1129 1130 if (cmap->count == 0 || cmap->index >= 256) 1131 return (0); 1132 1133 if (cmap->count > 256 - cmap->index) 1134 cmap->count = 256 - cmap->index; 1135 1136 /* first copy the colors into kernelspace */ 1137 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1138 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1139 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1140 ba = gfp->g_regkva; 1141 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1142 x = cmap->count - 1; 1143 1144 switch (cltype) { 1145 case SPECTRUM: 1146 case PICCOLO: 1147 rp = blue + cmap->index; 1148 gp = green + cmap->index; 1149 bp = red + cmap->index; 1150 break; 1151 case PICASSO: 1152 rp = red + cmap->index; 1153 gp = green + cmap->index; 1154 bp = blue + cmap->index; 1155 break; 1156 default: 1157 rp = gp = bp = 0; 1158 break; 1159 } 1160 1161 do { 1162 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1163 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1164 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1165 } while (x-- > 0); 1166 return (0); 1167 } else 1168 return (error); 1169 } 1170 1171 1172 int 1173 cl_toggle(struct grf_softc *gp, unsigned short wopp) 1174 /* wopp: don't need that one yet, ill */ 1175 { 1176 volatile void *ba; 1177 1178 ba = gp->g_regkva; 1179 1180 if (cl_pass_toggle) { 1181 RegOffpass(ba); 1182 } else { 1183 RegOnpass(ba); 1184 } 1185 return (0); 1186 } 1187 1188 static void 1189 cl_CompFQ(u_int fq, u_char *num, u_char *denom, u_char *clkdoub) 1190 { 1191 #define OSC 14318180 1192 /* OK, here's what we're doing here: 1193 * 1194 * OSC * NUMERATOR 1195 * VCLK = ------------------- Hz 1196 * DENOMINATOR * (1+P) 1197 * 1198 * so we're given VCLK and we should give out some useful 1199 * values.... 1200 * 1201 * NUMERATOR is 7 bits wide 1202 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1203 * 1204 * We run through all the possible combinations and 1205 * return the values which deviate the least from the chosen frequency. 1206 * 1207 */ 1208 #define OSC 14318180 1209 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1210 1211 unsigned char n, d, p, minn, mind, minp = 0; 1212 unsigned long err, minerr; 1213 1214 /* 1215 numer = 0x00 - 0x7f 1216 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1217 */ 1218 1219 /* find lowest error in 6144 iterations. */ 1220 minerr = fq; 1221 minn = 0; 1222 mind = 0; 1223 p = 0; 1224 1225 if ((cl_64bit == 1) && (fq >= 86000000)) 1226 { 1227 for (d = 1; d < 0x20; d++) { 1228 for (n = 1; n < 0x80; n++) { 1229 err = abs(count(n, d, 0) - fq); 1230 if (err < minerr) { 1231 minerr = err; 1232 minn = n; 1233 mind = d; 1234 minp = 1; 1235 } 1236 } 1237 } 1238 *clkdoub = 1; 1239 } 1240 else { 1241 for (d = 1; d < 0x20; d++) { 1242 for (n = 1; n < 0x80; n++) { 1243 err = abs(count(n, d, p) - fq); 1244 if (err < minerr) { 1245 minerr = err; 1246 minn = n; 1247 mind = d; 1248 minp = p; 1249 } 1250 } 1251 if (d == 0x1f && p == 0) { 1252 p = 1; 1253 d = 0x0f; 1254 } 1255 } 1256 *clkdoub = 0; 1257 } 1258 1259 *num = minn; 1260 *denom = (mind << 1) | minp; 1261 if (minerr > 500000) 1262 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1263 return; 1264 } 1265 1266 int 1267 cl_mondefok(struct grfvideo_mode *gv) 1268 { 1269 unsigned long maxpix; 1270 1271 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1272 if (gv->mode_num != 255 || gv->depth != 4) 1273 return(0); 1274 1275 switch (gv->depth) { 1276 case 4: 1277 if (gv->mode_num != 255) 1278 return(0); 1279 case 1: 1280 case 8: 1281 maxpix = cl_maxpixelclock; 1282 if (cl_64bit == 1) 1283 { 1284 if (cltype == PICASSO) /* Picasso IV */ 1285 maxpix = 135000000; 1286 else /* Piccolo SD64 */ 1287 maxpix = 110000000; 1288 } 1289 break; 1290 case 15: 1291 case 16: 1292 if (cl_64bit == 1) 1293 maxpix = 85000000; 1294 else 1295 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1296 break; 1297 case 24: 1298 if ((cltype == PICASSO) && (cl_64bit == 1)) 1299 maxpix = 85000000; 1300 else 1301 maxpix = cl_maxpixelclock / 3; 1302 break; 1303 case 32: 1304 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1305 maxpix = 50000000; 1306 else 1307 maxpix = 0; 1308 break; 1309 default: 1310 printf("grfcl: Illegal depth in mode %d\n", 1311 (int) gv->mode_num); 1312 return (0); 1313 } 1314 1315 if (gv->pixel_clock > maxpix) { 1316 printf("grfcl: Pixelclock too high in mode %d\n", 1317 (int) gv->mode_num); 1318 return (0); 1319 } 1320 1321 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1322 printf("grfcl: sync-on-green is not supported\n"); 1323 return (0); 1324 } 1325 1326 return (1); 1327 } 1328 1329 int 1330 cl_load_mon(struct grf_softc *gp, struct grfcltext_mode *md) 1331 { 1332 struct grfvideo_mode *gv; 1333 struct grfinfo *gi; 1334 volatile void *ba, *fb; 1335 unsigned char num0, denom0, clkdoub; 1336 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1337 VSE, VT; 1338 int clkmul, clkmode; 1339 int vmul; 1340 int sr15; 1341 unsigned char hvsync_pulse; 1342 char TEXT; 1343 1344 /* identity */ 1345 gv = &md->gv; 1346 TEXT = (gv->depth == 4); 1347 1348 if (!cl_mondefok(gv)) { 1349 printf("grfcl: Monitor definition not ok\n"); 1350 return (0); 1351 } 1352 1353 ba = gp->g_regkva; 1354 fb = gp->g_fbkva; 1355 1356 /* provide all needed information in grf device-independent locations */ 1357 gp->g_data = (void *) gv; 1358 gi = &gp->g_display; 1359 gi->gd_regaddr = (void *) kvtop(__UNVOLATILE(ba)); 1360 gi->gd_regsize = 64 * 1024; 1361 gi->gd_fbaddr = (void *) kvtop(__UNVOLATILE(fb)); 1362 gi->gd_fbsize = cl_fbsize; 1363 gi->gd_colors = 1 << gv->depth; 1364 gi->gd_planes = gv->depth; 1365 gi->gd_fbwidth = gv->disp_width; 1366 gi->gd_fbheight = gv->disp_height; 1367 gi->gd_fbx = 0; 1368 gi->gd_fby = 0; 1369 if (TEXT) { 1370 gi->gd_dwidth = md->fx * md->cols; 1371 gi->gd_dheight = md->fy * md->rows; 1372 } else { 1373 gi->gd_dwidth = gv->disp_width; 1374 gi->gd_dheight = gv->disp_height; 1375 } 1376 gi->gd_dx = 0; 1377 gi->gd_dy = 0; 1378 1379 /* get display mode parameters */ 1380 1381 HBS = gv->hblank_start; 1382 HSS = gv->hsync_start; 1383 HSE = gv->hsync_stop; 1384 HBE = gv->htotal - 1; 1385 HT = gv->htotal; 1386 VBS = gv->vblank_start; 1387 VSS = gv->vsync_start; 1388 VSE = gv->vsync_stop; 1389 VBE = gv->vtotal - 1; 1390 VT = gv->vtotal; 1391 1392 if (TEXT) 1393 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1394 else 1395 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1396 VDE = gv->disp_height - 1; 1397 1398 /* adjustments */ 1399 switch (gv->depth) { 1400 case 8: 1401 clkmul = 1; 1402 clkmode = 0x0; 1403 break; 1404 case 15: 1405 case 16: 1406 clkmul = 1; 1407 clkmode = 0x6; 1408 break; 1409 case 24: 1410 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1411 clkmul = 1; 1412 else 1413 clkmul = 3; 1414 clkmode = 0x4; 1415 break; 1416 case 32: 1417 clkmul = 1; 1418 clkmode = 0x8; 1419 break; 1420 default: 1421 clkmul = 1; 1422 clkmode = 0x0; 1423 break; 1424 } 1425 1426 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1427 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1428 } else 1429 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1430 1431 vmul = 2; 1432 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1433 vmul = 1; 1434 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1435 vmul = 4; 1436 1437 VDE = VDE * vmul / 2; 1438 VBS = VBS * vmul / 2; 1439 VSS = VSS * vmul / 2; 1440 VSE = VSE * vmul / 2; 1441 VBE = VBE * vmul / 2; 1442 VT = VT * vmul / 2; 1443 1444 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1445 if (cl_64bit == 1) { 1446 if (TEXT || (gv->depth == 1)) 1447 sr15 = 0xd0; 1448 else 1449 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1450 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1451 } else { 1452 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1453 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1454 } 1455 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1456 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1457 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1458 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1459 1460 /* Set clock */ 1461 1462 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1463 1464 /* Horizontal/Vertical Sync Pulse */ 1465 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1466 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1467 hvsync_pulse &= ~0x40; 1468 else 1469 hvsync_pulse |= 0x40; 1470 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1471 hvsync_pulse &= ~0x80; 1472 else 1473 hvsync_pulse |= 0x80; 1474 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1475 1476 if (clkdoub) { 1477 HDE /= 2; 1478 HBS /= 2; 1479 HSS /= 2; 1480 HSE /= 2; 1481 HBE /= 2; 1482 HT /= 2; 1483 clkmode = 0x6; 1484 } 1485 1486 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1487 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1488 1489 /* load display parameters into board */ 1490 1491 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1492 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1493 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1494 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1495 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1496 WCrt(ba, CRT_ID_END_HOR_RETR, 1497 (HSE & 0x1f) | 1498 ((HBE & 0x20) ? 0x80 : 0x00)); 1499 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1500 WCrt(ba, CRT_ID_OVERFLOW, 1501 0x10 | 1502 ((VT & 0x100) ? 0x01 : 0x00) | 1503 ((VDE & 0x100) ? 0x02 : 0x00) | 1504 ((VSS & 0x100) ? 0x04 : 0x00) | 1505 ((VBS & 0x100) ? 0x08 : 0x00) | 1506 ((VT & 0x200) ? 0x20 : 0x00) | 1507 ((VDE & 0x200) ? 0x40 : 0x00) | 1508 ((VSS & 0x200) ? 0x80 : 0x00)); 1509 1510 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1511 0x40 | /* TEXT ? 0x00 ??? */ 1512 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1513 ((VBS & 0x200) ? 0x20 : 0x00) | 1514 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1515 1516 /* text cursor */ 1517 1518 if (TEXT) { 1519 #if CL_ULCURSOR 1520 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1521 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1522 #else 1523 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1524 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1525 #endif 1526 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1527 1528 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1529 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1530 } 1531 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1532 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1533 1534 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1535 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1536 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1537 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1538 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1539 1540 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1541 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1542 WCrt(ba, CRT_ID_LACE_CNTL, 1543 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1544 ((HBE & 0x40) ? 0x10 : 0x00) | 1545 ((HBE & 0x80) ? 0x20 : 0x00) | 1546 ((VBE & 0x100) ? 0x40 : 0x00) | 1547 ((VBE & 0x200) ? 0x80 : 0x00)); 1548 1549 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1550 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1551 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1552 1553 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1554 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1555 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1556 1557 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1558 sometimes, out of "secret" application note (crest) */ 1559 vgaw(ba, VDAC_MASK, 0); 1560 /* reset HDR "magic" access counter (crest) */ 1561 vgar(ba, VDAC_ADDRESS); 1562 1563 delay(200000); 1564 vgar(ba, VDAC_MASK); 1565 delay(200000); 1566 vgar(ba, VDAC_MASK); 1567 delay(200000); 1568 vgar(ba, VDAC_MASK); 1569 delay(200000); 1570 vgar(ba, VDAC_MASK); 1571 delay(200000); 1572 switch (gv->depth) { 1573 case 1: 1574 case 4: /* text */ 1575 vgaw(ba, VDAC_MASK, 0); 1576 HDE = gv->disp_width / 16; 1577 break; 1578 case 8: 1579 if (clkdoub) 1580 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1581 else 1582 vgaw(ba, VDAC_MASK, 0); 1583 HDE = gv->disp_width / 8; 1584 break; 1585 case 15: 1586 vgaw(ba, VDAC_MASK, 0xd0); 1587 HDE = gv->disp_width / 4; 1588 break; 1589 case 16: 1590 vgaw(ba, VDAC_MASK, 0xc1); 1591 HDE = gv->disp_width / 4; 1592 break; 1593 case 24: 1594 vgaw(ba, VDAC_MASK, 0xc5); 1595 HDE = (gv->disp_width / 8) * 3; 1596 break; 1597 case 32: 1598 vgaw(ba, VDAC_MASK, 0xc5); 1599 HDE = (gv->disp_width / 4); 1600 break; 1601 } 1602 1603 /* reset HDR "magic" access counter (crest) */ 1604 vgar(ba, VDAC_ADDRESS); 1605 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1606 vgaw(ba, VDAC_MASK, 0xff); 1607 1608 WCrt(ba, CRT_ID_OFFSET, HDE); 1609 if (cl_64bit == 1) { 1610 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1611 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1612 } 1613 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1614 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1615 0x22 | 1616 ((HDE > 0xff) ? 0x10 : 0x00)); 1617 1618 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1619 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1620 (gv->depth == 1) ? 0x01 : 0x0f); 1621 1622 /* text initialization */ 1623 1624 if (TEXT) { 1625 cl_inittextmode(gp); 1626 } 1627 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1628 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1629 1630 /* Pass-through */ 1631 1632 RegOffpass(ba); 1633 1634 return (1); 1635 } 1636 1637 void 1638 cl_inittextmode(struct grf_softc *gp) 1639 { 1640 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1641 volatile unsigned char *ba = gp->g_regkva; 1642 unsigned char *fb = __UNVOLATILE(gp->g_fbkva); 1643 unsigned char *c, *f, y; 1644 unsigned short z; 1645 1646 1647 /* load text font into beginning of display memory. Each character 1648 * cell is 32 bytes long (enough for 4 planes) */ 1649 1650 SetTextPlane(ba, 0x02); 1651 cl_memset(fb, 0, 256 * 32); 1652 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1653 f = tm->fdata; 1654 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1655 for (y = 0; y < tm->fy; y++) 1656 *c++ = *f++; 1657 1658 /* clear out text/attr planes (three screens worth) */ 1659 1660 SetTextPlane(ba, 0x01); 1661 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1662 SetTextPlane(ba, 0x00); 1663 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1664 1665 /* print out a little init msg */ 1666 1667 c = (unsigned char *) (fb) + (tm->cols - 16); 1668 strcpy(c, "CIRRUS"); 1669 c[6] = 0x20; 1670 1671 /* set colors (B&W) */ 1672 1673 vgaw(ba, VDAC_ADDRESS_W, 0); 1674 for (z = 0; z < 256; z++) { 1675 unsigned char r, g, b; 1676 1677 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1678 1679 if (cltype == PICASSO) { 1680 r = clconscolors[y][0]; 1681 g = clconscolors[y][1]; 1682 b = clconscolors[y][2]; 1683 } else { 1684 b = clconscolors[y][0]; 1685 g = clconscolors[y][1]; 1686 r = clconscolors[y][2]; 1687 } 1688 vgaw(ba, VDAC_DATA, r >> 2); 1689 vgaw(ba, VDAC_DATA, g >> 2); 1690 vgaw(ba, VDAC_DATA, b >> 2); 1691 } 1692 } 1693 1694 void 1695 cl_memset(unsigned char *d, unsigned char c, int l) 1696 { 1697 for (; l > 0; l--) 1698 *d++ = c; 1699 } 1700 1701 /* 1702 * Special wakeup/passthrough registers on graphics boards 1703 * 1704 * The methods have diverged a bit for each board, so 1705 * WPass(P) has been converted into a set of specific 1706 * inline functions. 1707 */ 1708 static void 1709 RegWakeup(volatile void *ba) 1710 { 1711 1712 switch (cltype) { 1713 case SPECTRUM: 1714 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1715 break; 1716 case PICASSO: 1717 /* Picasso needs no wakeup */ 1718 break; 1719 case PICCOLO: 1720 if (cl_64bit == 1) 1721 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1722 else 1723 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1724 break; 1725 } 1726 delay(200000); 1727 } 1728 1729 static void 1730 RegOnpass(volatile void *ba) 1731 { 1732 1733 switch (cltype) { 1734 case SPECTRUM: 1735 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1736 break; 1737 case PICASSO: 1738 if (cl_64bit == 0) 1739 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1740 break; 1741 case PICCOLO: 1742 if (cl_64bit == 1) 1743 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1744 else 1745 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1746 break; 1747 } 1748 cl_pass_toggle = 1; 1749 delay(200000); 1750 } 1751 1752 static void 1753 RegOffpass(volatile void *ba) 1754 { 1755 1756 switch (cltype) { 1757 case SPECTRUM: 1758 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1759 break; 1760 case PICASSO: 1761 if (cl_64bit == 0) 1762 vgaw(ba, PASS_ADDRESS_W, 0xff); 1763 break; 1764 case PICCOLO: 1765 if (cl_64bit == 1) 1766 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1767 else 1768 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1769 break; 1770 } 1771 cl_pass_toggle = 0; 1772 delay(200000); 1773 } 1774 1775 #endif /* NGRFCL */ 1776
Indexes created Mon Sep 29 03:10:08 GMT 2025