grf_et.c revision 1.11 1 1.11 thorpej /* $NetBSD: grf_et.c,v 1.11 1998/01/12 10:39:36 thorpej Exp $ */
2 1.1 veego
3 1.1 veego /*
4 1.9 veego * Copyright (c) 1997 Klaus Burkert
5 1.1 veego * Copyright (c) 1996 Tobias Abt
6 1.1 veego * Copyright (c) 1995 Ezra Story
7 1.1 veego * Copyright (c) 1995 Kari Mettinen
8 1.1 veego * Copyright (c) 1994 Markus Wild
9 1.1 veego * Copyright (c) 1994 Lutz Vieweg
10 1.1 veego * All rights reserved.
11 1.1 veego *
12 1.1 veego * Redistribution and use in source and binary forms, with or without
13 1.1 veego * modification, are permitted provided that the following conditions
14 1.1 veego * are met:
15 1.1 veego * 1. Redistributions of source code must retain the above copyright
16 1.1 veego * notice, this list of conditions and the following disclaimer.
17 1.1 veego * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 veego * notice, this list of conditions and the following disclaimer in the
19 1.1 veego * documentation and/or other materials provided with the distribution.
20 1.1 veego * 3. All advertising materials mentioning features or use of this software
21 1.1 veego * must display the following acknowledgement:
22 1.1 veego * This product includes software developed by Lutz Vieweg.
23 1.1 veego * 4. The name of the author may not be used to endorse or promote products
24 1.1 veego * derived from this software without specific prior written permission
25 1.1 veego *
26 1.1 veego * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 1.1 veego * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28 1.1 veego * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 1.1 veego * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30 1.1 veego * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 1.1 veego * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 1.1 veego * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 1.1 veego * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 1.1 veego * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 1.1 veego * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 1.1 veego */
37 1.1 veego #include "grfet.h"
38 1.1 veego #if NGRFET > 0
39 1.1 veego
40 1.1 veego /*
41 1.1 veego * Graphics routines for Tseng ET4000 (&W32) boards,
42 1.1 veego *
43 1.1 veego * This code offers low-level routines to access Tseng ET4000
44 1.1 veego * graphics-boards from within NetBSD for the Amiga.
45 1.1 veego * No warranties for any kind of function at all - this
46 1.1 veego * code may crash your hardware and scratch your harddisk. Use at your
47 1.1 veego * own risk. Freely distributable.
48 1.1 veego *
49 1.1 veego * Modified for Tseng ET4000 from
50 1.1 veego * Kari Mettinen's Cirrus driver by Tobias Abt
51 1.1 veego *
52 1.9 veego * Fixed Merlin in Z-III, fixed LACE and DBLSCAN, added Domino16M proto
53 1.9 veego * and AT&T ATT20c491 DAC, added memory-size detection by Klaus Burkert.
54 1.1 veego *
55 1.9 veego *
56 1.1 veego * TODO:
57 1.1 veego *
58 1.1 veego */
59 1.1 veego
60 1.1 veego #include <sys/param.h>
61 1.1 veego #include <sys/systm.h>
62 1.1 veego #include <sys/errno.h>
63 1.1 veego #include <sys/ioctl.h>
64 1.1 veego #include <sys/device.h>
65 1.1 veego #include <sys/malloc.h>
66 1.1 veego
67 1.1 veego #include <machine/cpu.h>
68 1.1 veego #include <dev/cons.h>
69 1.1 veego #ifdef TSENGCONSOLE
70 1.1 veego #include <amiga/dev/itevar.h>
71 1.1 veego #endif
72 1.1 veego #include <amiga/amiga/device.h>
73 1.1 veego #include <amiga/dev/grfioctl.h>
74 1.1 veego #include <amiga/dev/grfvar.h>
75 1.1 veego #include <amiga/dev/grf_etreg.h>
76 1.1 veego #include <amiga/dev/zbusvar.h>
77 1.1 veego
78 1.3 veego int et_mondefok __P((struct grfvideo_mode *gv));
79 1.3 veego void et_boardinit __P((struct grf_softc *gp));
80 1.3 veego static void et_CompFQ __P((u_int fq, u_char *num, u_char *denom));
81 1.3 veego int et_getvmode __P((struct grf_softc *gp, struct grfvideo_mode *vm));
82 1.3 veego int et_setvmode __P((struct grf_softc *gp, unsigned int mode));
83 1.3 veego int et_toggle __P((struct grf_softc *gp, unsigned short));
84 1.3 veego int et_getcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap));
85 1.3 veego int et_putcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap));
86 1.1 veego #ifndef TSENGCONSOLE
87 1.3 veego void et_off __P((struct grf_softc *gp));
88 1.1 veego #endif
89 1.3 veego void et_inittextmode __P((struct grf_softc *gp));
90 1.3 veego int et_ioctl __P((register struct grf_softc *gp, u_long cmd, void *data));
91 1.3 veego int et_getmousepos __P((struct grf_softc *gp, struct grf_position *data));
92 1.1 veego void et_writesprpos __P((volatile char *ba, short x, short y));
93 1.3 veego int et_setmousepos __P((struct grf_softc *gp, struct grf_position *data));
94 1.3 veego static int et_setspriteinfo __P((struct grf_softc *gp,
95 1.3 veego struct grf_spriteinfo *data));
96 1.3 veego int et_getspriteinfo __P((struct grf_softc *gp,
97 1.3 veego struct grf_spriteinfo *data));
98 1.3 veego static int et_getspritemax __P((struct grf_softc *gp,
99 1.3 veego struct grf_position *data));
100 1.3 veego int et_setmonitor __P((struct grf_softc *gp, struct grfvideo_mode *gv));
101 1.3 veego int et_blank __P((struct grf_softc *gp, int *on));
102 1.3 veego static int et_getControllerType __P((struct grf_softc *gp));
103 1.3 veego static int et_getDACType __P((struct grf_softc *gp));
104 1.1 veego
105 1.8 veego int grfetmatch __P((struct device *, struct cfdata *, void *));
106 1.1 veego void grfetattach __P((struct device *, struct device *, void *));
107 1.4 cgd int grfetprint __P((void *, const char *));
108 1.1 veego void et_memset __P((unsigned char *d, unsigned char c, int l));
109 1.1 veego
110 1.3 veego /*
111 1.3 veego * Graphics display definitions.
112 1.1 veego * These are filled by 'grfconfig' using GRFIOCSETMON.
113 1.1 veego */
114 1.10 veego #define monitor_def_max 24
115 1.10 veego static struct grfvideo_mode monitor_def[24] = {
116 1.10 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
117 1.10 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
118 1.1 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
119 1.1 veego };
120 1.1 veego static struct grfvideo_mode *monitor_current = &monitor_def[0];
121 1.1 veego
122 1.1 veego /* Console display definition.
123 1.1 veego * Default hardcoded text mode. This grf_et is set up to
124 1.1 veego * use one text mode only, and this is it. You may use
125 1.1 veego * grfconfig to change the mode after boot.
126 1.1 veego */
127 1.1 veego /* Console font */
128 1.1 veego #ifdef KFONT_8X11
129 1.1 veego #define TSENGFONT kernel_font_8x11
130 1.1 veego #define TSENGFONTY 11
131 1.1 veego #else
132 1.1 veego #define TSENGFONT kernel_font_8x8
133 1.1 veego #define TSENGFONTY 8
134 1.1 veego #endif
135 1.1 veego extern unsigned char TSENGFONT[];
136 1.1 veego
137 1.1 veego struct grfettext_mode etconsole_mode = {
138 1.10 veego {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8,
139 1.10 veego 481, 491, 493, 525, 0},
140 1.1 veego 8, TSENGFONTY, 640 / 8, 480 / TSENGFONTY, TSENGFONT, 32, 255
141 1.1 veego };
142 1.1 veego
143 1.1 veego /* Console colors */
144 1.1 veego unsigned char etconscolors[3][3] = { /* background, foreground, hilite */
145 1.1 veego {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
146 1.1 veego };
147 1.1 veego
148 1.1 veego int ettype = 0; /* oMniBus, Domino or Merlin */
149 1.1 veego int etctype = 0; /* ET4000 or ETW32 */
150 1.1 veego int etdtype = 0; /* Type of DAC (see grf_etregs.h) */
151 1.1 veego
152 1.1 veego char etcmap_shift = 0; /* 6 or 8 bit cmap entries */
153 1.1 veego unsigned char pass_toggle; /* passthru status tracker */
154 1.1 veego
155 1.1 veego unsigned char Merlin_switch = 0;
156 1.1 veego
157 1.3 veego /*
158 1.3 veego * Because all Tseng-boards have 2 configdev entries, one for
159 1.1 veego * framebuffer mem and the other for regs, we have to hold onto
160 1.1 veego * the pointers globally until we match on both. This and 'ettype'
161 1.1 veego * are the primary obsticles to multiple board support, but if you
162 1.1 veego * have multiple boards you have bigger problems than grf_et.
163 1.1 veego */
164 1.1 veego static void *et_fbaddr = 0; /* framebuffer */
165 1.1 veego static void *et_regaddr = 0; /* registers */
166 1.1 veego static int et_fbsize; /* framebuffer size */
167 1.1 veego
168 1.1 veego /* current sprite info, if you add support for multiple boards
169 1.1 veego * make this an array or something
170 1.1 veego */
171 1.1 veego struct grf_spriteinfo et_cursprite;
172 1.1 veego
173 1.1 veego /* sprite bitmaps in kernel stack, you'll need to arrayize these too if
174 1.1 veego * you add multiple board support
175 1.1 veego */
176 1.1 veego static unsigned char et_imageptr[8 * 64], et_maskptr[8 * 64];
177 1.1 veego static unsigned char et_sprred[2], et_sprgreen[2], et_sprblue[2];
178 1.1 veego
179 1.1 veego /* standard driver stuff */
180 1.1 veego struct cfattach grfet_ca = {
181 1.1 veego sizeof(struct grf_softc), grfetmatch, grfetattach
182 1.1 veego };
183 1.3 veego
184 1.1 veego static struct cfdata *cfdata;
185 1.1 veego
186 1.1 veego int
187 1.8 veego grfetmatch(pdp, cfp, auxp)
188 1.1 veego struct device *pdp;
189 1.8 veego struct cfdata *cfp;
190 1.8 veego void *auxp;
191 1.1 veego {
192 1.1 veego struct zbus_args *zap;
193 1.9 veego static int regprod, regprod2 = 0, fbprod;
194 1.1 veego
195 1.1 veego zap = auxp;
196 1.1 veego
197 1.1 veego #ifndef TSENGCONSOLE
198 1.1 veego if (amiga_realconfig == 0)
199 1.1 veego return (0);
200 1.1 veego #endif
201 1.1 veego
202 1.1 veego /* Grab the first board we encounter as the preferred one. This will
203 1.1 veego * allow one board to work in a multiple Tseng board system, but not
204 1.1 veego * multiple boards at the same time. */
205 1.1 veego if (ettype == 0) {
206 1.1 veego switch (zap->manid) {
207 1.1 veego case OMNIBUS:
208 1.1 veego if (zap->prodid != 0)
209 1.1 veego return (0);
210 1.1 veego regprod = 0;
211 1.1 veego fbprod = 0;
212 1.1 veego break;
213 1.1 veego case DOMINO:
214 1.9 veego /* 2167/3 is Domino16M proto (crest) */
215 1.9 veego if (zap->prodid != 3 && zap->prodid != 2 && zap->prodid != 1)
216 1.1 veego return (0);
217 1.1 veego regprod = 2;
218 1.9 veego regprod2 = 3;
219 1.1 veego fbprod = 1;
220 1.1 veego break;
221 1.1 veego case MERLIN:
222 1.1 veego if (zap->prodid != 3 && zap->prodid != 4)
223 1.1 veego return (0);
224 1.1 veego regprod = 4;
225 1.1 veego fbprod = 3;
226 1.1 veego break;
227 1.1 veego default:
228 1.1 veego return (0);
229 1.1 veego }
230 1.1 veego ettype = zap->manid;
231 1.1 veego } else {
232 1.1 veego if (ettype != zap->manid) {
233 1.1 veego return (0);
234 1.1 veego }
235 1.1 veego }
236 1.1 veego
237 1.1 veego /* Configure either registers or framebuffer in any order */
238 1.1 veego /* as said before, oMniBus does not support ProdID */
239 1.1 veego if (ettype == OMNIBUS) {
240 1.1 veego if (zap->size == 64 * 1024) {
241 1.1 veego /* register area */
242 1.1 veego et_regaddr = zap->va;
243 1.1 veego } else {
244 1.1 veego /* memory area */
245 1.1 veego et_fbaddr = zap->va;
246 1.1 veego et_fbsize = zap->size;
247 1.1 veego }
248 1.1 veego } else {
249 1.9 veego if (zap->prodid == regprod || zap->prodid == regprod2) {
250 1.1 veego et_regaddr = zap->va;
251 1.1 veego } else {
252 1.1 veego if (zap->prodid == fbprod) {
253 1.1 veego et_fbaddr = zap->va;
254 1.1 veego et_fbsize = zap->size;
255 1.1 veego } else {
256 1.1 veego return (0);
257 1.1 veego }
258 1.1 veego }
259 1.1 veego }
260 1.1 veego
261 1.1 veego #ifdef TSENGCONSOLE
262 1.1 veego if (amiga_realconfig == 0) {
263 1.1 veego cfdata = cfp;
264 1.1 veego }
265 1.1 veego #endif
266 1.1 veego
267 1.1 veego return (1);
268 1.1 veego }
269 1.1 veego
270 1.1 veego
271 1.1 veego void
272 1.1 veego grfetattach(pdp, dp, auxp)
273 1.1 veego struct device *pdp, *dp;
274 1.1 veego void *auxp;
275 1.1 veego {
276 1.1 veego static struct grf_softc congrf;
277 1.1 veego struct zbus_args *zap;
278 1.1 veego struct grf_softc *gp;
279 1.1 veego static char attachflag = 0;
280 1.1 veego
281 1.1 veego zap = auxp;
282 1.1 veego
283 1.7 christos printf("\n");
284 1.1 veego
285 1.1 veego /* make sure both halves have matched */
286 1.1 veego if (!et_regaddr || !et_fbaddr)
287 1.1 veego return;
288 1.1 veego
289 1.1 veego /* do all that messy console/grf stuff */
290 1.1 veego if (dp == NULL)
291 1.1 veego gp = &congrf;
292 1.1 veego else
293 1.1 veego gp = (struct grf_softc *) dp;
294 1.1 veego
295 1.1 veego if (dp != NULL && congrf.g_regkva != 0) {
296 1.1 veego /*
297 1.1 veego * inited earlier, just copy (not device struct)
298 1.1 veego */
299 1.1 veego bcopy(&congrf.g_display, &gp->g_display,
300 1.1 veego (char *) &gp[1] - (char *) &gp->g_display);
301 1.1 veego } else {
302 1.1 veego gp->g_regkva = (volatile caddr_t) et_regaddr;
303 1.1 veego gp->g_fbkva = (volatile caddr_t) et_fbaddr;
304 1.1 veego
305 1.1 veego gp->g_unit = GRF_ET4000_UNIT;
306 1.1 veego gp->g_mode = et_mode;
307 1.1 veego gp->g_conpri = grfet_cnprobe();
308 1.1 veego gp->g_flags = GF_ALIVE;
309 1.1 veego
310 1.1 veego /* wakeup the board */
311 1.1 veego et_boardinit(gp);
312 1.1 veego
313 1.1 veego #ifdef TSENGCONSOLE
314 1.1 veego grfet_iteinit(gp);
315 1.1 veego (void) et_load_mon(gp, &etconsole_mode);
316 1.1 veego #endif
317 1.1 veego }
318 1.1 veego
319 1.1 veego /*
320 1.1 veego * attach grf (once)
321 1.1 veego */
322 1.1 veego if (amiga_config_found(cfdata, &gp->g_device, gp, grfetprint)) {
323 1.1 veego attachflag = 1;
324 1.7 christos printf("grfet: %dMB ", et_fbsize / 0x100000);
325 1.1 veego switch (ettype) {
326 1.1 veego case OMNIBUS:
327 1.7 christos printf("oMniBus");
328 1.1 veego break;
329 1.1 veego case DOMINO:
330 1.7 christos printf("Domino");
331 1.1 veego break;
332 1.1 veego case MERLIN:
333 1.7 christos printf("Merlin");
334 1.1 veego break;
335 1.1 veego }
336 1.7 christos printf(" with ");
337 1.1 veego switch (etctype) {
338 1.1 veego case ET4000:
339 1.7 christos printf("Tseng ET4000");
340 1.1 veego break;
341 1.1 veego case ETW32:
342 1.7 christos printf("Tseng ETW32");
343 1.1 veego break;
344 1.1 veego }
345 1.7 christos printf(" and ");
346 1.1 veego switch (etdtype) {
347 1.1 veego case SIERRA11483:
348 1.7 christos printf("Sierra SC11483 DAC");
349 1.1 veego break;
350 1.1 veego case SIERRA15025:
351 1.7 christos printf("Sierra SC15025 DAC");
352 1.1 veego break;
353 1.1 veego case MUSICDAC:
354 1.7 christos printf("MUSIC DAC");
355 1.1 veego break;
356 1.1 veego case MERLINDAC:
357 1.9 veego printf("BrookTree Bt482 DAC");
358 1.9 veego break;
359 1.9 veego case ATT20C491:
360 1.9 veego printf("AT&T ATT20c491 DAC");
361 1.1 veego break;
362 1.1 veego }
363 1.7 christos printf(" being used\n");
364 1.1 veego } else {
365 1.1 veego if (!attachflag)
366 1.7 christos printf("grfet unattached!!\n");
367 1.1 veego }
368 1.1 veego }
369 1.1 veego
370 1.1 veego
371 1.1 veego int
372 1.1 veego grfetprint(auxp, pnp)
373 1.9 veego void *auxp;
374 1.9 veego const char *pnp;
375 1.1 veego {
376 1.1 veego if (pnp)
377 1.7 christos printf("ite at %s: ", pnp);
378 1.1 veego return (UNCONF);
379 1.1 veego }
380 1.1 veego
381 1.1 veego
382 1.1 veego void
383 1.1 veego et_boardinit(gp)
384 1.1 veego struct grf_softc *gp;
385 1.1 veego {
386 1.1 veego unsigned char *ba = gp->g_regkva;
387 1.1 veego int x;
388 1.1 veego
389 1.1 veego /* wakeup board and flip passthru OFF */
390 1.1 veego
391 1.1 veego RegWakeup(ba);
392 1.1 veego RegOnpass(ba);
393 1.1 veego
394 1.1 veego if (ettype == MERLIN) {
395 1.3 veego /* Merlin needs some special initialisations */
396 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
397 1.3 veego delay(20000);
398 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 8);
399 1.3 veego delay(20000);
400 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
401 1.3 veego delay(20000);
402 1.3 veego vgaw(ba, MERLIN_VDAC_DATA, 1);
403 1.3 veego
404 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x00);
405 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0xff);
406 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x01);
407 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x0f);
408 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x02);
409 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x42);
410 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x03);
411 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x00);
412 1.1 veego
413 1.3 veego vgaw(ba, MERLIN_VDAC_DATA, 0);
414 1.1 veego }
415 1.1 veego
416 1.3 veego
417 1.1 veego /* setup initial unchanging parameters */
418 1.1 veego
419 1.3 veego vgaw(ba, GREG_HERCULESCOMPAT + ((ettype == DOMINO) ? 0x0fff : 0), 0x03);
420 1.1 veego vgaw(ba, GREG_DISPMODECONTROL, 0xa0);
421 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0x63);
422 1.1 veego
423 1.3 veego if (ettype == DOMINO)
424 1.3 veego {
425 1.3 veego vgaw(ba, CRT_ADDRESS, CRT_ID_VIDEO_CONFIG1);
426 1.3 veego vgaw(ba, CRT_ADDRESS_W + 0x0fff,
427 1.3 veego 0xc0 | vgar(ba, CRT_ADDRESS_R + 0x0fff));
428 1.3 veego }
429 1.3 veego
430 1.1 veego WSeq(ba, SEQ_ID_RESET, 0x03);
431 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot, Display off */
432 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
433 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
434 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e);
435 1.9 veego WSeq(ba, SEQ_ID_STATE_CONTROL, 0x00);
436 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
437 1.1 veego
438 1.1 veego WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
439 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
440 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, 0x08);
441 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
442 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
443 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
444 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
445 1.1 veego
446 1.9 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x67);
447 1.9 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xc3);
448 1.9 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
449 1.9 veego
450 1.9 veego /* ET4000 special */
451 1.1 veego WCrt(ba, CRT_ID_RASCAS_CONFIG, 0x28);
452 1.9 veego WCrt(ba, CRT_ID_EXT_START, 0x00);
453 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, 0x08);
454 1.9 veego
455 1.9 veego /* ET4000/W32 special (currently only for Merlin (crest) */
456 1.9 veego if (ettype == MERLIN) {
457 1.9 veego WCrt(ba, CRT_ID_SEGMENT_COMP, 0x1c);
458 1.9 veego WCrt(ba, CRT_ID_GENERAL_PURPOSE, 0x00);
459 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0x93);
460 1.9 veego }
461 1.9 veego else {
462 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
463 1.3 veego }
464 1.3 veego
465 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x0f);
466 1.1 veego WCrt(ba, CRT_ID_HOR_OVERFLOW, 0x00);
467 1.1 veego
468 1.9 veego vgaw(ba, GREG_SEGMENTSELECT, 0x00);
469 1.9 veego
470 1.1 veego WGfx(ba, GCT_ID_SET_RESET, 0x00);
471 1.1 veego WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
472 1.1 veego WGfx(ba, GCT_ID_COLOR_COMPARE, 0x00);
473 1.1 veego WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
474 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
475 1.9 veego WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x40);
476 1.1 veego WGfx(ba, GCT_ID_MISC, 0x01);
477 1.1 veego WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
478 1.1 veego WGfx(ba, GCT_ID_BITMASK, 0xff);
479 1.1 veego
480 1.1 veego for (x = 0; x < 0x10; x++)
481 1.1 veego WAttr(ba, x, x);
482 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
483 1.1 veego WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
484 1.1 veego WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
485 1.1 veego WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
486 1.1 veego WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
487 1.1 veego WAttr(ba, ACT_ID_MISCELLANEOUS, 0x00);
488 1.1 veego
489 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
490 1.1 veego delay(200000);
491 1.9 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3);
492 1.1 veego
493 1.1 veego /* colors initially set to greyscale */
494 1.1 veego switch(ettype) {
495 1.1 veego case MERLIN:
496 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
497 1.1 veego for (x = 255; x >= 0; x--) {
498 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
499 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
500 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
501 1.1 veego }
502 1.1 veego break;
503 1.1 veego default:
504 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
505 1.1 veego for (x = 255; x >= 0; x--) {
506 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
507 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
508 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
509 1.1 veego }
510 1.1 veego break;
511 1.1 veego }
512 1.1 veego /* set sprite bitmap pointers */
513 1.1 veego /* should work like that */
514 1.1 veego et_cursprite.image = et_imageptr;
515 1.1 veego et_cursprite.mask = et_maskptr;
516 1.1 veego et_cursprite.cmap.red = et_sprred;
517 1.1 veego et_cursprite.cmap.green = et_sprgreen;
518 1.1 veego et_cursprite.cmap.blue = et_sprblue;
519 1.9 veego
520 1.9 veego /* card specific initialisations */
521 1.1 veego switch(ettype) {
522 1.1 veego case OMNIBUS:
523 1.1 veego etctype = et_getControllerType(gp);
524 1.1 veego etdtype = et_getDACType(gp);
525 1.1 veego break;
526 1.1 veego case MERLIN:
527 1.9 veego vgaw(ba, GREG_SEGMENTSELECT2, 0x00);
528 1.9 veego if (((vgar(ba, GREG_FEATURE_CONTROL_R) & 12) |
529 1.9 veego (vgar(ba, GREG_STATUS0_R) & 0x60)) == 0x24) {
530 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x07); /* 1Mx4 RAM */
531 1.9 veego et_fbsize = 0x400000; /* 4 MB */
532 1.9 veego }
533 1.9 veego else {
534 1.9 veego /* check for 1MB or 2MB board (crest) */
535 1.9 veego /* has there a 1MB Merlin ever been sold ??? */
536 1.9 veego volatile unsigned long *et_fbtestaddr;
537 1.9 veego et_fbtestaddr = (volatile unsigned long *)gp->g_fbkva;
538 1.9 veego *et_fbtestaddr = 0x0;
539 1.9 veego vgaw(ba, GREG_SEGMENTSELECT2, 0x11); /* 1MB offset */
540 1.9 veego *et_fbtestaddr = 0x12345678;
541 1.9 veego vgaw(ba, GREG_SEGMENTSELECT2, 0x00);
542 1.9 veego if (*et_fbtestaddr == 0x0)
543 1.9 veego et_fbsize = 0x200000; /* 2 MB */
544 1.9 veego else
545 1.9 veego et_fbsize = 0x100000; /* 1 MB */
546 1.9 veego }
547 1.9 veego /* ZorroII can map 2 MB max ... */
548 1.9 veego if (!iszthreepa(gp->g_fbkva) && et_fbsize == 0x400000)
549 1.9 veego et_fbsize = 0x200000;
550 1.1 veego etctype = ETW32;
551 1.1 veego etdtype = MERLINDAC;
552 1.3 veego break;
553 1.1 veego case DOMINO:
554 1.1 veego etctype = ET4000;
555 1.9 veego etdtype = et_getDACType(gp);
556 1.1 veego break;
557 1.1 veego }
558 1.1 veego }
559 1.1 veego
560 1.1 veego
561 1.1 veego int
562 1.1 veego et_getvmode(gp, vm)
563 1.1 veego struct grf_softc *gp;
564 1.1 veego struct grfvideo_mode *vm;
565 1.1 veego {
566 1.1 veego struct grfvideo_mode *gv;
567 1.1 veego
568 1.1 veego #ifdef TSENGCONSOLE
569 1.1 veego /* Handle grabbing console mode */
570 1.1 veego if (vm->mode_num == 255) {
571 1.1 veego bcopy(&etconsole_mode, vm, sizeof(struct grfvideo_mode));
572 1.9 veego /* XXX so grfconfig can tell us the correct text dimensions. */
573 1.1 veego vm->depth = etconsole_mode.fy;
574 1.9 veego } else
575 1.1 veego #endif
576 1.3 veego {
577 1.3 veego if (vm->mode_num == 0)
578 1.3 veego vm->mode_num = (monitor_current - monitor_def) + 1;
579 1.3 veego if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
580 1.3 veego return (EINVAL);
581 1.3 veego gv = monitor_def + (vm->mode_num - 1);
582 1.3 veego if (gv->mode_num == 0)
583 1.3 veego return (EINVAL);
584 1.3 veego
585 1.3 veego bcopy(gv, vm, sizeof(struct grfvideo_mode));
586 1.3 veego }
587 1.3 veego
588 1.3 veego /* adjust internal values to pixel values */
589 1.3 veego
590 1.3 veego vm->hblank_start *= 8;
591 1.3 veego vm->hsync_start *= 8;
592 1.3 veego vm->hsync_stop *= 8;
593 1.3 veego vm->htotal *= 8;
594 1.3 veego
595 1.1 veego return (0);
596 1.1 veego }
597 1.1 veego
598 1.1 veego
599 1.1 veego int
600 1.1 veego et_setvmode(gp, mode)
601 1.1 veego struct grf_softc *gp;
602 1.1 veego unsigned mode;
603 1.1 veego {
604 1.1 veego if (!mode || (mode > monitor_def_max) ||
605 1.1 veego monitor_def[mode - 1].mode_num == 0)
606 1.1 veego return (EINVAL);
607 1.1 veego
608 1.1 veego monitor_current = monitor_def + (mode - 1);
609 1.1 veego
610 1.1 veego return (0);
611 1.1 veego }
612 1.1 veego
613 1.1 veego
614 1.1 veego #ifndef TSENGCONSOLE
615 1.1 veego void
616 1.1 veego et_off(gp)
617 1.1 veego struct grf_softc *gp;
618 1.1 veego {
619 1.1 veego char *ba = gp->g_regkva;
620 1.1 veego
621 1.1 veego RegOnpass(ba);
622 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);
623 1.1 veego }
624 1.1 veego #endif
625 1.1 veego
626 1.1 veego
627 1.1 veego int
628 1.1 veego et_blank(gp, on)
629 1.3 veego struct grf_softc *gp;
630 1.3 veego int *on;
631 1.1 veego {
632 1.9 veego WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21);
633 1.9 veego return(0);
634 1.1 veego }
635 1.3 veego
636 1.1 veego
637 1.1 veego /*
638 1.1 veego * Change the mode of the display.
639 1.1 veego * Return a UNIX error number or 0 for success.
640 1.1 veego */
641 1.1 veego int
642 1.1 veego et_mode(gp, cmd, arg, a2, a3)
643 1.1 veego register struct grf_softc *gp;
644 1.1 veego u_long cmd;
645 1.1 veego void *arg;
646 1.1 veego u_long a2;
647 1.1 veego int a3;
648 1.1 veego {
649 1.3 veego int error;
650 1.1 veego
651 1.1 veego switch (cmd) {
652 1.1 veego case GM_GRFON:
653 1.1 veego error = et_load_mon(gp,
654 1.1 veego (struct grfettext_mode *) monitor_current) ? 0 : EINVAL;
655 1.1 veego return (error);
656 1.1 veego
657 1.1 veego case GM_GRFOFF:
658 1.1 veego #ifndef TSENGCONSOLE
659 1.1 veego et_off(gp);
660 1.1 veego #else
661 1.1 veego et_load_mon(gp, &etconsole_mode);
662 1.1 veego #endif
663 1.1 veego return (0);
664 1.1 veego
665 1.1 veego case GM_GRFCONFIG:
666 1.1 veego return (0);
667 1.1 veego
668 1.1 veego case GM_GRFGETVMODE:
669 1.1 veego return (et_getvmode(gp, (struct grfvideo_mode *) arg));
670 1.1 veego
671 1.1 veego case GM_GRFSETVMODE:
672 1.1 veego error = et_setvmode(gp, *(unsigned *) arg);
673 1.1 veego if (!error && (gp->g_flags & GF_GRFON))
674 1.1 veego et_load_mon(gp,
675 1.1 veego (struct grfettext_mode *) monitor_current);
676 1.1 veego return (error);
677 1.1 veego
678 1.1 veego case GM_GRFGETNUMVM:
679 1.1 veego *(int *) arg = monitor_def_max;
680 1.1 veego return (0);
681 1.1 veego
682 1.1 veego case GM_GRFIOCTL:
683 1.1 veego return (et_ioctl(gp, a2, arg));
684 1.1 veego
685 1.1 veego default:
686 1.1 veego break;
687 1.1 veego }
688 1.1 veego
689 1.1 veego return (EINVAL);
690 1.1 veego }
691 1.1 veego
692 1.3 veego
693 1.1 veego int
694 1.1 veego et_ioctl(gp, cmd, data)
695 1.1 veego register struct grf_softc *gp;
696 1.1 veego u_long cmd;
697 1.1 veego void *data;
698 1.1 veego {
699 1.1 veego switch (cmd) {
700 1.1 veego case GRFIOCGSPRITEPOS:
701 1.1 veego return (et_getmousepos(gp, (struct grf_position *) data));
702 1.1 veego
703 1.1 veego case GRFIOCSSPRITEPOS:
704 1.1 veego return (et_setmousepos(gp, (struct grf_position *) data));
705 1.1 veego
706 1.1 veego case GRFIOCSSPRITEINF:
707 1.1 veego return (et_setspriteinfo(gp, (struct grf_spriteinfo *) data));
708 1.1 veego
709 1.1 veego case GRFIOCGSPRITEINF:
710 1.1 veego return (et_getspriteinfo(gp, (struct grf_spriteinfo *) data));
711 1.1 veego
712 1.1 veego case GRFIOCGSPRITEMAX:
713 1.1 veego return (et_getspritemax(gp, (struct grf_position *) data));
714 1.1 veego
715 1.1 veego case GRFIOCGETCMAP:
716 1.1 veego return (et_getcmap(gp, (struct grf_colormap *) data));
717 1.1 veego
718 1.1 veego case GRFIOCPUTCMAP:
719 1.1 veego return (et_putcmap(gp, (struct grf_colormap *) data));
720 1.1 veego
721 1.1 veego case GRFIOCBITBLT:
722 1.1 veego break;
723 1.1 veego
724 1.1 veego case GRFTOGGLE:
725 1.1 veego return (et_toggle(gp, 0));
726 1.1 veego
727 1.1 veego case GRFIOCSETMON:
728 1.1 veego return (et_setmonitor(gp, (struct grfvideo_mode *) data));
729 1.1 veego
730 1.3 veego case GRFIOCBLANK:
731 1.1 veego return (et_blank(gp, (int *)data));
732 1.1 veego }
733 1.1 veego return (EINVAL);
734 1.1 veego }
735 1.1 veego
736 1.1 veego
737 1.1 veego int
738 1.1 veego et_getmousepos(gp, data)
739 1.1 veego struct grf_softc *gp;
740 1.1 veego struct grf_position *data;
741 1.1 veego {
742 1.1 veego data->x = et_cursprite.pos.x;
743 1.1 veego data->y = et_cursprite.pos.y;
744 1.3 veego
745 1.1 veego return (0);
746 1.1 veego }
747 1.1 veego
748 1.1 veego
749 1.1 veego void
750 1.1 veego et_writesprpos(ba, x, y)
751 1.1 veego volatile char *ba;
752 1.1 veego short x;
753 1.1 veego short y;
754 1.1 veego {
755 1.1 veego }
756 1.1 veego
757 1.1 veego
758 1.1 veego int
759 1.1 veego et_setmousepos(gp, data)
760 1.1 veego struct grf_softc *gp;
761 1.1 veego struct grf_position *data;
762 1.1 veego {
763 1.1 veego volatile char *ba = gp->g_regkva;
764 1.1 veego short rx, ry, prx, pry;
765 1.1 veego
766 1.1 veego /* no movement */
767 1.1 veego if (et_cursprite.pos.x == data->x && et_cursprite.pos.y == data->y)
768 1.1 veego return (0);
769 1.1 veego
770 1.3 veego /* current and previous real coordinates */
771 1.1 veego rx = data->x - et_cursprite.hot.x;
772 1.1 veego ry = data->y - et_cursprite.hot.y;
773 1.1 veego prx = et_cursprite.pos.x - et_cursprite.hot.x;
774 1.1 veego pry = et_cursprite.pos.y - et_cursprite.hot.y;
775 1.1 veego
776 1.3 veego /* if we are/were on an edge, create (un)shifted bitmap --
777 1.3 veego * ripped out optimization (not extremely worthwhile,
778 1.3 veego * and kind of buggy anyhow).
779 1.3 veego */
780 1.1 veego
781 1.3 veego /* do movement, save position */
782 1.3 veego et_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
783 1.1 veego et_cursprite.pos.x = data->x;
784 1.1 veego et_cursprite.pos.y = data->y;
785 1.1 veego
786 1.1 veego return (0);
787 1.1 veego }
788 1.1 veego
789 1.1 veego
790 1.1 veego int
791 1.1 veego et_getspriteinfo(gp, data)
792 1.1 veego struct grf_softc *gp;
793 1.1 veego struct grf_spriteinfo *data;
794 1.1 veego {
795 1.1 veego
796 1.1 veego return(EINVAL);
797 1.1 veego }
798 1.1 veego
799 1.1 veego
800 1.1 veego static int
801 1.1 veego et_setspriteinfo(gp, data)
802 1.1 veego struct grf_softc *gp;
803 1.1 veego struct grf_spriteinfo *data;
804 1.1 veego {
805 1.1 veego
806 1.1 veego return(EINVAL);
807 1.1 veego }
808 1.1 veego
809 1.1 veego
810 1.1 veego static int
811 1.1 veego et_getspritemax(gp, data)
812 1.1 veego struct grf_softc *gp;
813 1.1 veego struct grf_position *data;
814 1.1 veego {
815 1.1 veego
816 1.1 veego return(EINVAL);
817 1.1 veego }
818 1.1 veego
819 1.1 veego
820 1.1 veego int
821 1.1 veego et_setmonitor(gp, gv)
822 1.1 veego struct grf_softc *gp;
823 1.1 veego struct grfvideo_mode *gv;
824 1.1 veego {
825 1.1 veego struct grfvideo_mode *md;
826 1.1 veego
827 1.3 veego if (!et_mondefok(gv))
828 1.3 veego return(EINVAL);
829 1.1 veego
830 1.1 veego #ifdef TSENGCONSOLE
831 1.1 veego /* handle interactive setting of console mode */
832 1.1 veego if (gv->mode_num == 255) {
833 1.1 veego bcopy(gv, &etconsole_mode.gv, sizeof(struct grfvideo_mode));
834 1.3 veego etconsole_mode.gv.hblank_start /= 8;
835 1.3 veego etconsole_mode.gv.hsync_start /= 8;
836 1.3 veego etconsole_mode.gv.hsync_stop /= 8;
837 1.3 veego etconsole_mode.gv.htotal /= 8;
838 1.1 veego etconsole_mode.rows = gv->disp_height / etconsole_mode.fy;
839 1.1 veego etconsole_mode.cols = gv->disp_width / etconsole_mode.fx;
840 1.1 veego if (!(gp->g_flags & GF_GRFON))
841 1.1 veego et_load_mon(gp, &etconsole_mode);
842 1.1 veego ite_reinit(gp->g_itedev);
843 1.1 veego return (0);
844 1.1 veego }
845 1.1 veego #endif
846 1.1 veego
847 1.1 veego md = monitor_def + (gv->mode_num - 1);
848 1.1 veego bcopy(gv, md, sizeof(struct grfvideo_mode));
849 1.1 veego
850 1.3 veego /* adjust pixel oriented values to internal rep. */
851 1.1 veego
852 1.3 veego md->hblank_start /= 8;
853 1.3 veego md->hsync_start /= 8;
854 1.3 veego md->hsync_stop /= 8;
855 1.3 veego md->htotal /= 8;
856 1.1 veego
857 1.1 veego return (0);
858 1.1 veego }
859 1.1 veego
860 1.1 veego
861 1.1 veego int
862 1.1 veego et_getcmap(gfp, cmap)
863 1.1 veego struct grf_softc *gfp;
864 1.1 veego struct grf_colormap *cmap;
865 1.1 veego {
866 1.1 veego volatile unsigned char *ba;
867 1.3 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
868 1.3 veego short x;
869 1.3 veego int error;
870 1.1 veego
871 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
872 1.1 veego return 0;
873 1.1 veego
874 1.1 veego if (cmap->index + cmap->count > 256)
875 1.1 veego cmap->count = 256 - cmap->index;
876 1.1 veego
877 1.1 veego ba = gfp->g_regkva;
878 1.1 veego /* first read colors out of the chip, then copyout to userspace */
879 1.1 veego x = cmap->count - 1;
880 1.1 veego
881 1.1 veego rp = red + cmap->index;
882 1.1 veego gp = green + cmap->index;
883 1.1 veego bp = blue + cmap->index;
884 1.1 veego
885 1.1 veego switch(ettype) {
886 1.1 veego case MERLIN:
887 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
888 1.1 veego do {
889 1.1 veego *rp++ = vgar(ba, MERLIN_VDAC_COLORS);
890 1.1 veego *gp++ = vgar(ba, MERLIN_VDAC_COLORS);
891 1.1 veego *bp++ = vgar(ba, MERLIN_VDAC_COLORS);
892 1.1 veego } while (x-- > 0);
893 1.1 veego break;
894 1.1 veego default:
895 1.3 veego vgaw(ba, VDAC_ADDRESS_R+((ettype==DOMINO)?0x0fff:0), cmap->index);
896 1.1 veego do {
897 1.3 veego *rp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
898 1.3 veego *gp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
899 1.3 veego *bp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
900 1.1 veego } while (x-- > 0);
901 1.1 veego break;
902 1.1 veego }
903 1.1 veego
904 1.3 veego error = copyout(red + cmap->index, cmap->red, cmap->count);
905 1.3 veego if (!error)
906 1.3 veego error = copyout(green + cmap->index, cmap->green, cmap->count);
907 1.3 veego if (!error)
908 1.3 veego error = copyout(blue + cmap->index, cmap->blue, cmap->count);
909 1.1 veego
910 1.1 veego return (error);
911 1.1 veego }
912 1.1 veego
913 1.1 veego
914 1.1 veego int
915 1.1 veego et_putcmap(gfp, cmap)
916 1.1 veego struct grf_softc *gfp;
917 1.1 veego struct grf_colormap *cmap;
918 1.1 veego {
919 1.1 veego volatile unsigned char *ba;
920 1.3 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
921 1.3 veego short x;
922 1.3 veego int error;
923 1.1 veego
924 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
925 1.1 veego return (0);
926 1.1 veego
927 1.1 veego if (cmap->index + cmap->count > 256)
928 1.1 veego cmap->count = 256 - cmap->index;
929 1.1 veego
930 1.1 veego /* first copy the colors into kernelspace */
931 1.3 veego if ((error = copyin(cmap->red, red + cmap->index, cmap->count)))
932 1.3 veego return (error);
933 1.3 veego
934 1.3 veego if ((error = copyin(cmap->green, green + cmap->index, cmap->count)))
935 1.3 veego return (error);
936 1.1 veego
937 1.3 veego if ((error = copyin(cmap->blue, blue + cmap->index, cmap->count)))
938 1.1 veego return (error);
939 1.3 veego
940 1.3 veego ba = gfp->g_regkva;
941 1.3 veego x = cmap->count - 1;
942 1.3 veego
943 1.3 veego rp = red + cmap->index;
944 1.3 veego gp = green + cmap->index;
945 1.3 veego bp = blue + cmap->index;
946 1.3 veego
947 1.3 veego switch(ettype){
948 1.3 veego case MERLIN:
949 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
950 1.3 veego do {
951 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *rp++);
952 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *gp++);
953 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *bp++);
954 1.3 veego } while (x-- > 0);
955 1.3 veego break;
956 1.3 veego default:
957 1.3 veego vgaw(ba, VDAC_ADDRESS_W, cmap->index);
958 1.3 veego do {
959 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
960 1.3 veego *rp++ >> etcmap_shift);
961 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
962 1.3 veego *gp++ >> etcmap_shift);
963 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
964 1.3 veego *bp++ >> etcmap_shift);
965 1.3 veego } while (x-- > 0);
966 1.3 veego break;
967 1.3 veego }
968 1.3 veego
969 1.3 veego return (0);
970 1.1 veego }
971 1.1 veego
972 1.1 veego
973 1.1 veego int
974 1.1 veego et_toggle(gp, wopp)
975 1.1 veego struct grf_softc *gp;
976 1.1 veego unsigned short wopp; /* don't need that one yet, ill */
977 1.1 veego {
978 1.1 veego volatile unsigned char *ba;
979 1.1 veego
980 1.1 veego ba = gp->g_regkva;
981 1.1 veego
982 1.1 veego if (pass_toggle) {
983 1.1 veego RegOffpass(ba);
984 1.1 veego } else {
985 1.1 veego RegOnpass(ba);
986 1.1 veego }
987 1.1 veego return (0);
988 1.1 veego }
989 1.1 veego
990 1.3 veego
991 1.1 veego #define ET_NUMCLOCKS 32
992 1.1 veego
993 1.1 veego static u_char et_clocks[ET_NUMCLOCKS] = {
994 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
995 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
996 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
997 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5
998 1.1 veego };
999 1.1 veego
1000 1.1 veego static u_char et_clockdividers[ET_NUMCLOCKS] = {
1001 1.1 veego 3, 3, 3, 3, 3, 3, 3, 3,
1002 1.1 veego 2, 2, 2, 2, 2, 2, 2, 2,
1003 1.1 veego 1, 1, 1, 1, 1, 1, 1, 1,
1004 1.1 veego 0, 0, 0, 0, 0, 0, 0, 0
1005 1.1 veego };
1006 1.1 veego
1007 1.1 veego static u_int et_clockfreqs[ET_NUMCLOCKS] = {
1008 1.3 veego 6293750, 7080500, 7875000, 8125000,
1009 1.3 veego 9000000, 9375000, 10000000, 11225000,
1010 1.3 veego 12587500, 14161000, 15750000, 16250000,
1011 1.3 veego 18000000, 18750000, 20000000, 22450000,
1012 1.3 veego 25175000, 28322000, 31500000, 32500000,
1013 1.3 veego 36000000, 37500000, 40000000, 44900000,
1014 1.3 veego 50350000, 56644000, 63000000, 65000000,
1015 1.3 veego 72000000, 75000000, 80000000, 89800000
1016 1.1 veego };
1017 1.1 veego
1018 1.1 veego
1019 1.1 veego static void
1020 1.1 veego et_CompFQ(fq, num, denom)
1021 1.1 veego u_int fq;
1022 1.1 veego u_char *num;
1023 1.1 veego u_char *denom;
1024 1.1 veego {
1025 1.1 veego int i;
1026 1.1 veego
1027 1.1 veego for (i=0; i < ET_NUMCLOCKS;) {
1028 1.1 veego if (fq <= et_clockfreqs[i++]) {
1029 1.1 veego break;
1030 1.1 veego }
1031 1.3 veego }
1032 1.1 veego
1033 1.1 veego *num = et_clocks[--i];
1034 1.1 veego *denom = et_clockdividers[i];
1035 1.1 veego
1036 1.1 veego return;
1037 1.1 veego }
1038 1.1 veego
1039 1.1 veego
1040 1.1 veego int
1041 1.1 veego et_mondefok(gv)
1042 1.1 veego struct grfvideo_mode *gv;
1043 1.1 veego {
1044 1.9 veego unsigned long maxpix;
1045 1.3 veego
1046 1.1 veego if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
1047 1.3 veego if (gv->mode_num != 255 || gv->depth != 4)
1048 1.3 veego return(0);
1049 1.1 veego
1050 1.1 veego switch (gv->depth) {
1051 1.1 veego case 4:
1052 1.3 veego if (gv->mode_num != 255)
1053 1.3 veego return(0);
1054 1.1 veego case 1:
1055 1.1 veego case 8:
1056 1.9 veego maxpix = 85000000;
1057 1.9 veego break;
1058 1.1 veego case 15:
1059 1.1 veego case 16:
1060 1.9 veego maxpix = 45000000;
1061 1.9 veego break;
1062 1.1 veego case 24:
1063 1.9 veego maxpix = 28000000;
1064 1.9 veego break;
1065 1.9 veego case 32:
1066 1.9 veego maxpix = 21000000;
1067 1.9 veego break;
1068 1.1 veego default:
1069 1.10 veego printf("grfet: Illegal depth in mode %d\n",
1070 1.10 veego (int) gv->mode_num);
1071 1.1 veego return (0);
1072 1.1 veego }
1073 1.10 veego
1074 1.10 veego if (gv->pixel_clock > maxpix) {
1075 1.10 veego printf("grfet: Pixelclock too high in mode %d\n",
1076 1.10 veego (int) gv->mode_num);
1077 1.9 veego return (0);
1078 1.10 veego }
1079 1.10 veego
1080 1.10 veego if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) {
1081 1.10 veego printf("grfet: sync-on-green is not supported\n");
1082 1.10 veego return (0);
1083 1.10 veego }
1084 1.10 veego
1085 1.3 veego return (1);
1086 1.1 veego }
1087 1.1 veego
1088 1.1 veego
1089 1.1 veego int
1090 1.1 veego et_load_mon(gp, md)
1091 1.1 veego struct grf_softc *gp;
1092 1.1 veego struct grfettext_mode *md;
1093 1.1 veego {
1094 1.1 veego struct grfvideo_mode *gv;
1095 1.1 veego struct grfinfo *gi;
1096 1.1 veego volatile unsigned char *ba;
1097 1.1 veego unsigned char num0, denom0;
1098 1.1 veego unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
1099 1.1 veego VSE, VT;
1100 1.10 veego unsigned char hvsync_pulse, seq;
1101 1.10 veego char TEXT;
1102 1.9 veego int hmul;
1103 1.1 veego
1104 1.1 veego /* identity */
1105 1.1 veego gv = &md->gv;
1106 1.1 veego TEXT = (gv->depth == 4);
1107 1.1 veego
1108 1.1 veego if (!et_mondefok(gv)) {
1109 1.10 veego printf("grfet: Monitor definition not ok\n");
1110 1.1 veego return (0);
1111 1.1 veego }
1112 1.10 veego
1113 1.1 veego ba = gp->g_regkva;
1114 1.1 veego
1115 1.1 veego /* provide all needed information in grf device-independant locations */
1116 1.1 veego gp->g_data = (caddr_t) gv;
1117 1.1 veego gi = &gp->g_display;
1118 1.1 veego gi->gd_regaddr = (caddr_t) ztwopa(ba);
1119 1.1 veego gi->gd_regsize = 64 * 1024;
1120 1.1 veego gi->gd_fbaddr = (caddr_t) kvtop(gp->g_fbkva);
1121 1.1 veego gi->gd_fbsize = et_fbsize;
1122 1.1 veego gi->gd_colors = 1 << gv->depth;
1123 1.1 veego gi->gd_planes = gv->depth;
1124 1.1 veego gi->gd_fbwidth = gv->disp_width;
1125 1.1 veego gi->gd_fbheight = gv->disp_height;
1126 1.1 veego gi->gd_fbx = 0;
1127 1.1 veego gi->gd_fby = 0;
1128 1.1 veego if (TEXT) {
1129 1.1 veego gi->gd_dwidth = md->fx * md->cols;
1130 1.1 veego gi->gd_dheight = md->fy * md->rows;
1131 1.1 veego } else {
1132 1.1 veego gi->gd_dwidth = gv->disp_width;
1133 1.1 veego gi->gd_dheight = gv->disp_height;
1134 1.1 veego }
1135 1.1 veego gi->gd_dx = 0;
1136 1.1 veego gi->gd_dy = 0;
1137 1.1 veego
1138 1.1 veego /* get display mode parameters */
1139 1.1 veego
1140 1.1 veego HBS = gv->hblank_start;
1141 1.1 veego HSS = gv->hsync_start;
1142 1.1 veego HSE = gv->hsync_stop;
1143 1.10 veego HBE = gv->htotal - 1;
1144 1.1 veego HT = gv->htotal;
1145 1.1 veego VBS = gv->vblank_start;
1146 1.1 veego VSS = gv->vsync_start;
1147 1.1 veego VSE = gv->vsync_stop;
1148 1.10 veego VBE = gv->vtotal - 1;
1149 1.1 veego VT = gv->vtotal;
1150 1.1 veego
1151 1.1 veego if (TEXT)
1152 1.1 veego HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
1153 1.1 veego else
1154 1.1 veego HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */
1155 1.1 veego VDE = gv->disp_height - 1;
1156 1.1 veego
1157 1.9 veego /* adjustments (crest) */
1158 1.9 veego switch (gv->depth) {
1159 1.9 veego case 15:
1160 1.10 veego case 16:
1161 1.10 veego hmul = 2;
1162 1.10 veego break;
1163 1.10 veego case 24:
1164 1.10 veego hmul = 3;
1165 1.10 veego break;
1166 1.10 veego case 32:
1167 1.10 veego hmul = 4;
1168 1.10 veego break;
1169 1.10 veego default:
1170 1.10 veego hmul = 1;
1171 1.10 veego break;
1172 1.9 veego }
1173 1.1 veego
1174 1.9 veego HDE *= hmul;
1175 1.9 veego HBS *= hmul;
1176 1.9 veego HSS *= hmul;
1177 1.9 veego HSE *= hmul;
1178 1.9 veego HBE *= hmul;
1179 1.9 veego HT *= hmul;
1180 1.9 veego
1181 1.10 veego if (gv->disp_flags & GRF_FLAGS_LACE) {
1182 1.10 veego VDE /= 2;
1183 1.10 veego VT = VT + 1;
1184 1.10 veego }
1185 1.10 veego
1186 1.10 veego if (gv->disp_flags & GRF_FLAGS_DBLSCAN) {
1187 1.10 veego VDE *= 2;
1188 1.10 veego VBS *= 2;
1189 1.9 veego VSS *= 2;
1190 1.9 veego VSE *= 2;
1191 1.9 veego VBE *= 2;
1192 1.10 veego VT *= 2;
1193 1.9 veego }
1194 1.9 veego
1195 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
1196 1.1 veego
1197 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1198 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
1199 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
1200 1.1 veego
1201 1.1 veego /* Set clock */
1202 1.9 veego et_CompFQ( gv->pixel_clock * hmul, &num0, &denom0);
1203 1.1 veego
1204 1.10 veego /* Horizontal/Vertical Sync Pulse */
1205 1.10 veego hvsync_pulse = 0xe3;
1206 1.10 veego if (gv->disp_flags & GRF_FLAGS_PHSYNC)
1207 1.10 veego hvsync_pulse &= ~0x40;
1208 1.10 veego else
1209 1.10 veego hvsync_pulse |= 0x40;
1210 1.10 veego if (gv->disp_flags & GRF_FLAGS_PVSYNC)
1211 1.10 veego hvsync_pulse &= ~0x80;
1212 1.10 veego else
1213 1.10 veego hvsync_pulse |= 0x80;
1214 1.10 veego
1215 1.10 veego vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse | ((num0 & 3) << 2));
1216 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, (num0 & 4) ? 0x0a : 0x08);
1217 1.10 veego seq = RSeq(ba, SEQ_ID_CLOCKING_MODE);
1218 1.1 veego switch(denom0) {
1219 1.1 veego case 0:
1220 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xb4);
1221 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1222 1.1 veego break;
1223 1.1 veego case 1:
1224 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
1225 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1226 1.1 veego break;
1227 1.1 veego case 2:
1228 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1229 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1230 1.1 veego break;
1231 1.1 veego case 3:
1232 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1233 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq | 0x08);
1234 1.1 veego break;
1235 1.9 veego }
1236 1.9 veego
1237 1.1 veego /* load display parameters into board */
1238 1.1 veego WCrt(ba, CRT_ID_HOR_TOTAL, HT);
1239 1.1 veego WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
1240 1.1 veego WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
1241 1.9 veego WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80);
1242 1.1 veego WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
1243 1.1 veego WCrt(ba, CRT_ID_END_HOR_RETR,
1244 1.1 veego (HSE & 0x1f) |
1245 1.1 veego ((HBE & 0x20) ? 0x80 : 0x00));
1246 1.1 veego WCrt(ba, CRT_ID_VER_TOTAL, VT);
1247 1.1 veego WCrt(ba, CRT_ID_OVERFLOW,
1248 1.1 veego 0x10 |
1249 1.1 veego ((VT & 0x100) ? 0x01 : 0x00) |
1250 1.1 veego ((VDE & 0x100) ? 0x02 : 0x00) |
1251 1.1 veego ((VSS & 0x100) ? 0x04 : 0x00) |
1252 1.1 veego ((VBS & 0x100) ? 0x08 : 0x00) |
1253 1.1 veego ((VT & 0x200) ? 0x20 : 0x00) |
1254 1.1 veego ((VDE & 0x200) ? 0x40 : 0x00) |
1255 1.1 veego ((VSS & 0x200) ? 0x80 : 0x00));
1256 1.1 veego
1257 1.1 veego WCrt(ba, CRT_ID_MAX_ROW_ADDRESS,
1258 1.9 veego 0x40 | /* splitscreen not visible */
1259 1.10 veego ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) |
1260 1.1 veego ((VBS & 0x200) ? 0x20 : 0x00) |
1261 1.1 veego (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
1262 1.1 veego
1263 1.1 veego WCrt(ba, CRT_ID_MODE_CONTROL,
1264 1.1 veego ((TEXT || (gv->depth == 1)) ? 0xc3 : 0xab));
1265 1.1 veego
1266 1.1 veego /* text cursor */
1267 1.1 veego if (TEXT) {
1268 1.1 veego #if ET_ULCURSOR
1269 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
1270 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
1271 1.1 veego #else
1272 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
1273 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
1274 1.1 veego #endif
1275 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
1276 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
1277 1.1 veego }
1278 1.1 veego
1279 1.1 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, ((md->fy - 1) & 0x1f)
1280 1.1 veego | ((TEXT || (gv->depth == 1)) ? 0x00 : 0x60));
1281 1.1 veego
1282 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
1283 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
1284 1.1 veego
1285 1.1 veego WCrt(ba, CRT_ID_START_VER_RETR, VSS);
1286 1.1 veego WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x30);
1287 1.1 veego WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
1288 1.1 veego WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
1289 1.1 veego WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
1290 1.1 veego
1291 1.1 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
1292 1.1 veego
1293 1.1 veego WCrt(ba, CRT_ID_OVERFLOW_HIGH,
1294 1.3 veego ((VBS & 0x400) ? 0x01 : 0x00) |
1295 1.3 veego ((VT & 0x400) ? 0x02 : 0x00) |
1296 1.3 veego ((VDE & 0x400) ? 0x04 : 0x00) |
1297 1.3 veego ((VSS & 0x400) ? 0x08 : 0x00) |
1298 1.3 veego 0x10 |
1299 1.10 veego ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x80 : 0x00));
1300 1.3 veego
1301 1.3 veego WCrt(ba, CRT_ID_HOR_OVERFLOW,
1302 1.3 veego ((HT & 0x100) ? 0x01 : 0x00) |
1303 1.3 veego ((HBS & 0x100) ? 0x04 : 0x00) |
1304 1.3 veego ((HSS & 0x100) ? 0x10 : 0x00)
1305 1.3 veego );
1306 1.1 veego
1307 1.1 veego /* depth dependent stuff */
1308 1.1 veego
1309 1.1 veego WGfx(ba, GCT_ID_GRAPHICS_MODE,
1310 1.1 veego ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
1311 1.1 veego WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
1312 1.1 veego
1313 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1314 1.1 veego vgar(ba, VDAC_MASK);
1315 1.1 veego vgar(ba, VDAC_MASK);
1316 1.1 veego vgar(ba, VDAC_MASK);
1317 1.1 veego vgar(ba, VDAC_MASK);
1318 1.1 veego switch (gv->depth) {
1319 1.1 veego case 1:
1320 1.1 veego case 4: /* text */
1321 1.1 veego switch(etdtype) {
1322 1.1 veego case SIERRA11483:
1323 1.1 veego case SIERRA15025:
1324 1.1 veego case MUSICDAC:
1325 1.1 veego vgaw(ba, VDAC_MASK, 0);
1326 1.1 veego break;
1327 1.9 veego case ATT20C491:
1328 1.9 veego vgaw(ba, VDAC_MASK, 0x02);
1329 1.9 veego break;
1330 1.1 veego case MERLINDAC:
1331 1.1 veego setMerlinDACmode(ba, 0);
1332 1.1 veego break;
1333 1.1 veego }
1334 1.1 veego HDE = gv->disp_width / 16;
1335 1.1 veego break;
1336 1.1 veego case 8:
1337 1.1 veego switch(etdtype) {
1338 1.1 veego case SIERRA11483:
1339 1.1 veego case SIERRA15025:
1340 1.1 veego case MUSICDAC:
1341 1.1 veego vgaw(ba, VDAC_MASK, 0);
1342 1.1 veego break;
1343 1.9 veego case ATT20C491:
1344 1.9 veego vgaw(ba, VDAC_MASK, 0x02);
1345 1.9 veego break;
1346 1.1 veego case MERLINDAC:
1347 1.1 veego setMerlinDACmode(ba, 0);
1348 1.1 veego break;
1349 1.1 veego }
1350 1.1 veego HDE = gv->disp_width / 8;
1351 1.1 veego break;
1352 1.1 veego case 15:
1353 1.1 veego switch(etdtype) {
1354 1.1 veego case SIERRA11483:
1355 1.1 veego case SIERRA15025:
1356 1.1 veego case MUSICDAC:
1357 1.9 veego case ATT20C491:
1358 1.1 veego vgaw(ba, VDAC_MASK, 0xa0);
1359 1.1 veego break;
1360 1.1 veego case MERLINDAC:
1361 1.1 veego setMerlinDACmode(ba, 0xa0);
1362 1.1 veego break;
1363 1.1 veego }
1364 1.1 veego HDE = gv->disp_width / 4;
1365 1.1 veego break;
1366 1.1 veego case 16:
1367 1.1 veego switch(etdtype) {
1368 1.1 veego case SIERRA11483:
1369 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1370 1.1 veego break;
1371 1.1 veego case SIERRA15025:
1372 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1373 1.1 veego break;
1374 1.1 veego case MUSICDAC:
1375 1.9 veego case ATT20C491:
1376 1.1 veego vgaw(ba, VDAC_MASK, 0xc0);
1377 1.1 veego break;
1378 1.1 veego case MERLINDAC:
1379 1.1 veego setMerlinDACmode(ba, 0xe0);
1380 1.1 veego break;
1381 1.1 veego }
1382 1.1 veego HDE = gv->disp_width / 4;
1383 1.1 veego break;
1384 1.1 veego case 24:
1385 1.1 veego switch(etdtype) {
1386 1.1 veego case SIERRA11483:
1387 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1388 1.1 veego break;
1389 1.1 veego case SIERRA15025:
1390 1.1 veego vgaw(ba, VDAC_MASK, 0xe1);
1391 1.1 veego break;
1392 1.1 veego case MUSICDAC:
1393 1.9 veego case ATT20C491:
1394 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1395 1.1 veego break;
1396 1.1 veego case MERLINDAC:
1397 1.1 veego setMerlinDACmode(ba, 0xf0);
1398 1.1 veego break;
1399 1.1 veego }
1400 1.1 veego HDE = (gv->disp_width / 8) * 3;
1401 1.1 veego break;
1402 1.1 veego case 32:
1403 1.1 veego switch(etdtype) {
1404 1.1 veego case SIERRA11483:
1405 1.1 veego case MUSICDAC:
1406 1.9 veego case ATT20C491:
1407 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1408 1.1 veego break;
1409 1.1 veego case SIERRA15025:
1410 1.1 veego vgaw(ba, VDAC_MASK, 0x61);
1411 1.1 veego break;
1412 1.1 veego case MERLINDAC:
1413 1.1 veego setMerlinDACmode(ba, 0xb0);
1414 1.1 veego break;
1415 1.1 veego }
1416 1.1 veego HDE = gv->disp_width / 2;
1417 1.1 veego break;
1418 1.1 veego }
1419 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
1420 1.1 veego WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
1421 1.1 veego (gv->depth == 1) ? 0x01 : 0x0f);
1422 1.1 veego
1423 1.1 veego WCrt(ba, CRT_ID_OFFSET, HDE);
1424 1.9 veego vgaw(ba, CRT_ADDRESS, CRT_ID_HOR_OVERFLOW);
1425 1.9 veego vgaw(ba, CRT_ADDRESS_W,
1426 1.9 veego (vgar(ba, CRT_ADDRESS_R) & 0x7f)
1427 1.9 veego | ((HDE & 0x100) ? 0x80: 0x00));
1428 1.1 veego
1429 1.1 veego /* text initialization */
1430 1.1 veego if (TEXT) {
1431 1.1 veego et_inittextmode(gp);
1432 1.1 veego }
1433 1.1 veego
1434 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
1435 1.1 veego
1436 1.1 veego /* Pass-through */
1437 1.1 veego RegOffpass(ba);
1438 1.1 veego
1439 1.1 veego return (1);
1440 1.1 veego }
1441 1.1 veego
1442 1.1 veego
1443 1.1 veego void
1444 1.1 veego et_inittextmode(gp)
1445 1.1 veego struct grf_softc *gp;
1446 1.1 veego {
1447 1.1 veego struct grfettext_mode *tm = (struct grfettext_mode *) gp->g_data;
1448 1.1 veego volatile unsigned char *ba = gp->g_regkva;
1449 1.1 veego unsigned char *fb = gp->g_fbkva;
1450 1.1 veego unsigned char *c, *f, y;
1451 1.1 veego unsigned short z;
1452 1.1 veego
1453 1.1 veego
1454 1.3 veego /*
1455 1.3 veego * load text font into beginning of display memory. Each character
1456 1.3 veego * cell is 32 bytes long (enough for 4 planes)
1457 1.3 veego */
1458 1.1 veego
1459 1.1 veego SetTextPlane(ba, 0x02);
1460 1.1 veego et_memset(fb, 0, 256 * 32);
1461 1.1 veego c = (unsigned char *) (fb) + (32 * tm->fdstart);
1462 1.1 veego f = tm->fdata;
1463 1.1 veego for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
1464 1.1 veego for (y = 0; y < tm->fy; y++)
1465 1.1 veego *c++ = *f++;
1466 1.1 veego
1467 1.1 veego /* clear out text/attr planes (three screens worth) */
1468 1.1 veego
1469 1.1 veego SetTextPlane(ba, 0x01);
1470 1.1 veego et_memset(fb, 0x07, tm->cols * tm->rows * 3);
1471 1.1 veego SetTextPlane(ba, 0x00);
1472 1.1 veego et_memset(fb, 0x20, tm->cols * tm->rows * 3);
1473 1.1 veego
1474 1.1 veego /* print out a little init msg */
1475 1.1 veego
1476 1.1 veego c = (unsigned char *) (fb) + (tm->cols - 16);
1477 1.1 veego strcpy(c, "TSENG");
1478 1.9 veego c[5] = 0x20;
1479 1.1 veego
1480 1.1 veego /* set colors (B&W) */
1481 1.1 veego
1482 1.1 veego switch(ettype) {
1483 1.1 veego case MERLIN:
1484 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
1485 1.1 veego for (z = 0; z < 256; z++) {
1486 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1487 1.9 veego
1488 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][0]);
1489 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][1]);
1490 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][2]);
1491 1.1 veego }
1492 1.1 veego break;
1493 1.1 veego default:
1494 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
1495 1.1 veego for (z = 0; z < 256; z++) {
1496 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1497 1.9 veego
1498 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1499 1.3 veego etconscolors[y][0] >> etcmap_shift);
1500 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1501 1.3 veego etconscolors[y][1] >> etcmap_shift);
1502 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1503 1.3 veego etconscolors[y][2] >> etcmap_shift);
1504 1.1 veego }
1505 1.1 veego break;
1506 1.1 veego }
1507 1.1 veego }
1508 1.1 veego
1509 1.1 veego
1510 1.1 veego void
1511 1.1 veego et_memset(d, c, l)
1512 1.1 veego unsigned char *d;
1513 1.1 veego unsigned char c;
1514 1.1 veego int l;
1515 1.1 veego {
1516 1.1 veego for (; l > 0; l--)
1517 1.1 veego *d++ = c;
1518 1.1 veego }
1519 1.1 veego
1520 1.1 veego
1521 1.1 veego static int
1522 1.1 veego et_getControllerType(gp)
1523 1.1 veego struct grf_softc * gp;
1524 1.1 veego {
1525 1.1 veego unsigned char *ba = gp->g_regkva; /* register base */
1526 1.1 veego unsigned char *mem = gp->g_fbkva; /* memory base */
1527 1.1 veego unsigned char *mmu = mem + MMU_APERTURE0; /* MMU aperture 0 base */
1528 1.1 veego
1529 1.1 veego *mem = 0;
1530 1.1 veego
1531 1.1 veego /* make ACL visible */
1532 1.10 veego if (ettype == MERLIN) {
1533 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xbb);
1534 1.10 veego } else {
1535 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xfb);
1536 1.9 veego }
1537 1.9 veego
1538 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x01);
1539 1.1 veego
1540 1.1 veego *((unsigned long *)mmu) = 0;
1541 1.1 veego *(mem + 0x13) = 0x38;
1542 1.3 veego
1543 1.1 veego *mmu = 0xff;
1544 1.1 veego
1545 1.1 veego /* hide ACL */
1546 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x00);
1547 1.3 veego
1548 1.10 veego if (ettype == MERLIN) {
1549 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0x93);
1550 1.10 veego } else {
1551 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
1552 1.9 veego }
1553 1.10 veego return ((*mem == 0xff) ? ETW32 : ET4000);
1554 1.1 veego }
1555 1.1 veego
1556 1.1 veego
1557 1.1 veego static int
1558 1.1 veego et_getDACType(gp)
1559 1.1 veego struct grf_softc * gp;
1560 1.1 veego {
1561 1.1 veego unsigned char *ba = gp->g_regkva;
1562 1.1 veego union {
1563 1.1 veego int tt;
1564 1.1 veego char cc[4];
1565 1.1 veego } check;
1566 1.1 veego
1567 1.1 veego /* check for Sierra SC 15025 */
1568 1.1 veego
1569 1.3 veego /* We MUST do 4 HW reads to switch into command mode */
1570 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1571 1.3 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1572 1.3 veego
1573 1.3 veego vgaw(ba, VDAC_XINDEX, 9);
1574 1.3 veego check.cc[0] = vgar(ba, VDAC_XDATA);
1575 1.3 veego vgaw(ba, VDAC_XINDEX, 10);
1576 1.3 veego check.cc[1] = vgar(ba, VDAC_XDATA);
1577 1.3 veego vgaw(ba, VDAC_XINDEX, 11);
1578 1.3 veego check.cc[2] = vgar(ba, VDAC_XDATA);
1579 1.3 veego vgaw(ba, VDAC_XINDEX, 12);
1580 1.3 veego check.cc[3] = vgar(ba, VDAC_XDATA);
1581 1.3 veego
1582 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1583 1.3 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1584 1.3 veego
1585 1.3 veego if (check.tt == 0x533ab141) {
1586 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1587 1.3 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1588 1.3 veego
1589 1.3 veego /* switch to 8 bits per color */
1590 1.3 veego vgaw(ba, VDAC_XINDEX, 8);
1591 1.3 veego vgaw(ba, VDAC_XDATA, 1);
1592 1.3 veego /* do not shift color values */
1593 1.3 veego etcmap_shift = 0;
1594 1.3 veego
1595 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1596 1.3 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1597 1.3 veego
1598 1.3 veego vgaw(ba, VDAC_MASK, 0xff);
1599 1.3 veego return (SIERRA15025);
1600 1.3 veego }
1601 1.3 veego
1602 1.3 veego /* check for MUSIC DAC */
1603 1.3 veego
1604 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1605 1.3 veego vgaw(ba, VDAC_COMMAND, 0x02); /* set some strange MUSIC mode (???) */
1606 1.3 veego
1607 1.3 veego vgaw(ba, VDAC_XINDEX, 0x01);
1608 1.3 veego if (vgar(ba, VDAC_XDATA) == 0x01) {
1609 1.3 veego /* shift color values by 2 */
1610 1.3 veego etcmap_shift = 2;
1611 1.1 veego
1612 1.3 veego vgaw(ba, VDAC_MASK, 0xff);
1613 1.3 veego return (MUSICDAC);
1614 1.9 veego }
1615 1.9 veego
1616 1.9 veego /* check for AT&T ATT20c491 DAC (crest) */
1617 1.9 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1618 1.9 veego vgaw(ba, HDR, 0xff);
1619 1.9 veego vgaw(ba, VDAC_MASK, 0x01);
1620 1.9 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1621 1.9 veego if (vgar(ba, HDR) == 0xff) {
1622 1.9 veego /* do not shift color values */
1623 1.9 veego etcmap_shift = 0;
1624 1.9 veego
1625 1.9 veego vgaw(ba, VDAC_MASK, 0xff);
1626 1.9 veego return (ATT20C491);
1627 1.9 veego }
1628 1.9 veego
1629 1.9 veego /* restore PowerUp settings (crest) */
1630 1.9 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1631 1.9 veego vgaw(ba, HDR, 0x00);
1632 1.3 veego
1633 1.3 veego /*
1634 1.3 veego * nothing else found, so let us pretend it is a stupid
1635 1.3 veego * Sierra SC 11483
1636 1.3 veego */
1637 1.1 veego
1638 1.1 veego /* shift color values by 2 */
1639 1.1 veego etcmap_shift = 2;
1640 1.3 veego
1641 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1642 1.9 veego return (SIERRA11483);
1643 1.1 veego }
1644 1.1 veego
1645 1.1 veego #endif /* NGRFET */
1646