grf_et.c revision 1.18 1 1.18 thorpej /* $NetBSD: grf_et.c,v 1.18 2002/10/02 04:55:50 thorpej Exp $ */
2 1.1 veego
3 1.1 veego /*
4 1.9 veego * Copyright (c) 1997 Klaus Burkert
5 1.1 veego * Copyright (c) 1996 Tobias Abt
6 1.1 veego * Copyright (c) 1995 Ezra Story
7 1.1 veego * Copyright (c) 1995 Kari Mettinen
8 1.1 veego * Copyright (c) 1994 Markus Wild
9 1.1 veego * Copyright (c) 1994 Lutz Vieweg
10 1.1 veego * All rights reserved.
11 1.1 veego *
12 1.1 veego * Redistribution and use in source and binary forms, with or without
13 1.1 veego * modification, are permitted provided that the following conditions
14 1.1 veego * are met:
15 1.1 veego * 1. Redistributions of source code must retain the above copyright
16 1.1 veego * notice, this list of conditions and the following disclaimer.
17 1.1 veego * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 veego * notice, this list of conditions and the following disclaimer in the
19 1.1 veego * documentation and/or other materials provided with the distribution.
20 1.1 veego * 3. All advertising materials mentioning features or use of this software
21 1.1 veego * must display the following acknowledgement:
22 1.1 veego * This product includes software developed by Lutz Vieweg.
23 1.1 veego * 4. The name of the author may not be used to endorse or promote products
24 1.1 veego * derived from this software without specific prior written permission
25 1.1 veego *
26 1.1 veego * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 1.1 veego * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28 1.1 veego * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 1.1 veego * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30 1.1 veego * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 1.1 veego * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 1.1 veego * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 1.1 veego * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 1.1 veego * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 1.1 veego * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 1.1 veego */
37 1.12 is #include "opt_amigacons.h"
38 1.14 aymeric
39 1.14 aymeric #include <sys/cdefs.h>
40 1.18 thorpej __KERNEL_RCSID(0, "$NetBSD: grf_et.c,v 1.18 2002/10/02 04:55:50 thorpej Exp $");
41 1.14 aymeric
42 1.1 veego #include "grfet.h"
43 1.1 veego #if NGRFET > 0
44 1.1 veego
45 1.1 veego /*
46 1.1 veego * Graphics routines for Tseng ET4000 (&W32) boards,
47 1.1 veego *
48 1.1 veego * This code offers low-level routines to access Tseng ET4000
49 1.1 veego * graphics-boards from within NetBSD for the Amiga.
50 1.1 veego * No warranties for any kind of function at all - this
51 1.1 veego * code may crash your hardware and scratch your harddisk. Use at your
52 1.1 veego * own risk. Freely distributable.
53 1.1 veego *
54 1.1 veego * Modified for Tseng ET4000 from
55 1.1 veego * Kari Mettinen's Cirrus driver by Tobias Abt
56 1.1 veego *
57 1.9 veego * Fixed Merlin in Z-III, fixed LACE and DBLSCAN, added Domino16M proto
58 1.13 aymeric * and AT&T ATT20c491 DAC, added memory-size detection by Klaus Burkert.
59 1.13 aymeric *
60 1.1 veego *
61 1.1 veego * TODO:
62 1.1 veego *
63 1.1 veego */
64 1.1 veego
65 1.1 veego #include <sys/param.h>
66 1.1 veego #include <sys/systm.h>
67 1.1 veego #include <sys/errno.h>
68 1.1 veego #include <sys/ioctl.h>
69 1.1 veego #include <sys/device.h>
70 1.1 veego #include <sys/malloc.h>
71 1.1 veego
72 1.1 veego #include <machine/cpu.h>
73 1.1 veego #include <dev/cons.h>
74 1.1 veego #ifdef TSENGCONSOLE
75 1.1 veego #include <amiga/dev/itevar.h>
76 1.1 veego #endif
77 1.1 veego #include <amiga/amiga/device.h>
78 1.1 veego #include <amiga/dev/grfioctl.h>
79 1.1 veego #include <amiga/dev/grfvar.h>
80 1.1 veego #include <amiga/dev/grf_etreg.h>
81 1.1 veego #include <amiga/dev/zbusvar.h>
82 1.1 veego
83 1.13 aymeric int et_mondefok(struct grfvideo_mode *gv);
84 1.13 aymeric void et_boardinit(struct grf_softc *gp);
85 1.13 aymeric static void et_CompFQ(u_int fq, u_char *num, u_char *denom);
86 1.13 aymeric int et_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm);
87 1.13 aymeric int et_setvmode(struct grf_softc *gp, unsigned int mode);
88 1.13 aymeric int et_toggle(struct grf_softc *gp, unsigned short);
89 1.13 aymeric int et_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap);
90 1.13 aymeric int et_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap);
91 1.1 veego #ifndef TSENGCONSOLE
92 1.13 aymeric void et_off(struct grf_softc *gp);
93 1.1 veego #endif
94 1.13 aymeric void et_inittextmode(struct grf_softc *gp);
95 1.13 aymeric int et_ioctl(register struct grf_softc *gp, u_long cmd, void *data);
96 1.13 aymeric int et_getmousepos(struct grf_softc *gp, struct grf_position *data);
97 1.13 aymeric void et_writesprpos(volatile char *ba, short x, short y);
98 1.13 aymeric int et_setmousepos(struct grf_softc *gp, struct grf_position *data);
99 1.13 aymeric static int et_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data);
100 1.13 aymeric int et_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data);
101 1.13 aymeric static int et_getspritemax(struct grf_softc *gp, struct grf_position *data);
102 1.13 aymeric int et_setmonitor(struct grf_softc *gp, struct grfvideo_mode *gv);
103 1.13 aymeric int et_blank(struct grf_softc *gp, int *on);
104 1.13 aymeric static int et_getControllerType(struct grf_softc *gp);
105 1.13 aymeric static int et_getDACType(struct grf_softc *gp);
106 1.13 aymeric
107 1.13 aymeric int grfetmatch(struct device *, struct cfdata *, void *);
108 1.13 aymeric void grfetattach(struct device *, struct device *, void *);
109 1.13 aymeric int grfetprint(void *, const char *);
110 1.13 aymeric void et_memset(unsigned char *d, unsigned char c, int l);
111 1.1 veego
112 1.3 veego /*
113 1.3 veego * Graphics display definitions.
114 1.1 veego * These are filled by 'grfconfig' using GRFIOCSETMON.
115 1.1 veego */
116 1.10 veego #define monitor_def_max 24
117 1.10 veego static struct grfvideo_mode monitor_def[24] = {
118 1.10 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
119 1.10 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0},
120 1.1 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
121 1.1 veego };
122 1.1 veego static struct grfvideo_mode *monitor_current = &monitor_def[0];
123 1.1 veego
124 1.1 veego /* Console display definition.
125 1.1 veego * Default hardcoded text mode. This grf_et is set up to
126 1.1 veego * use one text mode only, and this is it. You may use
127 1.1 veego * grfconfig to change the mode after boot.
128 1.1 veego */
129 1.1 veego /* Console font */
130 1.1 veego #ifdef KFONT_8X11
131 1.1 veego #define TSENGFONT kernel_font_8x11
132 1.1 veego #define TSENGFONTY 11
133 1.1 veego #else
134 1.1 veego #define TSENGFONT kernel_font_8x8
135 1.1 veego #define TSENGFONTY 8
136 1.1 veego #endif
137 1.1 veego extern unsigned char TSENGFONT[];
138 1.1 veego
139 1.1 veego struct grfettext_mode etconsole_mode = {
140 1.10 veego {255, "", 25000000, 640, 480, 4, 640/8, 680/8, 768/8, 800/8,
141 1.10 veego 481, 491, 493, 525, 0},
142 1.1 veego 8, TSENGFONTY, 640 / 8, 480 / TSENGFONTY, TSENGFONT, 32, 255
143 1.1 veego };
144 1.1 veego
145 1.1 veego /* Console colors */
146 1.1 veego unsigned char etconscolors[3][3] = { /* background, foreground, hilite */
147 1.1 veego {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
148 1.1 veego };
149 1.1 veego
150 1.1 veego int ettype = 0; /* oMniBus, Domino or Merlin */
151 1.1 veego int etctype = 0; /* ET4000 or ETW32 */
152 1.1 veego int etdtype = 0; /* Type of DAC (see grf_etregs.h) */
153 1.1 veego
154 1.1 veego char etcmap_shift = 0; /* 6 or 8 bit cmap entries */
155 1.1 veego unsigned char pass_toggle; /* passthru status tracker */
156 1.1 veego
157 1.1 veego unsigned char Merlin_switch = 0;
158 1.1 veego
159 1.3 veego /*
160 1.3 veego * Because all Tseng-boards have 2 configdev entries, one for
161 1.1 veego * framebuffer mem and the other for regs, we have to hold onto
162 1.1 veego * the pointers globally until we match on both. This and 'ettype'
163 1.1 veego * are the primary obsticles to multiple board support, but if you
164 1.1 veego * have multiple boards you have bigger problems than grf_et.
165 1.1 veego */
166 1.1 veego static void *et_fbaddr = 0; /* framebuffer */
167 1.1 veego static void *et_regaddr = 0; /* registers */
168 1.1 veego static int et_fbsize; /* framebuffer size */
169 1.1 veego
170 1.1 veego /* current sprite info, if you add support for multiple boards
171 1.1 veego * make this an array or something
172 1.1 veego */
173 1.1 veego struct grf_spriteinfo et_cursprite;
174 1.1 veego
175 1.1 veego /* sprite bitmaps in kernel stack, you'll need to arrayize these too if
176 1.1 veego * you add multiple board support
177 1.1 veego */
178 1.1 veego static unsigned char et_imageptr[8 * 64], et_maskptr[8 * 64];
179 1.1 veego static unsigned char et_sprred[2], et_sprgreen[2], et_sprblue[2];
180 1.1 veego
181 1.1 veego /* standard driver stuff */
182 1.18 thorpej CFATTACH_DECL(grfet, sizeof(struct grf_softc),
183 1.18 thorpej grfetmatch, grfetattach, NULL, NULL);
184 1.3 veego
185 1.1 veego static struct cfdata *cfdata;
186 1.1 veego
187 1.1 veego int
188 1.13 aymeric grfetmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
189 1.1 veego {
190 1.1 veego struct zbus_args *zap;
191 1.9 veego static int regprod, regprod2 = 0, fbprod;
192 1.1 veego
193 1.1 veego zap = auxp;
194 1.1 veego
195 1.1 veego #ifndef TSENGCONSOLE
196 1.1 veego if (amiga_realconfig == 0)
197 1.1 veego return (0);
198 1.1 veego #endif
199 1.1 veego
200 1.1 veego /* Grab the first board we encounter as the preferred one. This will
201 1.1 veego * allow one board to work in a multiple Tseng board system, but not
202 1.1 veego * multiple boards at the same time. */
203 1.1 veego if (ettype == 0) {
204 1.1 veego switch (zap->manid) {
205 1.1 veego case OMNIBUS:
206 1.1 veego if (zap->prodid != 0)
207 1.1 veego return (0);
208 1.1 veego regprod = 0;
209 1.1 veego fbprod = 0;
210 1.1 veego break;
211 1.1 veego case DOMINO:
212 1.9 veego /* 2167/3 is Domino16M proto (crest) */
213 1.9 veego if (zap->prodid != 3 && zap->prodid != 2 && zap->prodid != 1)
214 1.1 veego return (0);
215 1.1 veego regprod = 2;
216 1.9 veego regprod2 = 3;
217 1.1 veego fbprod = 1;
218 1.1 veego break;
219 1.1 veego case MERLIN:
220 1.1 veego if (zap->prodid != 3 && zap->prodid != 4)
221 1.1 veego return (0);
222 1.1 veego regprod = 4;
223 1.1 veego fbprod = 3;
224 1.1 veego break;
225 1.1 veego default:
226 1.1 veego return (0);
227 1.1 veego }
228 1.1 veego ettype = zap->manid;
229 1.1 veego } else {
230 1.1 veego if (ettype != zap->manid) {
231 1.1 veego return (0);
232 1.1 veego }
233 1.1 veego }
234 1.1 veego
235 1.1 veego /* Configure either registers or framebuffer in any order */
236 1.1 veego /* as said before, oMniBus does not support ProdID */
237 1.1 veego if (ettype == OMNIBUS) {
238 1.1 veego if (zap->size == 64 * 1024) {
239 1.1 veego /* register area */
240 1.1 veego et_regaddr = zap->va;
241 1.1 veego } else {
242 1.1 veego /* memory area */
243 1.1 veego et_fbaddr = zap->va;
244 1.1 veego et_fbsize = zap->size;
245 1.1 veego }
246 1.1 veego } else {
247 1.9 veego if (zap->prodid == regprod || zap->prodid == regprod2) {
248 1.1 veego et_regaddr = zap->va;
249 1.1 veego } else {
250 1.1 veego if (zap->prodid == fbprod) {
251 1.1 veego et_fbaddr = zap->va;
252 1.1 veego et_fbsize = zap->size;
253 1.1 veego } else {
254 1.1 veego return (0);
255 1.1 veego }
256 1.1 veego }
257 1.1 veego }
258 1.1 veego
259 1.1 veego #ifdef TSENGCONSOLE
260 1.1 veego if (amiga_realconfig == 0) {
261 1.1 veego cfdata = cfp;
262 1.1 veego }
263 1.1 veego #endif
264 1.1 veego
265 1.1 veego return (1);
266 1.1 veego }
267 1.1 veego
268 1.1 veego
269 1.1 veego void
270 1.13 aymeric grfetattach(struct device *pdp, struct device *dp, void *auxp)
271 1.1 veego {
272 1.1 veego static struct grf_softc congrf;
273 1.1 veego struct zbus_args *zap;
274 1.1 veego struct grf_softc *gp;
275 1.1 veego static char attachflag = 0;
276 1.1 veego
277 1.1 veego zap = auxp;
278 1.1 veego
279 1.7 christos printf("\n");
280 1.1 veego
281 1.1 veego /* make sure both halves have matched */
282 1.1 veego if (!et_regaddr || !et_fbaddr)
283 1.1 veego return;
284 1.1 veego
285 1.1 veego /* do all that messy console/grf stuff */
286 1.1 veego if (dp == NULL)
287 1.1 veego gp = &congrf;
288 1.1 veego else
289 1.1 veego gp = (struct grf_softc *) dp;
290 1.1 veego
291 1.1 veego if (dp != NULL && congrf.g_regkva != 0) {
292 1.1 veego /*
293 1.1 veego * inited earlier, just copy (not device struct)
294 1.1 veego */
295 1.1 veego bcopy(&congrf.g_display, &gp->g_display,
296 1.1 veego (char *) &gp[1] - (char *) &gp->g_display);
297 1.1 veego } else {
298 1.1 veego gp->g_regkva = (volatile caddr_t) et_regaddr;
299 1.1 veego gp->g_fbkva = (volatile caddr_t) et_fbaddr;
300 1.1 veego
301 1.1 veego gp->g_unit = GRF_ET4000_UNIT;
302 1.1 veego gp->g_mode = et_mode;
303 1.1 veego gp->g_conpri = grfet_cnprobe();
304 1.1 veego gp->g_flags = GF_ALIVE;
305 1.1 veego
306 1.1 veego /* wakeup the board */
307 1.1 veego et_boardinit(gp);
308 1.1 veego
309 1.1 veego #ifdef TSENGCONSOLE
310 1.1 veego grfet_iteinit(gp);
311 1.1 veego (void) et_load_mon(gp, &etconsole_mode);
312 1.1 veego #endif
313 1.1 veego }
314 1.1 veego
315 1.1 veego /*
316 1.1 veego * attach grf (once)
317 1.1 veego */
318 1.1 veego if (amiga_config_found(cfdata, &gp->g_device, gp, grfetprint)) {
319 1.1 veego attachflag = 1;
320 1.7 christos printf("grfet: %dMB ", et_fbsize / 0x100000);
321 1.1 veego switch (ettype) {
322 1.1 veego case OMNIBUS:
323 1.7 christos printf("oMniBus");
324 1.1 veego break;
325 1.1 veego case DOMINO:
326 1.7 christos printf("Domino");
327 1.1 veego break;
328 1.1 veego case MERLIN:
329 1.7 christos printf("Merlin");
330 1.1 veego break;
331 1.1 veego }
332 1.7 christos printf(" with ");
333 1.1 veego switch (etctype) {
334 1.1 veego case ET4000:
335 1.7 christos printf("Tseng ET4000");
336 1.1 veego break;
337 1.1 veego case ETW32:
338 1.7 christos printf("Tseng ETW32");
339 1.1 veego break;
340 1.1 veego }
341 1.7 christos printf(" and ");
342 1.1 veego switch (etdtype) {
343 1.1 veego case SIERRA11483:
344 1.7 christos printf("Sierra SC11483 DAC");
345 1.1 veego break;
346 1.1 veego case SIERRA15025:
347 1.7 christos printf("Sierra SC15025 DAC");
348 1.1 veego break;
349 1.1 veego case MUSICDAC:
350 1.7 christos printf("MUSIC DAC");
351 1.1 veego break;
352 1.1 veego case MERLINDAC:
353 1.9 veego printf("BrookTree Bt482 DAC");
354 1.9 veego break;
355 1.9 veego case ATT20C491:
356 1.9 veego printf("AT&T ATT20c491 DAC");
357 1.1 veego break;
358 1.1 veego }
359 1.7 christos printf(" being used\n");
360 1.1 veego } else {
361 1.1 veego if (!attachflag)
362 1.7 christos printf("grfet unattached!!\n");
363 1.1 veego }
364 1.1 veego }
365 1.1 veego
366 1.1 veego
367 1.1 veego int
368 1.13 aymeric grfetprint(void *auxp, const char *pnp)
369 1.1 veego {
370 1.1 veego if (pnp)
371 1.7 christos printf("ite at %s: ", pnp);
372 1.1 veego return (UNCONF);
373 1.1 veego }
374 1.1 veego
375 1.1 veego
376 1.1 veego void
377 1.13 aymeric et_boardinit(struct grf_softc *gp)
378 1.1 veego {
379 1.1 veego unsigned char *ba = gp->g_regkva;
380 1.1 veego int x;
381 1.1 veego
382 1.1 veego /* wakeup board and flip passthru OFF */
383 1.1 veego
384 1.1 veego RegWakeup(ba);
385 1.1 veego RegOnpass(ba);
386 1.1 veego
387 1.1 veego if (ettype == MERLIN) {
388 1.3 veego /* Merlin needs some special initialisations */
389 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
390 1.3 veego delay(20000);
391 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 8);
392 1.3 veego delay(20000);
393 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
394 1.3 veego delay(20000);
395 1.3 veego vgaw(ba, MERLIN_VDAC_DATA, 1);
396 1.3 veego
397 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x00);
398 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0xff);
399 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x01);
400 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x0f);
401 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x02);
402 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x42);
403 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x03);
404 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x00);
405 1.1 veego
406 1.3 veego vgaw(ba, MERLIN_VDAC_DATA, 0);
407 1.1 veego }
408 1.1 veego
409 1.13 aymeric
410 1.1 veego /* setup initial unchanging parameters */
411 1.1 veego
412 1.3 veego vgaw(ba, GREG_HERCULESCOMPAT + ((ettype == DOMINO) ? 0x0fff : 0), 0x03);
413 1.1 veego vgaw(ba, GREG_DISPMODECONTROL, 0xa0);
414 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0x63);
415 1.1 veego
416 1.3 veego if (ettype == DOMINO)
417 1.3 veego {
418 1.3 veego vgaw(ba, CRT_ADDRESS, CRT_ID_VIDEO_CONFIG1);
419 1.3 veego vgaw(ba, CRT_ADDRESS_W + 0x0fff,
420 1.3 veego 0xc0 | vgar(ba, CRT_ADDRESS_R + 0x0fff));
421 1.3 veego }
422 1.3 veego
423 1.1 veego WSeq(ba, SEQ_ID_RESET, 0x03);
424 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot, Display off */
425 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
426 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
427 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e);
428 1.9 veego WSeq(ba, SEQ_ID_STATE_CONTROL, 0x00);
429 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
430 1.1 veego
431 1.1 veego WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
432 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
433 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, 0x08);
434 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
435 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
436 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
437 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
438 1.1 veego
439 1.9 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x67);
440 1.9 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xc3);
441 1.9 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
442 1.9 veego
443 1.9 veego /* ET4000 special */
444 1.1 veego WCrt(ba, CRT_ID_RASCAS_CONFIG, 0x28);
445 1.9 veego WCrt(ba, CRT_ID_EXT_START, 0x00);
446 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, 0x08);
447 1.9 veego
448 1.9 veego /* ET4000/W32 special (currently only for Merlin (crest) */
449 1.9 veego if (ettype == MERLIN) {
450 1.9 veego WCrt(ba, CRT_ID_SEGMENT_COMP, 0x1c);
451 1.9 veego WCrt(ba, CRT_ID_GENERAL_PURPOSE, 0x00);
452 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0x93);
453 1.9 veego }
454 1.9 veego else {
455 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
456 1.3 veego }
457 1.3 veego
458 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x0f);
459 1.1 veego WCrt(ba, CRT_ID_HOR_OVERFLOW, 0x00);
460 1.1 veego
461 1.9 veego vgaw(ba, GREG_SEGMENTSELECT, 0x00);
462 1.9 veego
463 1.1 veego WGfx(ba, GCT_ID_SET_RESET, 0x00);
464 1.1 veego WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
465 1.1 veego WGfx(ba, GCT_ID_COLOR_COMPARE, 0x00);
466 1.1 veego WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
467 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
468 1.9 veego WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x40);
469 1.1 veego WGfx(ba, GCT_ID_MISC, 0x01);
470 1.1 veego WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
471 1.1 veego WGfx(ba, GCT_ID_BITMASK, 0xff);
472 1.1 veego
473 1.1 veego for (x = 0; x < 0x10; x++)
474 1.1 veego WAttr(ba, x, x);
475 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
476 1.1 veego WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
477 1.1 veego WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
478 1.1 veego WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
479 1.1 veego WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
480 1.1 veego WAttr(ba, ACT_ID_MISCELLANEOUS, 0x00);
481 1.1 veego
482 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
483 1.1 veego delay(200000);
484 1.9 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3);
485 1.1 veego
486 1.1 veego /* colors initially set to greyscale */
487 1.1 veego switch(ettype) {
488 1.1 veego case MERLIN:
489 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
490 1.1 veego for (x = 255; x >= 0; x--) {
491 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
492 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
493 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
494 1.1 veego }
495 1.1 veego break;
496 1.1 veego default:
497 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
498 1.1 veego for (x = 255; x >= 0; x--) {
499 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
500 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
501 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
502 1.1 veego }
503 1.1 veego break;
504 1.1 veego }
505 1.1 veego /* set sprite bitmap pointers */
506 1.1 veego /* should work like that */
507 1.1 veego et_cursprite.image = et_imageptr;
508 1.1 veego et_cursprite.mask = et_maskptr;
509 1.1 veego et_cursprite.cmap.red = et_sprred;
510 1.1 veego et_cursprite.cmap.green = et_sprgreen;
511 1.1 veego et_cursprite.cmap.blue = et_sprblue;
512 1.9 veego
513 1.9 veego /* card specific initialisations */
514 1.1 veego switch(ettype) {
515 1.1 veego case OMNIBUS:
516 1.1 veego etctype = et_getControllerType(gp);
517 1.1 veego etdtype = et_getDACType(gp);
518 1.1 veego break;
519 1.1 veego case MERLIN:
520 1.9 veego vgaw(ba, GREG_SEGMENTSELECT2, 0x00);
521 1.9 veego if (((vgar(ba, GREG_FEATURE_CONTROL_R) & 12) |
522 1.9 veego (vgar(ba, GREG_STATUS0_R) & 0x60)) == 0x24) {
523 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x07); /* 1Mx4 RAM */
524 1.9 veego et_fbsize = 0x400000; /* 4 MB */
525 1.9 veego }
526 1.9 veego else {
527 1.9 veego /* check for 1MB or 2MB board (crest) */
528 1.9 veego /* has there a 1MB Merlin ever been sold ??? */
529 1.9 veego volatile unsigned long *et_fbtestaddr;
530 1.9 veego et_fbtestaddr = (volatile unsigned long *)gp->g_fbkva;
531 1.9 veego *et_fbtestaddr = 0x0;
532 1.9 veego vgaw(ba, GREG_SEGMENTSELECT2, 0x11); /* 1MB offset */
533 1.9 veego *et_fbtestaddr = 0x12345678;
534 1.9 veego vgaw(ba, GREG_SEGMENTSELECT2, 0x00);
535 1.13 aymeric if (*et_fbtestaddr == 0x0)
536 1.9 veego et_fbsize = 0x200000; /* 2 MB */
537 1.9 veego else
538 1.9 veego et_fbsize = 0x100000; /* 1 MB */
539 1.9 veego }
540 1.9 veego /* ZorroII can map 2 MB max ... */
541 1.9 veego if (!iszthreepa(gp->g_fbkva) && et_fbsize == 0x400000)
542 1.9 veego et_fbsize = 0x200000;
543 1.1 veego etctype = ETW32;
544 1.1 veego etdtype = MERLINDAC;
545 1.3 veego break;
546 1.1 veego case DOMINO:
547 1.1 veego etctype = ET4000;
548 1.9 veego etdtype = et_getDACType(gp);
549 1.1 veego break;
550 1.1 veego }
551 1.1 veego }
552 1.1 veego
553 1.1 veego
554 1.1 veego int
555 1.13 aymeric et_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm)
556 1.1 veego {
557 1.1 veego struct grfvideo_mode *gv;
558 1.1 veego
559 1.1 veego #ifdef TSENGCONSOLE
560 1.1 veego /* Handle grabbing console mode */
561 1.1 veego if (vm->mode_num == 255) {
562 1.1 veego bcopy(&etconsole_mode, vm, sizeof(struct grfvideo_mode));
563 1.9 veego /* XXX so grfconfig can tell us the correct text dimensions. */
564 1.1 veego vm->depth = etconsole_mode.fy;
565 1.9 veego } else
566 1.1 veego #endif
567 1.3 veego {
568 1.3 veego if (vm->mode_num == 0)
569 1.3 veego vm->mode_num = (monitor_current - monitor_def) + 1;
570 1.3 veego if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
571 1.3 veego return (EINVAL);
572 1.3 veego gv = monitor_def + (vm->mode_num - 1);
573 1.3 veego if (gv->mode_num == 0)
574 1.3 veego return (EINVAL);
575 1.3 veego
576 1.3 veego bcopy(gv, vm, sizeof(struct grfvideo_mode));
577 1.3 veego }
578 1.3 veego
579 1.3 veego /* adjust internal values to pixel values */
580 1.3 veego
581 1.3 veego vm->hblank_start *= 8;
582 1.3 veego vm->hsync_start *= 8;
583 1.3 veego vm->hsync_stop *= 8;
584 1.3 veego vm->htotal *= 8;
585 1.3 veego
586 1.1 veego return (0);
587 1.1 veego }
588 1.1 veego
589 1.1 veego
590 1.1 veego int
591 1.13 aymeric et_setvmode(struct grf_softc *gp, unsigned mode)
592 1.1 veego {
593 1.1 veego if (!mode || (mode > monitor_def_max) ||
594 1.1 veego monitor_def[mode - 1].mode_num == 0)
595 1.1 veego return (EINVAL);
596 1.1 veego
597 1.1 veego monitor_current = monitor_def + (mode - 1);
598 1.1 veego
599 1.1 veego return (0);
600 1.1 veego }
601 1.1 veego
602 1.1 veego
603 1.1 veego #ifndef TSENGCONSOLE
604 1.1 veego void
605 1.13 aymeric et_off(struct grf_softc *gp)
606 1.1 veego {
607 1.1 veego char *ba = gp->g_regkva;
608 1.1 veego
609 1.1 veego RegOnpass(ba);
610 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);
611 1.1 veego }
612 1.1 veego #endif
613 1.1 veego
614 1.1 veego
615 1.1 veego int
616 1.13 aymeric et_blank(struct grf_softc *gp, int *on)
617 1.1 veego {
618 1.9 veego WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21);
619 1.9 veego return(0);
620 1.1 veego }
621 1.3 veego
622 1.1 veego
623 1.1 veego /*
624 1.1 veego * Change the mode of the display.
625 1.1 veego * Return a UNIX error number or 0 for success.
626 1.1 veego */
627 1.1 veego int
628 1.13 aymeric et_mode(register struct grf_softc *gp, u_long cmd, void *arg, u_long a2,
629 1.13 aymeric int a3)
630 1.1 veego {
631 1.3 veego int error;
632 1.1 veego
633 1.1 veego switch (cmd) {
634 1.1 veego case GM_GRFON:
635 1.1 veego error = et_load_mon(gp,
636 1.1 veego (struct grfettext_mode *) monitor_current) ? 0 : EINVAL;
637 1.1 veego return (error);
638 1.1 veego
639 1.1 veego case GM_GRFOFF:
640 1.1 veego #ifndef TSENGCONSOLE
641 1.1 veego et_off(gp);
642 1.1 veego #else
643 1.1 veego et_load_mon(gp, &etconsole_mode);
644 1.1 veego #endif
645 1.1 veego return (0);
646 1.1 veego
647 1.1 veego case GM_GRFCONFIG:
648 1.1 veego return (0);
649 1.1 veego
650 1.1 veego case GM_GRFGETVMODE:
651 1.1 veego return (et_getvmode(gp, (struct grfvideo_mode *) arg));
652 1.1 veego
653 1.1 veego case GM_GRFSETVMODE:
654 1.1 veego error = et_setvmode(gp, *(unsigned *) arg);
655 1.1 veego if (!error && (gp->g_flags & GF_GRFON))
656 1.1 veego et_load_mon(gp,
657 1.1 veego (struct grfettext_mode *) monitor_current);
658 1.1 veego return (error);
659 1.1 veego
660 1.1 veego case GM_GRFGETNUMVM:
661 1.1 veego *(int *) arg = monitor_def_max;
662 1.1 veego return (0);
663 1.1 veego
664 1.1 veego case GM_GRFIOCTL:
665 1.1 veego return (et_ioctl(gp, a2, arg));
666 1.1 veego
667 1.1 veego default:
668 1.1 veego break;
669 1.1 veego }
670 1.1 veego
671 1.15 atatat return (EPASSTHROUGH);
672 1.1 veego }
673 1.1 veego
674 1.3 veego
675 1.1 veego int
676 1.13 aymeric et_ioctl(register struct grf_softc *gp, u_long cmd, void *data)
677 1.1 veego {
678 1.1 veego switch (cmd) {
679 1.1 veego case GRFIOCGSPRITEPOS:
680 1.1 veego return (et_getmousepos(gp, (struct grf_position *) data));
681 1.1 veego
682 1.1 veego case GRFIOCSSPRITEPOS:
683 1.1 veego return (et_setmousepos(gp, (struct grf_position *) data));
684 1.1 veego
685 1.1 veego case GRFIOCSSPRITEINF:
686 1.1 veego return (et_setspriteinfo(gp, (struct grf_spriteinfo *) data));
687 1.1 veego
688 1.1 veego case GRFIOCGSPRITEINF:
689 1.1 veego return (et_getspriteinfo(gp, (struct grf_spriteinfo *) data));
690 1.1 veego
691 1.1 veego case GRFIOCGSPRITEMAX:
692 1.1 veego return (et_getspritemax(gp, (struct grf_position *) data));
693 1.1 veego
694 1.1 veego case GRFIOCGETCMAP:
695 1.1 veego return (et_getcmap(gp, (struct grf_colormap *) data));
696 1.1 veego
697 1.1 veego case GRFIOCPUTCMAP:
698 1.1 veego return (et_putcmap(gp, (struct grf_colormap *) data));
699 1.1 veego
700 1.1 veego case GRFIOCBITBLT:
701 1.1 veego break;
702 1.1 veego
703 1.1 veego case GRFTOGGLE:
704 1.1 veego return (et_toggle(gp, 0));
705 1.1 veego
706 1.1 veego case GRFIOCSETMON:
707 1.1 veego return (et_setmonitor(gp, (struct grfvideo_mode *) data));
708 1.1 veego
709 1.3 veego case GRFIOCBLANK:
710 1.1 veego return (et_blank(gp, (int *)data));
711 1.1 veego }
712 1.15 atatat return (EPASSTHROUGH);
713 1.1 veego }
714 1.1 veego
715 1.1 veego
716 1.1 veego int
717 1.13 aymeric et_getmousepos(struct grf_softc *gp, struct grf_position *data)
718 1.1 veego {
719 1.1 veego data->x = et_cursprite.pos.x;
720 1.1 veego data->y = et_cursprite.pos.y;
721 1.3 veego
722 1.1 veego return (0);
723 1.1 veego }
724 1.1 veego
725 1.1 veego
726 1.1 veego void
727 1.13 aymeric et_writesprpos(volatile char *ba, short x, short y)
728 1.1 veego {
729 1.1 veego }
730 1.1 veego
731 1.1 veego
732 1.1 veego int
733 1.13 aymeric et_setmousepos(struct grf_softc *gp, struct grf_position *data)
734 1.1 veego {
735 1.1 veego volatile char *ba = gp->g_regkva;
736 1.1 veego short rx, ry, prx, pry;
737 1.1 veego
738 1.1 veego /* no movement */
739 1.1 veego if (et_cursprite.pos.x == data->x && et_cursprite.pos.y == data->y)
740 1.1 veego return (0);
741 1.1 veego
742 1.3 veego /* current and previous real coordinates */
743 1.1 veego rx = data->x - et_cursprite.hot.x;
744 1.1 veego ry = data->y - et_cursprite.hot.y;
745 1.1 veego prx = et_cursprite.pos.x - et_cursprite.hot.x;
746 1.1 veego pry = et_cursprite.pos.y - et_cursprite.hot.y;
747 1.1 veego
748 1.3 veego /* if we are/were on an edge, create (un)shifted bitmap --
749 1.3 veego * ripped out optimization (not extremely worthwhile,
750 1.3 veego * and kind of buggy anyhow).
751 1.3 veego */
752 1.1 veego
753 1.3 veego /* do movement, save position */
754 1.3 veego et_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
755 1.1 veego et_cursprite.pos.x = data->x;
756 1.1 veego et_cursprite.pos.y = data->y;
757 1.1 veego
758 1.1 veego return (0);
759 1.1 veego }
760 1.1 veego
761 1.1 veego
762 1.1 veego int
763 1.13 aymeric et_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data)
764 1.1 veego {
765 1.1 veego
766 1.1 veego return(EINVAL);
767 1.1 veego }
768 1.1 veego
769 1.1 veego
770 1.1 veego static int
771 1.13 aymeric et_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *data)
772 1.1 veego {
773 1.1 veego
774 1.1 veego return(EINVAL);
775 1.1 veego }
776 1.1 veego
777 1.1 veego
778 1.1 veego static int
779 1.13 aymeric et_getspritemax(struct grf_softc *gp, struct grf_position *data)
780 1.1 veego {
781 1.1 veego
782 1.1 veego return(EINVAL);
783 1.1 veego }
784 1.1 veego
785 1.1 veego
786 1.1 veego int
787 1.13 aymeric et_setmonitor(struct grf_softc *gp, struct grfvideo_mode *gv)
788 1.1 veego {
789 1.1 veego struct grfvideo_mode *md;
790 1.1 veego
791 1.3 veego if (!et_mondefok(gv))
792 1.3 veego return(EINVAL);
793 1.1 veego
794 1.1 veego #ifdef TSENGCONSOLE
795 1.1 veego /* handle interactive setting of console mode */
796 1.1 veego if (gv->mode_num == 255) {
797 1.1 veego bcopy(gv, &etconsole_mode.gv, sizeof(struct grfvideo_mode));
798 1.3 veego etconsole_mode.gv.hblank_start /= 8;
799 1.3 veego etconsole_mode.gv.hsync_start /= 8;
800 1.3 veego etconsole_mode.gv.hsync_stop /= 8;
801 1.3 veego etconsole_mode.gv.htotal /= 8;
802 1.1 veego etconsole_mode.rows = gv->disp_height / etconsole_mode.fy;
803 1.1 veego etconsole_mode.cols = gv->disp_width / etconsole_mode.fx;
804 1.1 veego if (!(gp->g_flags & GF_GRFON))
805 1.1 veego et_load_mon(gp, &etconsole_mode);
806 1.1 veego ite_reinit(gp->g_itedev);
807 1.1 veego return (0);
808 1.1 veego }
809 1.1 veego #endif
810 1.1 veego
811 1.1 veego md = monitor_def + (gv->mode_num - 1);
812 1.1 veego bcopy(gv, md, sizeof(struct grfvideo_mode));
813 1.1 veego
814 1.3 veego /* adjust pixel oriented values to internal rep. */
815 1.1 veego
816 1.3 veego md->hblank_start /= 8;
817 1.3 veego md->hsync_start /= 8;
818 1.3 veego md->hsync_stop /= 8;
819 1.3 veego md->htotal /= 8;
820 1.1 veego
821 1.1 veego return (0);
822 1.1 veego }
823 1.1 veego
824 1.1 veego
825 1.1 veego int
826 1.13 aymeric et_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap)
827 1.1 veego {
828 1.1 veego volatile unsigned char *ba;
829 1.3 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
830 1.3 veego short x;
831 1.3 veego int error;
832 1.1 veego
833 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
834 1.1 veego return 0;
835 1.1 veego
836 1.16 itojun if (cmap->count > 256 - cmap->index)
837 1.1 veego cmap->count = 256 - cmap->index;
838 1.1 veego
839 1.1 veego ba = gfp->g_regkva;
840 1.1 veego /* first read colors out of the chip, then copyout to userspace */
841 1.1 veego x = cmap->count - 1;
842 1.1 veego
843 1.1 veego rp = red + cmap->index;
844 1.1 veego gp = green + cmap->index;
845 1.1 veego bp = blue + cmap->index;
846 1.1 veego
847 1.1 veego switch(ettype) {
848 1.1 veego case MERLIN:
849 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
850 1.1 veego do {
851 1.1 veego *rp++ = vgar(ba, MERLIN_VDAC_COLORS);
852 1.1 veego *gp++ = vgar(ba, MERLIN_VDAC_COLORS);
853 1.1 veego *bp++ = vgar(ba, MERLIN_VDAC_COLORS);
854 1.1 veego } while (x-- > 0);
855 1.1 veego break;
856 1.1 veego default:
857 1.3 veego vgaw(ba, VDAC_ADDRESS_R+((ettype==DOMINO)?0x0fff:0), cmap->index);
858 1.1 veego do {
859 1.3 veego *rp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
860 1.3 veego *gp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
861 1.3 veego *bp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
862 1.1 veego } while (x-- > 0);
863 1.1 veego break;
864 1.1 veego }
865 1.1 veego
866 1.3 veego error = copyout(red + cmap->index, cmap->red, cmap->count);
867 1.3 veego if (!error)
868 1.3 veego error = copyout(green + cmap->index, cmap->green, cmap->count);
869 1.3 veego if (!error)
870 1.3 veego error = copyout(blue + cmap->index, cmap->blue, cmap->count);
871 1.1 veego
872 1.1 veego return (error);
873 1.1 veego }
874 1.1 veego
875 1.1 veego
876 1.1 veego int
877 1.13 aymeric et_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap)
878 1.1 veego {
879 1.1 veego volatile unsigned char *ba;
880 1.3 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
881 1.3 veego short x;
882 1.3 veego int error;
883 1.1 veego
884 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
885 1.1 veego return (0);
886 1.1 veego
887 1.16 itojun if (cmap->count > 256 - cmap->index)
888 1.1 veego cmap->count = 256 - cmap->index;
889 1.1 veego
890 1.1 veego /* first copy the colors into kernelspace */
891 1.3 veego if ((error = copyin(cmap->red, red + cmap->index, cmap->count)))
892 1.3 veego return (error);
893 1.3 veego
894 1.3 veego if ((error = copyin(cmap->green, green + cmap->index, cmap->count)))
895 1.3 veego return (error);
896 1.1 veego
897 1.3 veego if ((error = copyin(cmap->blue, blue + cmap->index, cmap->count)))
898 1.1 veego return (error);
899 1.3 veego
900 1.3 veego ba = gfp->g_regkva;
901 1.3 veego x = cmap->count - 1;
902 1.3 veego
903 1.3 veego rp = red + cmap->index;
904 1.3 veego gp = green + cmap->index;
905 1.3 veego bp = blue + cmap->index;
906 1.3 veego
907 1.3 veego switch(ettype){
908 1.3 veego case MERLIN:
909 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
910 1.3 veego do {
911 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *rp++);
912 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *gp++);
913 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *bp++);
914 1.3 veego } while (x-- > 0);
915 1.3 veego break;
916 1.3 veego default:
917 1.3 veego vgaw(ba, VDAC_ADDRESS_W, cmap->index);
918 1.3 veego do {
919 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
920 1.3 veego *rp++ >> etcmap_shift);
921 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
922 1.3 veego *gp++ >> etcmap_shift);
923 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
924 1.3 veego *bp++ >> etcmap_shift);
925 1.3 veego } while (x-- > 0);
926 1.3 veego break;
927 1.3 veego }
928 1.3 veego
929 1.3 veego return (0);
930 1.1 veego }
931 1.1 veego
932 1.1 veego
933 1.1 veego int
934 1.13 aymeric et_toggle(struct grf_softc *gp, unsigned short wopp)
935 1.13 aymeric /* (variable wopp) don't need that one yet, ill */
936 1.1 veego {
937 1.1 veego volatile unsigned char *ba;
938 1.1 veego
939 1.1 veego ba = gp->g_regkva;
940 1.1 veego
941 1.1 veego if (pass_toggle) {
942 1.1 veego RegOffpass(ba);
943 1.1 veego } else {
944 1.1 veego RegOnpass(ba);
945 1.1 veego }
946 1.1 veego return (0);
947 1.1 veego }
948 1.1 veego
949 1.3 veego
950 1.1 veego #define ET_NUMCLOCKS 32
951 1.1 veego
952 1.1 veego static u_char et_clocks[ET_NUMCLOCKS] = {
953 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
954 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
955 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
956 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5
957 1.1 veego };
958 1.1 veego
959 1.1 veego static u_char et_clockdividers[ET_NUMCLOCKS] = {
960 1.1 veego 3, 3, 3, 3, 3, 3, 3, 3,
961 1.1 veego 2, 2, 2, 2, 2, 2, 2, 2,
962 1.1 veego 1, 1, 1, 1, 1, 1, 1, 1,
963 1.1 veego 0, 0, 0, 0, 0, 0, 0, 0
964 1.1 veego };
965 1.1 veego
966 1.1 veego static u_int et_clockfreqs[ET_NUMCLOCKS] = {
967 1.3 veego 6293750, 7080500, 7875000, 8125000,
968 1.3 veego 9000000, 9375000, 10000000, 11225000,
969 1.3 veego 12587500, 14161000, 15750000, 16250000,
970 1.3 veego 18000000, 18750000, 20000000, 22450000,
971 1.3 veego 25175000, 28322000, 31500000, 32500000,
972 1.3 veego 36000000, 37500000, 40000000, 44900000,
973 1.3 veego 50350000, 56644000, 63000000, 65000000,
974 1.3 veego 72000000, 75000000, 80000000, 89800000
975 1.1 veego };
976 1.1 veego
977 1.1 veego
978 1.1 veego static void
979 1.13 aymeric et_CompFQ(u_int fq, u_char *num, u_char *denom)
980 1.1 veego {
981 1.1 veego int i;
982 1.1 veego
983 1.1 veego for (i=0; i < ET_NUMCLOCKS;) {
984 1.1 veego if (fq <= et_clockfreqs[i++]) {
985 1.1 veego break;
986 1.1 veego }
987 1.3 veego }
988 1.1 veego
989 1.1 veego *num = et_clocks[--i];
990 1.1 veego *denom = et_clockdividers[i];
991 1.1 veego
992 1.1 veego return;
993 1.1 veego }
994 1.1 veego
995 1.1 veego
996 1.1 veego int
997 1.13 aymeric et_mondefok(struct grfvideo_mode *gv)
998 1.1 veego {
999 1.9 veego unsigned long maxpix;
1000 1.3 veego
1001 1.1 veego if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
1002 1.3 veego if (gv->mode_num != 255 || gv->depth != 4)
1003 1.3 veego return(0);
1004 1.1 veego
1005 1.1 veego switch (gv->depth) {
1006 1.1 veego case 4:
1007 1.3 veego if (gv->mode_num != 255)
1008 1.3 veego return(0);
1009 1.1 veego case 1:
1010 1.1 veego case 8:
1011 1.9 veego maxpix = 85000000;
1012 1.9 veego break;
1013 1.1 veego case 15:
1014 1.1 veego case 16:
1015 1.9 veego maxpix = 45000000;
1016 1.9 veego break;
1017 1.1 veego case 24:
1018 1.9 veego maxpix = 28000000;
1019 1.9 veego break;
1020 1.9 veego case 32:
1021 1.9 veego maxpix = 21000000;
1022 1.9 veego break;
1023 1.1 veego default:
1024 1.10 veego printf("grfet: Illegal depth in mode %d\n",
1025 1.10 veego (int) gv->mode_num);
1026 1.1 veego return (0);
1027 1.1 veego }
1028 1.10 veego
1029 1.10 veego if (gv->pixel_clock > maxpix) {
1030 1.10 veego printf("grfet: Pixelclock too high in mode %d\n",
1031 1.10 veego (int) gv->mode_num);
1032 1.9 veego return (0);
1033 1.10 veego }
1034 1.10 veego
1035 1.10 veego if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) {
1036 1.10 veego printf("grfet: sync-on-green is not supported\n");
1037 1.10 veego return (0);
1038 1.10 veego }
1039 1.10 veego
1040 1.3 veego return (1);
1041 1.1 veego }
1042 1.1 veego
1043 1.1 veego
1044 1.1 veego int
1045 1.13 aymeric et_load_mon(struct grf_softc *gp, struct grfettext_mode *md)
1046 1.1 veego {
1047 1.1 veego struct grfvideo_mode *gv;
1048 1.1 veego struct grfinfo *gi;
1049 1.1 veego volatile unsigned char *ba;
1050 1.1 veego unsigned char num0, denom0;
1051 1.1 veego unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
1052 1.1 veego VSE, VT;
1053 1.10 veego unsigned char hvsync_pulse, seq;
1054 1.10 veego char TEXT;
1055 1.9 veego int hmul;
1056 1.1 veego
1057 1.1 veego /* identity */
1058 1.1 veego gv = &md->gv;
1059 1.1 veego TEXT = (gv->depth == 4);
1060 1.1 veego
1061 1.1 veego if (!et_mondefok(gv)) {
1062 1.10 veego printf("grfet: Monitor definition not ok\n");
1063 1.1 veego return (0);
1064 1.1 veego }
1065 1.10 veego
1066 1.1 veego ba = gp->g_regkva;
1067 1.1 veego
1068 1.1 veego /* provide all needed information in grf device-independant locations */
1069 1.1 veego gp->g_data = (caddr_t) gv;
1070 1.1 veego gi = &gp->g_display;
1071 1.1 veego gi->gd_regaddr = (caddr_t) ztwopa(ba);
1072 1.1 veego gi->gd_regsize = 64 * 1024;
1073 1.1 veego gi->gd_fbaddr = (caddr_t) kvtop(gp->g_fbkva);
1074 1.1 veego gi->gd_fbsize = et_fbsize;
1075 1.1 veego gi->gd_colors = 1 << gv->depth;
1076 1.1 veego gi->gd_planes = gv->depth;
1077 1.1 veego gi->gd_fbwidth = gv->disp_width;
1078 1.1 veego gi->gd_fbheight = gv->disp_height;
1079 1.1 veego gi->gd_fbx = 0;
1080 1.1 veego gi->gd_fby = 0;
1081 1.1 veego if (TEXT) {
1082 1.1 veego gi->gd_dwidth = md->fx * md->cols;
1083 1.1 veego gi->gd_dheight = md->fy * md->rows;
1084 1.1 veego } else {
1085 1.1 veego gi->gd_dwidth = gv->disp_width;
1086 1.1 veego gi->gd_dheight = gv->disp_height;
1087 1.1 veego }
1088 1.1 veego gi->gd_dx = 0;
1089 1.1 veego gi->gd_dy = 0;
1090 1.1 veego
1091 1.1 veego /* get display mode parameters */
1092 1.1 veego
1093 1.1 veego HBS = gv->hblank_start;
1094 1.1 veego HSS = gv->hsync_start;
1095 1.1 veego HSE = gv->hsync_stop;
1096 1.10 veego HBE = gv->htotal - 1;
1097 1.1 veego HT = gv->htotal;
1098 1.1 veego VBS = gv->vblank_start;
1099 1.1 veego VSS = gv->vsync_start;
1100 1.1 veego VSE = gv->vsync_stop;
1101 1.10 veego VBE = gv->vtotal - 1;
1102 1.1 veego VT = gv->vtotal;
1103 1.1 veego
1104 1.1 veego if (TEXT)
1105 1.1 veego HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
1106 1.1 veego else
1107 1.1 veego HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */
1108 1.1 veego VDE = gv->disp_height - 1;
1109 1.1 veego
1110 1.9 veego /* adjustments (crest) */
1111 1.9 veego switch (gv->depth) {
1112 1.9 veego case 15:
1113 1.10 veego case 16:
1114 1.10 veego hmul = 2;
1115 1.10 veego break;
1116 1.10 veego case 24:
1117 1.10 veego hmul = 3;
1118 1.10 veego break;
1119 1.10 veego case 32:
1120 1.10 veego hmul = 4;
1121 1.10 veego break;
1122 1.10 veego default:
1123 1.10 veego hmul = 1;
1124 1.10 veego break;
1125 1.9 veego }
1126 1.1 veego
1127 1.9 veego HDE *= hmul;
1128 1.9 veego HBS *= hmul;
1129 1.9 veego HSS *= hmul;
1130 1.9 veego HSE *= hmul;
1131 1.9 veego HBE *= hmul;
1132 1.9 veego HT *= hmul;
1133 1.9 veego
1134 1.10 veego if (gv->disp_flags & GRF_FLAGS_LACE) {
1135 1.10 veego VDE /= 2;
1136 1.10 veego VT = VT + 1;
1137 1.10 veego }
1138 1.10 veego
1139 1.10 veego if (gv->disp_flags & GRF_FLAGS_DBLSCAN) {
1140 1.10 veego VDE *= 2;
1141 1.10 veego VBS *= 2;
1142 1.9 veego VSS *= 2;
1143 1.9 veego VSE *= 2;
1144 1.9 veego VBE *= 2;
1145 1.10 veego VT *= 2;
1146 1.9 veego }
1147 1.9 veego
1148 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
1149 1.1 veego
1150 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1151 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
1152 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
1153 1.1 veego
1154 1.1 veego /* Set clock */
1155 1.9 veego et_CompFQ( gv->pixel_clock * hmul, &num0, &denom0);
1156 1.1 veego
1157 1.10 veego /* Horizontal/Vertical Sync Pulse */
1158 1.10 veego hvsync_pulse = 0xe3;
1159 1.10 veego if (gv->disp_flags & GRF_FLAGS_PHSYNC)
1160 1.10 veego hvsync_pulse &= ~0x40;
1161 1.10 veego else
1162 1.10 veego hvsync_pulse |= 0x40;
1163 1.10 veego if (gv->disp_flags & GRF_FLAGS_PVSYNC)
1164 1.10 veego hvsync_pulse &= ~0x80;
1165 1.10 veego else
1166 1.10 veego hvsync_pulse |= 0x80;
1167 1.10 veego
1168 1.10 veego vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse | ((num0 & 3) << 2));
1169 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, (num0 & 4) ? 0x0a : 0x08);
1170 1.10 veego seq = RSeq(ba, SEQ_ID_CLOCKING_MODE);
1171 1.1 veego switch(denom0) {
1172 1.1 veego case 0:
1173 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xb4);
1174 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1175 1.1 veego break;
1176 1.1 veego case 1:
1177 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
1178 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1179 1.1 veego break;
1180 1.1 veego case 2:
1181 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1182 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1183 1.1 veego break;
1184 1.1 veego case 3:
1185 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1186 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq | 0x08);
1187 1.1 veego break;
1188 1.9 veego }
1189 1.9 veego
1190 1.1 veego /* load display parameters into board */
1191 1.1 veego WCrt(ba, CRT_ID_HOR_TOTAL, HT);
1192 1.1 veego WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
1193 1.1 veego WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
1194 1.9 veego WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80);
1195 1.1 veego WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
1196 1.1 veego WCrt(ba, CRT_ID_END_HOR_RETR,
1197 1.1 veego (HSE & 0x1f) |
1198 1.1 veego ((HBE & 0x20) ? 0x80 : 0x00));
1199 1.1 veego WCrt(ba, CRT_ID_VER_TOTAL, VT);
1200 1.1 veego WCrt(ba, CRT_ID_OVERFLOW,
1201 1.1 veego 0x10 |
1202 1.1 veego ((VT & 0x100) ? 0x01 : 0x00) |
1203 1.1 veego ((VDE & 0x100) ? 0x02 : 0x00) |
1204 1.1 veego ((VSS & 0x100) ? 0x04 : 0x00) |
1205 1.1 veego ((VBS & 0x100) ? 0x08 : 0x00) |
1206 1.1 veego ((VT & 0x200) ? 0x20 : 0x00) |
1207 1.1 veego ((VDE & 0x200) ? 0x40 : 0x00) |
1208 1.1 veego ((VSS & 0x200) ? 0x80 : 0x00));
1209 1.1 veego
1210 1.1 veego WCrt(ba, CRT_ID_MAX_ROW_ADDRESS,
1211 1.9 veego 0x40 | /* splitscreen not visible */
1212 1.10 veego ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) |
1213 1.1 veego ((VBS & 0x200) ? 0x20 : 0x00) |
1214 1.1 veego (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
1215 1.1 veego
1216 1.1 veego WCrt(ba, CRT_ID_MODE_CONTROL,
1217 1.1 veego ((TEXT || (gv->depth == 1)) ? 0xc3 : 0xab));
1218 1.1 veego
1219 1.1 veego /* text cursor */
1220 1.1 veego if (TEXT) {
1221 1.1 veego #if ET_ULCURSOR
1222 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
1223 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
1224 1.1 veego #else
1225 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
1226 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
1227 1.1 veego #endif
1228 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
1229 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
1230 1.1 veego }
1231 1.1 veego
1232 1.1 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, ((md->fy - 1) & 0x1f)
1233 1.1 veego | ((TEXT || (gv->depth == 1)) ? 0x00 : 0x60));
1234 1.1 veego
1235 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
1236 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
1237 1.1 veego
1238 1.1 veego WCrt(ba, CRT_ID_START_VER_RETR, VSS);
1239 1.1 veego WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x30);
1240 1.1 veego WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
1241 1.1 veego WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
1242 1.1 veego WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
1243 1.1 veego
1244 1.1 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
1245 1.1 veego
1246 1.1 veego WCrt(ba, CRT_ID_OVERFLOW_HIGH,
1247 1.3 veego ((VBS & 0x400) ? 0x01 : 0x00) |
1248 1.3 veego ((VT & 0x400) ? 0x02 : 0x00) |
1249 1.3 veego ((VDE & 0x400) ? 0x04 : 0x00) |
1250 1.3 veego ((VSS & 0x400) ? 0x08 : 0x00) |
1251 1.3 veego 0x10 |
1252 1.10 veego ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x80 : 0x00));
1253 1.3 veego
1254 1.3 veego WCrt(ba, CRT_ID_HOR_OVERFLOW,
1255 1.3 veego ((HT & 0x100) ? 0x01 : 0x00) |
1256 1.3 veego ((HBS & 0x100) ? 0x04 : 0x00) |
1257 1.3 veego ((HSS & 0x100) ? 0x10 : 0x00)
1258 1.3 veego );
1259 1.1 veego
1260 1.1 veego /* depth dependent stuff */
1261 1.1 veego
1262 1.1 veego WGfx(ba, GCT_ID_GRAPHICS_MODE,
1263 1.1 veego ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
1264 1.1 veego WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
1265 1.1 veego
1266 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1267 1.1 veego vgar(ba, VDAC_MASK);
1268 1.1 veego vgar(ba, VDAC_MASK);
1269 1.1 veego vgar(ba, VDAC_MASK);
1270 1.1 veego vgar(ba, VDAC_MASK);
1271 1.1 veego switch (gv->depth) {
1272 1.1 veego case 1:
1273 1.1 veego case 4: /* text */
1274 1.1 veego switch(etdtype) {
1275 1.1 veego case SIERRA11483:
1276 1.1 veego case SIERRA15025:
1277 1.1 veego case MUSICDAC:
1278 1.1 veego vgaw(ba, VDAC_MASK, 0);
1279 1.1 veego break;
1280 1.9 veego case ATT20C491:
1281 1.9 veego vgaw(ba, VDAC_MASK, 0x02);
1282 1.9 veego break;
1283 1.1 veego case MERLINDAC:
1284 1.1 veego setMerlinDACmode(ba, 0);
1285 1.1 veego break;
1286 1.1 veego }
1287 1.1 veego HDE = gv->disp_width / 16;
1288 1.1 veego break;
1289 1.1 veego case 8:
1290 1.1 veego switch(etdtype) {
1291 1.1 veego case SIERRA11483:
1292 1.1 veego case SIERRA15025:
1293 1.1 veego case MUSICDAC:
1294 1.1 veego vgaw(ba, VDAC_MASK, 0);
1295 1.1 veego break;
1296 1.9 veego case ATT20C491:
1297 1.9 veego vgaw(ba, VDAC_MASK, 0x02);
1298 1.9 veego break;
1299 1.1 veego case MERLINDAC:
1300 1.1 veego setMerlinDACmode(ba, 0);
1301 1.1 veego break;
1302 1.1 veego }
1303 1.1 veego HDE = gv->disp_width / 8;
1304 1.1 veego break;
1305 1.1 veego case 15:
1306 1.1 veego switch(etdtype) {
1307 1.1 veego case SIERRA11483:
1308 1.1 veego case SIERRA15025:
1309 1.1 veego case MUSICDAC:
1310 1.9 veego case ATT20C491:
1311 1.1 veego vgaw(ba, VDAC_MASK, 0xa0);
1312 1.1 veego break;
1313 1.1 veego case MERLINDAC:
1314 1.1 veego setMerlinDACmode(ba, 0xa0);
1315 1.1 veego break;
1316 1.1 veego }
1317 1.1 veego HDE = gv->disp_width / 4;
1318 1.1 veego break;
1319 1.1 veego case 16:
1320 1.1 veego switch(etdtype) {
1321 1.1 veego case SIERRA11483:
1322 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1323 1.1 veego break;
1324 1.1 veego case SIERRA15025:
1325 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1326 1.1 veego break;
1327 1.1 veego case MUSICDAC:
1328 1.9 veego case ATT20C491:
1329 1.1 veego vgaw(ba, VDAC_MASK, 0xc0);
1330 1.1 veego break;
1331 1.1 veego case MERLINDAC:
1332 1.1 veego setMerlinDACmode(ba, 0xe0);
1333 1.1 veego break;
1334 1.1 veego }
1335 1.1 veego HDE = gv->disp_width / 4;
1336 1.1 veego break;
1337 1.1 veego case 24:
1338 1.1 veego switch(etdtype) {
1339 1.1 veego case SIERRA11483:
1340 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1341 1.1 veego break;
1342 1.1 veego case SIERRA15025:
1343 1.1 veego vgaw(ba, VDAC_MASK, 0xe1);
1344 1.1 veego break;
1345 1.1 veego case MUSICDAC:
1346 1.9 veego case ATT20C491:
1347 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1348 1.1 veego break;
1349 1.1 veego case MERLINDAC:
1350 1.1 veego setMerlinDACmode(ba, 0xf0);
1351 1.1 veego break;
1352 1.1 veego }
1353 1.1 veego HDE = (gv->disp_width / 8) * 3;
1354 1.1 veego break;
1355 1.1 veego case 32:
1356 1.1 veego switch(etdtype) {
1357 1.1 veego case SIERRA11483:
1358 1.1 veego case MUSICDAC:
1359 1.9 veego case ATT20C491:
1360 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1361 1.1 veego break;
1362 1.1 veego case SIERRA15025:
1363 1.1 veego vgaw(ba, VDAC_MASK, 0x61);
1364 1.1 veego break;
1365 1.1 veego case MERLINDAC:
1366 1.1 veego setMerlinDACmode(ba, 0xb0);
1367 1.1 veego break;
1368 1.1 veego }
1369 1.1 veego HDE = gv->disp_width / 2;
1370 1.1 veego break;
1371 1.1 veego }
1372 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
1373 1.1 veego WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
1374 1.1 veego (gv->depth == 1) ? 0x01 : 0x0f);
1375 1.1 veego
1376 1.1 veego WCrt(ba, CRT_ID_OFFSET, HDE);
1377 1.9 veego vgaw(ba, CRT_ADDRESS, CRT_ID_HOR_OVERFLOW);
1378 1.9 veego vgaw(ba, CRT_ADDRESS_W,
1379 1.9 veego (vgar(ba, CRT_ADDRESS_R) & 0x7f)
1380 1.9 veego | ((HDE & 0x100) ? 0x80: 0x00));
1381 1.1 veego
1382 1.1 veego /* text initialization */
1383 1.1 veego if (TEXT) {
1384 1.1 veego et_inittextmode(gp);
1385 1.1 veego }
1386 1.1 veego
1387 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
1388 1.1 veego
1389 1.1 veego /* Pass-through */
1390 1.1 veego RegOffpass(ba);
1391 1.1 veego
1392 1.1 veego return (1);
1393 1.1 veego }
1394 1.1 veego
1395 1.1 veego
1396 1.1 veego void
1397 1.13 aymeric et_inittextmode(struct grf_softc *gp)
1398 1.1 veego {
1399 1.1 veego struct grfettext_mode *tm = (struct grfettext_mode *) gp->g_data;
1400 1.1 veego volatile unsigned char *ba = gp->g_regkva;
1401 1.1 veego unsigned char *fb = gp->g_fbkva;
1402 1.1 veego unsigned char *c, *f, y;
1403 1.1 veego unsigned short z;
1404 1.1 veego
1405 1.1 veego
1406 1.3 veego /*
1407 1.3 veego * load text font into beginning of display memory. Each character
1408 1.3 veego * cell is 32 bytes long (enough for 4 planes)
1409 1.3 veego */
1410 1.1 veego
1411 1.1 veego SetTextPlane(ba, 0x02);
1412 1.1 veego et_memset(fb, 0, 256 * 32);
1413 1.1 veego c = (unsigned char *) (fb) + (32 * tm->fdstart);
1414 1.1 veego f = tm->fdata;
1415 1.1 veego for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
1416 1.1 veego for (y = 0; y < tm->fy; y++)
1417 1.1 veego *c++ = *f++;
1418 1.1 veego
1419 1.1 veego /* clear out text/attr planes (three screens worth) */
1420 1.1 veego
1421 1.1 veego SetTextPlane(ba, 0x01);
1422 1.1 veego et_memset(fb, 0x07, tm->cols * tm->rows * 3);
1423 1.1 veego SetTextPlane(ba, 0x00);
1424 1.1 veego et_memset(fb, 0x20, tm->cols * tm->rows * 3);
1425 1.1 veego
1426 1.1 veego /* print out a little init msg */
1427 1.1 veego
1428 1.1 veego c = (unsigned char *) (fb) + (tm->cols - 16);
1429 1.1 veego strcpy(c, "TSENG");
1430 1.9 veego c[5] = 0x20;
1431 1.1 veego
1432 1.1 veego /* set colors (B&W) */
1433 1.1 veego
1434 1.1 veego switch(ettype) {
1435 1.1 veego case MERLIN:
1436 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
1437 1.1 veego for (z = 0; z < 256; z++) {
1438 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1439 1.9 veego
1440 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][0]);
1441 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][1]);
1442 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][2]);
1443 1.1 veego }
1444 1.1 veego break;
1445 1.1 veego default:
1446 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
1447 1.1 veego for (z = 0; z < 256; z++) {
1448 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1449 1.9 veego
1450 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1451 1.3 veego etconscolors[y][0] >> etcmap_shift);
1452 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1453 1.3 veego etconscolors[y][1] >> etcmap_shift);
1454 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1455 1.3 veego etconscolors[y][2] >> etcmap_shift);
1456 1.1 veego }
1457 1.1 veego break;
1458 1.1 veego }
1459 1.1 veego }
1460 1.1 veego
1461 1.1 veego
1462 1.1 veego void
1463 1.13 aymeric et_memset(unsigned char *d, unsigned char c, int l)
1464 1.1 veego {
1465 1.1 veego for (; l > 0; l--)
1466 1.1 veego *d++ = c;
1467 1.1 veego }
1468 1.1 veego
1469 1.1 veego
1470 1.1 veego static int
1471 1.13 aymeric et_getControllerType(struct grf_softc *gp)
1472 1.1 veego {
1473 1.1 veego unsigned char *ba = gp->g_regkva; /* register base */
1474 1.1 veego unsigned char *mem = gp->g_fbkva; /* memory base */
1475 1.1 veego unsigned char *mmu = mem + MMU_APERTURE0; /* MMU aperture 0 base */
1476 1.1 veego
1477 1.1 veego *mem = 0;
1478 1.1 veego
1479 1.1 veego /* make ACL visible */
1480 1.10 veego if (ettype == MERLIN) {
1481 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xbb);
1482 1.10 veego } else {
1483 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xfb);
1484 1.9 veego }
1485 1.9 veego
1486 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x01);
1487 1.1 veego
1488 1.1 veego *((unsigned long *)mmu) = 0;
1489 1.1 veego *(mem + 0x13) = 0x38;
1490 1.3 veego
1491 1.1 veego *mmu = 0xff;
1492 1.1 veego
1493 1.1 veego /* hide ACL */
1494 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x00);
1495 1.3 veego
1496 1.10 veego if (ettype == MERLIN) {
1497 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0x93);
1498 1.10 veego } else {
1499 1.9 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
1500 1.9 veego }
1501 1.10 veego return ((*mem == 0xff) ? ETW32 : ET4000);
1502 1.1 veego }
1503 1.1 veego
1504 1.1 veego
1505 1.1 veego static int
1506 1.13 aymeric et_getDACType(struct grf_softc *gp)
1507 1.1 veego {
1508 1.1 veego unsigned char *ba = gp->g_regkva;
1509 1.1 veego union {
1510 1.1 veego int tt;
1511 1.1 veego char cc[4];
1512 1.1 veego } check;
1513 1.1 veego
1514 1.1 veego /* check for Sierra SC 15025 */
1515 1.1 veego
1516 1.3 veego /* We MUST do 4 HW reads to switch into command mode */
1517 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1518 1.3 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1519 1.3 veego
1520 1.3 veego vgaw(ba, VDAC_XINDEX, 9);
1521 1.3 veego check.cc[0] = vgar(ba, VDAC_XDATA);
1522 1.3 veego vgaw(ba, VDAC_XINDEX, 10);
1523 1.3 veego check.cc[1] = vgar(ba, VDAC_XDATA);
1524 1.3 veego vgaw(ba, VDAC_XINDEX, 11);
1525 1.3 veego check.cc[2] = vgar(ba, VDAC_XDATA);
1526 1.3 veego vgaw(ba, VDAC_XINDEX, 12);
1527 1.3 veego check.cc[3] = vgar(ba, VDAC_XDATA);
1528 1.3 veego
1529 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1530 1.3 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1531 1.3 veego
1532 1.3 veego if (check.tt == 0x533ab141) {
1533 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1534 1.3 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1535 1.3 veego
1536 1.3 veego /* switch to 8 bits per color */
1537 1.3 veego vgaw(ba, VDAC_XINDEX, 8);
1538 1.3 veego vgaw(ba, VDAC_XDATA, 1);
1539 1.3 veego /* do not shift color values */
1540 1.3 veego etcmap_shift = 0;
1541 1.3 veego
1542 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1543 1.3 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1544 1.3 veego
1545 1.3 veego vgaw(ba, VDAC_MASK, 0xff);
1546 1.3 veego return (SIERRA15025);
1547 1.3 veego }
1548 1.3 veego
1549 1.3 veego /* check for MUSIC DAC */
1550 1.3 veego
1551 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1552 1.3 veego vgaw(ba, VDAC_COMMAND, 0x02); /* set some strange MUSIC mode (???) */
1553 1.3 veego
1554 1.3 veego vgaw(ba, VDAC_XINDEX, 0x01);
1555 1.3 veego if (vgar(ba, VDAC_XDATA) == 0x01) {
1556 1.3 veego /* shift color values by 2 */
1557 1.3 veego etcmap_shift = 2;
1558 1.1 veego
1559 1.3 veego vgaw(ba, VDAC_MASK, 0xff);
1560 1.3 veego return (MUSICDAC);
1561 1.9 veego }
1562 1.9 veego
1563 1.9 veego /* check for AT&T ATT20c491 DAC (crest) */
1564 1.9 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1565 1.9 veego vgaw(ba, HDR, 0xff);
1566 1.9 veego vgaw(ba, VDAC_MASK, 0x01);
1567 1.9 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1568 1.9 veego if (vgar(ba, HDR) == 0xff) {
1569 1.9 veego /* do not shift color values */
1570 1.9 veego etcmap_shift = 0;
1571 1.9 veego
1572 1.9 veego vgaw(ba, VDAC_MASK, 0xff);
1573 1.9 veego return (ATT20C491);
1574 1.9 veego }
1575 1.9 veego
1576 1.9 veego /* restore PowerUp settings (crest) */
1577 1.9 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1578 1.9 veego vgaw(ba, HDR, 0x00);
1579 1.3 veego
1580 1.3 veego /*
1581 1.3 veego * nothing else found, so let us pretend it is a stupid
1582 1.3 veego * Sierra SC 11483
1583 1.3 veego */
1584 1.1 veego
1585 1.1 veego /* shift color values by 2 */
1586 1.1 veego etcmap_shift = 2;
1587 1.3 veego
1588 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1589 1.9 veego return (SIERRA11483);
1590 1.1 veego }
1591 1.1 veego
1592 1.1 veego #endif /* NGRFET */
1593