grf_et.c revision 1.2 1 1.2 is /* $NetBSD: grf_et.c,v 1.2 1996/06/03 18:55:12 is Exp $ */
2 1.1 veego
3 1.1 veego /*
4 1.1 veego * Copyright (c) 1996 Tobias Abt
5 1.1 veego * Copyright (c) 1995 Ezra Story
6 1.1 veego * Copyright (c) 1995 Kari Mettinen
7 1.1 veego * Copyright (c) 1994 Markus Wild
8 1.1 veego * Copyright (c) 1994 Lutz Vieweg
9 1.1 veego * All rights reserved.
10 1.1 veego *
11 1.1 veego * Redistribution and use in source and binary forms, with or without
12 1.1 veego * modification, are permitted provided that the following conditions
13 1.1 veego * are met:
14 1.1 veego * 1. Redistributions of source code must retain the above copyright
15 1.1 veego * notice, this list of conditions and the following disclaimer.
16 1.1 veego * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 veego * notice, this list of conditions and the following disclaimer in the
18 1.1 veego * documentation and/or other materials provided with the distribution.
19 1.1 veego * 3. All advertising materials mentioning features or use of this software
20 1.1 veego * must display the following acknowledgement:
21 1.1 veego * This product includes software developed by Lutz Vieweg.
22 1.1 veego * 4. The name of the author may not be used to endorse or promote products
23 1.1 veego * derived from this software without specific prior written permission
24 1.1 veego *
25 1.1 veego * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.1 veego * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.1 veego * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.1 veego * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.1 veego * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.1 veego * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.1 veego * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.1 veego * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.1 veego * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 1.1 veego * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.1 veego */
36 1.1 veego #include "grfet.h"
37 1.1 veego #if NGRFET > 0
38 1.1 veego
39 1.1 veego /*
40 1.1 veego * Graphics routines for Tseng ET4000 (&W32) boards,
41 1.1 veego *
42 1.1 veego * This code offers low-level routines to access Tseng ET4000
43 1.1 veego * graphics-boards from within NetBSD for the Amiga.
44 1.1 veego * No warranties for any kind of function at all - this
45 1.1 veego * code may crash your hardware and scratch your harddisk. Use at your
46 1.1 veego * own risk. Freely distributable.
47 1.1 veego *
48 1.1 veego * Modified for Tseng ET4000 from
49 1.1 veego * Kari Mettinen's Cirrus driver by Tobias Abt
50 1.1 veego *
51 1.1 veego *
52 1.1 veego * TODO:
53 1.1 veego *
54 1.1 veego */
55 1.1 veego
56 1.1 veego #include <sys/param.h>
57 1.1 veego #include <sys/systm.h>
58 1.1 veego #include <sys/errno.h>
59 1.1 veego #include <sys/ioctl.h>
60 1.1 veego #include <sys/device.h>
61 1.1 veego #include <sys/malloc.h>
62 1.1 veego
63 1.1 veego #include <machine/cpu.h>
64 1.1 veego #include <dev/cons.h>
65 1.1 veego #ifdef TSENGCONSOLE
66 1.1 veego #include <amiga/dev/itevar.h>
67 1.1 veego #endif
68 1.1 veego #include <amiga/amiga/device.h>
69 1.1 veego #include <amiga/dev/grfioctl.h>
70 1.1 veego #include <amiga/dev/grfvar.h>
71 1.1 veego #include <amiga/dev/grf_etreg.h>
72 1.1 veego #include <amiga/dev/zbusvar.h>
73 1.1 veego
74 1.1 veego int et_mondefok __P((struct grfvideo_mode * gv));
75 1.1 veego void et_boardinit __P((struct grf_softc * gp));
76 1.1 veego static void et_CompFQ __P((u_int fq, u_char * num, u_char * denom));
77 1.1 veego int et_getvmode __P((struct grf_softc * gp, struct grfvideo_mode * vm));
78 1.1 veego int et_setvmode __P((struct grf_softc * gp, unsigned int mode));
79 1.1 veego int et_toggle __P((struct grf_softc * gp, unsigned short));
80 1.1 veego int et_getcmap __P((struct grf_softc * gfp, struct grf_colormap * cmap));
81 1.1 veego int et_putcmap __P((struct grf_softc * gfp, struct grf_colormap * cmap));
82 1.1 veego #ifndef TSENGCONSOLE
83 1.1 veego void et_off __P((struct grf_softc * gp));
84 1.1 veego #endif
85 1.1 veego void et_inittextmode __P((struct grf_softc * gp));
86 1.1 veego int et_ioctl __P((register struct grf_softc * gp, u_long cmd, void *data));
87 1.1 veego int et_getmousepos __P((struct grf_softc * gp, struct grf_position * data));
88 1.1 veego void et_writesprpos __P((volatile char *ba, short x, short y));
89 1.1 veego #ifdef notyet
90 1.1 veego void et_writeshifted __P((unsigned char *to, char shiftx, char shifty));
91 1.1 veego #endif
92 1.1 veego int et_setmousepos __P((struct grf_softc * gp, struct grf_position * data));
93 1.1 veego static int et_setspriteinfo __P((struct grf_softc * gp, struct grf_spriteinfo * data));
94 1.1 veego int et_getspriteinfo __P((struct grf_softc * gp, struct grf_spriteinfo * data));
95 1.1 veego static int et_getspritemax __P((struct grf_softc * gp, struct grf_position * data));
96 1.1 veego int et_setmonitor __P((struct grf_softc * gp, struct grfvideo_mode * gv));
97 1.1 veego int et_blank __P((struct grf_softc * gp, int * on));
98 1.1 veego static int et_getControllerType __P((struct grf_softc * gp));
99 1.1 veego static int et_getDACType __P((struct grf_softc * gp));
100 1.1 veego
101 1.1 veego int grfetmatch __P((struct device *, void *, void *));
102 1.1 veego void grfetattach __P((struct device *, struct device *, void *));
103 1.1 veego int grfetprint __P((void *, char *));
104 1.1 veego void et_memset __P((unsigned char *d, unsigned char c, int l));
105 1.1 veego
106 1.1 veego /* Graphics display definitions.
107 1.1 veego * These are filled by 'grfconfig' using GRFIOCSETMON.
108 1.1 veego */
109 1.1 veego #define monitor_def_max 8
110 1.1 veego static struct grfvideo_mode monitor_def[8] = {
111 1.1 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
112 1.1 veego };
113 1.1 veego static struct grfvideo_mode *monitor_current = &monitor_def[0];
114 1.1 veego
115 1.1 veego /* Console display definition.
116 1.1 veego * Default hardcoded text mode. This grf_et is set up to
117 1.1 veego * use one text mode only, and this is it. You may use
118 1.1 veego * grfconfig to change the mode after boot.
119 1.1 veego */
120 1.1 veego /* Console font */
121 1.1 veego #ifdef KFONT_8X11
122 1.1 veego #define TSENGFONT kernel_font_8x11
123 1.1 veego #define TSENGFONTY 11
124 1.1 veego #else
125 1.1 veego #define TSENGFONT kernel_font_8x8
126 1.1 veego #define TSENGFONTY 8
127 1.1 veego #endif
128 1.1 veego extern unsigned char TSENGFONT[];
129 1.1 veego
130 1.1 veego struct grfettext_mode etconsole_mode = {
131 1.1 veego {255, "", 25000000, 640, 480, 4, 640/8, 784/8, 680/8, 768/8, 800/8,
132 1.1 veego 481, 521, 491, 493, 525},
133 1.1 veego 8, TSENGFONTY, 640 / 8, 480 / TSENGFONTY, TSENGFONT, 32, 255
134 1.1 veego };
135 1.1 veego
136 1.1 veego /* some modes
137 1.1 veego # 640x480 256colors 41kHz 79Hz active
138 1.1 veego x 31500000 640 480 8 640 752 672 768 728 487 505 488 490 512
139 1.1 veego # 31500000 640 480 8 80 94 84 96 91 487 505 488 490 512
140 1.1 veego # 640x512 256colors 42kHz 76Hz active
141 1.1 veego x 32500000 640 512 8 640 760 664 760 736 519 536 520 522 543
142 1.1 veego # 32500000 640 512 8 80 95 83 95 92 519 536 520 522 543
143 1.1 veego # 720x540 256colors 43kHz 74Hz active
144 1.1 veego x 37500000 720 540 8 720 856 744 840 832 547 565 548 550 572
145 1.1 veego # 37500000 720 540 8 90 107 93 105 104 547 565 548 550 572
146 1.1 veego # 800x600 256colors 48kHz 73Hz active
147 1.1 veego x 50350000 800 600 8 792 1048 864 960 1016 599 648 615 617 647
148 1.1 veego # 50350000 800 600 8 99 131 108 120 127 599 648 615 617 647
149 1.1 veego # 912x684 256colors 57kHz 78Hz active
150 1.1 veego x 65000000 912 684 8 904 1136 944 1040 1104 683 725 693 695 724
151 1.1 veego # 65000000 912 684 8 113 142 118 130 138 683 725 693 695 724
152 1.1 veego # 1024x768 256colors 61kHz 75Hz active
153 1.1 veego x 80000000 1024 768 8 1024 1288 1072 1168 1264 775 806 780 782 813
154 1.1 veego # 80000000 1024 768 8 128 161 134 146 158 775 806 780 782 813
155 1.1 veego # 1120x832 256colors 56kHz 64Hz active
156 1.1 veego x 80000000 1120 832 8 1120 1424 1152 1248 1400 839 848 833 835 855
157 1.1 veego # 80000000 1120 832 8 140 178 144 156 175 839 848 833 835 855
158 1.1 veego */
159 1.1 veego
160 1.1 veego /* Console colors */
161 1.1 veego unsigned char etconscolors[3][3] = { /* background, foreground, hilite */
162 1.1 veego {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
163 1.1 veego };
164 1.1 veego
165 1.1 veego int ettype = 0; /* oMniBus, Domino or Merlin */
166 1.1 veego int etctype = 0; /* ET4000 or ETW32 */
167 1.1 veego int etdtype = 0; /* Type of DAC (see grf_etregs.h) */
168 1.1 veego
169 1.1 veego char etcmap_shift = 0; /* 6 or 8 bit cmap entries */
170 1.1 veego unsigned char pass_toggle; /* passthru status tracker */
171 1.1 veego
172 1.1 veego unsigned char Merlin_switch = 0;
173 1.1 veego
174 1.1 veego /* because all Tseng-boards have 2 configdev entries, one for
175 1.1 veego * framebuffer mem and the other for regs, we have to hold onto
176 1.1 veego * the pointers globally until we match on both. This and 'ettype'
177 1.1 veego * are the primary obsticles to multiple board support, but if you
178 1.1 veego * have multiple boards you have bigger problems than grf_et.
179 1.1 veego */
180 1.1 veego static void *et_fbaddr = 0; /* framebuffer */
181 1.1 veego static void *et_regaddr = 0; /* registers */
182 1.1 veego static int et_fbsize; /* framebuffer size */
183 1.1 veego
184 1.1 veego /* current sprite info, if you add support for multiple boards
185 1.1 veego * make this an array or something
186 1.1 veego */
187 1.1 veego struct grf_spriteinfo et_cursprite;
188 1.1 veego
189 1.1 veego /* sprite bitmaps in kernel stack, you'll need to arrayize these too if
190 1.1 veego * you add multiple board support
191 1.1 veego */
192 1.1 veego static unsigned char et_imageptr[8 * 64], et_maskptr[8 * 64];
193 1.1 veego static unsigned char et_sprred[2], et_sprgreen[2], et_sprblue[2];
194 1.1 veego
195 1.1 veego /* standard driver stuff */
196 1.1 veego struct cfattach grfet_ca = {
197 1.1 veego sizeof(struct grf_softc), grfetmatch, grfetattach
198 1.1 veego };
199 1.1 veego
200 1.1 veego struct cfdriver grfet_cd = {
201 1.1 veego NULL, "grfet", DV_DULL, NULL, 0
202 1.1 veego };
203 1.1 veego static struct cfdata *cfdata;
204 1.1 veego
205 1.1 veego
206 1.1 veego int
207 1.1 veego grfetmatch(pdp, match, auxp)
208 1.1 veego struct device *pdp;
209 1.1 veego void *match, *auxp;
210 1.1 veego {
211 1.1 veego #ifdef TSENGCONSOLE
212 1.1 veego struct cfdata *cfp = match;
213 1.1 veego #endif
214 1.1 veego struct zbus_args *zap;
215 1.1 veego static int regprod, fbprod;
216 1.1 veego
217 1.1 veego zap = auxp;
218 1.1 veego
219 1.1 veego #ifndef TSENGCONSOLE
220 1.1 veego if (amiga_realconfig == 0)
221 1.1 veego return (0);
222 1.1 veego #endif
223 1.1 veego
224 1.1 veego /* Grab the first board we encounter as the preferred one. This will
225 1.1 veego * allow one board to work in a multiple Tseng board system, but not
226 1.1 veego * multiple boards at the same time. */
227 1.1 veego if (ettype == 0) {
228 1.1 veego switch (zap->manid) {
229 1.1 veego case OMNIBUS:
230 1.1 veego if (zap->prodid != 0)
231 1.1 veego return (0);
232 1.1 veego regprod = 0;
233 1.1 veego fbprod = 0;
234 1.1 veego break;
235 1.1 veego case DOMINO:
236 1.1 veego if (zap->prodid != 2 && zap->prodid != 1)
237 1.1 veego return (0);
238 1.1 veego regprod = 2;
239 1.1 veego fbprod = 1;
240 1.1 veego break;
241 1.1 veego case MERLIN:
242 1.1 veego if (zap->prodid != 3 && zap->prodid != 4)
243 1.1 veego return (0);
244 1.1 veego regprod = 4;
245 1.1 veego fbprod = 3;
246 1.1 veego /*
247 1.1 veego * This card works only in ZorroII mode.
248 1.1 veego * ZorroIII needs different initialisations,
249 1.1 veego * which will be implemented later.
250 1.1 veego */
251 1.1 veego if iszthreepa(zap->pa)
252 1.1 veego return (0);
253 1.1 veego break;
254 1.1 veego default:
255 1.1 veego return (0);
256 1.1 veego }
257 1.1 veego ettype = zap->manid;
258 1.1 veego } else {
259 1.1 veego if (ettype != zap->manid) {
260 1.1 veego return (0);
261 1.1 veego }
262 1.1 veego }
263 1.1 veego
264 1.1 veego /* Configure either registers or framebuffer in any order */
265 1.1 veego /* as said before, oMniBus does not support ProdID */
266 1.1 veego if (ettype == OMNIBUS) {
267 1.1 veego if (zap->size == 64 * 1024) {
268 1.1 veego /* register area */
269 1.1 veego et_regaddr = zap->va;
270 1.1 veego } else {
271 1.1 veego /* memory area */
272 1.1 veego et_fbaddr = zap->va;
273 1.1 veego et_fbsize = zap->size;
274 1.1 veego }
275 1.1 veego } else {
276 1.1 veego if (zap->prodid == regprod) {
277 1.1 veego et_regaddr = zap->va;
278 1.1 veego } else {
279 1.1 veego if (zap->prodid == fbprod) {
280 1.1 veego et_fbaddr = zap->va;
281 1.1 veego et_fbsize = zap->size;
282 1.1 veego } else {
283 1.1 veego return (0);
284 1.1 veego }
285 1.1 veego }
286 1.1 veego }
287 1.1 veego
288 1.1 veego #ifdef TSENGCONSOLE
289 1.1 veego if (amiga_realconfig == 0) {
290 1.1 veego cfdata = cfp;
291 1.1 veego }
292 1.1 veego #endif
293 1.1 veego
294 1.1 veego return (1);
295 1.1 veego }
296 1.1 veego
297 1.1 veego
298 1.1 veego void
299 1.1 veego grfetattach(pdp, dp, auxp)
300 1.1 veego struct device *pdp, *dp;
301 1.1 veego void *auxp;
302 1.1 veego {
303 1.1 veego static struct grf_softc congrf;
304 1.1 veego struct zbus_args *zap;
305 1.1 veego struct grf_softc *gp;
306 1.1 veego static char attachflag = 0;
307 1.1 veego
308 1.1 veego zap = auxp;
309 1.1 veego
310 1.1 veego printf("\n");
311 1.1 veego
312 1.1 veego /* make sure both halves have matched */
313 1.1 veego if (!et_regaddr || !et_fbaddr)
314 1.1 veego return;
315 1.1 veego
316 1.1 veego if (zap->manid == MERLIN && iszthreepa(zap->pa)) {
317 1.1 veego printf("grfet: WARNING: It is not possible to use the Merlin in ZorroIII mode.\n");
318 1.1 veego printf("grfet: Switch the Jumper to use it in ZorroII mode.\n");
319 1.1 veego printf("grfet unattached!!\n");
320 1.1 veego return;
321 1.1 veego }
322 1.1 veego
323 1.1 veego /* do all that messy console/grf stuff */
324 1.1 veego if (dp == NULL)
325 1.1 veego gp = &congrf;
326 1.1 veego else
327 1.1 veego gp = (struct grf_softc *) dp;
328 1.1 veego
329 1.1 veego if (dp != NULL && congrf.g_regkva != 0) {
330 1.1 veego /*
331 1.1 veego * inited earlier, just copy (not device struct)
332 1.1 veego */
333 1.1 veego bcopy(&congrf.g_display, &gp->g_display,
334 1.1 veego (char *) &gp[1] - (char *) &gp->g_display);
335 1.1 veego } else {
336 1.1 veego gp->g_regkva = (volatile caddr_t) et_regaddr;
337 1.1 veego gp->g_fbkva = (volatile caddr_t) et_fbaddr;
338 1.1 veego
339 1.1 veego gp->g_unit = GRF_ET4000_UNIT;
340 1.1 veego gp->g_mode = et_mode;
341 1.1 veego gp->g_conpri = grfet_cnprobe();
342 1.1 veego gp->g_flags = GF_ALIVE;
343 1.1 veego
344 1.1 veego /* wakeup the board */
345 1.1 veego et_boardinit(gp);
346 1.1 veego
347 1.1 veego #ifdef TSENGCONSOLE
348 1.1 veego grfet_iteinit(gp);
349 1.1 veego (void) et_load_mon(gp, &etconsole_mode);
350 1.1 veego #endif
351 1.1 veego }
352 1.1 veego
353 1.1 veego /*
354 1.1 veego * attach grf (once)
355 1.1 veego */
356 1.1 veego if (amiga_config_found(cfdata, &gp->g_device, gp, grfetprint)) {
357 1.1 veego attachflag = 1;
358 1.1 veego printf("grfet: %dMB ", et_fbsize / 0x100000);
359 1.1 veego switch (ettype) {
360 1.1 veego case OMNIBUS:
361 1.1 veego printf("oMniBus");
362 1.1 veego break;
363 1.1 veego case DOMINO:
364 1.1 veego printf("Domino");
365 1.1 veego break;
366 1.1 veego case MERLIN:
367 1.1 veego printf("Merlin");
368 1.1 veego break;
369 1.1 veego }
370 1.1 veego printf(" with ");
371 1.1 veego switch (etctype) {
372 1.1 veego case ET4000:
373 1.1 veego printf("Tseng ET4000");
374 1.1 veego break;
375 1.1 veego case ETW32:
376 1.1 veego printf("Tseng ETW32");
377 1.1 veego break;
378 1.1 veego }
379 1.1 veego printf(" and ");
380 1.1 veego switch (etdtype) {
381 1.1 veego case SIERRA11483:
382 1.1 veego printf("Sierra SC11483 DAC");
383 1.1 veego break;
384 1.1 veego case SIERRA15025:
385 1.1 veego printf("Sierra SC15025 DAC");
386 1.1 veego break;
387 1.1 veego case MUSICDAC:
388 1.1 veego printf("MUSIC DAC");
389 1.1 veego break;
390 1.1 veego case MERLINDAC:
391 1.1 veego printf("BrookTree DAC");
392 1.1 veego break;
393 1.1 veego }
394 1.1 veego printf(" being used\n");
395 1.1 veego } else {
396 1.1 veego if (!attachflag)
397 1.1 veego printf("grfet unattached!!\n");
398 1.1 veego }
399 1.1 veego }
400 1.1 veego
401 1.1 veego
402 1.1 veego int
403 1.1 veego grfetprint(auxp, pnp)
404 1.1 veego void *auxp;
405 1.1 veego char *pnp;
406 1.1 veego {
407 1.1 veego if (pnp)
408 1.1 veego printf("ite at %s: ", pnp);
409 1.1 veego return (UNCONF);
410 1.1 veego }
411 1.1 veego
412 1.1 veego
413 1.1 veego void
414 1.1 veego et_boardinit(gp)
415 1.1 veego struct grf_softc *gp;
416 1.1 veego {
417 1.1 veego unsigned char *ba = gp->g_regkva;
418 1.1 veego int x;
419 1.1 veego
420 1.1 veego /* wakeup board and flip passthru OFF */
421 1.1 veego
422 1.1 veego RegWakeup(ba);
423 1.1 veego RegOnpass(ba);
424 1.1 veego
425 1.1 veego if (ettype == MERLIN) {
426 1.1 veego /* Merlin needs some special initialisations */
427 1.1 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
428 1.1 veego delay(20000);
429 1.1 veego vgaw(ba, MERLIN_SWITCH_REG, 8);
430 1.1 veego delay(20000);
431 1.1 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
432 1.1 veego delay(20000);
433 1.1 veego vgaw(ba, MERLIN_VDAC_DATA, 1);
434 1.1 veego
435 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x00);
436 1.1 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0xff);
437 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x01);
438 1.1 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x0f);
439 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x02);
440 1.1 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x42);
441 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x03);
442 1.1 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x00);
443 1.1 veego
444 1.1 veego vgaw(ba, MERLIN_VDAC_DATA, 0);
445 1.1 veego }
446 1.1 veego
447 1.1 veego
448 1.1 veego /* setup initial unchanging parameters */
449 1.1 veego
450 1.1 veego vgaw(ba, GREG_HERCULESCOMPAT, 0x03);
451 1.1 veego vgaw(ba, GREG_DISPMODECONTROL, 0xa0);
452 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0x63);
453 1.1 veego
454 1.1 veego WSeq(ba, SEQ_ID_RESET, 0x03);
455 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot, Display off */
456 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
457 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
458 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e);
459 1.1 veego /* WSeq(ba, SEQ_ID_TS_STATE_CONTROL, 0x00); */
460 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
461 1.1 veego
462 1.1 veego WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
463 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
464 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, 0x08);
465 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
466 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
467 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
468 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
469 1.1 veego
470 1.1 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07);
471 1.1 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xa3); /* c3 */
472 1.1 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */
473 1.1 veego /*
474 1.1 veego WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22);
475 1.1 veego */
476 1.1 veego /* ET4000 special */
477 1.1 veego WCrt(ba, CRT_ID_RASCAS_CONFIG, 0x28);
478 1.1 veego WCrt(ba, CTR_ID_EXT_START, 0x00);
479 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, 0x08);
480 1.1 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
481 1.1 veego WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x0f);
482 1.1 veego WCrt(ba, CRT_ID_HOR_OVERFLOW, 0x00);
483 1.1 veego
484 1.1 veego WGfx(ba, GCT_ID_SET_RESET, 0x00);
485 1.1 veego WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
486 1.1 veego WGfx(ba, GCT_ID_COLOR_COMPARE, 0x00);
487 1.1 veego WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
488 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
489 1.1 veego WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
490 1.1 veego WGfx(ba, GCT_ID_MISC, 0x01);
491 1.1 veego WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
492 1.1 veego WGfx(ba, GCT_ID_BITMASK, 0xff);
493 1.1 veego
494 1.1 veego vgaw(ba, GREG_SEGMENTSELECT, 0x00);
495 1.1 veego
496 1.1 veego for (x = 0; x < 0x10; x++)
497 1.1 veego WAttr(ba, x, x);
498 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
499 1.1 veego WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
500 1.1 veego WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
501 1.1 veego WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
502 1.1 veego WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
503 1.1 veego WAttr(ba, ACT_ID_MISCELLANEOUS, 0x00);
504 1.1 veego
505 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
506 1.1 veego delay(200000);
507 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3); /* c3 */
508 1.1 veego
509 1.1 veego /* colors initially set to greyscale */
510 1.1 veego
511 1.1 veego switch(ettype) {
512 1.1 veego case MERLIN:
513 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
514 1.1 veego for (x = 255; x >= 0; x--) {
515 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
516 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
517 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
518 1.1 veego }
519 1.1 veego break;
520 1.1 veego default:
521 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
522 1.1 veego for (x = 255; x >= 0; x--) {
523 1.1 veego vgaw(ba, VDAC_DATA, x);
524 1.1 veego vgaw(ba, VDAC_DATA, x);
525 1.1 veego vgaw(ba, VDAC_DATA, x);
526 1.1 veego }
527 1.1 veego break;
528 1.1 veego }
529 1.1 veego /* set sprite bitmap pointers */
530 1.1 veego /* should work like that */
531 1.1 veego et_cursprite.image = et_imageptr;
532 1.1 veego et_cursprite.mask = et_maskptr;
533 1.1 veego et_cursprite.cmap.red = et_sprred;
534 1.1 veego et_cursprite.cmap.green = et_sprgreen;
535 1.1 veego et_cursprite.cmap.blue = et_sprblue;
536 1.1 veego
537 1.1 veego /* card spezific initialisations */
538 1.1 veego switch(ettype) {
539 1.1 veego case OMNIBUS:
540 1.1 veego etctype = et_getControllerType(gp);
541 1.1 veego etdtype = et_getDACType(gp);
542 1.1 veego break;
543 1.1 veego case MERLIN:
544 1.1 veego etctype = ETW32;
545 1.1 veego etdtype = MERLINDAC;
546 1.1 veego break;
547 1.1 veego case DOMINO:
548 1.1 veego etctype = ET4000;
549 1.1 veego etdtype = SIERRA11483;
550 1.1 veego break;
551 1.1 veego }
552 1.1 veego }
553 1.1 veego
554 1.1 veego
555 1.1 veego int
556 1.1 veego et_getvmode(gp, vm)
557 1.1 veego struct grf_softc *gp;
558 1.1 veego struct grfvideo_mode *vm;
559 1.1 veego {
560 1.1 veego struct grfvideo_mode *gv;
561 1.1 veego
562 1.1 veego #ifdef TSENGCONSOLE
563 1.1 veego /* Handle grabbing console mode */
564 1.1 veego if (vm->mode_num == 255) {
565 1.1 veego bcopy(&etconsole_mode, vm, sizeof(struct grfvideo_mode));
566 1.1 veego /* XXX so grfconfig can tell us the correct text dimensions. */
567 1.1 veego vm->depth = etconsole_mode.fy;
568 1.1 veego } else
569 1.1 veego #endif
570 1.1 veego {
571 1.1 veego if (vm->mode_num == 0)
572 1.1 veego vm->mode_num = (monitor_current - monitor_def) + 1;
573 1.1 veego if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
574 1.1 veego return (EINVAL);
575 1.1 veego gv = monitor_def + (vm->mode_num - 1);
576 1.1 veego if (gv->mode_num == 0)
577 1.1 veego return (EINVAL);
578 1.1 veego
579 1.1 veego bcopy(gv, vm, sizeof(struct grfvideo_mode));
580 1.1 veego }
581 1.1 veego
582 1.1 veego /* adjust internal values to pixel values */
583 1.1 veego
584 1.1 veego vm->hblank_start *= 8;
585 1.1 veego vm->hblank_stop *= 8;
586 1.1 veego vm->hsync_start *= 8;
587 1.1 veego vm->hsync_stop *= 8;
588 1.1 veego vm->htotal *= 8;
589 1.1 veego
590 1.1 veego return (0);
591 1.1 veego }
592 1.1 veego
593 1.1 veego
594 1.1 veego int
595 1.1 veego et_setvmode(gp, mode)
596 1.1 veego struct grf_softc *gp;
597 1.1 veego unsigned mode;
598 1.1 veego {
599 1.1 veego if (!mode || (mode > monitor_def_max) ||
600 1.1 veego monitor_def[mode - 1].mode_num == 0)
601 1.1 veego return (EINVAL);
602 1.1 veego
603 1.1 veego monitor_current = monitor_def + (mode - 1);
604 1.1 veego
605 1.1 veego return (0);
606 1.1 veego }
607 1.1 veego
608 1.1 veego
609 1.1 veego #ifndef TSENGCONSOLE
610 1.1 veego void
611 1.1 veego et_off(gp)
612 1.1 veego struct grf_softc *gp;
613 1.1 veego {
614 1.1 veego char *ba = gp->g_regkva;
615 1.1 veego
616 1.1 veego /* we'll put the pass-through on for cc ite and set Full Bandwidth bit
617 1.1 veego * on just in case it didn't work...but then it doesn't matter does
618 1.1 veego * it? =) */
619 1.1 veego RegOnpass(ba);
620 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);
621 1.1 veego }
622 1.1 veego #endif
623 1.1 veego
624 1.1 veego
625 1.1 veego int
626 1.1 veego et_blank(gp, on)
627 1.1 veego struct grf_softc *gp;
628 1.1 veego int *on;
629 1.1 veego {
630 1.2 is WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21);
631 1.1 veego return(0);
632 1.1 veego }
633 1.1 veego
634 1.1 veego
635 1.1 veego /*
636 1.1 veego * Change the mode of the display.
637 1.1 veego * Return a UNIX error number or 0 for success.
638 1.1 veego */
639 1.1 veego int
640 1.1 veego et_mode(gp, cmd, arg, a2, a3)
641 1.1 veego register struct grf_softc *gp;
642 1.1 veego u_long cmd;
643 1.1 veego void *arg;
644 1.1 veego u_long a2;
645 1.1 veego int a3;
646 1.1 veego {
647 1.1 veego int error;
648 1.1 veego
649 1.1 veego switch (cmd) {
650 1.1 veego case GM_GRFON:
651 1.1 veego error = et_load_mon(gp,
652 1.1 veego (struct grfettext_mode *) monitor_current) ? 0 : EINVAL;
653 1.1 veego return (error);
654 1.1 veego
655 1.1 veego case GM_GRFOFF:
656 1.1 veego #ifndef TSENGCONSOLE
657 1.1 veego et_off(gp);
658 1.1 veego #else
659 1.1 veego et_load_mon(gp, &etconsole_mode);
660 1.1 veego #endif
661 1.1 veego return (0);
662 1.1 veego
663 1.1 veego case GM_GRFCONFIG:
664 1.1 veego return (0);
665 1.1 veego
666 1.1 veego case GM_GRFGETVMODE:
667 1.1 veego return (et_getvmode(gp, (struct grfvideo_mode *) arg));
668 1.1 veego
669 1.1 veego case GM_GRFSETVMODE:
670 1.1 veego error = et_setvmode(gp, *(unsigned *) arg);
671 1.1 veego if (!error && (gp->g_flags & GF_GRFON))
672 1.1 veego et_load_mon(gp,
673 1.1 veego (struct grfettext_mode *) monitor_current);
674 1.1 veego return (error);
675 1.1 veego
676 1.1 veego case GM_GRFGETNUMVM:
677 1.1 veego *(int *) arg = monitor_def_max;
678 1.1 veego return (0);
679 1.1 veego
680 1.1 veego case GM_GRFIOCTL:
681 1.1 veego return (et_ioctl(gp, a2, arg));
682 1.1 veego
683 1.1 veego default:
684 1.1 veego break;
685 1.1 veego }
686 1.1 veego
687 1.1 veego return (EINVAL);
688 1.1 veego }
689 1.1 veego
690 1.1 veego int
691 1.1 veego et_ioctl(gp, cmd, data)
692 1.1 veego register struct grf_softc *gp;
693 1.1 veego u_long cmd;
694 1.1 veego void *data;
695 1.1 veego {
696 1.1 veego switch (cmd) {
697 1.1 veego case GRFIOCGSPRITEPOS:
698 1.1 veego return (et_getmousepos(gp, (struct grf_position *) data));
699 1.1 veego
700 1.1 veego case GRFIOCSSPRITEPOS:
701 1.1 veego return (et_setmousepos(gp, (struct grf_position *) data));
702 1.1 veego
703 1.1 veego case GRFIOCSSPRITEINF:
704 1.1 veego return (et_setspriteinfo(gp, (struct grf_spriteinfo *) data));
705 1.1 veego
706 1.1 veego case GRFIOCGSPRITEINF:
707 1.1 veego return (et_getspriteinfo(gp, (struct grf_spriteinfo *) data));
708 1.1 veego
709 1.1 veego case GRFIOCGSPRITEMAX:
710 1.1 veego return (et_getspritemax(gp, (struct grf_position *) data));
711 1.1 veego
712 1.1 veego case GRFIOCGETCMAP:
713 1.1 veego return (et_getcmap(gp, (struct grf_colormap *) data));
714 1.1 veego
715 1.1 veego case GRFIOCPUTCMAP:
716 1.1 veego return (et_putcmap(gp, (struct grf_colormap *) data));
717 1.1 veego
718 1.1 veego case GRFIOCBITBLT:
719 1.1 veego break;
720 1.1 veego
721 1.1 veego case GRFTOGGLE:
722 1.1 veego return (et_toggle(gp, 0));
723 1.1 veego
724 1.1 veego case GRFIOCSETMON:
725 1.1 veego return (et_setmonitor(gp, (struct grfvideo_mode *) data));
726 1.1 veego
727 1.1 veego case GRFIOCBLANK:
728 1.1 veego return (et_blank(gp, (int *)data));
729 1.1 veego }
730 1.1 veego return (EINVAL);
731 1.1 veego }
732 1.1 veego
733 1.1 veego
734 1.1 veego int
735 1.1 veego et_getmousepos(gp, data)
736 1.1 veego struct grf_softc *gp;
737 1.1 veego struct grf_position *data;
738 1.1 veego {
739 1.1 veego data->x = et_cursprite.pos.x;
740 1.1 veego data->y = et_cursprite.pos.y;
741 1.1 veego return (0);
742 1.1 veego }
743 1.1 veego
744 1.1 veego
745 1.1 veego void
746 1.1 veego et_writesprpos(ba, x, y)
747 1.1 veego volatile char *ba;
748 1.1 veego short x;
749 1.1 veego short y;
750 1.1 veego {
751 1.1 veego }
752 1.1 veego
753 1.1 veego
754 1.1 veego #ifdef notyet
755 1.1 veego void
756 1.1 veego et_writeshifted(to, shiftx, shifty)
757 1.1 veego unsigned char *to;
758 1.1 veego char shiftx;
759 1.1 veego char shifty;
760 1.1 veego {
761 1.1 veego }
762 1.1 veego #endif
763 1.1 veego
764 1.1 veego
765 1.1 veego int
766 1.1 veego et_setmousepos(gp, data)
767 1.1 veego struct grf_softc *gp;
768 1.1 veego struct grf_position *data;
769 1.1 veego {
770 1.1 veego volatile char *ba = gp->g_regkva;
771 1.1 veego #if 0
772 1.1 veego volatile char *fb = gp->g_fbkva;
773 1.1 veego volatile char *sprite = fb + (et_fbsize - 1024);
774 1.1 veego #endif
775 1.1 veego short rx, ry, prx, pry;
776 1.1 veego
777 1.1 veego /* no movement */
778 1.1 veego if (et_cursprite.pos.x == data->x && et_cursprite.pos.y == data->y)
779 1.1 veego return (0);
780 1.1 veego
781 1.1 veego /* current and previous real coordinates */
782 1.1 veego rx = data->x - et_cursprite.hot.x;
783 1.1 veego ry = data->y - et_cursprite.hot.y;
784 1.1 veego prx = et_cursprite.pos.x - et_cursprite.hot.x;
785 1.1 veego pry = et_cursprite.pos.y - et_cursprite.hot.y;
786 1.1 veego
787 1.1 veego /* if we are/were on an edge, create (un)shifted bitmap --
788 1.1 veego * ripped out optimization (not extremely worthwhile,
789 1.1 veego * and kind of buggy anyhow).
790 1.1 veego */
791 1.1 veego #ifdef notyet
792 1.1 veego if (rx < 0 || ry < 0 || prx < 0 || pry < 0) {
793 1.1 veego et_writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0);
794 1.1 veego }
795 1.1 veego #endif
796 1.1 veego
797 1.1 veego /* do movement, save position */
798 1.1 veego et_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
799 1.1 veego et_cursprite.pos.x = data->x;
800 1.1 veego et_cursprite.pos.y = data->y;
801 1.1 veego
802 1.1 veego return (0);
803 1.1 veego }
804 1.1 veego
805 1.1 veego
806 1.1 veego int
807 1.1 veego et_getspriteinfo(gp, data)
808 1.1 veego struct grf_softc *gp;
809 1.1 veego struct grf_spriteinfo *data;
810 1.1 veego {
811 1.1 veego
812 1.1 veego return(EINVAL);
813 1.1 veego }
814 1.1 veego
815 1.1 veego
816 1.1 veego static int
817 1.1 veego et_setspriteinfo(gp, data)
818 1.1 veego struct grf_softc *gp;
819 1.1 veego struct grf_spriteinfo *data;
820 1.1 veego {
821 1.1 veego
822 1.1 veego return(EINVAL);
823 1.1 veego }
824 1.1 veego
825 1.1 veego
826 1.1 veego static int
827 1.1 veego et_getspritemax(gp, data)
828 1.1 veego struct grf_softc *gp;
829 1.1 veego struct grf_position *data;
830 1.1 veego {
831 1.1 veego
832 1.1 veego return(EINVAL);
833 1.1 veego }
834 1.1 veego
835 1.1 veego
836 1.1 veego int
837 1.1 veego et_setmonitor(gp, gv)
838 1.1 veego struct grf_softc *gp;
839 1.1 veego struct grfvideo_mode *gv;
840 1.1 veego {
841 1.1 veego struct grfvideo_mode *md;
842 1.1 veego
843 1.1 veego if (!et_mondefok(gv))
844 1.1 veego return(EINVAL);
845 1.1 veego
846 1.1 veego #ifdef TSENGCONSOLE
847 1.1 veego /* handle interactive setting of console mode */
848 1.1 veego if (gv->mode_num == 255) {
849 1.1 veego bcopy(gv, &etconsole_mode.gv, sizeof(struct grfvideo_mode));
850 1.1 veego etconsole_mode.gv.hblank_start /= 8;
851 1.1 veego etconsole_mode.gv.hblank_stop /= 8;
852 1.1 veego etconsole_mode.gv.hsync_start /= 8;
853 1.1 veego etconsole_mode.gv.hsync_stop /= 8;
854 1.1 veego etconsole_mode.gv.htotal /= 8;
855 1.1 veego etconsole_mode.rows = gv->disp_height / etconsole_mode.fy;
856 1.1 veego etconsole_mode.cols = gv->disp_width / etconsole_mode.fx;
857 1.1 veego if (!(gp->g_flags & GF_GRFON))
858 1.1 veego et_load_mon(gp, &etconsole_mode);
859 1.1 veego ite_reinit(gp->g_itedev);
860 1.1 veego return (0);
861 1.1 veego }
862 1.1 veego #endif
863 1.1 veego
864 1.1 veego md = monitor_def + (gv->mode_num - 1);
865 1.1 veego bcopy(gv, md, sizeof(struct grfvideo_mode));
866 1.1 veego
867 1.1 veego /* adjust pixel oriented values to internal rep. */
868 1.1 veego
869 1.1 veego md->hblank_start /= 8;
870 1.1 veego md->hblank_stop /= 8;
871 1.1 veego md->hsync_start /= 8;
872 1.1 veego md->hsync_stop /= 8;
873 1.1 veego md->htotal /= 8;
874 1.1 veego
875 1.1 veego return (0);
876 1.1 veego }
877 1.1 veego
878 1.1 veego
879 1.1 veego int
880 1.1 veego et_getcmap(gfp, cmap)
881 1.1 veego struct grf_softc *gfp;
882 1.1 veego struct grf_colormap *cmap;
883 1.1 veego {
884 1.1 veego volatile unsigned char *ba;
885 1.1 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
886 1.1 veego short x;
887 1.1 veego int error;
888 1.1 veego
889 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
890 1.1 veego return 0;
891 1.1 veego
892 1.1 veego if (cmap->index + cmap->count > 256)
893 1.1 veego cmap->count = 256 - cmap->index;
894 1.1 veego
895 1.1 veego ba = gfp->g_regkva;
896 1.1 veego /* first read colors out of the chip, then copyout to userspace */
897 1.1 veego x = cmap->count - 1;
898 1.1 veego
899 1.1 veego rp = red + cmap->index;
900 1.1 veego gp = green + cmap->index;
901 1.1 veego bp = blue + cmap->index;
902 1.1 veego
903 1.1 veego switch(ettype) {
904 1.1 veego case MERLIN:
905 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
906 1.1 veego do {
907 1.1 veego *rp++ = vgar(ba, MERLIN_VDAC_COLORS);
908 1.1 veego *gp++ = vgar(ba, MERLIN_VDAC_COLORS);
909 1.1 veego *bp++ = vgar(ba, MERLIN_VDAC_COLORS);
910 1.1 veego } while (x-- > 0);
911 1.1 veego break;
912 1.1 veego default:
913 1.1 veego vgaw(ba, VDAC_ADDRESS_W, cmap->index);
914 1.1 veego do {
915 1.1 veego *rp++ = vgar(ba, VDAC_DATA) << etcmap_shift;
916 1.1 veego *gp++ = vgar(ba, VDAC_DATA) << etcmap_shift;
917 1.1 veego *bp++ = vgar(ba, VDAC_DATA) << etcmap_shift;
918 1.1 veego } while (x-- > 0);
919 1.1 veego break;
920 1.1 veego }
921 1.1 veego
922 1.1 veego if (!(error = copyout(red + cmap->index, cmap->red, cmap->count))
923 1.1 veego && !(error = copyout(green + cmap->index, cmap->green, cmap->count))
924 1.1 veego && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count)))
925 1.1 veego return (0);
926 1.1 veego
927 1.1 veego return (error);
928 1.1 veego }
929 1.1 veego
930 1.1 veego
931 1.1 veego int
932 1.1 veego et_putcmap(gfp, cmap)
933 1.1 veego struct grf_softc *gfp;
934 1.1 veego struct grf_colormap *cmap;
935 1.1 veego {
936 1.1 veego volatile unsigned char *ba;
937 1.1 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
938 1.1 veego short x;
939 1.1 veego int error;
940 1.1 veego
941 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
942 1.1 veego return (0);
943 1.1 veego
944 1.1 veego if (cmap->index + cmap->count > 256)
945 1.1 veego cmap->count = 256 - cmap->index;
946 1.1 veego
947 1.1 veego /* first copy the colors into kernelspace */
948 1.1 veego if (!(error = copyin(cmap->red, red + cmap->index, cmap->count))
949 1.1 veego && !(error = copyin(cmap->green, green + cmap->index, cmap->count))
950 1.1 veego && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) {
951 1.1 veego ba = gfp->g_regkva;
952 1.1 veego x = cmap->count - 1;
953 1.1 veego
954 1.1 veego rp = red + cmap->index;
955 1.1 veego gp = green + cmap->index;
956 1.1 veego bp = blue + cmap->index;
957 1.1 veego
958 1.1 veego switch(ettype){
959 1.1 veego case MERLIN:
960 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
961 1.1 veego do {
962 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, *rp++);
963 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, *gp++);
964 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, *bp++);
965 1.1 veego } while (x-- > 0);
966 1.1 veego break;
967 1.1 veego default:
968 1.1 veego vgaw(ba, VDAC_ADDRESS_W, cmap->index);
969 1.1 veego do {
970 1.1 veego vgaw(ba, VDAC_DATA, *rp++ >> etcmap_shift);
971 1.1 veego vgaw(ba, VDAC_DATA, *gp++ >> etcmap_shift);
972 1.1 veego vgaw(ba, VDAC_DATA, *bp++ >> etcmap_shift);
973 1.1 veego } while (x-- > 0);
974 1.1 veego break;
975 1.1 veego }
976 1.1 veego
977 1.1 veego return (0);
978 1.1 veego } else
979 1.1 veego return (error);
980 1.1 veego }
981 1.1 veego
982 1.1 veego
983 1.1 veego int
984 1.1 veego et_toggle(gp, wopp)
985 1.1 veego struct grf_softc *gp;
986 1.1 veego unsigned short wopp; /* don't need that one yet, ill */
987 1.1 veego {
988 1.1 veego volatile unsigned char *ba;
989 1.1 veego
990 1.1 veego ba = gp->g_regkva;
991 1.1 veego
992 1.1 veego if (pass_toggle) {
993 1.1 veego RegOffpass(ba);
994 1.1 veego } else {
995 1.1 veego RegOnpass(ba);
996 1.1 veego }
997 1.1 veego return (0);
998 1.1 veego }
999 1.1 veego
1000 1.1 veego #define ET_NUMCLOCKS 32
1001 1.1 veego
1002 1.1 veego static u_char et_clocks[ET_NUMCLOCKS] = {
1003 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
1004 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
1005 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
1006 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5
1007 1.1 veego };
1008 1.1 veego
1009 1.1 veego static u_char et_clockdividers[ET_NUMCLOCKS] = {
1010 1.1 veego 3, 3, 3, 3, 3, 3, 3, 3,
1011 1.1 veego 2, 2, 2, 2, 2, 2, 2, 2,
1012 1.1 veego 1, 1, 1, 1, 1, 1, 1, 1,
1013 1.1 veego 0, 0, 0, 0, 0, 0, 0, 0
1014 1.1 veego };
1015 1.1 veego
1016 1.1 veego static u_int et_clockfreqs[ET_NUMCLOCKS] = {
1017 1.1 veego 6293750, 7080500, 7875000, 8125000,
1018 1.1 veego 9000000, 9375000, 10000000, 11225000,
1019 1.1 veego 12587500, 14161000, 15750000, 16250000,
1020 1.1 veego 18000000, 18750000, 20000000, 22450000,
1021 1.1 veego 25175000, 28322000, 31500000, 32500000,
1022 1.1 veego 36000000, 37500000, 40000000, 44900000,
1023 1.1 veego 50350000, 56644000, 63000000, 65000000,
1024 1.1 veego 72000000, 75000000, 80000000, 89800000
1025 1.1 veego };
1026 1.1 veego
1027 1.1 veego
1028 1.1 veego static void
1029 1.1 veego et_CompFQ(fq, num, denom)
1030 1.1 veego u_int fq;
1031 1.1 veego u_char *num;
1032 1.1 veego u_char *denom;
1033 1.1 veego {
1034 1.1 veego int i;
1035 1.1 veego
1036 1.1 veego for (i=0; i < ET_NUMCLOCKS;) {
1037 1.1 veego if (fq <= et_clockfreqs[i++]) {
1038 1.1 veego break;
1039 1.1 veego }
1040 1.1 veego }
1041 1.1 veego
1042 1.1 veego *num = et_clocks[--i];
1043 1.1 veego *denom = et_clockdividers[i];
1044 1.1 veego
1045 1.1 veego return;
1046 1.1 veego }
1047 1.1 veego
1048 1.1 veego
1049 1.1 veego int
1050 1.1 veego et_mondefok(gv)
1051 1.1 veego struct grfvideo_mode *gv;
1052 1.1 veego {
1053 1.1 veego
1054 1.1 veego if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
1055 1.1 veego if (gv->mode_num != 255 || gv->depth != 4)
1056 1.1 veego return(0);
1057 1.1 veego
1058 1.1 veego switch (gv->depth) {
1059 1.1 veego case 4:
1060 1.1 veego if (gv->mode_num != 255)
1061 1.1 veego return(0);
1062 1.1 veego case 1:
1063 1.1 veego case 8:
1064 1.1 veego case 15:
1065 1.1 veego case 16:
1066 1.1 veego case 24:
1067 1.1 veego break;
1068 1.1 veego default:
1069 1.1 veego return (0);
1070 1.1 veego }
1071 1.1 veego return (1);
1072 1.1 veego }
1073 1.1 veego
1074 1.1 veego
1075 1.1 veego int
1076 1.1 veego et_load_mon(gp, md)
1077 1.1 veego struct grf_softc *gp;
1078 1.1 veego struct grfettext_mode *md;
1079 1.1 veego {
1080 1.1 veego struct grfvideo_mode *gv;
1081 1.1 veego struct grfinfo *gi;
1082 1.1 veego volatile unsigned char *ba;
1083 1.1 veego unsigned char num0, denom0;
1084 1.1 veego unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
1085 1.1 veego VSE, VT;
1086 1.1 veego char LACE, DBLSCAN, TEXT;
1087 1.1 veego unsigned char seq;
1088 1.1 veego int uplim, lowlim;
1089 1.1 veego
1090 1.1 veego /* identity */
1091 1.1 veego gv = &md->gv;
1092 1.1 veego TEXT = (gv->depth == 4);
1093 1.1 veego
1094 1.1 veego if (!et_mondefok(gv)) {
1095 1.1 veego printf("mondef not ok\n");
1096 1.1 veego return (0);
1097 1.1 veego }
1098 1.1 veego ba = gp->g_regkva;
1099 1.1 veego
1100 1.1 veego /* provide all needed information in grf device-independant locations */
1101 1.1 veego gp->g_data = (caddr_t) gv;
1102 1.1 veego gi = &gp->g_display;
1103 1.1 veego gi->gd_regaddr = (caddr_t) ztwopa(ba);
1104 1.1 veego gi->gd_regsize = 64 * 1024;
1105 1.1 veego gi->gd_fbaddr = (caddr_t) kvtop(gp->g_fbkva);
1106 1.1 veego gi->gd_fbsize = et_fbsize;
1107 1.1 veego gi->gd_colors = 1 << gv->depth;
1108 1.1 veego gi->gd_planes = gv->depth;
1109 1.1 veego gi->gd_fbwidth = gv->disp_width;
1110 1.1 veego gi->gd_fbheight = gv->disp_height;
1111 1.1 veego gi->gd_fbx = 0;
1112 1.1 veego gi->gd_fby = 0;
1113 1.1 veego if (TEXT) {
1114 1.1 veego gi->gd_dwidth = md->fx * md->cols;
1115 1.1 veego gi->gd_dheight = md->fy * md->rows;
1116 1.1 veego } else {
1117 1.1 veego gi->gd_dwidth = gv->disp_width;
1118 1.1 veego gi->gd_dheight = gv->disp_height;
1119 1.1 veego }
1120 1.1 veego gi->gd_dx = 0;
1121 1.1 veego gi->gd_dy = 0;
1122 1.1 veego
1123 1.1 veego /* get display mode parameters */
1124 1.1 veego
1125 1.1 veego HBS = gv->hblank_start;
1126 1.1 veego HBE = gv->hblank_stop;
1127 1.1 veego HSS = gv->hsync_start;
1128 1.1 veego HSE = gv->hsync_stop;
1129 1.1 veego HT = gv->htotal;
1130 1.1 veego VBS = gv->vblank_start;
1131 1.1 veego VSS = gv->vsync_start;
1132 1.1 veego VSE = gv->vsync_stop;
1133 1.1 veego VBE = gv->vblank_stop;
1134 1.1 veego VT = gv->vtotal;
1135 1.1 veego
1136 1.1 veego if (TEXT)
1137 1.1 veego HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
1138 1.1 veego else
1139 1.1 veego HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */
1140 1.1 veego VDE = gv->disp_height - 1;
1141 1.1 veego
1142 1.1 veego /* figure out whether lace or dblscan is needed */
1143 1.1 veego
1144 1.1 veego uplim = gv->disp_height + (gv->disp_height / 4);
1145 1.1 veego lowlim = gv->disp_height - (gv->disp_height / 4);
1146 1.1 veego LACE = (((VT * 2) > lowlim) && ((VT * 2) < uplim)) ? 1 : 0;
1147 1.1 veego DBLSCAN = (((VT / 2) > lowlim) && ((VT / 2) < uplim)) ? 1 : 0;
1148 1.1 veego
1149 1.1 veego /* adjustments */
1150 1.1 veego
1151 1.1 veego if (LACE)
1152 1.1 veego VDE /= 2;
1153 1.1 veego
1154 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
1155 1.1 veego
1156 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1157 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
1158 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
1159 1.1 veego
1160 1.1 veego /* Set clock */
1161 1.1 veego
1162 1.1 veego et_CompFQ( gv->pixel_clock, &num0, &denom0);
1163 1.1 veego
1164 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3 | ((num0 & 3) << 2));
1165 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, (num0 & 4) ? 0x0a : 0x08);
1166 1.1 veego seq=RSeq(ba, SEQ_ID_CLOCKING_MODE);
1167 1.1 veego switch(denom0) {
1168 1.1 veego case 0:
1169 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xb4);
1170 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1171 1.1 veego break;
1172 1.1 veego case 1:
1173 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
1174 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1175 1.1 veego break;
1176 1.1 veego case 2:
1177 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1178 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1179 1.1 veego break;
1180 1.1 veego case 3:
1181 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1182 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq | 0x08);
1183 1.1 veego break;
1184 1.1 veego }
1185 1.1 veego /* load display parameters into board */
1186 1.1 veego
1187 1.1 veego WCrt(ba, CRT_ID_HOR_TOTAL, HT);
1188 1.1 veego WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
1189 1.1 veego WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
1190 1.1 veego WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */
1191 1.1 veego WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
1192 1.1 veego WCrt(ba, CRT_ID_END_HOR_RETR,
1193 1.1 veego (HSE & 0x1f) |
1194 1.1 veego ((HBE & 0x20) ? 0x80 : 0x00));
1195 1.1 veego WCrt(ba, CRT_ID_VER_TOTAL, VT);
1196 1.1 veego WCrt(ba, CRT_ID_OVERFLOW,
1197 1.1 veego 0x10 |
1198 1.1 veego ((VT & 0x100) ? 0x01 : 0x00) |
1199 1.1 veego ((VDE & 0x100) ? 0x02 : 0x00) |
1200 1.1 veego ((VSS & 0x100) ? 0x04 : 0x00) |
1201 1.1 veego ((VBS & 0x100) ? 0x08 : 0x00) |
1202 1.1 veego ((VT & 0x200) ? 0x20 : 0x00) |
1203 1.1 veego ((VDE & 0x200) ? 0x40 : 0x00) |
1204 1.1 veego ((VSS & 0x200) ? 0x80 : 0x00));
1205 1.1 veego
1206 1.1 veego WCrt(ba, CRT_ID_MAX_ROW_ADDRESS,
1207 1.1 veego 0x40 | /* TEXT ? 0x00 ??? */
1208 1.1 veego (DBLSCAN ? 0x80 : 0x00) |
1209 1.1 veego ((VBS & 0x200) ? 0x20 : 0x00) |
1210 1.1 veego (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
1211 1.1 veego
1212 1.1 veego WCrt(ba, CRT_ID_MODE_CONTROL,
1213 1.1 veego ((TEXT || (gv->depth == 1)) ? 0xc3 : 0xab));
1214 1.1 veego
1215 1.1 veego /* text cursor */
1216 1.1 veego
1217 1.1 veego if (TEXT) {
1218 1.1 veego #if ET_ULCURSOR
1219 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
1220 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
1221 1.1 veego #else
1222 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
1223 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
1224 1.1 veego #endif
1225 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
1226 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
1227 1.1 veego }
1228 1.1 veego
1229 1.1 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, ((md->fy - 1) & 0x1f)
1230 1.1 veego | ((TEXT || (gv->depth == 1)) ? 0x00 : 0x60));
1231 1.1 veego
1232 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
1233 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
1234 1.1 veego
1235 1.1 veego WCrt(ba, CRT_ID_START_VER_RETR, VSS);
1236 1.1 veego WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x30);
1237 1.1 veego WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
1238 1.1 veego WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
1239 1.1 veego WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
1240 1.1 veego
1241 1.1 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
1242 1.1 veego
1243 1.1 veego WCrt(ba, CRT_ID_OVERFLOW_HIGH,
1244 1.1 veego ((VBS & 0x400) ? 0x01 : 0x00) |
1245 1.1 veego ((VT & 0x400) ? 0x02 : 0x00) |
1246 1.1 veego ((VDE & 0x400) ? 0x04 : 0x00) |
1247 1.1 veego ((VSS & 0x400) ? 0x08 : 0x00) |
1248 1.1 veego 0x10 |
1249 1.1 veego (LACE ? 0x80 : 0x00));
1250 1.1 veego
1251 1.1 veego WCrt(ba, CRT_ID_HOR_OVERFLOW,
1252 1.1 veego ((HT & 0x100) ? 0x01 : 0x00) |
1253 1.1 veego ((HBS & 0x100) ? 0x04 : 0x00) |
1254 1.1 veego ((HSS & 0x100) ? 0x10 : 0x00)
1255 1.1 veego );
1256 1.1 veego
1257 1.1 veego /* depth dependent stuff */
1258 1.1 veego
1259 1.1 veego WGfx(ba, GCT_ID_GRAPHICS_MODE,
1260 1.1 veego ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
1261 1.1 veego WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
1262 1.1 veego
1263 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1264 1.1 veego vgar(ba, VDAC_MASK);
1265 1.1 veego vgar(ba, VDAC_MASK);
1266 1.1 veego vgar(ba, VDAC_MASK);
1267 1.1 veego vgar(ba, VDAC_MASK);
1268 1.1 veego switch (gv->depth) {
1269 1.1 veego case 1:
1270 1.1 veego case 4: /* text */
1271 1.1 veego switch(etdtype) {
1272 1.1 veego case SIERRA11483:
1273 1.1 veego case SIERRA15025:
1274 1.1 veego case MUSICDAC:
1275 1.1 veego vgaw(ba, VDAC_MASK, 0);
1276 1.1 veego break;
1277 1.1 veego case MERLINDAC:
1278 1.1 veego setMerlinDACmode(ba, 0);
1279 1.1 veego break;
1280 1.1 veego }
1281 1.1 veego HDE = gv->disp_width / 16;
1282 1.1 veego break;
1283 1.1 veego case 8:
1284 1.1 veego switch(etdtype) {
1285 1.1 veego case SIERRA11483:
1286 1.1 veego case SIERRA15025:
1287 1.1 veego case MUSICDAC:
1288 1.1 veego vgaw(ba, VDAC_MASK, 0);
1289 1.1 veego break;
1290 1.1 veego case MERLINDAC:
1291 1.1 veego setMerlinDACmode(ba, 0);
1292 1.1 veego break;
1293 1.1 veego }
1294 1.1 veego HDE = gv->disp_width / 8;
1295 1.1 veego break;
1296 1.1 veego case 15:
1297 1.1 veego switch(etdtype) {
1298 1.1 veego case SIERRA11483:
1299 1.1 veego case SIERRA15025:
1300 1.1 veego case MUSICDAC:
1301 1.1 veego vgaw(ba, VDAC_MASK, 0xa0);
1302 1.1 veego break;
1303 1.1 veego case MERLINDAC:
1304 1.1 veego setMerlinDACmode(ba, 0xa0);
1305 1.1 veego break;
1306 1.1 veego }
1307 1.1 veego HDE = gv->disp_width / 4;
1308 1.1 veego break;
1309 1.1 veego case 16:
1310 1.1 veego switch(etdtype) {
1311 1.1 veego case SIERRA11483:
1312 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1313 1.1 veego break;
1314 1.1 veego case SIERRA15025:
1315 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1316 1.1 veego break;
1317 1.1 veego case MUSICDAC:
1318 1.1 veego vgaw(ba, VDAC_MASK, 0xc0);
1319 1.1 veego break;
1320 1.1 veego case MERLINDAC:
1321 1.1 veego setMerlinDACmode(ba, 0xe0);
1322 1.1 veego break;
1323 1.1 veego }
1324 1.1 veego HDE = gv->disp_width / 4;
1325 1.1 veego break;
1326 1.1 veego case 24:
1327 1.1 veego switch(etdtype) {
1328 1.1 veego case SIERRA11483:
1329 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1330 1.1 veego break;
1331 1.1 veego case SIERRA15025:
1332 1.1 veego vgaw(ba, VDAC_MASK, 0xe1);
1333 1.1 veego break;
1334 1.1 veego case MUSICDAC:
1335 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1336 1.1 veego break;
1337 1.1 veego case MERLINDAC:
1338 1.1 veego setMerlinDACmode(ba, 0xf0);
1339 1.1 veego break;
1340 1.1 veego }
1341 1.1 veego HDE = (gv->disp_width / 8) * 3;
1342 1.1 veego break;
1343 1.1 veego case 32:
1344 1.1 veego switch(etdtype) {
1345 1.1 veego case SIERRA11483:
1346 1.1 veego case MUSICDAC:
1347 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1348 1.1 veego break;
1349 1.1 veego case SIERRA15025:
1350 1.1 veego vgaw(ba, VDAC_MASK, 0x61);
1351 1.1 veego break;
1352 1.1 veego case MERLINDAC:
1353 1.1 veego setMerlinDACmode(ba, 0xb0);
1354 1.1 veego break;
1355 1.1 veego }
1356 1.1 veego HDE = gv->disp_width / 2;
1357 1.1 veego break;
1358 1.1 veego }
1359 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
1360 1.1 veego WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
1361 1.1 veego (gv->depth == 1) ? 0x01 : 0x0f);
1362 1.1 veego
1363 1.1 veego WCrt(ba, CRT_ID_OFFSET, HDE);
1364 1.1 veego
1365 1.1 veego /* text initialization */
1366 1.1 veego if (TEXT) {
1367 1.1 veego et_inittextmode(gp);
1368 1.1 veego }
1369 1.1 veego
1370 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
1371 1.1 veego
1372 1.1 veego /* Pass-through */
1373 1.1 veego RegOffpass(ba);
1374 1.1 veego
1375 1.1 veego return (1);
1376 1.1 veego }
1377 1.1 veego
1378 1.1 veego
1379 1.1 veego void
1380 1.1 veego et_inittextmode(gp)
1381 1.1 veego struct grf_softc *gp;
1382 1.1 veego {
1383 1.1 veego struct grfettext_mode *tm = (struct grfettext_mode *) gp->g_data;
1384 1.1 veego volatile unsigned char *ba = gp->g_regkva;
1385 1.1 veego unsigned char *fb = gp->g_fbkva;
1386 1.1 veego unsigned char *c, *f, y;
1387 1.1 veego unsigned short z;
1388 1.1 veego
1389 1.1 veego
1390 1.1 veego /* load text font into beginning of display memory. Each character
1391 1.1 veego * cell is 32 bytes long (enough for 4 planes) */
1392 1.1 veego
1393 1.1 veego SetTextPlane(ba, 0x02);
1394 1.1 veego et_memset(fb, 0, 256 * 32);
1395 1.1 veego c = (unsigned char *) (fb) + (32 * tm->fdstart);
1396 1.1 veego f = tm->fdata;
1397 1.1 veego for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
1398 1.1 veego for (y = 0; y < tm->fy; y++)
1399 1.1 veego *c++ = *f++;
1400 1.1 veego
1401 1.1 veego /* clear out text/attr planes (three screens worth) */
1402 1.1 veego
1403 1.1 veego SetTextPlane(ba, 0x01);
1404 1.1 veego et_memset(fb, 0x07, tm->cols * tm->rows * 3);
1405 1.1 veego SetTextPlane(ba, 0x00);
1406 1.1 veego et_memset(fb, 0x20, tm->cols * tm->rows * 3);
1407 1.1 veego
1408 1.1 veego /* print out a little init msg */
1409 1.1 veego
1410 1.1 veego c = (unsigned char *) (fb) + (tm->cols - 16);
1411 1.1 veego strcpy(c, "TSENG");
1412 1.1 veego c[6] = 0x20;
1413 1.1 veego
1414 1.1 veego /* set colors (B&W) */
1415 1.1 veego
1416 1.1 veego switch(ettype) {
1417 1.1 veego case MERLIN:
1418 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
1419 1.1 veego for (z = 0; z < 256; z++) {
1420 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1421 1.1 veego
1422 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][0]);
1423 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][1]);
1424 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][2]);
1425 1.1 veego }
1426 1.1 veego break;
1427 1.1 veego default:
1428 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
1429 1.1 veego for (z = 0; z < 256; z++) {
1430 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1431 1.1 veego
1432 1.1 veego vgaw(ba, VDAC_DATA, etconscolors[y][0] >> etcmap_shift);
1433 1.1 veego vgaw(ba, VDAC_DATA, etconscolors[y][1] >> etcmap_shift);
1434 1.1 veego vgaw(ba, VDAC_DATA, etconscolors[y][2] >> etcmap_shift);
1435 1.1 veego }
1436 1.1 veego break;
1437 1.1 veego }
1438 1.1 veego }
1439 1.1 veego
1440 1.1 veego
1441 1.1 veego void
1442 1.1 veego et_memset(d, c, l)
1443 1.1 veego unsigned char *d;
1444 1.1 veego unsigned char c;
1445 1.1 veego int l;
1446 1.1 veego {
1447 1.1 veego for (; l > 0; l--)
1448 1.1 veego *d++ = c;
1449 1.1 veego }
1450 1.1 veego
1451 1.1 veego
1452 1.1 veego static int
1453 1.1 veego et_getControllerType(gp)
1454 1.1 veego struct grf_softc * gp;
1455 1.1 veego {
1456 1.1 veego unsigned char *ba = gp->g_regkva; /* register base */
1457 1.1 veego unsigned char *mem = gp->g_fbkva; /* memory base */
1458 1.1 veego unsigned char *mmu = mem + MMU_APERTURE0; /* MMU aperture 0 base */
1459 1.1 veego
1460 1.1 veego *mem = 0;
1461 1.1 veego
1462 1.1 veego /* make ACL visible */
1463 1.1 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xfb);
1464 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x01);
1465 1.1 veego
1466 1.1 veego *((unsigned long *)mmu) = 0;
1467 1.1 veego *(mem + 0x13) = 0x38;
1468 1.1 veego
1469 1.1 veego *mmu = 0xff;
1470 1.1 veego
1471 1.1 veego /* hide ACL */
1472 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x00);
1473 1.1 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
1474 1.1 veego
1475 1.1 veego return((*mem == 0xff) ? ETW32 : ET4000);
1476 1.1 veego }
1477 1.1 veego
1478 1.1 veego
1479 1.1 veego static int
1480 1.1 veego et_getDACType(gp)
1481 1.1 veego struct grf_softc * gp;
1482 1.1 veego {
1483 1.1 veego unsigned char *ba = gp->g_regkva;
1484 1.1 veego union {
1485 1.1 veego int tt;
1486 1.1 veego char cc[4];
1487 1.1 veego } check;
1488 1.1 veego
1489 1.1 veego /* check for Sierra SC 15025 */
1490 1.1 veego
1491 1.1 veego if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
1492 1.1 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1493 1.1 veego
1494 1.1 veego vgaw(ba, VDAC_XINDEX, 9);
1495 1.1 veego check.cc[0]=vgar(ba, VDAC_XDATA);
1496 1.1 veego vgaw(ba, VDAC_XINDEX, 10);
1497 1.1 veego check.cc[1]=vgar(ba, VDAC_XDATA);
1498 1.1 veego vgaw(ba, VDAC_XINDEX, 11);
1499 1.1 veego check.cc[2]=vgar(ba, VDAC_XDATA);
1500 1.1 veego vgaw(ba, VDAC_XINDEX, 12);
1501 1.1 veego check.cc[3]=vgar(ba, VDAC_XDATA);
1502 1.1 veego
1503 1.1 veego if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
1504 1.1 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1505 1.1 veego
1506 1.1 veego if(check.tt == 0x533ab141){
1507 1.1 veego if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
1508 1.1 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1509 1.1 veego
1510 1.1 veego /* switch to 8 bits per color */
1511 1.1 veego vgaw(ba, VDAC_XINDEX, 8);
1512 1.1 veego vgaw(ba, VDAC_XDATA, 1);
1513 1.1 veego /* do not shift color values */
1514 1.1 veego etcmap_shift = 0;
1515 1.1 veego
1516 1.1 veego if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
1517 1.1 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1518 1.1 veego
1519 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1520 1.1 veego return(SIERRA15025);
1521 1.1 veego }
1522 1.1 veego
1523 1.1 veego /* check for MUSIC DAC */
1524 1.1 veego
1525 1.1 veego if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
1526 1.1 veego vgaw(ba, VDAC_COMMAND, 0x02); /* set some strange MUSIC mode (???) */
1527 1.1 veego
1528 1.1 veego vgaw(ba, VDAC_XINDEX, 0x01);
1529 1.1 veego if(vgar(ba, VDAC_XDATA) == 0x01){
1530 1.1 veego /* shift color values by 2 */
1531 1.1 veego etcmap_shift = 2;
1532 1.1 veego
1533 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1534 1.1 veego return(MUSICDAC);
1535 1.1 veego }
1536 1.1 veego
1537 1.1 veego /* nothing else found, so let us pretend it is a stupid Sierra SC 11483 */
1538 1.1 veego /* shift color values by 2 */
1539 1.1 veego etcmap_shift = 2;
1540 1.1 veego
1541 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1542 1.1 veego return(SIERRA11483);
1543 1.1 veego }
1544 1.1 veego
1545 1.1 veego #endif /* NGRFET */
1546