grf_et.c revision 1.7 1 1.7 christos /* $NetBSD: grf_et.c,v 1.7 1996/10/13 03:07:04 christos Exp $ */
2 1.1 veego
3 1.1 veego /*
4 1.1 veego * Copyright (c) 1996 Tobias Abt
5 1.1 veego * Copyright (c) 1995 Ezra Story
6 1.1 veego * Copyright (c) 1995 Kari Mettinen
7 1.1 veego * Copyright (c) 1994 Markus Wild
8 1.1 veego * Copyright (c) 1994 Lutz Vieweg
9 1.1 veego * All rights reserved.
10 1.1 veego *
11 1.1 veego * Redistribution and use in source and binary forms, with or without
12 1.1 veego * modification, are permitted provided that the following conditions
13 1.1 veego * are met:
14 1.1 veego * 1. Redistributions of source code must retain the above copyright
15 1.1 veego * notice, this list of conditions and the following disclaimer.
16 1.1 veego * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 veego * notice, this list of conditions and the following disclaimer in the
18 1.1 veego * documentation and/or other materials provided with the distribution.
19 1.1 veego * 3. All advertising materials mentioning features or use of this software
20 1.1 veego * must display the following acknowledgement:
21 1.1 veego * This product includes software developed by Lutz Vieweg.
22 1.1 veego * 4. The name of the author may not be used to endorse or promote products
23 1.1 veego * derived from this software without specific prior written permission
24 1.1 veego *
25 1.1 veego * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.1 veego * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.1 veego * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.1 veego * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.1 veego * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.1 veego * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.1 veego * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.1 veego * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.1 veego * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 1.1 veego * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.1 veego */
36 1.1 veego #include "grfet.h"
37 1.1 veego #if NGRFET > 0
38 1.1 veego
39 1.1 veego /*
40 1.1 veego * Graphics routines for Tseng ET4000 (&W32) boards,
41 1.1 veego *
42 1.1 veego * This code offers low-level routines to access Tseng ET4000
43 1.1 veego * graphics-boards from within NetBSD for the Amiga.
44 1.1 veego * No warranties for any kind of function at all - this
45 1.1 veego * code may crash your hardware and scratch your harddisk. Use at your
46 1.1 veego * own risk. Freely distributable.
47 1.1 veego *
48 1.1 veego * Modified for Tseng ET4000 from
49 1.1 veego * Kari Mettinen's Cirrus driver by Tobias Abt
50 1.1 veego *
51 1.1 veego *
52 1.1 veego * TODO:
53 1.1 veego *
54 1.1 veego */
55 1.1 veego
56 1.1 veego #include <sys/param.h>
57 1.1 veego #include <sys/systm.h>
58 1.1 veego #include <sys/errno.h>
59 1.1 veego #include <sys/ioctl.h>
60 1.1 veego #include <sys/device.h>
61 1.1 veego #include <sys/malloc.h>
62 1.1 veego
63 1.1 veego #include <machine/cpu.h>
64 1.1 veego #include <dev/cons.h>
65 1.1 veego #ifdef TSENGCONSOLE
66 1.1 veego #include <amiga/dev/itevar.h>
67 1.1 veego #endif
68 1.1 veego #include <amiga/amiga/device.h>
69 1.1 veego #include <amiga/dev/grfioctl.h>
70 1.1 veego #include <amiga/dev/grfvar.h>
71 1.1 veego #include <amiga/dev/grf_etreg.h>
72 1.1 veego #include <amiga/dev/zbusvar.h>
73 1.1 veego
74 1.3 veego int et_mondefok __P((struct grfvideo_mode *gv));
75 1.3 veego void et_boardinit __P((struct grf_softc *gp));
76 1.3 veego static void et_CompFQ __P((u_int fq, u_char *num, u_char *denom));
77 1.3 veego int et_getvmode __P((struct grf_softc *gp, struct grfvideo_mode *vm));
78 1.3 veego int et_setvmode __P((struct grf_softc *gp, unsigned int mode));
79 1.3 veego int et_toggle __P((struct grf_softc *gp, unsigned short));
80 1.3 veego int et_getcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap));
81 1.3 veego int et_putcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap));
82 1.1 veego #ifndef TSENGCONSOLE
83 1.3 veego void et_off __P((struct grf_softc *gp));
84 1.1 veego #endif
85 1.3 veego void et_inittextmode __P((struct grf_softc *gp));
86 1.3 veego int et_ioctl __P((register struct grf_softc *gp, u_long cmd, void *data));
87 1.3 veego int et_getmousepos __P((struct grf_softc *gp, struct grf_position *data));
88 1.1 veego void et_writesprpos __P((volatile char *ba, short x, short y));
89 1.3 veego int et_setmousepos __P((struct grf_softc *gp, struct grf_position *data));
90 1.3 veego static int et_setspriteinfo __P((struct grf_softc *gp,
91 1.3 veego struct grf_spriteinfo *data));
92 1.3 veego int et_getspriteinfo __P((struct grf_softc *gp,
93 1.3 veego struct grf_spriteinfo *data));
94 1.3 veego static int et_getspritemax __P((struct grf_softc *gp,
95 1.3 veego struct grf_position *data));
96 1.3 veego int et_setmonitor __P((struct grf_softc *gp, struct grfvideo_mode *gv));
97 1.3 veego int et_blank __P((struct grf_softc *gp, int *on));
98 1.3 veego static int et_getControllerType __P((struct grf_softc *gp));
99 1.3 veego static int et_getDACType __P((struct grf_softc *gp));
100 1.1 veego
101 1.1 veego int grfetmatch __P((struct device *, void *, void *));
102 1.1 veego void grfetattach __P((struct device *, struct device *, void *));
103 1.4 cgd int grfetprint __P((void *, const char *));
104 1.1 veego void et_memset __P((unsigned char *d, unsigned char c, int l));
105 1.1 veego
106 1.3 veego /*
107 1.3 veego * Graphics display definitions.
108 1.1 veego * These are filled by 'grfconfig' using GRFIOCSETMON.
109 1.1 veego */
110 1.1 veego #define monitor_def_max 8
111 1.1 veego static struct grfvideo_mode monitor_def[8] = {
112 1.1 veego {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
113 1.1 veego };
114 1.1 veego static struct grfvideo_mode *monitor_current = &monitor_def[0];
115 1.1 veego
116 1.1 veego /* Console display definition.
117 1.1 veego * Default hardcoded text mode. This grf_et is set up to
118 1.1 veego * use one text mode only, and this is it. You may use
119 1.1 veego * grfconfig to change the mode after boot.
120 1.1 veego */
121 1.1 veego /* Console font */
122 1.1 veego #ifdef KFONT_8X11
123 1.1 veego #define TSENGFONT kernel_font_8x11
124 1.1 veego #define TSENGFONTY 11
125 1.1 veego #else
126 1.1 veego #define TSENGFONT kernel_font_8x8
127 1.1 veego #define TSENGFONTY 8
128 1.1 veego #endif
129 1.1 veego extern unsigned char TSENGFONT[];
130 1.1 veego
131 1.1 veego struct grfettext_mode etconsole_mode = {
132 1.1 veego {255, "", 25000000, 640, 480, 4, 640/8, 784/8, 680/8, 768/8, 800/8,
133 1.1 veego 481, 521, 491, 493, 525},
134 1.1 veego 8, TSENGFONTY, 640 / 8, 480 / TSENGFONTY, TSENGFONT, 32, 255
135 1.1 veego };
136 1.1 veego
137 1.1 veego /* Console colors */
138 1.1 veego unsigned char etconscolors[3][3] = { /* background, foreground, hilite */
139 1.1 veego {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
140 1.1 veego };
141 1.1 veego
142 1.1 veego int ettype = 0; /* oMniBus, Domino or Merlin */
143 1.1 veego int etctype = 0; /* ET4000 or ETW32 */
144 1.1 veego int etdtype = 0; /* Type of DAC (see grf_etregs.h) */
145 1.1 veego
146 1.1 veego char etcmap_shift = 0; /* 6 or 8 bit cmap entries */
147 1.1 veego unsigned char pass_toggle; /* passthru status tracker */
148 1.1 veego
149 1.1 veego unsigned char Merlin_switch = 0;
150 1.1 veego
151 1.3 veego /*
152 1.3 veego * Because all Tseng-boards have 2 configdev entries, one for
153 1.1 veego * framebuffer mem and the other for regs, we have to hold onto
154 1.1 veego * the pointers globally until we match on both. This and 'ettype'
155 1.1 veego * are the primary obsticles to multiple board support, but if you
156 1.1 veego * have multiple boards you have bigger problems than grf_et.
157 1.1 veego */
158 1.1 veego static void *et_fbaddr = 0; /* framebuffer */
159 1.1 veego static void *et_regaddr = 0; /* registers */
160 1.1 veego static int et_fbsize; /* framebuffer size */
161 1.1 veego
162 1.1 veego /* current sprite info, if you add support for multiple boards
163 1.1 veego * make this an array or something
164 1.1 veego */
165 1.1 veego struct grf_spriteinfo et_cursprite;
166 1.1 veego
167 1.1 veego /* sprite bitmaps in kernel stack, you'll need to arrayize these too if
168 1.1 veego * you add multiple board support
169 1.1 veego */
170 1.1 veego static unsigned char et_imageptr[8 * 64], et_maskptr[8 * 64];
171 1.1 veego static unsigned char et_sprred[2], et_sprgreen[2], et_sprblue[2];
172 1.1 veego
173 1.1 veego /* standard driver stuff */
174 1.1 veego struct cfattach grfet_ca = {
175 1.1 veego sizeof(struct grf_softc), grfetmatch, grfetattach
176 1.1 veego };
177 1.1 veego
178 1.1 veego struct cfdriver grfet_cd = {
179 1.1 veego NULL, "grfet", DV_DULL, NULL, 0
180 1.1 veego };
181 1.3 veego
182 1.1 veego static struct cfdata *cfdata;
183 1.1 veego
184 1.1 veego int
185 1.1 veego grfetmatch(pdp, match, auxp)
186 1.1 veego struct device *pdp;
187 1.1 veego void *match, *auxp;
188 1.1 veego {
189 1.1 veego #ifdef TSENGCONSOLE
190 1.1 veego struct cfdata *cfp = match;
191 1.1 veego #endif
192 1.1 veego struct zbus_args *zap;
193 1.1 veego static int regprod, fbprod;
194 1.1 veego
195 1.1 veego zap = auxp;
196 1.1 veego
197 1.1 veego #ifndef TSENGCONSOLE
198 1.1 veego if (amiga_realconfig == 0)
199 1.1 veego return (0);
200 1.1 veego #endif
201 1.1 veego
202 1.1 veego /* Grab the first board we encounter as the preferred one. This will
203 1.1 veego * allow one board to work in a multiple Tseng board system, but not
204 1.1 veego * multiple boards at the same time. */
205 1.1 veego if (ettype == 0) {
206 1.1 veego switch (zap->manid) {
207 1.1 veego case OMNIBUS:
208 1.1 veego if (zap->prodid != 0)
209 1.1 veego return (0);
210 1.1 veego regprod = 0;
211 1.1 veego fbprod = 0;
212 1.1 veego break;
213 1.1 veego case DOMINO:
214 1.1 veego if (zap->prodid != 2 && zap->prodid != 1)
215 1.1 veego return (0);
216 1.1 veego regprod = 2;
217 1.1 veego fbprod = 1;
218 1.1 veego break;
219 1.1 veego case MERLIN:
220 1.1 veego if (zap->prodid != 3 && zap->prodid != 4)
221 1.1 veego return (0);
222 1.1 veego regprod = 4;
223 1.1 veego fbprod = 3;
224 1.1 veego break;
225 1.1 veego default:
226 1.1 veego return (0);
227 1.1 veego }
228 1.1 veego ettype = zap->manid;
229 1.1 veego } else {
230 1.1 veego if (ettype != zap->manid) {
231 1.1 veego return (0);
232 1.1 veego }
233 1.1 veego }
234 1.1 veego
235 1.1 veego /* Configure either registers or framebuffer in any order */
236 1.1 veego /* as said before, oMniBus does not support ProdID */
237 1.1 veego if (ettype == OMNIBUS) {
238 1.1 veego if (zap->size == 64 * 1024) {
239 1.1 veego /* register area */
240 1.1 veego et_regaddr = zap->va;
241 1.1 veego } else {
242 1.1 veego /* memory area */
243 1.1 veego et_fbaddr = zap->va;
244 1.1 veego et_fbsize = zap->size;
245 1.1 veego }
246 1.1 veego } else {
247 1.1 veego if (zap->prodid == regprod) {
248 1.1 veego et_regaddr = zap->va;
249 1.1 veego } else {
250 1.1 veego if (zap->prodid == fbprod) {
251 1.1 veego et_fbaddr = zap->va;
252 1.1 veego et_fbsize = zap->size;
253 1.1 veego } else {
254 1.1 veego return (0);
255 1.1 veego }
256 1.1 veego }
257 1.1 veego }
258 1.1 veego
259 1.1 veego #ifdef TSENGCONSOLE
260 1.1 veego if (amiga_realconfig == 0) {
261 1.1 veego cfdata = cfp;
262 1.1 veego }
263 1.1 veego #endif
264 1.1 veego
265 1.1 veego return (1);
266 1.1 veego }
267 1.1 veego
268 1.1 veego
269 1.1 veego void
270 1.1 veego grfetattach(pdp, dp, auxp)
271 1.1 veego struct device *pdp, *dp;
272 1.1 veego void *auxp;
273 1.1 veego {
274 1.1 veego static struct grf_softc congrf;
275 1.1 veego struct zbus_args *zap;
276 1.1 veego struct grf_softc *gp;
277 1.1 veego static char attachflag = 0;
278 1.1 veego
279 1.1 veego zap = auxp;
280 1.1 veego
281 1.7 christos printf("\n");
282 1.1 veego
283 1.1 veego /* make sure both halves have matched */
284 1.1 veego if (!et_regaddr || !et_fbaddr)
285 1.1 veego return;
286 1.1 veego
287 1.1 veego /* do all that messy console/grf stuff */
288 1.1 veego if (dp == NULL)
289 1.1 veego gp = &congrf;
290 1.1 veego else
291 1.1 veego gp = (struct grf_softc *) dp;
292 1.1 veego
293 1.1 veego if (dp != NULL && congrf.g_regkva != 0) {
294 1.1 veego /*
295 1.1 veego * inited earlier, just copy (not device struct)
296 1.1 veego */
297 1.1 veego bcopy(&congrf.g_display, &gp->g_display,
298 1.1 veego (char *) &gp[1] - (char *) &gp->g_display);
299 1.1 veego } else {
300 1.1 veego gp->g_regkva = (volatile caddr_t) et_regaddr;
301 1.1 veego gp->g_fbkva = (volatile caddr_t) et_fbaddr;
302 1.1 veego
303 1.1 veego gp->g_unit = GRF_ET4000_UNIT;
304 1.1 veego gp->g_mode = et_mode;
305 1.1 veego gp->g_conpri = grfet_cnprobe();
306 1.1 veego gp->g_flags = GF_ALIVE;
307 1.1 veego
308 1.1 veego /* wakeup the board */
309 1.1 veego et_boardinit(gp);
310 1.1 veego
311 1.1 veego #ifdef TSENGCONSOLE
312 1.1 veego grfet_iteinit(gp);
313 1.1 veego (void) et_load_mon(gp, &etconsole_mode);
314 1.1 veego #endif
315 1.1 veego }
316 1.1 veego
317 1.1 veego /*
318 1.1 veego * attach grf (once)
319 1.1 veego */
320 1.1 veego if (amiga_config_found(cfdata, &gp->g_device, gp, grfetprint)) {
321 1.1 veego attachflag = 1;
322 1.7 christos printf("grfet: %dMB ", et_fbsize / 0x100000);
323 1.1 veego switch (ettype) {
324 1.1 veego case OMNIBUS:
325 1.7 christos printf("oMniBus");
326 1.1 veego break;
327 1.1 veego case DOMINO:
328 1.7 christos printf("Domino");
329 1.1 veego break;
330 1.1 veego case MERLIN:
331 1.7 christos printf("Merlin");
332 1.1 veego break;
333 1.1 veego }
334 1.7 christos printf(" with ");
335 1.1 veego switch (etctype) {
336 1.1 veego case ET4000:
337 1.7 christos printf("Tseng ET4000");
338 1.1 veego break;
339 1.1 veego case ETW32:
340 1.7 christos printf("Tseng ETW32");
341 1.1 veego break;
342 1.1 veego }
343 1.7 christos printf(" and ");
344 1.1 veego switch (etdtype) {
345 1.1 veego case SIERRA11483:
346 1.7 christos printf("Sierra SC11483 DAC");
347 1.1 veego break;
348 1.1 veego case SIERRA15025:
349 1.7 christos printf("Sierra SC15025 DAC");
350 1.1 veego break;
351 1.1 veego case MUSICDAC:
352 1.7 christos printf("MUSIC DAC");
353 1.1 veego break;
354 1.1 veego case MERLINDAC:
355 1.7 christos printf("BrookTree DAC");
356 1.1 veego break;
357 1.1 veego }
358 1.7 christos printf(" being used\n");
359 1.1 veego } else {
360 1.1 veego if (!attachflag)
361 1.7 christos printf("grfet unattached!!\n");
362 1.1 veego }
363 1.1 veego }
364 1.1 veego
365 1.1 veego
366 1.1 veego int
367 1.1 veego grfetprint(auxp, pnp)
368 1.1 veego void *auxp;
369 1.4 cgd const char *pnp;
370 1.1 veego {
371 1.1 veego if (pnp)
372 1.7 christos printf("ite at %s: ", pnp);
373 1.1 veego return (UNCONF);
374 1.1 veego }
375 1.1 veego
376 1.1 veego
377 1.1 veego void
378 1.1 veego et_boardinit(gp)
379 1.1 veego struct grf_softc *gp;
380 1.1 veego {
381 1.1 veego unsigned char *ba = gp->g_regkva;
382 1.1 veego int x;
383 1.1 veego
384 1.1 veego /* wakeup board and flip passthru OFF */
385 1.1 veego
386 1.1 veego RegWakeup(ba);
387 1.1 veego RegOnpass(ba);
388 1.1 veego
389 1.1 veego if (ettype == MERLIN) {
390 1.3 veego /* Merlin needs some special initialisations */
391 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
392 1.3 veego delay(20000);
393 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 8);
394 1.3 veego delay(20000);
395 1.3 veego vgaw(ba, MERLIN_SWITCH_REG, 0);
396 1.3 veego delay(20000);
397 1.3 veego vgaw(ba, MERLIN_VDAC_DATA, 1);
398 1.3 veego
399 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x00);
400 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0xff);
401 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x01);
402 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x0f);
403 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x02);
404 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x42);
405 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, 0x03);
406 1.3 veego vgaw(ba, MERLIN_VDAC_SPRITE, 0x00);
407 1.1 veego
408 1.3 veego vgaw(ba, MERLIN_VDAC_DATA, 0);
409 1.1 veego }
410 1.1 veego
411 1.3 veego
412 1.1 veego /* setup initial unchanging parameters */
413 1.1 veego
414 1.3 veego vgaw(ba, GREG_HERCULESCOMPAT + ((ettype == DOMINO) ? 0x0fff : 0), 0x03);
415 1.1 veego vgaw(ba, GREG_DISPMODECONTROL, 0xa0);
416 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0x63);
417 1.1 veego
418 1.3 veego if (ettype == DOMINO)
419 1.3 veego {
420 1.3 veego vgaw(ba, CRT_ADDRESS, CRT_ID_VIDEO_CONFIG1);
421 1.3 veego vgaw(ba, CRT_ADDRESS_W + 0x0fff,
422 1.3 veego 0xc0 | vgar(ba, CRT_ADDRESS_R + 0x0fff));
423 1.3 veego }
424 1.3 veego
425 1.1 veego WSeq(ba, SEQ_ID_RESET, 0x03);
426 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot, Display off */
427 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
428 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
429 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e);
430 1.1 veego /* WSeq(ba, SEQ_ID_TS_STATE_CONTROL, 0x00); */
431 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
432 1.1 veego
433 1.1 veego WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
434 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
435 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, 0x08);
436 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
437 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
438 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
439 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
440 1.1 veego
441 1.1 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07);
442 1.1 veego WCrt(ba, CRT_ID_MODE_CONTROL, 0xa3); /* c3 */
443 1.1 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */
444 1.1 veego /* ET4000 special */
445 1.1 veego WCrt(ba, CRT_ID_RASCAS_CONFIG, 0x28);
446 1.1 veego WCrt(ba, CTR_ID_EXT_START, 0x00);
447 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, 0x08);
448 1.1 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
449 1.3 veego WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x0f); /* assume ZorroII first */
450 1.3 veego
451 1.3 veego if (iszthreepa(ba)) {
452 1.3 veego if (((vgar(ba, GREG_FEATURE_CONTROL_R) & 12) |
453 1.3 veego (vgar(ba, GREG_STATUS0_R) & 0x60)) == 0x24 )
454 1.3 veego WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x07); /* ZorroIII */
455 1.3 veego }
456 1.3 veego
457 1.1 veego WCrt(ba, CRT_ID_HOR_OVERFLOW, 0x00);
458 1.1 veego
459 1.1 veego WGfx(ba, GCT_ID_SET_RESET, 0x00);
460 1.1 veego WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
461 1.1 veego WGfx(ba, GCT_ID_COLOR_COMPARE, 0x00);
462 1.1 veego WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
463 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
464 1.1 veego WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
465 1.1 veego WGfx(ba, GCT_ID_MISC, 0x01);
466 1.1 veego WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
467 1.1 veego WGfx(ba, GCT_ID_BITMASK, 0xff);
468 1.1 veego
469 1.1 veego vgaw(ba, GREG_SEGMENTSELECT, 0x00);
470 1.1 veego
471 1.1 veego for (x = 0; x < 0x10; x++)
472 1.1 veego WAttr(ba, x, x);
473 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
474 1.1 veego WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
475 1.1 veego WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
476 1.1 veego WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
477 1.1 veego WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
478 1.1 veego WAttr(ba, ACT_ID_MISCELLANEOUS, 0x00);
479 1.1 veego
480 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
481 1.1 veego delay(200000);
482 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3); /* c3 */
483 1.1 veego
484 1.1 veego /* colors initially set to greyscale */
485 1.1 veego
486 1.1 veego switch(ettype) {
487 1.1 veego case MERLIN:
488 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
489 1.1 veego for (x = 255; x >= 0; x--) {
490 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
491 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
492 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, x);
493 1.1 veego }
494 1.1 veego break;
495 1.1 veego default:
496 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
497 1.1 veego for (x = 255; x >= 0; x--) {
498 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
499 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
500 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0), x);
501 1.1 veego }
502 1.1 veego break;
503 1.1 veego }
504 1.1 veego /* set sprite bitmap pointers */
505 1.1 veego /* should work like that */
506 1.1 veego et_cursprite.image = et_imageptr;
507 1.1 veego et_cursprite.mask = et_maskptr;
508 1.1 veego et_cursprite.cmap.red = et_sprred;
509 1.1 veego et_cursprite.cmap.green = et_sprgreen;
510 1.1 veego et_cursprite.cmap.blue = et_sprblue;
511 1.1 veego
512 1.1 veego /* card spezific initialisations */
513 1.1 veego switch(ettype) {
514 1.1 veego case OMNIBUS:
515 1.1 veego etctype = et_getControllerType(gp);
516 1.1 veego etdtype = et_getDACType(gp);
517 1.1 veego break;
518 1.1 veego case MERLIN:
519 1.1 veego etctype = ETW32;
520 1.1 veego etdtype = MERLINDAC;
521 1.3 veego break;
522 1.1 veego case DOMINO:
523 1.1 veego etctype = ET4000;
524 1.1 veego etdtype = SIERRA11483;
525 1.1 veego break;
526 1.1 veego }
527 1.1 veego }
528 1.1 veego
529 1.1 veego
530 1.1 veego int
531 1.1 veego et_getvmode(gp, vm)
532 1.1 veego struct grf_softc *gp;
533 1.1 veego struct grfvideo_mode *vm;
534 1.1 veego {
535 1.1 veego struct grfvideo_mode *gv;
536 1.1 veego
537 1.1 veego #ifdef TSENGCONSOLE
538 1.1 veego /* Handle grabbing console mode */
539 1.1 veego if (vm->mode_num == 255) {
540 1.1 veego bcopy(&etconsole_mode, vm, sizeof(struct grfvideo_mode));
541 1.1 veego /* XXX so grfconfig can tell us the correct text dimensions. */
542 1.1 veego vm->depth = etconsole_mode.fy;
543 1.1 veego } else
544 1.1 veego #endif
545 1.3 veego {
546 1.3 veego if (vm->mode_num == 0)
547 1.3 veego vm->mode_num = (monitor_current - monitor_def) + 1;
548 1.3 veego if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
549 1.3 veego return (EINVAL);
550 1.3 veego gv = monitor_def + (vm->mode_num - 1);
551 1.3 veego if (gv->mode_num == 0)
552 1.3 veego return (EINVAL);
553 1.3 veego
554 1.3 veego bcopy(gv, vm, sizeof(struct grfvideo_mode));
555 1.3 veego }
556 1.3 veego
557 1.3 veego /* adjust internal values to pixel values */
558 1.3 veego
559 1.3 veego vm->hblank_start *= 8;
560 1.3 veego vm->hblank_stop *= 8;
561 1.3 veego vm->hsync_start *= 8;
562 1.3 veego vm->hsync_stop *= 8;
563 1.3 veego vm->htotal *= 8;
564 1.3 veego
565 1.1 veego return (0);
566 1.1 veego }
567 1.1 veego
568 1.1 veego
569 1.1 veego int
570 1.1 veego et_setvmode(gp, mode)
571 1.1 veego struct grf_softc *gp;
572 1.1 veego unsigned mode;
573 1.1 veego {
574 1.1 veego if (!mode || (mode > monitor_def_max) ||
575 1.1 veego monitor_def[mode - 1].mode_num == 0)
576 1.1 veego return (EINVAL);
577 1.1 veego
578 1.1 veego monitor_current = monitor_def + (mode - 1);
579 1.1 veego
580 1.1 veego return (0);
581 1.1 veego }
582 1.1 veego
583 1.1 veego
584 1.1 veego #ifndef TSENGCONSOLE
585 1.1 veego void
586 1.1 veego et_off(gp)
587 1.1 veego struct grf_softc *gp;
588 1.1 veego {
589 1.1 veego char *ba = gp->g_regkva;
590 1.1 veego
591 1.1 veego RegOnpass(ba);
592 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);
593 1.1 veego }
594 1.1 veego #endif
595 1.1 veego
596 1.1 veego
597 1.1 veego int
598 1.1 veego et_blank(gp, on)
599 1.3 veego struct grf_softc *gp;
600 1.3 veego int *on;
601 1.1 veego {
602 1.5 thorpej WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21);
603 1.5 thorpej return(0);
604 1.1 veego }
605 1.3 veego
606 1.1 veego
607 1.1 veego /*
608 1.1 veego * Change the mode of the display.
609 1.1 veego * Return a UNIX error number or 0 for success.
610 1.1 veego */
611 1.1 veego int
612 1.1 veego et_mode(gp, cmd, arg, a2, a3)
613 1.1 veego register struct grf_softc *gp;
614 1.1 veego u_long cmd;
615 1.1 veego void *arg;
616 1.1 veego u_long a2;
617 1.1 veego int a3;
618 1.1 veego {
619 1.3 veego int error;
620 1.1 veego
621 1.1 veego switch (cmd) {
622 1.1 veego case GM_GRFON:
623 1.1 veego error = et_load_mon(gp,
624 1.1 veego (struct grfettext_mode *) monitor_current) ? 0 : EINVAL;
625 1.1 veego return (error);
626 1.1 veego
627 1.1 veego case GM_GRFOFF:
628 1.1 veego #ifndef TSENGCONSOLE
629 1.1 veego et_off(gp);
630 1.1 veego #else
631 1.1 veego et_load_mon(gp, &etconsole_mode);
632 1.1 veego #endif
633 1.1 veego return (0);
634 1.1 veego
635 1.1 veego case GM_GRFCONFIG:
636 1.1 veego return (0);
637 1.1 veego
638 1.1 veego case GM_GRFGETVMODE:
639 1.1 veego return (et_getvmode(gp, (struct grfvideo_mode *) arg));
640 1.1 veego
641 1.1 veego case GM_GRFSETVMODE:
642 1.1 veego error = et_setvmode(gp, *(unsigned *) arg);
643 1.1 veego if (!error && (gp->g_flags & GF_GRFON))
644 1.1 veego et_load_mon(gp,
645 1.1 veego (struct grfettext_mode *) monitor_current);
646 1.1 veego return (error);
647 1.1 veego
648 1.1 veego case GM_GRFGETNUMVM:
649 1.1 veego *(int *) arg = monitor_def_max;
650 1.1 veego return (0);
651 1.1 veego
652 1.1 veego case GM_GRFIOCTL:
653 1.1 veego return (et_ioctl(gp, a2, arg));
654 1.1 veego
655 1.1 veego default:
656 1.1 veego break;
657 1.1 veego }
658 1.1 veego
659 1.1 veego return (EINVAL);
660 1.1 veego }
661 1.1 veego
662 1.3 veego
663 1.1 veego int
664 1.1 veego et_ioctl(gp, cmd, data)
665 1.1 veego register struct grf_softc *gp;
666 1.1 veego u_long cmd;
667 1.1 veego void *data;
668 1.1 veego {
669 1.1 veego switch (cmd) {
670 1.1 veego case GRFIOCGSPRITEPOS:
671 1.1 veego return (et_getmousepos(gp, (struct grf_position *) data));
672 1.1 veego
673 1.1 veego case GRFIOCSSPRITEPOS:
674 1.1 veego return (et_setmousepos(gp, (struct grf_position *) data));
675 1.1 veego
676 1.1 veego case GRFIOCSSPRITEINF:
677 1.1 veego return (et_setspriteinfo(gp, (struct grf_spriteinfo *) data));
678 1.1 veego
679 1.1 veego case GRFIOCGSPRITEINF:
680 1.1 veego return (et_getspriteinfo(gp, (struct grf_spriteinfo *) data));
681 1.1 veego
682 1.1 veego case GRFIOCGSPRITEMAX:
683 1.1 veego return (et_getspritemax(gp, (struct grf_position *) data));
684 1.1 veego
685 1.1 veego case GRFIOCGETCMAP:
686 1.1 veego return (et_getcmap(gp, (struct grf_colormap *) data));
687 1.1 veego
688 1.1 veego case GRFIOCPUTCMAP:
689 1.1 veego return (et_putcmap(gp, (struct grf_colormap *) data));
690 1.1 veego
691 1.1 veego case GRFIOCBITBLT:
692 1.1 veego break;
693 1.1 veego
694 1.1 veego case GRFTOGGLE:
695 1.1 veego return (et_toggle(gp, 0));
696 1.1 veego
697 1.1 veego case GRFIOCSETMON:
698 1.1 veego return (et_setmonitor(gp, (struct grfvideo_mode *) data));
699 1.1 veego
700 1.3 veego case GRFIOCBLANK:
701 1.1 veego return (et_blank(gp, (int *)data));
702 1.1 veego }
703 1.1 veego return (EINVAL);
704 1.1 veego }
705 1.1 veego
706 1.1 veego
707 1.1 veego int
708 1.1 veego et_getmousepos(gp, data)
709 1.1 veego struct grf_softc *gp;
710 1.1 veego struct grf_position *data;
711 1.1 veego {
712 1.1 veego data->x = et_cursprite.pos.x;
713 1.1 veego data->y = et_cursprite.pos.y;
714 1.3 veego
715 1.1 veego return (0);
716 1.1 veego }
717 1.1 veego
718 1.1 veego
719 1.1 veego void
720 1.1 veego et_writesprpos(ba, x, y)
721 1.1 veego volatile char *ba;
722 1.1 veego short x;
723 1.1 veego short y;
724 1.1 veego {
725 1.1 veego }
726 1.1 veego
727 1.1 veego
728 1.1 veego int
729 1.1 veego et_setmousepos(gp, data)
730 1.1 veego struct grf_softc *gp;
731 1.1 veego struct grf_position *data;
732 1.1 veego {
733 1.1 veego volatile char *ba = gp->g_regkva;
734 1.1 veego short rx, ry, prx, pry;
735 1.1 veego
736 1.1 veego /* no movement */
737 1.1 veego if (et_cursprite.pos.x == data->x && et_cursprite.pos.y == data->y)
738 1.1 veego return (0);
739 1.1 veego
740 1.3 veego /* current and previous real coordinates */
741 1.1 veego rx = data->x - et_cursprite.hot.x;
742 1.1 veego ry = data->y - et_cursprite.hot.y;
743 1.1 veego prx = et_cursprite.pos.x - et_cursprite.hot.x;
744 1.1 veego pry = et_cursprite.pos.y - et_cursprite.hot.y;
745 1.1 veego
746 1.3 veego /* if we are/were on an edge, create (un)shifted bitmap --
747 1.3 veego * ripped out optimization (not extremely worthwhile,
748 1.3 veego * and kind of buggy anyhow).
749 1.3 veego */
750 1.1 veego
751 1.3 veego /* do movement, save position */
752 1.3 veego et_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
753 1.1 veego et_cursprite.pos.x = data->x;
754 1.1 veego et_cursprite.pos.y = data->y;
755 1.1 veego
756 1.1 veego return (0);
757 1.1 veego }
758 1.1 veego
759 1.1 veego
760 1.1 veego int
761 1.1 veego et_getspriteinfo(gp, data)
762 1.1 veego struct grf_softc *gp;
763 1.1 veego struct grf_spriteinfo *data;
764 1.1 veego {
765 1.1 veego
766 1.1 veego return(EINVAL);
767 1.1 veego }
768 1.1 veego
769 1.1 veego
770 1.1 veego static int
771 1.1 veego et_setspriteinfo(gp, data)
772 1.1 veego struct grf_softc *gp;
773 1.1 veego struct grf_spriteinfo *data;
774 1.1 veego {
775 1.1 veego
776 1.1 veego return(EINVAL);
777 1.1 veego }
778 1.1 veego
779 1.1 veego
780 1.1 veego static int
781 1.1 veego et_getspritemax(gp, data)
782 1.1 veego struct grf_softc *gp;
783 1.1 veego struct grf_position *data;
784 1.1 veego {
785 1.1 veego
786 1.1 veego return(EINVAL);
787 1.1 veego }
788 1.1 veego
789 1.1 veego
790 1.1 veego int
791 1.1 veego et_setmonitor(gp, gv)
792 1.1 veego struct grf_softc *gp;
793 1.1 veego struct grfvideo_mode *gv;
794 1.1 veego {
795 1.1 veego struct grfvideo_mode *md;
796 1.1 veego
797 1.3 veego if (!et_mondefok(gv))
798 1.3 veego return(EINVAL);
799 1.1 veego
800 1.1 veego #ifdef TSENGCONSOLE
801 1.1 veego /* handle interactive setting of console mode */
802 1.1 veego if (gv->mode_num == 255) {
803 1.1 veego bcopy(gv, &etconsole_mode.gv, sizeof(struct grfvideo_mode));
804 1.3 veego etconsole_mode.gv.hblank_start /= 8;
805 1.3 veego etconsole_mode.gv.hblank_stop /= 8;
806 1.3 veego etconsole_mode.gv.hsync_start /= 8;
807 1.3 veego etconsole_mode.gv.hsync_stop /= 8;
808 1.3 veego etconsole_mode.gv.htotal /= 8;
809 1.1 veego etconsole_mode.rows = gv->disp_height / etconsole_mode.fy;
810 1.1 veego etconsole_mode.cols = gv->disp_width / etconsole_mode.fx;
811 1.1 veego if (!(gp->g_flags & GF_GRFON))
812 1.1 veego et_load_mon(gp, &etconsole_mode);
813 1.1 veego ite_reinit(gp->g_itedev);
814 1.1 veego return (0);
815 1.1 veego }
816 1.1 veego #endif
817 1.1 veego
818 1.1 veego md = monitor_def + (gv->mode_num - 1);
819 1.1 veego bcopy(gv, md, sizeof(struct grfvideo_mode));
820 1.1 veego
821 1.3 veego /* adjust pixel oriented values to internal rep. */
822 1.1 veego
823 1.3 veego md->hblank_start /= 8;
824 1.3 veego md->hblank_stop /= 8;
825 1.3 veego md->hsync_start /= 8;
826 1.3 veego md->hsync_stop /= 8;
827 1.3 veego md->htotal /= 8;
828 1.1 veego
829 1.1 veego return (0);
830 1.1 veego }
831 1.1 veego
832 1.1 veego
833 1.1 veego int
834 1.1 veego et_getcmap(gfp, cmap)
835 1.1 veego struct grf_softc *gfp;
836 1.1 veego struct grf_colormap *cmap;
837 1.1 veego {
838 1.1 veego volatile unsigned char *ba;
839 1.3 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
840 1.3 veego short x;
841 1.3 veego int error;
842 1.1 veego
843 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
844 1.1 veego return 0;
845 1.1 veego
846 1.1 veego if (cmap->index + cmap->count > 256)
847 1.1 veego cmap->count = 256 - cmap->index;
848 1.1 veego
849 1.1 veego ba = gfp->g_regkva;
850 1.1 veego /* first read colors out of the chip, then copyout to userspace */
851 1.1 veego x = cmap->count - 1;
852 1.1 veego
853 1.1 veego rp = red + cmap->index;
854 1.1 veego gp = green + cmap->index;
855 1.1 veego bp = blue + cmap->index;
856 1.1 veego
857 1.1 veego switch(ettype) {
858 1.1 veego case MERLIN:
859 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
860 1.1 veego do {
861 1.1 veego *rp++ = vgar(ba, MERLIN_VDAC_COLORS);
862 1.1 veego *gp++ = vgar(ba, MERLIN_VDAC_COLORS);
863 1.1 veego *bp++ = vgar(ba, MERLIN_VDAC_COLORS);
864 1.1 veego } while (x-- > 0);
865 1.1 veego break;
866 1.1 veego default:
867 1.3 veego vgaw(ba, VDAC_ADDRESS_R+((ettype==DOMINO)?0x0fff:0), cmap->index);
868 1.1 veego do {
869 1.3 veego *rp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
870 1.3 veego *gp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
871 1.3 veego *bp++ = vgar(ba, VDAC_DATA+((ettype==DOMINO)?0x0fff:0)) << etcmap_shift;
872 1.1 veego } while (x-- > 0);
873 1.1 veego break;
874 1.1 veego }
875 1.1 veego
876 1.3 veego error = copyout(red + cmap->index, cmap->red, cmap->count);
877 1.3 veego if (!error)
878 1.3 veego error = copyout(green + cmap->index, cmap->green, cmap->count);
879 1.3 veego if (!error)
880 1.3 veego error = copyout(blue + cmap->index, cmap->blue, cmap->count);
881 1.1 veego
882 1.1 veego return (error);
883 1.1 veego }
884 1.1 veego
885 1.1 veego
886 1.1 veego int
887 1.1 veego et_putcmap(gfp, cmap)
888 1.1 veego struct grf_softc *gfp;
889 1.1 veego struct grf_colormap *cmap;
890 1.1 veego {
891 1.1 veego volatile unsigned char *ba;
892 1.3 veego u_char red[256], green[256], blue[256], *rp, *gp, *bp;
893 1.3 veego short x;
894 1.3 veego int error;
895 1.1 veego
896 1.1 veego if (cmap->count == 0 || cmap->index >= 256)
897 1.1 veego return (0);
898 1.1 veego
899 1.1 veego if (cmap->index + cmap->count > 256)
900 1.1 veego cmap->count = 256 - cmap->index;
901 1.1 veego
902 1.1 veego /* first copy the colors into kernelspace */
903 1.3 veego if ((error = copyin(cmap->red, red + cmap->index, cmap->count)))
904 1.3 veego return (error);
905 1.3 veego
906 1.3 veego if ((error = copyin(cmap->green, green + cmap->index, cmap->count)))
907 1.3 veego return (error);
908 1.1 veego
909 1.3 veego if ((error = copyin(cmap->blue, blue + cmap->index, cmap->count)))
910 1.1 veego return (error);
911 1.3 veego
912 1.3 veego ba = gfp->g_regkva;
913 1.3 veego x = cmap->count - 1;
914 1.3 veego
915 1.3 veego rp = red + cmap->index;
916 1.3 veego gp = green + cmap->index;
917 1.3 veego bp = blue + cmap->index;
918 1.3 veego
919 1.3 veego switch(ettype){
920 1.3 veego case MERLIN:
921 1.3 veego vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
922 1.3 veego do {
923 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *rp++);
924 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *gp++);
925 1.3 veego vgaw(ba, MERLIN_VDAC_COLORS, *bp++);
926 1.3 veego } while (x-- > 0);
927 1.3 veego break;
928 1.3 veego default:
929 1.3 veego vgaw(ba, VDAC_ADDRESS_W, cmap->index);
930 1.3 veego do {
931 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
932 1.3 veego *rp++ >> etcmap_shift);
933 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
934 1.3 veego *gp++ >> etcmap_shift);
935 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
936 1.3 veego *bp++ >> etcmap_shift);
937 1.3 veego } while (x-- > 0);
938 1.3 veego break;
939 1.3 veego }
940 1.3 veego
941 1.3 veego return (0);
942 1.1 veego }
943 1.1 veego
944 1.1 veego
945 1.1 veego int
946 1.1 veego et_toggle(gp, wopp)
947 1.1 veego struct grf_softc *gp;
948 1.1 veego unsigned short wopp; /* don't need that one yet, ill */
949 1.1 veego {
950 1.1 veego volatile unsigned char *ba;
951 1.1 veego
952 1.1 veego ba = gp->g_regkva;
953 1.1 veego
954 1.1 veego if (pass_toggle) {
955 1.1 veego RegOffpass(ba);
956 1.1 veego } else {
957 1.1 veego RegOnpass(ba);
958 1.1 veego }
959 1.1 veego return (0);
960 1.1 veego }
961 1.1 veego
962 1.3 veego
963 1.1 veego #define ET_NUMCLOCKS 32
964 1.1 veego
965 1.1 veego static u_char et_clocks[ET_NUMCLOCKS] = {
966 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
967 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
968 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5,
969 1.1 veego 0, 1, 6, 2, 3, 7, 4, 5
970 1.1 veego };
971 1.1 veego
972 1.1 veego static u_char et_clockdividers[ET_NUMCLOCKS] = {
973 1.1 veego 3, 3, 3, 3, 3, 3, 3, 3,
974 1.1 veego 2, 2, 2, 2, 2, 2, 2, 2,
975 1.1 veego 1, 1, 1, 1, 1, 1, 1, 1,
976 1.1 veego 0, 0, 0, 0, 0, 0, 0, 0
977 1.1 veego };
978 1.1 veego
979 1.1 veego static u_int et_clockfreqs[ET_NUMCLOCKS] = {
980 1.3 veego 6293750, 7080500, 7875000, 8125000,
981 1.3 veego 9000000, 9375000, 10000000, 11225000,
982 1.3 veego 12587500, 14161000, 15750000, 16250000,
983 1.3 veego 18000000, 18750000, 20000000, 22450000,
984 1.3 veego 25175000, 28322000, 31500000, 32500000,
985 1.3 veego 36000000, 37500000, 40000000, 44900000,
986 1.3 veego 50350000, 56644000, 63000000, 65000000,
987 1.3 veego 72000000, 75000000, 80000000, 89800000
988 1.1 veego };
989 1.1 veego
990 1.1 veego
991 1.1 veego static void
992 1.1 veego et_CompFQ(fq, num, denom)
993 1.1 veego u_int fq;
994 1.1 veego u_char *num;
995 1.1 veego u_char *denom;
996 1.1 veego {
997 1.1 veego int i;
998 1.1 veego
999 1.1 veego for (i=0; i < ET_NUMCLOCKS;) {
1000 1.1 veego if (fq <= et_clockfreqs[i++]) {
1001 1.1 veego break;
1002 1.1 veego }
1003 1.3 veego }
1004 1.1 veego
1005 1.1 veego *num = et_clocks[--i];
1006 1.1 veego *denom = et_clockdividers[i];
1007 1.1 veego
1008 1.1 veego return;
1009 1.1 veego }
1010 1.1 veego
1011 1.1 veego
1012 1.1 veego int
1013 1.1 veego et_mondefok(gv)
1014 1.1 veego struct grfvideo_mode *gv;
1015 1.1 veego {
1016 1.3 veego
1017 1.1 veego if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
1018 1.3 veego if (gv->mode_num != 255 || gv->depth != 4)
1019 1.3 veego return(0);
1020 1.1 veego
1021 1.1 veego switch (gv->depth) {
1022 1.1 veego case 4:
1023 1.3 veego if (gv->mode_num != 255)
1024 1.3 veego return(0);
1025 1.1 veego case 1:
1026 1.1 veego case 8:
1027 1.1 veego case 15:
1028 1.1 veego case 16:
1029 1.1 veego case 24:
1030 1.3 veego break;
1031 1.1 veego default:
1032 1.1 veego return (0);
1033 1.1 veego }
1034 1.3 veego return (1);
1035 1.1 veego }
1036 1.1 veego
1037 1.1 veego
1038 1.1 veego int
1039 1.1 veego et_load_mon(gp, md)
1040 1.1 veego struct grf_softc *gp;
1041 1.1 veego struct grfettext_mode *md;
1042 1.1 veego {
1043 1.1 veego struct grfvideo_mode *gv;
1044 1.1 veego struct grfinfo *gi;
1045 1.1 veego volatile unsigned char *ba;
1046 1.1 veego unsigned char num0, denom0;
1047 1.1 veego unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
1048 1.1 veego VSE, VT;
1049 1.1 veego char LACE, DBLSCAN, TEXT;
1050 1.1 veego unsigned char seq;
1051 1.1 veego int uplim, lowlim;
1052 1.1 veego
1053 1.1 veego /* identity */
1054 1.1 veego gv = &md->gv;
1055 1.1 veego TEXT = (gv->depth == 4);
1056 1.1 veego
1057 1.1 veego if (!et_mondefok(gv)) {
1058 1.7 christos printf("mondef not ok\n");
1059 1.1 veego return (0);
1060 1.1 veego }
1061 1.1 veego ba = gp->g_regkva;
1062 1.1 veego
1063 1.1 veego /* provide all needed information in grf device-independant locations */
1064 1.1 veego gp->g_data = (caddr_t) gv;
1065 1.1 veego gi = &gp->g_display;
1066 1.1 veego gi->gd_regaddr = (caddr_t) ztwopa(ba);
1067 1.1 veego gi->gd_regsize = 64 * 1024;
1068 1.1 veego gi->gd_fbaddr = (caddr_t) kvtop(gp->g_fbkva);
1069 1.1 veego gi->gd_fbsize = et_fbsize;
1070 1.1 veego gi->gd_colors = 1 << gv->depth;
1071 1.1 veego gi->gd_planes = gv->depth;
1072 1.1 veego gi->gd_fbwidth = gv->disp_width;
1073 1.1 veego gi->gd_fbheight = gv->disp_height;
1074 1.1 veego gi->gd_fbx = 0;
1075 1.1 veego gi->gd_fby = 0;
1076 1.1 veego if (TEXT) {
1077 1.1 veego gi->gd_dwidth = md->fx * md->cols;
1078 1.1 veego gi->gd_dheight = md->fy * md->rows;
1079 1.1 veego } else {
1080 1.1 veego gi->gd_dwidth = gv->disp_width;
1081 1.1 veego gi->gd_dheight = gv->disp_height;
1082 1.1 veego }
1083 1.1 veego gi->gd_dx = 0;
1084 1.1 veego gi->gd_dy = 0;
1085 1.1 veego
1086 1.1 veego /* get display mode parameters */
1087 1.1 veego
1088 1.1 veego HBS = gv->hblank_start;
1089 1.1 veego HBE = gv->hblank_stop;
1090 1.1 veego HSS = gv->hsync_start;
1091 1.1 veego HSE = gv->hsync_stop;
1092 1.1 veego HT = gv->htotal;
1093 1.1 veego VBS = gv->vblank_start;
1094 1.1 veego VSS = gv->vsync_start;
1095 1.1 veego VSE = gv->vsync_stop;
1096 1.1 veego VBE = gv->vblank_stop;
1097 1.1 veego VT = gv->vtotal;
1098 1.1 veego
1099 1.1 veego if (TEXT)
1100 1.1 veego HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
1101 1.1 veego else
1102 1.1 veego HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */
1103 1.1 veego VDE = gv->disp_height - 1;
1104 1.1 veego
1105 1.1 veego /* figure out whether lace or dblscan is needed */
1106 1.1 veego
1107 1.1 veego uplim = gv->disp_height + (gv->disp_height / 4);
1108 1.1 veego lowlim = gv->disp_height - (gv->disp_height / 4);
1109 1.1 veego LACE = (((VT * 2) > lowlim) && ((VT * 2) < uplim)) ? 1 : 0;
1110 1.1 veego DBLSCAN = (((VT / 2) > lowlim) && ((VT / 2) < uplim)) ? 1 : 0;
1111 1.1 veego
1112 1.1 veego /* adjustments */
1113 1.1 veego
1114 1.1 veego if (LACE)
1115 1.1 veego VDE /= 2;
1116 1.1 veego
1117 1.1 veego WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
1118 1.1 veego
1119 1.1 veego WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1120 1.1 veego WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
1121 1.1 veego WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
1122 1.1 veego
1123 1.1 veego /* Set clock */
1124 1.1 veego
1125 1.1 veego et_CompFQ( gv->pixel_clock, &num0, &denom0);
1126 1.1 veego
1127 1.1 veego vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3 | ((num0 & 3) << 2));
1128 1.1 veego WCrt(ba, CRT_ID_6845_COMPAT, (num0 & 4) ? 0x0a : 0x08);
1129 1.1 veego seq=RSeq(ba, SEQ_ID_CLOCKING_MODE);
1130 1.1 veego switch(denom0) {
1131 1.1 veego case 0:
1132 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xb4);
1133 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1134 1.1 veego break;
1135 1.1 veego case 1:
1136 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
1137 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1138 1.1 veego break;
1139 1.1 veego case 2:
1140 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1141 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
1142 1.1 veego break;
1143 1.1 veego case 3:
1144 1.1 veego WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
1145 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, seq | 0x08);
1146 1.1 veego break;
1147 1.1 veego }
1148 1.1 veego /* load display parameters into board */
1149 1.1 veego
1150 1.1 veego WCrt(ba, CRT_ID_HOR_TOTAL, HT);
1151 1.1 veego WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
1152 1.1 veego WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
1153 1.1 veego WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */
1154 1.1 veego WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
1155 1.1 veego WCrt(ba, CRT_ID_END_HOR_RETR,
1156 1.1 veego (HSE & 0x1f) |
1157 1.1 veego ((HBE & 0x20) ? 0x80 : 0x00));
1158 1.1 veego WCrt(ba, CRT_ID_VER_TOTAL, VT);
1159 1.1 veego WCrt(ba, CRT_ID_OVERFLOW,
1160 1.1 veego 0x10 |
1161 1.1 veego ((VT & 0x100) ? 0x01 : 0x00) |
1162 1.1 veego ((VDE & 0x100) ? 0x02 : 0x00) |
1163 1.1 veego ((VSS & 0x100) ? 0x04 : 0x00) |
1164 1.1 veego ((VBS & 0x100) ? 0x08 : 0x00) |
1165 1.1 veego ((VT & 0x200) ? 0x20 : 0x00) |
1166 1.1 veego ((VDE & 0x200) ? 0x40 : 0x00) |
1167 1.1 veego ((VSS & 0x200) ? 0x80 : 0x00));
1168 1.1 veego
1169 1.1 veego WCrt(ba, CRT_ID_MAX_ROW_ADDRESS,
1170 1.1 veego 0x40 | /* TEXT ? 0x00 ??? */
1171 1.1 veego (DBLSCAN ? 0x80 : 0x00) |
1172 1.1 veego ((VBS & 0x200) ? 0x20 : 0x00) |
1173 1.1 veego (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
1174 1.1 veego
1175 1.1 veego WCrt(ba, CRT_ID_MODE_CONTROL,
1176 1.1 veego ((TEXT || (gv->depth == 1)) ? 0xc3 : 0xab));
1177 1.1 veego
1178 1.1 veego /* text cursor */
1179 1.1 veego
1180 1.1 veego if (TEXT) {
1181 1.1 veego #if ET_ULCURSOR
1182 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
1183 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
1184 1.1 veego #else
1185 1.1 veego WCrt(ba, CRT_ID_CURSOR_START, 0x00);
1186 1.1 veego WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
1187 1.1 veego #endif
1188 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
1189 1.1 veego WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
1190 1.1 veego }
1191 1.1 veego
1192 1.1 veego WCrt(ba, CRT_ID_UNDERLINE_LOC, ((md->fy - 1) & 0x1f)
1193 1.1 veego | ((TEXT || (gv->depth == 1)) ? 0x00 : 0x60));
1194 1.1 veego
1195 1.1 veego WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
1196 1.1 veego WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
1197 1.1 veego
1198 1.1 veego WCrt(ba, CRT_ID_START_VER_RETR, VSS);
1199 1.1 veego WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x30);
1200 1.1 veego WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
1201 1.1 veego WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
1202 1.1 veego WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
1203 1.1 veego
1204 1.1 veego WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
1205 1.1 veego
1206 1.1 veego WCrt(ba, CRT_ID_OVERFLOW_HIGH,
1207 1.3 veego ((VBS & 0x400) ? 0x01 : 0x00) |
1208 1.3 veego ((VT & 0x400) ? 0x02 : 0x00) |
1209 1.3 veego ((VDE & 0x400) ? 0x04 : 0x00) |
1210 1.3 veego ((VSS & 0x400) ? 0x08 : 0x00) |
1211 1.3 veego 0x10 |
1212 1.3 veego (LACE ? 0x80 : 0x00));
1213 1.3 veego
1214 1.3 veego WCrt(ba, CRT_ID_HOR_OVERFLOW,
1215 1.3 veego ((HT & 0x100) ? 0x01 : 0x00) |
1216 1.3 veego ((HBS & 0x100) ? 0x04 : 0x00) |
1217 1.3 veego ((HSS & 0x100) ? 0x10 : 0x00)
1218 1.3 veego );
1219 1.1 veego
1220 1.1 veego /* depth dependent stuff */
1221 1.1 veego
1222 1.1 veego WGfx(ba, GCT_ID_GRAPHICS_MODE,
1223 1.1 veego ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
1224 1.1 veego WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
1225 1.1 veego
1226 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1227 1.1 veego vgar(ba, VDAC_MASK);
1228 1.1 veego vgar(ba, VDAC_MASK);
1229 1.1 veego vgar(ba, VDAC_MASK);
1230 1.1 veego vgar(ba, VDAC_MASK);
1231 1.1 veego switch (gv->depth) {
1232 1.1 veego case 1:
1233 1.1 veego case 4: /* text */
1234 1.1 veego switch(etdtype) {
1235 1.1 veego case SIERRA11483:
1236 1.1 veego case SIERRA15025:
1237 1.1 veego case MUSICDAC:
1238 1.1 veego vgaw(ba, VDAC_MASK, 0);
1239 1.1 veego break;
1240 1.1 veego case MERLINDAC:
1241 1.1 veego setMerlinDACmode(ba, 0);
1242 1.1 veego break;
1243 1.1 veego }
1244 1.1 veego HDE = gv->disp_width / 16;
1245 1.1 veego break;
1246 1.1 veego case 8:
1247 1.1 veego switch(etdtype) {
1248 1.1 veego case SIERRA11483:
1249 1.1 veego case SIERRA15025:
1250 1.1 veego case MUSICDAC:
1251 1.1 veego vgaw(ba, VDAC_MASK, 0);
1252 1.1 veego break;
1253 1.1 veego case MERLINDAC:
1254 1.1 veego setMerlinDACmode(ba, 0);
1255 1.1 veego break;
1256 1.1 veego }
1257 1.1 veego HDE = gv->disp_width / 8;
1258 1.1 veego break;
1259 1.1 veego case 15:
1260 1.1 veego switch(etdtype) {
1261 1.1 veego case SIERRA11483:
1262 1.1 veego case SIERRA15025:
1263 1.1 veego case MUSICDAC:
1264 1.1 veego vgaw(ba, VDAC_MASK, 0xa0);
1265 1.1 veego break;
1266 1.1 veego case MERLINDAC:
1267 1.1 veego setMerlinDACmode(ba, 0xa0);
1268 1.1 veego break;
1269 1.1 veego }
1270 1.1 veego HDE = gv->disp_width / 4;
1271 1.1 veego break;
1272 1.1 veego case 16:
1273 1.1 veego switch(etdtype) {
1274 1.1 veego case SIERRA11483:
1275 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1276 1.1 veego break;
1277 1.1 veego case SIERRA15025:
1278 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1279 1.1 veego break;
1280 1.1 veego case MUSICDAC:
1281 1.1 veego vgaw(ba, VDAC_MASK, 0xc0);
1282 1.1 veego break;
1283 1.1 veego case MERLINDAC:
1284 1.1 veego setMerlinDACmode(ba, 0xe0);
1285 1.1 veego break;
1286 1.1 veego }
1287 1.1 veego HDE = gv->disp_width / 4;
1288 1.1 veego break;
1289 1.1 veego case 24:
1290 1.1 veego switch(etdtype) {
1291 1.1 veego case SIERRA11483:
1292 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1293 1.1 veego break;
1294 1.1 veego case SIERRA15025:
1295 1.1 veego vgaw(ba, VDAC_MASK, 0xe1);
1296 1.1 veego break;
1297 1.1 veego case MUSICDAC:
1298 1.1 veego vgaw(ba, VDAC_MASK, 0xe0);
1299 1.1 veego break;
1300 1.1 veego case MERLINDAC:
1301 1.1 veego setMerlinDACmode(ba, 0xf0);
1302 1.1 veego break;
1303 1.1 veego }
1304 1.1 veego HDE = (gv->disp_width / 8) * 3;
1305 1.1 veego break;
1306 1.1 veego case 32:
1307 1.1 veego switch(etdtype) {
1308 1.1 veego case SIERRA11483:
1309 1.1 veego case MUSICDAC:
1310 1.1 veego vgaw(ba, VDAC_MASK, 0); /* illegal mode! */
1311 1.1 veego break;
1312 1.1 veego case SIERRA15025:
1313 1.1 veego vgaw(ba, VDAC_MASK, 0x61);
1314 1.1 veego break;
1315 1.1 veego case MERLINDAC:
1316 1.1 veego setMerlinDACmode(ba, 0xb0);
1317 1.1 veego break;
1318 1.1 veego }
1319 1.1 veego HDE = gv->disp_width / 2;
1320 1.1 veego break;
1321 1.1 veego }
1322 1.1 veego WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
1323 1.1 veego WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
1324 1.1 veego (gv->depth == 1) ? 0x01 : 0x0f);
1325 1.1 veego
1326 1.1 veego WCrt(ba, CRT_ID_OFFSET, HDE);
1327 1.1 veego
1328 1.1 veego /* text initialization */
1329 1.1 veego if (TEXT) {
1330 1.1 veego et_inittextmode(gp);
1331 1.1 veego }
1332 1.1 veego
1333 1.1 veego WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
1334 1.1 veego
1335 1.1 veego /* Pass-through */
1336 1.1 veego RegOffpass(ba);
1337 1.1 veego
1338 1.1 veego return (1);
1339 1.1 veego }
1340 1.1 veego
1341 1.1 veego
1342 1.1 veego void
1343 1.1 veego et_inittextmode(gp)
1344 1.1 veego struct grf_softc *gp;
1345 1.1 veego {
1346 1.1 veego struct grfettext_mode *tm = (struct grfettext_mode *) gp->g_data;
1347 1.1 veego volatile unsigned char *ba = gp->g_regkva;
1348 1.1 veego unsigned char *fb = gp->g_fbkva;
1349 1.1 veego unsigned char *c, *f, y;
1350 1.1 veego unsigned short z;
1351 1.1 veego
1352 1.1 veego
1353 1.3 veego /*
1354 1.3 veego * load text font into beginning of display memory. Each character
1355 1.3 veego * cell is 32 bytes long (enough for 4 planes)
1356 1.3 veego */
1357 1.1 veego
1358 1.1 veego SetTextPlane(ba, 0x02);
1359 1.1 veego et_memset(fb, 0, 256 * 32);
1360 1.1 veego c = (unsigned char *) (fb) + (32 * tm->fdstart);
1361 1.1 veego f = tm->fdata;
1362 1.1 veego for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
1363 1.1 veego for (y = 0; y < tm->fy; y++)
1364 1.1 veego *c++ = *f++;
1365 1.1 veego
1366 1.1 veego /* clear out text/attr planes (three screens worth) */
1367 1.1 veego
1368 1.1 veego SetTextPlane(ba, 0x01);
1369 1.1 veego et_memset(fb, 0x07, tm->cols * tm->rows * 3);
1370 1.1 veego SetTextPlane(ba, 0x00);
1371 1.1 veego et_memset(fb, 0x20, tm->cols * tm->rows * 3);
1372 1.1 veego
1373 1.1 veego /* print out a little init msg */
1374 1.1 veego
1375 1.1 veego c = (unsigned char *) (fb) + (tm->cols - 16);
1376 1.1 veego strcpy(c, "TSENG");
1377 1.1 veego c[6] = 0x20;
1378 1.1 veego
1379 1.1 veego /* set colors (B&W) */
1380 1.1 veego
1381 1.1 veego switch(ettype) {
1382 1.1 veego case MERLIN:
1383 1.1 veego vgaw(ba, MERLIN_VDAC_INDEX, 0);
1384 1.1 veego for (z = 0; z < 256; z++) {
1385 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1386 1.1 veego
1387 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][0]);
1388 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][1]);
1389 1.1 veego vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][2]);
1390 1.1 veego }
1391 1.1 veego break;
1392 1.1 veego default:
1393 1.1 veego vgaw(ba, VDAC_ADDRESS_W, 0);
1394 1.1 veego for (z = 0; z < 256; z++) {
1395 1.1 veego y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
1396 1.1 veego
1397 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1398 1.3 veego etconscolors[y][0] >> etcmap_shift);
1399 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1400 1.3 veego etconscolors[y][1] >> etcmap_shift);
1401 1.3 veego vgaw(ba, VDAC_DATA + ((ettype == DOMINO) ? 0x0fff : 0),
1402 1.3 veego etconscolors[y][2] >> etcmap_shift);
1403 1.1 veego }
1404 1.1 veego break;
1405 1.1 veego }
1406 1.1 veego }
1407 1.1 veego
1408 1.1 veego
1409 1.1 veego void
1410 1.1 veego et_memset(d, c, l)
1411 1.1 veego unsigned char *d;
1412 1.1 veego unsigned char c;
1413 1.1 veego int l;
1414 1.1 veego {
1415 1.1 veego for (; l > 0; l--)
1416 1.1 veego *d++ = c;
1417 1.1 veego }
1418 1.1 veego
1419 1.1 veego
1420 1.1 veego static int
1421 1.1 veego et_getControllerType(gp)
1422 1.1 veego struct grf_softc * gp;
1423 1.1 veego {
1424 1.1 veego unsigned char *ba = gp->g_regkva; /* register base */
1425 1.1 veego unsigned char *mem = gp->g_fbkva; /* memory base */
1426 1.1 veego unsigned char *mmu = mem + MMU_APERTURE0; /* MMU aperture 0 base */
1427 1.1 veego
1428 1.1 veego *mem = 0;
1429 1.1 veego
1430 1.1 veego /* make ACL visible */
1431 1.1 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xfb);
1432 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x01);
1433 1.1 veego
1434 1.1 veego *((unsigned long *)mmu) = 0;
1435 1.1 veego *(mem + 0x13) = 0x38;
1436 1.3 veego
1437 1.1 veego *mmu = 0xff;
1438 1.1 veego
1439 1.1 veego /* hide ACL */
1440 1.1 veego WIma(ba, IMA_PORTCONTROL, 0x00);
1441 1.1 veego WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
1442 1.3 veego
1443 1.1 veego return((*mem == 0xff) ? ETW32 : ET4000);
1444 1.1 veego }
1445 1.1 veego
1446 1.1 veego
1447 1.1 veego static int
1448 1.1 veego et_getDACType(gp)
1449 1.1 veego struct grf_softc * gp;
1450 1.1 veego {
1451 1.1 veego unsigned char *ba = gp->g_regkva;
1452 1.1 veego union {
1453 1.1 veego int tt;
1454 1.1 veego char cc[4];
1455 1.1 veego } check;
1456 1.1 veego
1457 1.1 veego /* check for Sierra SC 15025 */
1458 1.1 veego
1459 1.3 veego /* We MUST do 4 HW reads to switch into command mode */
1460 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1461 1.3 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1462 1.3 veego
1463 1.3 veego vgaw(ba, VDAC_XINDEX, 9);
1464 1.3 veego check.cc[0] = vgar(ba, VDAC_XDATA);
1465 1.3 veego vgaw(ba, VDAC_XINDEX, 10);
1466 1.3 veego check.cc[1] = vgar(ba, VDAC_XDATA);
1467 1.3 veego vgaw(ba, VDAC_XINDEX, 11);
1468 1.3 veego check.cc[2] = vgar(ba, VDAC_XDATA);
1469 1.3 veego vgaw(ba, VDAC_XINDEX, 12);
1470 1.3 veego check.cc[3] = vgar(ba, VDAC_XDATA);
1471 1.3 veego
1472 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1473 1.3 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1474 1.3 veego
1475 1.3 veego if (check.tt == 0x533ab141) {
1476 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1477 1.3 veego vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
1478 1.3 veego
1479 1.3 veego /* switch to 8 bits per color */
1480 1.3 veego vgaw(ba, VDAC_XINDEX, 8);
1481 1.3 veego vgaw(ba, VDAC_XDATA, 1);
1482 1.3 veego /* do not shift color values */
1483 1.3 veego etcmap_shift = 0;
1484 1.3 veego
1485 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1486 1.3 veego vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
1487 1.3 veego
1488 1.3 veego vgaw(ba, VDAC_MASK, 0xff);
1489 1.3 veego return (SIERRA15025);
1490 1.3 veego }
1491 1.3 veego
1492 1.3 veego /* check for MUSIC DAC */
1493 1.3 veego
1494 1.3 veego if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR)); if (vgar(ba, HDR));
1495 1.3 veego vgaw(ba, VDAC_COMMAND, 0x02); /* set some strange MUSIC mode (???) */
1496 1.3 veego
1497 1.3 veego vgaw(ba, VDAC_XINDEX, 0x01);
1498 1.3 veego if (vgar(ba, VDAC_XDATA) == 0x01) {
1499 1.3 veego /* shift color values by 2 */
1500 1.3 veego etcmap_shift = 2;
1501 1.1 veego
1502 1.3 veego vgaw(ba, VDAC_MASK, 0xff);
1503 1.3 veego return (MUSICDAC);
1504 1.3 veego }
1505 1.3 veego
1506 1.3 veego /*
1507 1.3 veego * nothing else found, so let us pretend it is a stupid
1508 1.3 veego * Sierra SC 11483
1509 1.3 veego */
1510 1.1 veego
1511 1.1 veego /* shift color values by 2 */
1512 1.1 veego etcmap_shift = 2;
1513 1.3 veego
1514 1.1 veego vgaw(ba, VDAC_MASK, 0xff);
1515 1.3 veego return (SIERRA11483);
1516 1.1 veego }
1517 1.1 veego
1518 1.1 veego #endif /* NGRFET */
1519