grf_rh.c revision 1.18 1 1.18 is /* $NetBSD: grf_rh.c,v 1.18 1996/05/24 19:26:12 is Exp $ */
2 1.1 chopps
3 1.6 chopps /*
4 1.6 chopps * Copyright (c) 1994 Markus Wild
5 1.6 chopps * Copyright (c) 1994 Lutz Vieweg
6 1.6 chopps * All rights reserved.
7 1.6 chopps *
8 1.6 chopps * Redistribution and use in source and binary forms, with or without
9 1.6 chopps * modification, are permitted provided that the following conditions
10 1.6 chopps * are met:
11 1.6 chopps * 1. Redistributions of source code must retain the above copyright
12 1.6 chopps * notice, this list of conditions and the following disclaimer.
13 1.6 chopps * 2. Redistributions in binary form must reproduce the above copyright
14 1.6 chopps * notice, this list of conditions and the following disclaimer in the
15 1.6 chopps * documentation and/or other materials provided with the distribution.
16 1.6 chopps * 3. All advertising materials mentioning features or use of this software
17 1.6 chopps * must display the following acknowledgement:
18 1.6 chopps * This product includes software developed by Lutz Vieweg.
19 1.6 chopps * 4. The name of the author may not be used to endorse or promote products
20 1.6 chopps * derived from this software without specific prior written permission
21 1.6 chopps *
22 1.6 chopps * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.6 chopps * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.6 chopps * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.6 chopps * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.6 chopps * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.6 chopps * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.6 chopps * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.6 chopps * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.6 chopps * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.6 chopps * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.6 chopps */
33 1.2 chopps #include "grfrh.h"
34 1.2 chopps #if NGRFRH > 0
35 1.1 chopps
36 1.1 chopps /*
37 1.1 chopps * Graphics routines for the Retina BLT Z3 board,
38 1.1 chopps * using the NCR 77C32BLT VGA controller.
39 1.1 chopps */
40 1.1 chopps
41 1.1 chopps #include <sys/param.h>
42 1.14 veego #include <sys/systm.h>
43 1.1 chopps #include <sys/errno.h>
44 1.1 chopps #include <sys/ioctl.h>
45 1.1 chopps #include <sys/device.h>
46 1.1 chopps #include <sys/malloc.h>
47 1.1 chopps #include <machine/cpu.h>
48 1.1 chopps #include <amiga/amiga/device.h>
49 1.1 chopps #include <amiga/dev/grfioctl.h>
50 1.1 chopps #include <amiga/dev/grfvar.h>
51 1.1 chopps #include <amiga/dev/grf_rhreg.h>
52 1.5 chopps #include <amiga/dev/zbusvar.h>
53 1.1 chopps
54 1.7 chopps enum mode_type { MT_TXTONLY, MT_GFXONLY, MT_BOTH };
55 1.7 chopps
56 1.1 chopps int rh_mondefok __P((struct MonDef *));
57 1.1 chopps
58 1.17 veego u_short rh_CompFQ __P((u_int fq));
59 1.1 chopps int rh_load_mon __P((struct grf_softc *gp, struct MonDef *md));
60 1.1 chopps int rh_getvmode __P((struct grf_softc *gp, struct grfvideo_mode *vm));
61 1.7 chopps int rh_setvmode __P((struct grf_softc *gp, unsigned int mode,
62 1.7 chopps enum mode_type type));
63 1.7 chopps
64 1.7 chopps /* make it patchable, and settable by kernel config option */
65 1.7 chopps #ifndef RH_MEMCLK
66 1.7 chopps #define RH_MEMCLK 61000000 /* this is the memory clock value, you shouldn't
67 1.7 chopps set it to less than 61000000, higher values may
68 1.7 chopps speed up blits a little bit, if you raise this
69 1.7 chopps value too much, some trash will appear on your
70 1.7 chopps screen. */
71 1.7 chopps #endif
72 1.7 chopps int rh_memclk = RH_MEMCLK;
73 1.1 chopps
74 1.1 chopps
75 1.1 chopps extern unsigned char kernel_font_8x8_width, kernel_font_8x8_height;
76 1.1 chopps extern unsigned char kernel_font_8x8_lo, kernel_font_8x8_hi;
77 1.1 chopps extern unsigned char kernel_font_8x8[];
78 1.2 chopps #ifdef KFONT_8X11
79 1.2 chopps extern unsigned char kernel_font_8x11_width, kernel_font_8x11_height;
80 1.2 chopps extern unsigned char kernel_font_8x11_lo, kernel_font_8x11_hi;
81 1.2 chopps extern unsigned char kernel_font_8x11[];
82 1.2 chopps #endif
83 1.1 chopps
84 1.1 chopps /*
85 1.6 chopps * This driver for the MacroSystem Retina board was only possible,
86 1.6 chopps * because MacroSystem provided information about the pecularities
87 1.6 chopps * of the board. THANKS! Competition in Europe among gfx board
88 1.6 chopps * manufacturers is rather tough, so Lutz Vieweg, who wrote the
89 1.6 chopps * initial driver, has made an agreement with MS not to document
90 1.6 chopps * the driver source (see also his comment below).
91 1.6 chopps * -> ALL comments after
92 1.14 veego * -> " -------------- START OF CODE -------------- "
93 1.6 chopps * -> have been added by myself (mw) from studying the publically
94 1.6 chopps * -> available "NCR 77C32BLT" Data Manual
95 1.1 chopps */
96 1.6 chopps /*
97 1.6 chopps * This code offers low-level routines to access the Retina BLT Z3
98 1.1 chopps * graphics-board manufactured by MS MacroSystem GmbH from within NetBSD
99 1.6 chopps * for the Amiga.
100 1.1 chopps *
101 1.1 chopps * Thanks to MacroSystem for providing me with the neccessary information
102 1.1 chopps * to create theese routines. The sparse documentation of this code
103 1.1 chopps * results from the agreements between MS and me.
104 1.1 chopps */
105 1.1 chopps
106 1.1 chopps
107 1.1 chopps
108 1.1 chopps #define MDF_DBL 1
109 1.1 chopps #define MDF_LACE 2
110 1.1 chopps #define MDF_CLKDIV2 4
111 1.1 chopps
112 1.7 chopps /* set this as an option in your kernel config file! */
113 1.9 chopps /* #define RH_64BIT_SPRITE */
114 1.1 chopps
115 1.1 chopps /* -------------- START OF CODE -------------- */
116 1.1 chopps
117 1.1 chopps /* Convert big-endian long into little-endian long. */
118 1.1 chopps
119 1.1 chopps #define M2I(val) \
120 1.1 chopps asm volatile (" rorw #8,%0 ; \
121 1.1 chopps swap %0 ; \
122 1.1 chopps rorw #8,%0 ; " : "=d" (val) : "0" (val));
123 1.1 chopps
124 1.1 chopps #define M2INS(val) \
125 1.1 chopps asm volatile (" rorw #8,%0 ; \
126 1.1 chopps swap %0 ; \
127 1.1 chopps rorw #8,%0 ; \
128 1.1 chopps swap %0 ; " : "=d" (val) : "0" (val));
129 1.1 chopps
130 1.1 chopps #define ACM_OFFSET (0x00b00000)
131 1.1 chopps #define LM_OFFSET (0x00c00000)
132 1.1 chopps
133 1.1 chopps static unsigned char optab[] = {
134 1.1 chopps 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
135 1.1 chopps 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0
136 1.1 chopps };
137 1.1 chopps static char optabs[] = {
138 1.1 chopps 0, -1, -1, -1, -1, 0, -1, -1,
139 1.1 chopps -1, -1, 0, -1, -1, -1, -1, 0
140 1.1 chopps };
141 1.1 chopps
142 1.1 chopps void
143 1.1 chopps RZ3DisableHWC(gp)
144 1.1 chopps struct grf_softc *gp;
145 1.1 chopps {
146 1.1 chopps volatile void *ba = gp->g_regkva;
147 1.1 chopps
148 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_INDEX, 0x00);
149 1.1 chopps }
150 1.1 chopps
151 1.1 chopps void
152 1.1 chopps RZ3SetupHWC(gp, col1, col2, hsx, hsy, data)
153 1.1 chopps struct grf_softc *gp;
154 1.1 chopps unsigned char col1;
155 1.1 chopps unsigned col2;
156 1.1 chopps unsigned char hsx;
157 1.1 chopps unsigned char hsy;
158 1.1 chopps const unsigned long *data;
159 1.1 chopps {
160 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
161 1.1 chopps unsigned long *c = (unsigned long *)(ba + LM_OFFSET + HWC_MEM_OFF);
162 1.1 chopps const unsigned long *s = data;
163 1.1 chopps struct MonDef *MonitorDef = (struct MonDef *) gp->g_data;
164 1.9 chopps #ifdef RH_64BIT_SPRITE
165 1.1 chopps short x = (HWC_MEM_SIZE / (4*4)) - 1;
166 1.7 chopps #else
167 1.7 chopps short x = (HWC_MEM_SIZE / (4*4*2)) - 1;
168 1.7 chopps #endif
169 1.1 chopps /* copy only, if there is a data pointer. */
170 1.1 chopps if (data) do {
171 1.1 chopps *c++ = *s++;
172 1.1 chopps *c++ = *s++;
173 1.1 chopps *c++ = *s++;
174 1.1 chopps *c++ = *s++;
175 1.1 chopps } while (x-- > 0);
176 1.1 chopps
177 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR1, col1);
178 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR0, col2);
179 1.7 chopps if (MonitorDef->DEP <= 8) {
180 1.9 chopps #ifdef RH_64BIT_SPRITE
181 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x85);
182 1.7 chopps #else
183 1.7 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x03);
184 1.7 chopps #endif
185 1.7 chopps }
186 1.7 chopps else if (MonitorDef->DEP <= 16) {
187 1.9 chopps #ifdef RH_64BIT_SPRITE
188 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0xa5);
189 1.7 chopps #else
190 1.7 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x23);
191 1.7 chopps #endif
192 1.7 chopps }
193 1.7 chopps else {
194 1.9 chopps #ifdef RH_64BIT_SPRITE
195 1.7 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0xc5);
196 1.7 chopps #else
197 1.7 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x43);
198 1.7 chopps #endif
199 1.7 chopps }
200 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_LOC_HI, 0x00);
201 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_LOC_LO, 0x00);
202 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_LOC_HI, 0x00);
203 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_LOC_LO, 0x00);
204 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_INDEX, hsx);
205 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_INDEX, hsy);
206 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_STORE_HI, 0x00);
207 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_STORE_LO, ((HWC_MEM_OFF / 4) & 0x0000f));
208 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_ST_OFF_HI, (((HWC_MEM_OFF / 4) & 0xff000) >> 12));
209 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_ST_OFF_LO, (((HWC_MEM_OFF / 4) & 0x00ff0) >> 4));
210 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_PIXELMASK, 0xff);
211 1.1 chopps }
212 1.1 chopps
213 1.1 chopps void
214 1.1 chopps RZ3AlphaErase (gp, xd, yd, w, h)
215 1.1 chopps struct grf_softc *gp;
216 1.1 chopps unsigned short xd;
217 1.1 chopps unsigned short yd;
218 1.1 chopps unsigned short w;
219 1.1 chopps unsigned short h;
220 1.1 chopps {
221 1.1 chopps const struct MonDef * md = (struct MonDef *) gp->g_data;
222 1.1 chopps RZ3AlphaCopy(gp, xd, yd+md->TY, xd, yd, w, h);
223 1.1 chopps }
224 1.1 chopps
225 1.1 chopps void
226 1.1 chopps RZ3AlphaCopy (gp, xs, ys, xd, yd, w, h)
227 1.1 chopps struct grf_softc *gp;
228 1.1 chopps unsigned short xs;
229 1.1 chopps unsigned short ys;
230 1.1 chopps unsigned short xd;
231 1.1 chopps unsigned short yd;
232 1.1 chopps unsigned short w;
233 1.1 chopps unsigned short h;
234 1.1 chopps {
235 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
236 1.1 chopps const struct MonDef *md = (struct MonDef *) gp->g_data;
237 1.1 chopps volatile unsigned long *acm = (unsigned long *) (ba + ACM_OFFSET);
238 1.1 chopps unsigned short mod;
239 1.1 chopps
240 1.1 chopps xs *= 4;
241 1.1 chopps ys *= 4;
242 1.1 chopps xd *= 4;
243 1.1 chopps yd *= 4;
244 1.1 chopps w *= 4;
245 1.1 chopps
246 1.1 chopps {
247 1.1 chopps /* anyone got Windoze GDI opcodes handy?... */
248 1.1 chopps unsigned long tmp = 0x0000ca00;
249 1.1 chopps *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
250 1.1 chopps }
251 1.1 chopps
252 1.1 chopps mod = 0xc0c2;
253 1.1 chopps
254 1.1 chopps {
255 1.1 chopps unsigned long pat = 8 * PAT_MEM_OFF;
256 1.1 chopps unsigned long dst = 8 * (xd + yd * md->TX);
257 1.1 chopps
258 1.1 chopps unsigned long src = 8 * (xs + ys * md->TX);
259 1.1 chopps
260 1.1 chopps if (xd > xs) {
261 1.1 chopps mod &= ~0x8000;
262 1.1 chopps src += 8 * (w - 1);
263 1.1 chopps dst += 8 * (w - 1);
264 1.1 chopps pat += 8 * 2;
265 1.1 chopps }
266 1.1 chopps if (yd > ys) {
267 1.1 chopps mod &= ~0x4000;
268 1.1 chopps src += 8 * (h - 1) * md->TX * 4;
269 1.1 chopps dst += 8 * (h - 1) * md->TX * 4;
270 1.1 chopps pat += 8 * 4;
271 1.1 chopps }
272 1.1 chopps
273 1.1 chopps M2I(src);
274 1.1 chopps *(acm + ACM_SOURCE/4) = src;
275 1.1 chopps
276 1.1 chopps M2I(pat);
277 1.1 chopps *(acm + ACM_PATTERN/4) = pat;
278 1.1 chopps
279 1.1 chopps M2I(dst);
280 1.1 chopps *(acm + ACM_DESTINATION/4) = dst;
281 1.1 chopps }
282 1.1 chopps {
283 1.1 chopps
284 1.1 chopps unsigned long tmp = mod << 16;
285 1.1 chopps *(acm + ACM_CONTROL/4) = tmp;
286 1.1 chopps }
287 1.1 chopps {
288 1.1 chopps
289 1.1 chopps unsigned long tmp = w | (h << 16);
290 1.1 chopps M2I(tmp);
291 1.1 chopps *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
292 1.1 chopps }
293 1.1 chopps
294 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
295 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
296 1.1 chopps
297 1.1 chopps while ((*(((volatile unsigned char *)acm) +
298 1.1 chopps (ACM_START_STATUS + 2)) & 1) == 0);
299 1.1 chopps }
300 1.1 chopps
301 1.1 chopps void
302 1.1 chopps RZ3BitBlit (gp, gbb)
303 1.1 chopps struct grf_softc *gp;
304 1.1 chopps struct grf_bitblt * gbb;
305 1.1 chopps {
306 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
307 1.1 chopps volatile unsigned char *lm = ba + LM_OFFSET;
308 1.1 chopps volatile unsigned long *acm = (unsigned long *) (ba + ACM_OFFSET);
309 1.1 chopps const struct MonDef *md = (struct MonDef *) gp->g_data;
310 1.1 chopps unsigned short mod;
311 1.1 chopps
312 1.1 chopps {
313 1.1 chopps unsigned long * pt = (unsigned long *) (lm + PAT_MEM_OFF);
314 1.1 chopps unsigned long tmp = gbb->mask | ((unsigned long)gbb->mask << 16);
315 1.1 chopps *pt++ = tmp;
316 1.1 chopps *pt = tmp;
317 1.1 chopps }
318 1.1 chopps
319 1.1 chopps {
320 1.1 chopps
321 1.1 chopps unsigned long tmp = optab[ gbb->op ] << 8;
322 1.1 chopps *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
323 1.1 chopps }
324 1.1 chopps
325 1.1 chopps mod = 0xc0c2;
326 1.1 chopps
327 1.1 chopps {
328 1.1 chopps unsigned long pat = 8 * PAT_MEM_OFF;
329 1.1 chopps unsigned long dst = 8 * (gbb->dst_x + gbb->dst_y * md->TX);
330 1.1 chopps
331 1.1 chopps if (optabs[gbb->op]) {
332 1.1 chopps unsigned long src = 8 * (gbb->src_x + gbb->src_y * md->TX);
333 1.1 chopps
334 1.1 chopps if (gbb->dst_x > gbb->src_x) {
335 1.1 chopps mod &= ~0x8000;
336 1.1 chopps src += 8 * (gbb->w - 1);
337 1.1 chopps dst += 8 * (gbb->w - 1);
338 1.1 chopps pat += 8 * 2;
339 1.1 chopps }
340 1.1 chopps if (gbb->dst_y > gbb->src_y) {
341 1.1 chopps mod &= ~0x4000;
342 1.1 chopps src += 8 * (gbb->h - 1) * md->TX;
343 1.1 chopps dst += 8 * (gbb->h - 1) * md->TX;
344 1.1 chopps pat += 8 * 4;
345 1.1 chopps }
346 1.1 chopps
347 1.1 chopps M2I(src);
348 1.1 chopps *(acm + ACM_SOURCE/4) = src;
349 1.1 chopps }
350 1.1 chopps
351 1.1 chopps M2I(pat);
352 1.1 chopps *(acm + ACM_PATTERN/4) = pat;
353 1.1 chopps
354 1.1 chopps M2I(dst);
355 1.1 chopps *(acm + ACM_DESTINATION/4) = dst;
356 1.1 chopps }
357 1.1 chopps {
358 1.1 chopps
359 1.1 chopps unsigned long tmp = mod << 16;
360 1.1 chopps *(acm + ACM_CONTROL/4) = tmp;
361 1.1 chopps }
362 1.1 chopps {
363 1.1 chopps unsigned long tmp = gbb->w | (gbb->h << 16);
364 1.1 chopps M2I(tmp);
365 1.1 chopps *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
366 1.1 chopps }
367 1.1 chopps
368 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
369 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
370 1.1 chopps
371 1.1 chopps while ((*(((volatile unsigned char *)acm) +
372 1.1 chopps (ACM_START_STATUS + 2)) & 1) == 0);
373 1.1 chopps }
374 1.1 chopps
375 1.1 chopps void
376 1.1 chopps RZ3BitBlit16 (gp, gbb)
377 1.1 chopps struct grf_softc *gp;
378 1.1 chopps struct grf_bitblt * gbb;
379 1.1 chopps {
380 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
381 1.1 chopps volatile unsigned char *lm = ba + LM_OFFSET;
382 1.1 chopps volatile unsigned long * acm = (unsigned long *) (ba + ACM_OFFSET);
383 1.1 chopps const struct MonDef * md = (struct MonDef *) gp->g_data;
384 1.1 chopps unsigned short mod;
385 1.1 chopps
386 1.1 chopps {
387 1.1 chopps unsigned long * pt = (unsigned long *) (lm + PAT_MEM_OFF);
388 1.1 chopps unsigned long tmp = gbb->mask | ((unsigned long)gbb->mask << 16);
389 1.1 chopps *pt++ = tmp;
390 1.1 chopps *pt++ = tmp;
391 1.1 chopps *pt++ = tmp;
392 1.1 chopps *pt = tmp;
393 1.1 chopps }
394 1.1 chopps
395 1.1 chopps {
396 1.1 chopps
397 1.1 chopps unsigned long tmp = optab[ gbb->op ] << 8;
398 1.1 chopps *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
399 1.1 chopps }
400 1.1 chopps
401 1.1 chopps mod = 0xc0c2;
402 1.1 chopps
403 1.1 chopps {
404 1.1 chopps unsigned long pat = 8 * PAT_MEM_OFF;
405 1.1 chopps unsigned long dst = 8 * 2 * (gbb->dst_x + gbb->dst_y * md->TX);
406 1.1 chopps
407 1.1 chopps if (optabs[gbb->op]) {
408 1.1 chopps unsigned long src = 8 * 2 * (gbb->src_x + gbb->src_y * md->TX);
409 1.1 chopps
410 1.1 chopps if (gbb->dst_x > gbb->src_x) {
411 1.1 chopps mod &= ~0x8000;
412 1.1 chopps src += 8 * 2 * (gbb->w);
413 1.1 chopps dst += 8 * 2 * (gbb->w);
414 1.1 chopps pat += 8 * 2 * 2;
415 1.1 chopps }
416 1.1 chopps if (gbb->dst_y > gbb->src_y) {
417 1.1 chopps mod &= ~0x4000;
418 1.1 chopps src += 8 * 2 * (gbb->h - 1) * md->TX;
419 1.1 chopps dst += 8 * 2 * (gbb->h - 1) * md->TX;
420 1.1 chopps pat += 8 * 4 * 2;
421 1.1 chopps }
422 1.1 chopps
423 1.1 chopps M2I(src);
424 1.1 chopps *(acm + ACM_SOURCE/4) = src;
425 1.1 chopps }
426 1.1 chopps
427 1.1 chopps M2I(pat);
428 1.1 chopps *(acm + ACM_PATTERN/4) = pat;
429 1.1 chopps
430 1.1 chopps M2I(dst);
431 1.1 chopps *(acm + ACM_DESTINATION/4) = dst;
432 1.1 chopps }
433 1.1 chopps {
434 1.1 chopps
435 1.1 chopps unsigned long tmp = mod << 16;
436 1.1 chopps *(acm + ACM_CONTROL/4) = tmp;
437 1.1 chopps }
438 1.1 chopps {
439 1.1 chopps
440 1.1 chopps unsigned long tmp = gbb->w | (gbb->h << 16);
441 1.1 chopps M2I(tmp);
442 1.1 chopps *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
443 1.1 chopps }
444 1.1 chopps
445 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
446 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
447 1.1 chopps
448 1.1 chopps while ((*(((volatile unsigned char *)acm) +
449 1.1 chopps (ACM_START_STATUS+ 2)) & 1) == 0);
450 1.1 chopps }
451 1.1 chopps
452 1.1 chopps void
453 1.7 chopps RZ3BitBlit24 (gp, gbb)
454 1.7 chopps struct grf_softc *gp;
455 1.7 chopps struct grf_bitblt * gbb;
456 1.7 chopps {
457 1.7 chopps volatile unsigned char *ba = gp->g_regkva;
458 1.7 chopps volatile unsigned char *lm = ba + LM_OFFSET;
459 1.7 chopps volatile unsigned long * acm = (unsigned long *) (ba + ACM_OFFSET);
460 1.7 chopps const struct MonDef * md = (struct MonDef *) gp->g_data;
461 1.7 chopps unsigned short mod;
462 1.7 chopps
463 1.7 chopps
464 1.7 chopps {
465 1.7 chopps unsigned long * pt = (unsigned long *) (lm + PAT_MEM_OFF);
466 1.7 chopps unsigned long tmp = gbb->mask | ((unsigned long)gbb->mask << 16);
467 1.7 chopps *pt++ = tmp;
468 1.7 chopps *pt++ = tmp;
469 1.7 chopps *pt++ = tmp;
470 1.7 chopps *pt++ = tmp;
471 1.7 chopps *pt++ = tmp;
472 1.7 chopps *pt = tmp;
473 1.7 chopps }
474 1.7 chopps
475 1.7 chopps {
476 1.7 chopps
477 1.7 chopps unsigned long tmp = optab[ gbb->op ] << 8;
478 1.7 chopps *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
479 1.7 chopps }
480 1.7 chopps
481 1.7 chopps mod = 0xc0c2;
482 1.7 chopps
483 1.7 chopps {
484 1.7 chopps unsigned long pat = 8 * PAT_MEM_OFF;
485 1.7 chopps unsigned long dst = 8 * 3 * (gbb->dst_x + gbb->dst_y * md->TX);
486 1.7 chopps
487 1.7 chopps if (optabs[gbb->op]) {
488 1.7 chopps unsigned long src = 8 * 3 * (gbb->src_x + gbb->src_y * md->TX);
489 1.7 chopps
490 1.7 chopps if (gbb->dst_x > gbb->src_x ) {
491 1.7 chopps mod &= ~0x8000;
492 1.7 chopps src += 8 * 3 * (gbb->w);
493 1.7 chopps dst += 8 * 3 * (gbb->w);
494 1.7 chopps pat += 8 * 3 * 2;
495 1.7 chopps }
496 1.7 chopps if (gbb->dst_y > gbb->src_y) {
497 1.7 chopps mod &= ~0x4000;
498 1.7 chopps src += 8 * 3 * (gbb->h - 1) * md->TX;
499 1.7 chopps dst += 8 * 3 * (gbb->h - 1) * md->TX;
500 1.7 chopps pat += 8 * 4 * 3;
501 1.7 chopps }
502 1.7 chopps
503 1.7 chopps M2I(src);
504 1.7 chopps *(acm + ACM_SOURCE/4) = src;
505 1.7 chopps }
506 1.7 chopps
507 1.7 chopps
508 1.7 chopps M2I(pat);
509 1.7 chopps *(acm + ACM_PATTERN/4) = pat;
510 1.7 chopps
511 1.7 chopps
512 1.7 chopps M2I(dst);
513 1.7 chopps *(acm + ACM_DESTINATION/4) = dst;
514 1.7 chopps }
515 1.7 chopps {
516 1.7 chopps
517 1.7 chopps unsigned long tmp = mod << 16;
518 1.7 chopps *(acm + ACM_CONTROL/4) = tmp;
519 1.7 chopps }
520 1.7 chopps {
521 1.7 chopps
522 1.7 chopps unsigned long tmp = gbb->w | (gbb->h << 16);
523 1.7 chopps M2I(tmp);
524 1.7 chopps *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
525 1.7 chopps }
526 1.7 chopps
527 1.7 chopps
528 1.7 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
529 1.7 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
530 1.7 chopps
531 1.7 chopps while ( (*(((volatile unsigned char *)acm)
532 1.7 chopps + (ACM_START_STATUS+ 2)) & 1) == 0 ) {};
533 1.7 chopps
534 1.7 chopps }
535 1.7 chopps
536 1.7 chopps
537 1.7 chopps void
538 1.1 chopps RZ3SetCursorPos (gp, pos)
539 1.1 chopps struct grf_softc *gp;
540 1.1 chopps unsigned short pos;
541 1.1 chopps {
542 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
543 1.1 chopps
544 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_LOW, (unsigned char)pos);
545 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, (unsigned char)(pos >> 8));
546 1.1 chopps
547 1.1 chopps }
548 1.1 chopps
549 1.1 chopps void
550 1.1 chopps RZ3LoadPalette (gp, pal, firstcol, colors)
551 1.1 chopps struct grf_softc *gp;
552 1.1 chopps unsigned char * pal;
553 1.1 chopps unsigned char firstcol;
554 1.1 chopps unsigned char colors;
555 1.1 chopps {
556 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
557 1.1 chopps
558 1.1 chopps if (colors == 0)
559 1.1 chopps return;
560 1.1 chopps
561 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, firstcol);
562 1.1 chopps
563 1.1 chopps {
564 1.1 chopps
565 1.1 chopps short x = colors-1;
566 1.1 chopps const unsigned char * col = pal;
567 1.1 chopps do {
568 1.1 chopps
569 1.1 chopps vgaw(ba, VDAC_DATA, (*col++ >> 2));
570 1.1 chopps vgaw(ba, VDAC_DATA, (*col++ >> 2));
571 1.1 chopps vgaw(ba, VDAC_DATA, (*col++ >> 2));
572 1.1 chopps
573 1.1 chopps } while (x-- > 0);
574 1.1 chopps
575 1.1 chopps }
576 1.1 chopps }
577 1.1 chopps
578 1.1 chopps void
579 1.1 chopps RZ3SetPalette (gp, colornum, red, green, blue)
580 1.1 chopps struct grf_softc *gp;
581 1.1 chopps unsigned char colornum;
582 1.1 chopps unsigned char red, green, blue;
583 1.1 chopps {
584 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
585 1.1 chopps
586 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, colornum);
587 1.1 chopps
588 1.1 chopps vgaw(ba, VDAC_DATA, (red >> 2));
589 1.1 chopps vgaw(ba, VDAC_DATA, (green >> 2));
590 1.1 chopps vgaw(ba, VDAC_DATA, (blue >> 2));
591 1.1 chopps
592 1.1 chopps }
593 1.1 chopps
594 1.1 chopps /* XXXXXXXXX !! */
595 1.1 chopps static unsigned short xpan;
596 1.1 chopps static unsigned short ypan;
597 1.1 chopps
598 1.1 chopps void
599 1.1 chopps RZ3SetPanning (gp, xoff, yoff)
600 1.1 chopps struct grf_softc *gp;
601 1.1 chopps unsigned short xoff, yoff;
602 1.1 chopps {
603 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
604 1.1 chopps const struct MonDef * md = (struct MonDef *) gp->g_data;
605 1.1 chopps unsigned long off;
606 1.1 chopps
607 1.1 chopps xpan = xoff;
608 1.1 chopps ypan = yoff;
609 1.1 chopps
610 1.1 chopps
611 1.7 chopps if (md->DEP > 8 && md->DEP <= 16) xoff *= 2;
612 1.7 chopps else if (md->DEP > 16) xoff *= 3;
613 1.1 chopps
614 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
615 1.1 chopps WAttr(ba, ACT_ID_HOR_PEL_PANNING, (unsigned char)((xoff << 1) & 0x07));
616 1.1 chopps /* have the color lookup function normally again */
617 1.1 chopps vgaw(ba, ACT_ADDRESS_W, 0x20);
618 1.1 chopps
619 1.1 chopps if (md->DEP == 8)
620 1.1 chopps off = ((yoff * md->TX)/ 4) + (xoff >> 2);
621 1.7 chopps else if (md->DEP == 16)
622 1.1 chopps off = ((yoff * md->TX * 2)/ 4) + (xoff >> 2);
623 1.7 chopps else
624 1.7 chopps off = ((yoff * md->TX * 3)/ 4) + (xoff >> 2);
625 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_LOW, ((unsigned char)off));
626 1.1 chopps off >>= 8;
627 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_HIGH, ((unsigned char)off));
628 1.1 chopps off >>= 8;
629 1.1 chopps WCrt(ba, CRT_ID_EXT_START_ADDR,
630 1.1 chopps ((RCrt(ba, CRT_ID_EXT_START_ADDR) & 0xf0) | (off & 0x0f)));
631 1.1 chopps
632 1.1 chopps
633 1.1 chopps }
634 1.1 chopps
635 1.1 chopps void
636 1.1 chopps RZ3SetHWCloc (gp, x, y)
637 1.1 chopps struct grf_softc *gp;
638 1.1 chopps unsigned short x, y;
639 1.1 chopps {
640 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
641 1.1 chopps const struct MonDef *md = (struct MonDef *) gp->g_data;
642 1.1 chopps volatile unsigned char *acm = ba + ACM_OFFSET;
643 1.1 chopps
644 1.1 chopps if (x < xpan)
645 1.1 chopps RZ3SetPanning(gp, x, ypan);
646 1.1 chopps
647 1.1 chopps if (x >= (xpan+md->MW))
648 1.1 chopps RZ3SetPanning(gp, (1 + x - md->MW) , ypan);
649 1.1 chopps
650 1.1 chopps if (y < ypan)
651 1.1 chopps RZ3SetPanning(gp, xpan, y);
652 1.1 chopps
653 1.1 chopps if (y >= (ypan+md->MH))
654 1.1 chopps RZ3SetPanning(gp, xpan, (1 + y - md->MH));
655 1.1 chopps
656 1.1 chopps x -= xpan;
657 1.1 chopps y -= ypan;
658 1.1 chopps
659 1.1 chopps *(acm + (ACM_CURSOR_POSITION+0)) = x & 0xff;
660 1.1 chopps *(acm + (ACM_CURSOR_POSITION+1)) = x >> 8;
661 1.1 chopps *(acm + (ACM_CURSOR_POSITION+2)) = y & 0xff;
662 1.1 chopps *(acm + (ACM_CURSOR_POSITION+3)) = y >> 8;
663 1.1 chopps }
664 1.1 chopps
665 1.1 chopps u_short
666 1.17 veego rh_CompFQ(fq)
667 1.1 chopps u_int fq;
668 1.1 chopps {
669 1.1 chopps /* yuck... this sure could need some explanation.. */
670 1.1 chopps
671 1.1 chopps unsigned long f = fq;
672 1.1 chopps long n2 = 3;
673 1.1 chopps long abw = 0x7fffffff;
674 1.1 chopps long n1 = 3;
675 1.1 chopps unsigned long m;
676 1.1 chopps unsigned short erg = 0;
677 1.1 chopps
678 1.1 chopps f *= 8;
679 1.1 chopps
680 1.1 chopps do {
681 1.1 chopps
682 1.1 chopps if (f <= 250000000)
683 1.1 chopps break;
684 1.1 chopps f /= 2;
685 1.1 chopps
686 1.1 chopps } while (n2-- > 0);
687 1.1 chopps
688 1.1 chopps if (n2 < 0)
689 1.1 chopps return(0);
690 1.1 chopps
691 1.1 chopps
692 1.1 chopps do {
693 1.1 chopps long tmp;
694 1.1 chopps
695 1.1 chopps f = fq;
696 1.1 chopps f >>= 3;
697 1.1 chopps f <<= n2;
698 1.1 chopps f >>= 7;
699 1.1 chopps
700 1.1 chopps m = (f * n1) / (14318180/1024);
701 1.1 chopps
702 1.1 chopps if (m > 129)
703 1.1 chopps break;
704 1.1 chopps
705 1.1 chopps tmp = (((m * 14318180) >> n2) / n1) - fq;
706 1.1 chopps if (tmp < 0)
707 1.1 chopps tmp = -tmp;
708 1.1 chopps
709 1.1 chopps if (tmp < abw) {
710 1.1 chopps abw = tmp;
711 1.1 chopps erg = (((n2 << 5) | (n1-2)) << 8) | (m-2);
712 1.1 chopps }
713 1.1 chopps
714 1.1 chopps } while ( (++n1) <= 21);
715 1.1 chopps
716 1.1 chopps return(erg);
717 1.1 chopps }
718 1.1 chopps
719 1.1 chopps int
720 1.1 chopps rh_mondefok(mdp)
721 1.1 chopps struct MonDef *mdp;
722 1.1 chopps {
723 1.1 chopps switch(mdp->DEP) {
724 1.17 veego case 8:
725 1.17 veego case 16:
726 1.17 veego case 24:
727 1.1 chopps return(1);
728 1.17 veego case 4:
729 1.1 chopps if (mdp->FX == 4 || (mdp->FX >= 7 && mdp->FX <= 16))
730 1.2 chopps return(1);
731 1.1 chopps /*FALLTHROUGH*/
732 1.17 veego default:
733 1.1 chopps return(0);
734 1.1 chopps }
735 1.1 chopps }
736 1.1 chopps
737 1.1 chopps
738 1.1 chopps int
739 1.1 chopps rh_load_mon(gp, md)
740 1.1 chopps struct grf_softc *gp;
741 1.1 chopps struct MonDef *md;
742 1.1 chopps {
743 1.1 chopps struct grfinfo *gi = &gp->g_display;
744 1.14 veego volatile caddr_t ba;
745 1.14 veego volatile caddr_t fb;
746 1.14 veego short FW, clksel, HDE = 0, VDE;
747 1.1 chopps unsigned short *c, z;
748 1.1 chopps const unsigned char *f;
749 1.1 chopps
750 1.1 chopps ba = gp->g_regkva;;
751 1.1 chopps fb = gp->g_fbkva;
752 1.1 chopps
753 1.1 chopps /* provide all needed information in grf device-independant
754 1.1 chopps * locations */
755 1.1 chopps gp->g_data = (caddr_t) md;
756 1.1 chopps gi->gd_regaddr = (caddr_t) kvtop (ba);
757 1.1 chopps gi->gd_regsize = LM_OFFSET;
758 1.1 chopps gi->gd_fbaddr = (caddr_t) kvtop (fb);
759 1.1 chopps gi->gd_fbsize = MEMSIZE *1024*1024;
760 1.1 chopps #ifdef BANKEDDEVPAGER
761 1.1 chopps /* we're not using banks NO MORE! */
762 1.1 chopps gi->gd_bank_size = 0;
763 1.1 chopps #endif
764 1.1 chopps gi->gd_colors = 1 << md->DEP;
765 1.1 chopps gi->gd_planes = md->DEP;
766 1.1 chopps
767 1.1 chopps if (md->DEP == 4) {
768 1.1 chopps gi->gd_fbwidth = md->MW;
769 1.1 chopps gi->gd_fbheight = md->MH;
770 1.1 chopps gi->gd_fbx = 0;
771 1.1 chopps gi->gd_fby = 0;
772 1.1 chopps gi->gd_dwidth = md->TX * md->FX;
773 1.1 chopps gi->gd_dheight = md->TY * md->FY;
774 1.1 chopps gi->gd_dx = 0;
775 1.1 chopps gi->gd_dy = 0;
776 1.1 chopps } else {
777 1.1 chopps gi->gd_fbwidth = md->TX;
778 1.1 chopps gi->gd_fbheight = md->TY;
779 1.1 chopps gi->gd_fbx = 0;
780 1.1 chopps gi->gd_fby = 0;
781 1.1 chopps gi->gd_dwidth = md->MW;
782 1.1 chopps gi->gd_dheight = md->MH;
783 1.1 chopps gi->gd_dx = 0;
784 1.1 chopps gi->gd_dy = 0;
785 1.1 chopps }
786 1.1 chopps
787 1.1 chopps FW =0;
788 1.1 chopps if (md->DEP == 4) { /* XXX some text-mode! */
789 1.1 chopps switch (md->FX) {
790 1.17 veego case 4:
791 1.1 chopps FW = 0;
792 1.1 chopps break;
793 1.17 veego case 7:
794 1.1 chopps FW = 1;
795 1.1 chopps break;
796 1.17 veego case 8:
797 1.1 chopps FW = 2;
798 1.1 chopps break;
799 1.17 veego case 9:
800 1.1 chopps FW = 3;
801 1.1 chopps break;
802 1.17 veego case 10:
803 1.1 chopps FW = 4;
804 1.1 chopps break;
805 1.17 veego case 11:
806 1.1 chopps FW = 5;
807 1.1 chopps break;
808 1.17 veego case 12:
809 1.1 chopps FW = 6;
810 1.1 chopps break;
811 1.17 veego case 13:
812 1.1 chopps FW = 7;
813 1.1 chopps break;
814 1.17 veego case 14:
815 1.1 chopps FW = 8;
816 1.1 chopps break;
817 1.17 veego case 15:
818 1.1 chopps FW = 9;
819 1.1 chopps break;
820 1.17 veego case 16:
821 1.1 chopps FW = 11;
822 1.1 chopps break;
823 1.17 veego default:
824 1.1 chopps return(0);
825 1.1 chopps break;
826 1.1 chopps }
827 1.1 chopps }
828 1.1 chopps
829 1.7 chopps if (md->DEP == 4) HDE = (md->MW+md->FX-1)/md->FX;
830 1.7 chopps else if (md->DEP == 8) HDE = (md->MW+3)/4;
831 1.7 chopps else if (md->DEP == 16) HDE = (md->MW*2+3)/4;
832 1.7 chopps else if (md->DEP == 24) HDE = (md->MW*3+3)/4;
833 1.1 chopps
834 1.1 chopps VDE = md->MH-1;
835 1.1 chopps
836 1.1 chopps clksel = 0;
837 1.1 chopps
838 1.1 chopps vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3 | ((clksel & 3) * 0x04));
839 1.1 chopps vgaw(ba, GREG_FEATURE_CONTROL_W, 0x00);
840 1.1 chopps
841 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x00);
842 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x03);
843 1.1 chopps WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01 | ((md->FLG & MDF_CLKDIV2)/ MDF_CLKDIV2 * 8));
844 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
845 1.1 chopps WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
846 1.1 chopps WSeq(ba, SEQ_ID_MEMORY_MODE, 0x06);
847 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x01);
848 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x03);
849 1.1 chopps
850 1.1 chopps WSeq(ba, SEQ_ID_EXTENDED_ENABLE, 0x05);
851 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x00);
852 1.1 chopps WSeq(ba, SEQ_ID_PRIM_HOST_OFF_HI, 0x00);
853 1.1 chopps WSeq(ba, SEQ_ID_PRIM_HOST_OFF_HI, 0x00);
854 1.1 chopps WSeq(ba, SEQ_ID_LINEAR_0, 0x4a);
855 1.1 chopps WSeq(ba, SEQ_ID_LINEAR_1, 0x00);
856 1.1 chopps
857 1.1 chopps WSeq(ba, SEQ_ID_SEC_HOST_OFF_HI, 0x00);
858 1.1 chopps WSeq(ba, SEQ_ID_SEC_HOST_OFF_LO, 0x00);
859 1.1 chopps WSeq(ba, SEQ_ID_EXTENDED_MEM_ENA, 0x3 | 0x4 | 0x10 | 0x40);
860 1.1 chopps WSeq(ba, SEQ_ID_EXT_CLOCK_MODE, 0x10 | (FW & 0x0f));
861 1.1 chopps WSeq(ba, SEQ_ID_EXT_VIDEO_ADDR, 0x03);
862 1.1 chopps if (md->DEP == 4) {
863 1.1 chopps /* 8bit pixel, no gfx byte path */
864 1.1 chopps WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x00);
865 1.7 chopps }
866 1.7 chopps else if (md->DEP == 8) {
867 1.1 chopps /* 8bit pixel, gfx byte path */
868 1.1 chopps WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x01);
869 1.7 chopps }
870 1.7 chopps else if (md->DEP == 16) {
871 1.1 chopps /* 16bit pixel, gfx byte path */
872 1.1 chopps WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x11);
873 1.1 chopps }
874 1.7 chopps else if (md->DEP == 24) {
875 1.7 chopps /* 24bit pixel, gfx byte path */
876 1.7 chopps WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x21);
877 1.7 chopps }
878 1.1 chopps WSeq(ba, SEQ_ID_BUS_WIDTH_FEEDB, 0x04);
879 1.1 chopps WSeq(ba, SEQ_ID_COLOR_EXP_WFG, 0x01);
880 1.1 chopps WSeq(ba, SEQ_ID_COLOR_EXP_WBG, 0x00);
881 1.1 chopps WSeq(ba, SEQ_ID_EXT_RW_CONTROL, 0x00);
882 1.1 chopps WSeq(ba, SEQ_ID_MISC_FEATURE_SEL, (0x51 | (clksel & 8)));
883 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_CNTL, 0x40);
884 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_MATCH0, 0x00);
885 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_MATCH1, 0x00);
886 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_MATCH2, 0x00);
887 1.1 chopps WSeq(ba, SEQ_ID_CRC_CONTROL, 0x00);
888 1.1 chopps WSeq(ba, SEQ_ID_PERF_SELECT, 0x10);
889 1.1 chopps WSeq(ba, SEQ_ID_ACM_APERTURE_1, 0x00);
890 1.1 chopps WSeq(ba, SEQ_ID_ACM_APERTURE_2, 0x30);
891 1.1 chopps WSeq(ba, SEQ_ID_ACM_APERTURE_3, 0x00);
892 1.1 chopps WSeq(ba, SEQ_ID_MEMORY_MAP_CNTL, 0x07);
893 1.1 chopps
894 1.1 chopps WCrt(ba, CRT_ID_END_VER_RETR, (md->VSE & 0xf) | 0x20);
895 1.1 chopps WCrt(ba, CRT_ID_HOR_TOTAL, md->HT & 0xff);
896 1.1 chopps WCrt(ba, CRT_ID_HOR_DISP_ENA_END, (HDE-1) & 0xff);
897 1.1 chopps WCrt(ba, CRT_ID_START_HOR_BLANK, md->HBS & 0xff);
898 1.1 chopps WCrt(ba, CRT_ID_END_HOR_BLANK, (md->HBE & 0x1f) | 0x80);
899 1.1 chopps
900 1.1 chopps WCrt(ba, CRT_ID_START_HOR_RETR, md->HSS & 0xff);
901 1.1 chopps WCrt(ba, CRT_ID_END_HOR_RETR,
902 1.1 chopps (md->HSE & 0x1f) |
903 1.1 chopps ((md->HBE & 0x20)/ 0x20 * 0x80));
904 1.1 chopps WCrt(ba, CRT_ID_VER_TOTAL, (md->VT & 0xff));
905 1.1 chopps WCrt(ba, CRT_ID_OVERFLOW,
906 1.1 chopps ((md->VSS & 0x200) / 0x200 * 0x80) |
907 1.1 chopps ((VDE & 0x200) / 0x200 * 0x40) |
908 1.1 chopps ((md->VT & 0x200) / 0x200 * 0x20) |
909 1.1 chopps 0x10 |
910 1.1 chopps ((md->VBS & 0x100) / 0x100 * 8) |
911 1.1 chopps ((md->VSS & 0x100) / 0x100 * 4) |
912 1.1 chopps ((VDE & 0x100) / 0x100 * 2) |
913 1.1 chopps ((md->VT & 0x100) / 0x100));
914 1.1 chopps WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
915 1.1 chopps
916 1.1 chopps if (md->DEP == 4) {
917 1.1 chopps WCrt(ba, CRT_ID_MAX_SCAN_LINE,
918 1.1 chopps ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80) |
919 1.1 chopps 0x40 |
920 1.1 chopps ((md->VBS & 0x200)/0x200*0x20) |
921 1.1 chopps ((md->FY-1) & 0x1f));
922 1.1 chopps } else {
923 1.1 chopps WCrt(ba, CRT_ID_MAX_SCAN_LINE,
924 1.1 chopps ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80) |
925 1.1 chopps 0x40 |
926 1.1 chopps ((md->VBS & 0x200)/0x200*0x20) |
927 1.1 chopps (0 & 0x1f));
928 1.1 chopps }
929 1.1 chopps
930 1.1 chopps /* I prefer "_" cursor to "block" cursor.. */
931 1.1 chopps #if 1
932 1.1 chopps WCrt(ba, CRT_ID_CURSOR_START, (md->FY & 0x1f) - 2);
933 1.1 chopps WCrt(ba, CRT_ID_CURSOR_END, (md->FY & 0x1f) - 1);
934 1.1 chopps #else
935 1.1 chopps WCrt(ba, CRT_ID_CURSOR_START, 0x00);
936 1.1 chopps WCrt(ba, CRT_ID_CURSOR_END, md->FY & 0x1f);
937 1.1 chopps #endif
938 1.1 chopps
939 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
940 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
941 1.1 chopps
942 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
943 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
944 1.1 chopps
945 1.1 chopps WCrt(ba, CRT_ID_START_VER_RETR, md->VSS & 0xff);
946 1.1 chopps WCrt(ba, CRT_ID_END_VER_RETR, (md->VSE & 0xf) | 0x80 | 0x20);
947 1.1 chopps WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE & 0xff);
948 1.1 chopps
949 1.7 chopps if (md->DEP == 4) {
950 1.7 chopps WCrt(ba, CRT_ID_OFFSET, (HDE / 2) & 0xff );
951 1.7 chopps }
952 1.7 chopps /* all gfx-modes are in byte-mode, means values are multiplied by 8 */
953 1.7 chopps else if (md->DEP == 8) {
954 1.7 chopps WCrt(ba, CRT_ID_OFFSET, (md->TX / 8) & 0xff );
955 1.7 chopps } else if (md->DEP == 16) {
956 1.7 chopps WCrt(ba, CRT_ID_OFFSET, (md->TX / 4) & 0xff );
957 1.7 chopps } else {
958 1.7 chopps WCrt(ba, CRT_ID_OFFSET, (md->TX * 3 / 8) & 0xff );
959 1.7 chopps }
960 1.1 chopps
961 1.1 chopps WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->FY-1) & 0x1f);
962 1.1 chopps WCrt(ba, CRT_ID_START_VER_BLANK, md->VBS & 0xff);
963 1.1 chopps WCrt(ba, CRT_ID_END_VER_BLANK, md->VBE & 0xff);
964 1.1 chopps WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
965 1.1 chopps WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
966 1.1 chopps
967 1.1 chopps WCrt(ba, CRT_ID_EXT_HOR_TIMING1,
968 1.1 chopps 0 | 0x20 |
969 1.1 chopps ((md->FLG & MDF_LACE) / MDF_LACE * 0x10) |
970 1.1 chopps ((md->HT & 0x100) / 0x100) |
971 1.1 chopps (((HDE-1) & 0x100) / 0x100 * 2) |
972 1.1 chopps ((md->HBS & 0x100) / 0x100 * 4) |
973 1.1 chopps ((md->HSS & 0x100) / 0x100 * 8));
974 1.1 chopps
975 1.7 chopps if (md->DEP == 4) {
976 1.7 chopps WCrt(ba, CRT_ID_EXT_START_ADDR, (((HDE / 2) & 0x100)/0x100 * 16));
977 1.7 chopps }
978 1.7 chopps else if (md->DEP == 8) {
979 1.7 chopps WCrt(ba, CRT_ID_EXT_START_ADDR, (((md->TX / 8) & 0x100)/0x100 * 16));
980 1.7 chopps } else if (md->DEP == 16) {
981 1.7 chopps WCrt(ba, CRT_ID_EXT_START_ADDR, (((md->TX / 4) & 0x100)/0x100 * 16));
982 1.7 chopps } else {
983 1.7 chopps WCrt(ba, CRT_ID_EXT_START_ADDR, (((md->TX * 3 / 8) & 0x100)/0x100 * 16));
984 1.7 chopps }
985 1.1 chopps
986 1.1 chopps WCrt(ba, CRT_ID_EXT_HOR_TIMING2,
987 1.1 chopps ((md->HT & 0x200)/ 0x200) |
988 1.1 chopps (((HDE-1) & 0x200)/ 0x200 * 2 ) |
989 1.1 chopps ((md->HBS & 0x200)/ 0x200 * 4 ) |
990 1.1 chopps ((md->HSS & 0x200)/ 0x200 * 8 ) |
991 1.1 chopps ((md->HBE & 0xc0) / 0x40 * 16 ) |
992 1.1 chopps ((md->HSE & 0x60) / 0x20 * 64));
993 1.1 chopps
994 1.1 chopps WCrt(ba, CRT_ID_EXT_VER_TIMING,
995 1.1 chopps ((md->VSE & 0x10) / 0x10 * 0x80 ) |
996 1.1 chopps ((md->VBE & 0x300)/ 0x100 * 0x20 ) |
997 1.1 chopps 0x10 |
998 1.1 chopps ((md->VSS & 0x400)/ 0x400 * 8 ) |
999 1.1 chopps ((md->VBS & 0x400)/ 0x400 * 4 ) |
1000 1.1 chopps ((VDE & 0x400)/ 0x400 * 2 ) |
1001 1.1 chopps ((md->VT & 0x400)/ 0x400));
1002 1.1 chopps WCrt(ba, CRT_ID_MONITOR_POWER, 0x00);
1003 1.1 chopps
1004 1.1 chopps {
1005 1.17 veego unsigned short tmp = rh_CompFQ(md->FQ);
1006 1.1 chopps WPLL(ba, 2 , tmp);
1007 1.17 veego tmp = rh_CompFQ(rh_memclk);
1008 1.1 chopps WPLL(ba,10 , tmp);
1009 1.1 chopps WPLL(ba,14 , 0x22);
1010 1.1 chopps }
1011 1.1 chopps
1012 1.1 chopps WGfx(ba, GCT_ID_SET_RESET, 0x00);
1013 1.1 chopps WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
1014 1.1 chopps WGfx(ba, GCT_ID_COLOR_COMPARE, 0x00);
1015 1.1 chopps WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
1016 1.1 chopps WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
1017 1.1 chopps WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
1018 1.1 chopps if (md->DEP == 4)
1019 1.1 chopps WGfx(ba, GCT_ID_MISC, 0x04);
1020 1.1 chopps else
1021 1.1 chopps WGfx(ba, GCT_ID_MISC, 0x05);
1022 1.1 chopps WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
1023 1.1 chopps WGfx(ba, GCT_ID_BITMASK, 0xff);
1024 1.1 chopps
1025 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
1026 1.1 chopps WAttr(ba, ACT_ID_PALETTE0 , 0x00);
1027 1.1 chopps WAttr(ba, ACT_ID_PALETTE1 , 0x01);
1028 1.1 chopps WAttr(ba, ACT_ID_PALETTE2 , 0x02);
1029 1.1 chopps WAttr(ba, ACT_ID_PALETTE3 , 0x03);
1030 1.1 chopps WAttr(ba, ACT_ID_PALETTE4 , 0x04);
1031 1.1 chopps WAttr(ba, ACT_ID_PALETTE5 , 0x05);
1032 1.1 chopps WAttr(ba, ACT_ID_PALETTE6 , 0x06);
1033 1.1 chopps WAttr(ba, ACT_ID_PALETTE7 , 0x07);
1034 1.1 chopps WAttr(ba, ACT_ID_PALETTE8 , 0x08);
1035 1.1 chopps WAttr(ba, ACT_ID_PALETTE9 , 0x09);
1036 1.1 chopps WAttr(ba, ACT_ID_PALETTE10, 0x0a);
1037 1.1 chopps WAttr(ba, ACT_ID_PALETTE11, 0x0b);
1038 1.1 chopps WAttr(ba, ACT_ID_PALETTE12, 0x0c);
1039 1.1 chopps WAttr(ba, ACT_ID_PALETTE13, 0x0d);
1040 1.1 chopps WAttr(ba, ACT_ID_PALETTE14, 0x0e);
1041 1.1 chopps WAttr(ba, ACT_ID_PALETTE15, 0x0f);
1042 1.1 chopps
1043 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
1044 1.1 chopps if (md->DEP == 4)
1045 1.1 chopps WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x08);
1046 1.1 chopps else
1047 1.1 chopps WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x09);
1048 1.1 chopps
1049 1.1 chopps WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
1050 1.1 chopps WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
1051 1.1 chopps WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
1052 1.1 chopps WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
1053 1.1 chopps
1054 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
1055 1.1 chopps vgaw(ba, ACT_ADDRESS_W, 0x20);
1056 1.1 chopps
1057 1.1 chopps vgaw(ba, VDAC_MASK, 0xff);
1058 1.7 chopps /* probably some PLL timing stuff here. The value
1059 1.7 chopps for 24bit was found by trial&error :-) */
1060 1.7 chopps if (md->DEP < 16) {
1061 1.7 chopps vgaw(ba, 0x83c6, ((0 & 7) << 5) );
1062 1.7 chopps }
1063 1.7 chopps else if (md->DEP == 16) {
1064 1.1 chopps /* well... */
1065 1.7 chopps vgaw(ba, 0x83c6, ((3 & 7) << 5) );
1066 1.7 chopps }
1067 1.7 chopps else if (md->DEP == 24) {
1068 1.7 chopps vgaw(ba, 0x83c6, 0xe0);
1069 1.7 chopps }
1070 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, 0x00);
1071 1.1 chopps
1072 1.1 chopps if (md->DEP < 16) {
1073 1.1 chopps short x = 256-17;
1074 1.1 chopps unsigned char cl = 16;
1075 1.1 chopps RZ3LoadPalette(gp, md->PAL, 0, 16);
1076 1.1 chopps do {
1077 1.1 chopps vgaw(ba, VDAC_DATA, (cl >> 2));
1078 1.1 chopps vgaw(ba, VDAC_DATA, (cl >> 2));
1079 1.1 chopps vgaw(ba, VDAC_DATA, (cl >> 2));
1080 1.1 chopps cl++;
1081 1.1 chopps } while (x-- > 0);
1082 1.1 chopps }
1083 1.1 chopps
1084 1.1 chopps if (md->DEP == 4) {
1085 1.1 chopps {
1086 1.1 chopps struct grf_bitblt bb = {
1087 1.1 chopps GRFBBOPset,
1088 1.1 chopps 0, 0,
1089 1.1 chopps 0, 0,
1090 1.1 chopps md->TX*4, 2*md->TY,
1091 1.1 chopps EMPTY_ALPHA
1092 1.1 chopps };
1093 1.1 chopps RZ3BitBlit(gp, &bb);
1094 1.1 chopps }
1095 1.1 chopps
1096 1.1 chopps c = (unsigned short *)(ba + LM_OFFSET);
1097 1.1 chopps c += 2 * md->FLo*32;
1098 1.1 chopps c += 1;
1099 1.1 chopps f = md->FData;
1100 1.1 chopps for (z = md->FLo; z <= md->FHi; z++) {
1101 1.1 chopps short y = md->FY-1;
1102 1.1 chopps if (md->FX > 8){
1103 1.1 chopps do {
1104 1.1 chopps *c = *((const unsigned short *)f);
1105 1.1 chopps c += 2;
1106 1.1 chopps f += 2;
1107 1.1 chopps } while (y-- > 0);
1108 1.1 chopps } else {
1109 1.1 chopps do {
1110 1.1 chopps *c = (*f++) << 8;
1111 1.1 chopps c += 2;
1112 1.1 chopps } while (y-- > 0);
1113 1.1 chopps }
1114 1.1 chopps
1115 1.1 chopps c += 2 * (32-md->FY);
1116 1.1 chopps }
1117 1.1 chopps {
1118 1.1 chopps unsigned long * pt = (unsigned long *) (ba + LM_OFFSET + PAT_MEM_OFF);
1119 1.1 chopps unsigned long tmp = 0xffff0000;
1120 1.1 chopps *pt++ = tmp;
1121 1.1 chopps *pt = tmp;
1122 1.1 chopps }
1123 1.1 chopps
1124 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 3);
1125 1.1 chopps
1126 1.1 chopps c = (unsigned short *)(ba + LM_OFFSET);
1127 1.1 chopps c += (md->TX-6)*2;
1128 1.1 chopps {
1129 1.1 chopps /* it's show-time :-) */
1130 1.1 chopps static unsigned short init_msg[6] = {
1131 1.1 chopps 0x520a, 0x450b, 0x540c, 0x490d, 0x4e0e, 0x410f
1132 1.1 chopps };
1133 1.1 chopps unsigned short * m = init_msg;
1134 1.1 chopps short x = 5;
1135 1.1 chopps do {
1136 1.1 chopps *c = *m++;
1137 1.1 chopps c += 2;
1138 1.1 chopps } while (x-- > 0);
1139 1.1 chopps }
1140 1.1 chopps
1141 1.1 chopps return(1);
1142 1.1 chopps } else if (md->DEP == 8) {
1143 1.1 chopps struct grf_bitblt bb = {
1144 1.1 chopps GRFBBOPset,
1145 1.1 chopps 0, 0,
1146 1.1 chopps 0, 0,
1147 1.1 chopps md->TX, md->TY,
1148 1.1 chopps 0x0000
1149 1.1 chopps };
1150 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
1151 1.1 chopps
1152 1.1 chopps RZ3BitBlit(gp, &bb);
1153 1.1 chopps
1154 1.1 chopps xpan = 0;
1155 1.1 chopps ypan = 0;
1156 1.1 chopps
1157 1.1 chopps return(1);
1158 1.1 chopps } else if (md->DEP == 16) {
1159 1.1 chopps struct grf_bitblt bb = {
1160 1.1 chopps GRFBBOPset,
1161 1.1 chopps 0, 0,
1162 1.1 chopps 0, 0,
1163 1.1 chopps md->TX, md->TY,
1164 1.1 chopps 0x0000
1165 1.1 chopps };
1166 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
1167 1.1 chopps
1168 1.1 chopps RZ3BitBlit16(gp, &bb);
1169 1.1 chopps
1170 1.1 chopps xpan = 0;
1171 1.1 chopps ypan = 0;
1172 1.1 chopps
1173 1.1 chopps return(1);
1174 1.7 chopps } else if (md->DEP == 24) {
1175 1.7 chopps struct grf_bitblt bb = {
1176 1.7 chopps GRFBBOPset,
1177 1.7 chopps 0, 0,
1178 1.7 chopps 0, 0,
1179 1.7 chopps md->TX, md->TY,
1180 1.7 chopps 0x0000
1181 1.7 chopps };
1182 1.7 chopps WSeq(ba, SEQ_ID_MAP_MASK, 0x0f );
1183 1.7 chopps
1184 1.7 chopps RZ3BitBlit24(gp, &bb );
1185 1.7 chopps
1186 1.7 chopps xpan = 0;
1187 1.7 chopps ypan = 0;
1188 1.7 chopps
1189 1.7 chopps return 1;
1190 1.1 chopps } else
1191 1.1 chopps return(0);
1192 1.1 chopps }
1193 1.1 chopps
1194 1.1 chopps /* standard-palette definition */
1195 1.1 chopps
1196 1.1 chopps unsigned char RZ3StdPalette[16*3] = {
1197 1.1 chopps /* R G B */
1198 1.1 chopps 0, 0, 0,
1199 1.1 chopps 192,192,192,
1200 1.1 chopps 128, 0, 0,
1201 1.1 chopps 0,128, 0,
1202 1.1 chopps 0, 0,128,
1203 1.1 chopps 128,128, 0,
1204 1.1 chopps 0,128,128,
1205 1.1 chopps 128, 0,128,
1206 1.1 chopps 64, 64, 64, /* the higher 8 colors have more intensity for */
1207 1.1 chopps 255,255,255, /* compatibility with standard attributes */
1208 1.1 chopps 255, 0, 0,
1209 1.1 chopps 0,255, 0,
1210 1.1 chopps 0, 0,255,
1211 1.1 chopps 255,255, 0,
1212 1.1 chopps 0,255,255,
1213 1.1 chopps 255, 0,255
1214 1.1 chopps };
1215 1.1 chopps
1216 1.1 chopps /*
1217 1.1 chopps * The following structures are examples for monitor-definitions. To make one
1218 1.1 chopps * of your own, first use "DefineMonitor" and create the 8-bit or 16-bit
1219 1.1 chopps * monitor-mode of your dreams. Then save it, and make a structure from the
1220 1.1 chopps * values provided in the file DefineMonitor stored - the labels in the comment
1221 1.1 chopps * above the structure definition show where to put what value.
1222 1.1 chopps *
1223 1.1 chopps * If you want to use your definition for the text-mode, you'll need to adapt
1224 1.1 chopps * your 8-bit monitor-definition to the font you want to use. Be FX the width of
1225 1.1 chopps * the font, then the following modifications have to be applied to your values:
1226 1.1 chopps *
1227 1.1 chopps * HBS = (HBS * 4) / FX
1228 1.1 chopps * HSS = (HSS * 4) / FX
1229 1.1 chopps * HSE = (HSE * 4) / FX
1230 1.1 chopps * HBE = (HBE * 4) / FX
1231 1.1 chopps * HT = (HT * 4) / FX
1232 1.1 chopps *
1233 1.1 chopps * Make sure your maximum width (MW) and height (MH) are even multiples of
1234 1.1 chopps * the fonts' width and height.
1235 1.1 chopps *
1236 1.1 chopps * You may use definitons created by the old DefineMonitor, but you'll get
1237 1.1 chopps * better results with the new DefineMonitor supplied along with the Retin Z3.
1238 1.1 chopps */
1239 1.1 chopps
1240 1.1 chopps /*
1241 1.1 chopps * FQ FLG MW MH HBS HSS HSE HBE HT VBS VSS VSE VBE VT
1242 1.1 chopps * Depth, PAL, TX, TY, XY,FontX, FontY, FontData, FLo, Fhi
1243 1.1 chopps */
1244 1.7 chopps #ifdef KFONT_8X11
1245 1.7 chopps #define KERNEL_FONT kernel_font_8x11
1246 1.7 chopps #define FY 11
1247 1.7 chopps #define FX 8
1248 1.7 chopps #else
1249 1.7 chopps #define KERNEL_FONT kernel_font_8x8
1250 1.7 chopps #define FY 8
1251 1.7 chopps #define FX 8
1252 1.7 chopps #endif
1253 1.7 chopps
1254 1.7 chopps
1255 1.1 chopps static struct MonDef monitor_defs[] = {
1256 1.1 chopps /* Text-mode definitions */
1257 1.1 chopps
1258 1.1 chopps /* horizontal 31.5 kHz */
1259 1.1 chopps { 50000000, 28, 640, 512, 81, 86, 93, 98, 95, 513, 513, 521, 535, 535,
1260 1.7 chopps 4, RZ3StdPalette, 80, 64, 5120, FX, FY, KERNEL_FONT, 32, 255},
1261 1.1 chopps
1262 1.1 chopps /* horizontal 38kHz */
1263 1.1 chopps { 75000000, 28, 768, 600, 97, 99,107,120,117, 601, 615, 625, 638, 638,
1264 1.7 chopps 4, RZ3StdPalette, 96, 75, 7200, FX, FY, KERNEL_FONT, 32, 255},
1265 1.1 chopps
1266 1.1 chopps /* horizontal 64kHz */
1267 1.1 chopps { 50000000, 24, 768, 600, 97,104,112,122,119, 601, 606, 616, 628, 628,
1268 1.7 chopps 4, RZ3StdPalette, 96, 75, 7200, FX, FY, KERNEL_FONT, 32, 255},
1269 1.1 chopps
1270 1.1 chopps /* 8-bit gfx-mode definitions */
1271 1.1 chopps
1272 1.7 chopps /* IMPORTANT: the "logical" screen size can be up to 2048x2048 pixels,
1273 1.7 chopps independent from the "physical" screen size. If your code does NOT
1274 1.7 chopps support panning, please adjust the "logical" screen sizes below to
1275 1.7 chopps match the physical ones
1276 1.1 chopps */
1277 1.1 chopps
1278 1.1 chopps /* 640 x 480, 8 Bit, 31862 Hz, 63 Hz */
1279 1.1 chopps { 26000000, 0, 640, 480, 161,175,188,200,199, 481, 483, 491, 502, 502,
1280 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1281 1.1 chopps /* This is the logical ^ ^ screen size */
1282 1.1 chopps
1283 1.1 chopps /* 640 x 480, 8 Bit, 38366 Hz, 76 Hz */
1284 1.1 chopps { 31000000, 0, 640, 480, 161,169,182,198,197, 481, 482, 490, 502, 502,
1285 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1286 1.1 chopps
1287 1.1 chopps /* 800 x 600, 8 Bit, 38537 Hz, 61 Hz */
1288 1.1 chopps { 39000000, 0, 800, 600, 201,211,227,249,248, 601, 603, 613, 628, 628,
1289 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1290 1.1 chopps
1291 1.1 chopps /* 1024 x 768, 8 Bit, 63862 Hz, 79 Hz */
1292 1.1 chopps { 82000000, 0, 1024, 768, 257,257,277,317,316, 769, 771, 784, 804, 804,
1293 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1294 1.1 chopps
1295 1.1 chopps /* 1120 x 896, 8 Bit, 64000 Hz, 69 Hz */
1296 1.1 chopps { 97000000, 0, 1120, 896, 281,283,306,369,368, 897, 898, 913, 938, 938,
1297 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1298 1.1 chopps
1299 1.1 chopps /* 1152 x 910, 8 Bit, 76177 Hz, 79 Hz */
1300 1.1 chopps {110000000, 0, 1152, 910, 289,310,333,357,356, 911, 923, 938, 953, 953,
1301 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1302 1.1 chopps
1303 1.1 chopps /* 1184 x 848, 8 Bit, 73529 Hz, 82 Hz */
1304 1.1 chopps {110000000, 0, 1184, 848, 297,319,342,370,369, 849, 852, 866, 888, 888,
1305 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1306 1.1 chopps
1307 1.1 chopps /* 1280 x 1024, 8 Bit, 64516 Hz, 60 Hz */
1308 1.1 chopps {104000000, 0, 1280,1024, 321,323,348,399,398,1025,1026,1043,1073,1073,
1309 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1310 1.1 chopps
1311 1.1 chopps /* WARNING: THE FOLLOWING MONITOR MODE EXCEEDS THE 110-MHz LIMIT THE PROCESSOR
1312 1.1 chopps HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
1313 1.1 chopps MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)! */
1314 1.1 chopps /* 1280 x 1024, 8 Bit, 75436 Hz, 70 Hz */
1315 1.1 chopps {121000000, 0, 1280,1024, 321,322,347,397,396,1025,1026,1043,1073,1073,
1316 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1317 1.1 chopps
1318 1.1 chopps
1319 1.1 chopps /* 16-bit gfx-mode definitions */
1320 1.1 chopps
1321 1.1 chopps /* 640 x 480, 16 Bit, 31795 Hz, 63 Hz */
1322 1.1 chopps { 51000000, 0, 640, 480, 321,344,369,397,396, 481, 482, 490, 502, 502,
1323 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1324 1.1 chopps
1325 1.1 chopps /* 800 x 600, 16 Bit, 38500 Hz, 61 Hz */
1326 1.1 chopps { 77000000, 0, 800, 600, 401,418,449,496,495, 601, 602, 612, 628, 628,
1327 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1328 1.1 chopps
1329 1.1 chopps /* 1024 x 768, 16 Bit, 42768 Hz, 53 Hz */
1330 1.1 chopps {110000000, 0, 1024, 768, 513,514,554,639,638, 769, 770, 783, 804, 804,
1331 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1332 1.1 chopps
1333 1.1 chopps /* 864 x 648, 16 Bit, 50369 Hz, 74 Hz */
1334 1.1 chopps {109000000, 0, 864, 648, 433,434,468,537,536, 649, 650, 661, 678, 678,
1335 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1336 1.1 chopps
1337 1.7 chopps /* WARNING: THE FOLLOWING MONITOR MODE EXCEEDS THE 110-MHz LIMIT THE PROCESSOR
1338 1.7 chopps HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
1339 1.7 chopps MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)! */
1340 1.1 chopps /* 1024 x 768, 16 Bit, 48437 Hz, 60 Hz */
1341 1.1 chopps {124000000, 0, 1024, 768, 513,537,577,636,635, 769, 770, 783, 804, 804,
1342 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1343 1.7 chopps
1344 1.7 chopps
1345 1.7 chopps /* 24-bit gfx-mode definitions */
1346 1.7 chopps
1347 1.7 chopps /* 320 x 200, 24 Bit, 35060 Hz, 83 Hz d */
1348 1.7 chopps { 46000000, 1, 320, 200, 241,268,287,324,323, 401, 405, 412, 418, 418,
1349 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1350 1.7 chopps
1351 1.7 chopps /* 640 x 400, 24 Bit, 31404 Hz, 75 Hz */
1352 1.7 chopps { 76000000, 0, 640, 400, 481,514,552,601,600, 401, 402, 409, 418, 418,
1353 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1354 1.7 chopps
1355 1.7 chopps /* 724 x 482, 24 Bit, 36969 Hz, 73 Hz */
1356 1.7 chopps {101000000, 0, 724, 482, 544,576,619,682,678, 483, 487, 495, 495, 504,
1357 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1358 1.7 chopps
1359 1.7 chopps /* 800 x 600, 24 Bit, 37826 Hz, 60 Hz */
1360 1.7 chopps {110000000, 0, 800, 600, 601,602,647,723,722, 601, 602, 612, 628, 628,
1361 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1362 1.7 chopps
1363 1.7 chopps /* 800 x 600, 24 Bit, 43824 Hz, 69 Hz */
1364 1.7 chopps {132000000, 0, 800, 600, 601,641,688,749,748, 601, 611, 621, 628, 628,
1365 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1366 1.7 chopps
1367 1.7 chopps /*1024 x 768, 24 Bit, 32051 Hz, 79 Hz i */
1368 1.7 chopps {110000000, 2, 1024, 768, 769,770,824,854,853, 385, 386, 392, 401, 401,
1369 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1370 1.1 chopps };
1371 1.7 chopps #undef KERNEL_FONT
1372 1.7 chopps #undef FX
1373 1.7 chopps #undef FY
1374 1.1 chopps
1375 1.1 chopps static const char *monitor_descr[] = {
1376 1.2 chopps #ifdef KFONT_8X11
1377 1.2 chopps "80x46 (640x506) 31.5kHz",
1378 1.2 chopps "96x54 (768x594) 38kHz",
1379 1.2 chopps "96x54 (768x594) 64kHz",
1380 1.2 chopps #else
1381 1.1 chopps "80x64 (640x512) 31.5kHz",
1382 1.1 chopps "96x75 (768x600) 38kHz",
1383 1.1 chopps "96x75 (768x600) 64kHz",
1384 1.2 chopps #endif
1385 1.1 chopps
1386 1.1 chopps "GFX-8 (640x480) 31.5kHz",
1387 1.1 chopps "GFX-8 (640x480) 38kHz",
1388 1.1 chopps "GFX-8 (800x600) 38.5kHz",
1389 1.1 chopps "GFX-8 (1024x768) 64kHz",
1390 1.1 chopps "GFX-8 (1120x896) 64kHz",
1391 1.1 chopps "GFX-8 (1152x910) 76kHz",
1392 1.1 chopps "GFX-8 (1182x848) 73kHz",
1393 1.1 chopps "GFX-8 (1280x1024) 64.5kHz",
1394 1.1 chopps "GFX-8 (1280x1024) 75.5kHz ***EXCEEDS CHIP LIMIT!!!***",
1395 1.1 chopps
1396 1.1 chopps "GFX-16 (640x480) 31.8kHz",
1397 1.1 chopps "GFX-16 (800x600) 38.5kHz",
1398 1.1 chopps "GFX-16 (1024x768) 42.8kHz",
1399 1.1 chopps "GFX-16 (864x648) 50kHz",
1400 1.1 chopps "GFX-16 (1024x768) 48.5kHz ***EXCEEDS CHIP LIMIT!!!***",
1401 1.7 chopps
1402 1.7 chopps "GFX-24 (320x200 d) 35kHz",
1403 1.7 chopps "GFX-24 (640x400) 31.4kHz",
1404 1.7 chopps "GFX-24 (724x482) 37kHz",
1405 1.7 chopps "GFX-24 (800x600) 38kHz",
1406 1.7 chopps "GFX-24 (800x600) 44kHz ***EXCEEDS CHIP LIMIT!!!***",
1407 1.7 chopps "GFX-24 (1024x768) 32kHz-i",
1408 1.1 chopps };
1409 1.1 chopps
1410 1.1 chopps int rh_mon_max = sizeof (monitor_defs)/sizeof (monitor_defs[0]);
1411 1.1 chopps
1412 1.1 chopps /* patchable */
1413 1.8 chopps int rh_default_mon = 0;
1414 1.8 chopps int rh_default_gfx = 4;
1415 1.1 chopps
1416 1.18 is static struct MonDef *current_mon; /* EVIL */
1417 1.1 chopps
1418 1.14 veego int rh_mode __P((struct grf_softc *, u_long, void *, u_long, int));
1419 1.1 chopps void grfrhattach __P((struct device *, struct device *, void *));
1420 1.1 chopps int grfrhprint __P((void *, char *));
1421 1.12 thorpej int grfrhmatch __P((struct device *, void *, void *));
1422 1.1 chopps
1423 1.13 mhitch struct cfattach grfrh_ca = {
1424 1.12 thorpej sizeof(struct grf_softc), grfrhmatch, grfrhattach
1425 1.12 thorpej };
1426 1.12 thorpej
1427 1.12 thorpej struct cfdriver grfrh_cd = {
1428 1.12 thorpej NULL, "grfrh", DV_DULL, NULL, 0
1429 1.1 chopps };
1430 1.1 chopps
1431 1.1 chopps static struct cfdata *cfdata;
1432 1.1 chopps
1433 1.1 chopps int
1434 1.12 thorpej grfrhmatch(pdp, match, auxp)
1435 1.1 chopps struct device *pdp;
1436 1.12 thorpej void *match, *auxp;
1437 1.1 chopps {
1438 1.15 veego #ifdef RETINACONSOLE
1439 1.12 thorpej struct cfdata *cfp = match;
1440 1.1 chopps static int rhconunit = -1;
1441 1.1 chopps #endif
1442 1.5 chopps struct zbus_args *zap;
1443 1.1 chopps
1444 1.1 chopps zap = auxp;
1445 1.1 chopps
1446 1.1 chopps if (amiga_realconfig == 0)
1447 1.1 chopps #ifdef RETINACONSOLE
1448 1.1 chopps if (rhconunit != -1)
1449 1.1 chopps #endif
1450 1.1 chopps return(0);
1451 1.11 is if (zap->manid != 18260 ||
1452 1.14 veego ((zap->prodid != 16) && (zap->prodid != 19)))
1453 1.1 chopps return(0);
1454 1.1 chopps #ifdef RETINACONSOLE
1455 1.1 chopps if (amiga_realconfig == 0 || rhconunit != cfp->cf_unit) {
1456 1.1 chopps #endif
1457 1.1 chopps if ((unsigned)rh_default_mon >= rh_mon_max ||
1458 1.1 chopps monitor_defs[rh_default_mon].DEP == 8)
1459 1.1 chopps rh_default_mon = 0;
1460 1.1 chopps current_mon = monitor_defs + rh_default_mon;
1461 1.1 chopps if (rh_mondefok(current_mon) == 0)
1462 1.1 chopps return(0);
1463 1.1 chopps #ifdef RETINACONSOLE
1464 1.1 chopps if (amiga_realconfig == 0) {
1465 1.1 chopps rhconunit = cfp->cf_unit;
1466 1.1 chopps cfdata = cfp;
1467 1.1 chopps }
1468 1.1 chopps }
1469 1.1 chopps #endif
1470 1.1 chopps return(1);
1471 1.1 chopps }
1472 1.1 chopps
1473 1.1 chopps void
1474 1.1 chopps grfrhattach(pdp, dp, auxp)
1475 1.1 chopps struct device *pdp, *dp;
1476 1.1 chopps void *auxp;
1477 1.1 chopps {
1478 1.1 chopps static struct grf_softc congrf;
1479 1.5 chopps struct zbus_args *zap;
1480 1.1 chopps struct grf_softc *gp;
1481 1.1 chopps
1482 1.1 chopps zap = auxp;
1483 1.1 chopps
1484 1.1 chopps if (dp == NULL)
1485 1.1 chopps gp = &congrf;
1486 1.1 chopps else
1487 1.1 chopps gp = (struct grf_softc *)dp;
1488 1.1 chopps if (dp != NULL && congrf.g_regkva != 0) {
1489 1.1 chopps /*
1490 1.1 chopps * inited earlier, just copy (not device struct)
1491 1.1 chopps */
1492 1.1 chopps bcopy(&congrf.g_display, &gp->g_display,
1493 1.1 chopps (char *)&gp[1] - (char *)&gp->g_display);
1494 1.1 chopps } else {
1495 1.1 chopps gp->g_regkva = (volatile caddr_t)zap->va;
1496 1.16 is
1497 1.16 is gp->g_regkva[0x3c8]=0;
1498 1.16 is gp->g_regkva[0x3c9]=30;
1499 1.16 is gp->g_regkva[0x3c9]=30;
1500 1.16 is gp->g_regkva[0x3c9]=00;
1501 1.16 is
1502 1.1 chopps gp->g_fbkva = (volatile caddr_t)zap->va + LM_OFFSET;
1503 1.1 chopps gp->g_unit = GRF_RETINAIII_UNIT;
1504 1.1 chopps gp->g_mode = rh_mode;
1505 1.1 chopps gp->g_conpri = grfrh_cnprobe();
1506 1.1 chopps gp->g_flags = GF_ALIVE;
1507 1.1 chopps grfrh_iteinit(gp);
1508 1.1 chopps (void)rh_load_mon(gp, current_mon);
1509 1.1 chopps }
1510 1.1 chopps if (dp != NULL)
1511 1.1 chopps printf("\n");
1512 1.1 chopps /*
1513 1.1 chopps * attach grf
1514 1.1 chopps */
1515 1.1 chopps amiga_config_found(cfdata, &gp->g_device, gp, grfrhprint);
1516 1.1 chopps }
1517 1.1 chopps
1518 1.1 chopps int
1519 1.1 chopps grfrhprint(auxp, pnp)
1520 1.1 chopps void *auxp;
1521 1.1 chopps char *pnp;
1522 1.1 chopps {
1523 1.1 chopps if (pnp)
1524 1.1 chopps printf("ite at %s", pnp);
1525 1.1 chopps return(UNCONF);
1526 1.1 chopps }
1527 1.1 chopps
1528 1.1 chopps int
1529 1.1 chopps rh_getvmode(gp, vm)
1530 1.1 chopps struct grf_softc *gp;
1531 1.1 chopps struct grfvideo_mode *vm;
1532 1.1 chopps {
1533 1.1 chopps struct MonDef *md;
1534 1.1 chopps
1535 1.1 chopps if (vm->mode_num && vm->mode_num > rh_mon_max)
1536 1.1 chopps return(EINVAL);
1537 1.1 chopps
1538 1.1 chopps if (! vm->mode_num)
1539 1.1 chopps vm->mode_num = (current_mon - monitor_defs) + 1;
1540 1.1 chopps
1541 1.1 chopps md = monitor_defs + (vm->mode_num - 1);
1542 1.14 veego strncpy (vm->mode_descr, monitor_descr[vm->mode_num - 1],
1543 1.1 chopps sizeof (vm->mode_descr));
1544 1.1 chopps vm->pixel_clock = md->FQ;
1545 1.7 chopps vm->disp_width = (md->DEP == 4) ? md->MW : md->TX;
1546 1.7 chopps vm->disp_height = (md->DEP == 4) ? md->MH : md->TY;
1547 1.1 chopps vm->depth = md->DEP;
1548 1.10 chopps
1549 1.10 chopps /*
1550 1.10 chopps * From observation of the monitor definition table above, I guess
1551 1.10 chopps * that the horizontal timings are in units of longwords. Hence, I
1552 1.10 chopps * get the pixels by multiplication with 32 and division by the depth.
1553 1.10 chopps * The text modes, apparently marked by depth == 4, are even more
1554 1.10 chopps * wierd. According to a comment above, they are computed from a
1555 1.10 chopps * depth==8 mode thats for us: * 32 / 8) by applying another factor
1556 1.10 chopps * of 4 / font width.
1557 1.10 chopps * Reverse applying the latter formula most of the constants cancel
1558 1.10 chopps * themselves and we are left with a nice (* font width).
1559 1.10 chopps * That is, internal timings are in units of longwords for graphics
1560 1.10 chopps * modes, or in units of characters widths for text modes.
1561 1.10 chopps * We better don't WRITE modes until this has been real live checked.
1562 1.10 chopps * - Ignatios Souvatzis
1563 1.10 chopps */
1564 1.10 chopps
1565 1.10 chopps if (md->DEP == 4) {
1566 1.10 chopps vm->hblank_start = md->HBS * 32 / md->DEP;
1567 1.10 chopps vm->hblank_stop = md->HBE * 32 / md->DEP;
1568 1.10 chopps vm->hsync_start = md->HSS * 32 / md->DEP;
1569 1.10 chopps vm->hsync_stop = md->HSE * 32 / md->DEP;
1570 1.10 chopps vm->htotal = md->HT * 32 / md->DEP;
1571 1.10 chopps } else {
1572 1.10 chopps vm->hblank_start = md->HBS * md->FX;
1573 1.10 chopps vm->hblank_stop = md->HBE * md->FX;
1574 1.10 chopps vm->hsync_start = md->HSS * md->FX;
1575 1.10 chopps vm->hsync_stop = md->HSE * md->FX;
1576 1.10 chopps vm->htotal = md->HT * md->FX;
1577 1.10 chopps }
1578 1.10 chopps
1579 1.1 chopps vm->vblank_start = md->VBS;
1580 1.1 chopps vm->vblank_stop = md->VBE;
1581 1.1 chopps vm->vsync_start = md->VSS;
1582 1.1 chopps vm->vsync_stop = md->VSE;
1583 1.1 chopps vm->vtotal = md->VT;
1584 1.1 chopps
1585 1.1 chopps return(0);
1586 1.1 chopps }
1587 1.1 chopps
1588 1.1 chopps
1589 1.1 chopps int
1590 1.7 chopps rh_setvmode(gp, mode, type)
1591 1.1 chopps struct grf_softc *gp;
1592 1.1 chopps unsigned mode;
1593 1.7 chopps enum mode_type type;
1594 1.1 chopps {
1595 1.1 chopps int error;
1596 1.1 chopps
1597 1.1 chopps if (!mode || mode > rh_mon_max)
1598 1.1 chopps return(EINVAL);
1599 1.1 chopps
1600 1.7 chopps if ((type == MT_TXTONLY && monitor_defs[mode-1].DEP != 4)
1601 1.7 chopps || (type == MT_GFXONLY && monitor_defs[mode-1].DEP == 4))
1602 1.1 chopps return(EINVAL);
1603 1.1 chopps
1604 1.1 chopps current_mon = monitor_defs + (mode - 1);
1605 1.1 chopps
1606 1.1 chopps error = rh_load_mon (gp, current_mon) ? 0 : EINVAL;
1607 1.1 chopps
1608 1.1 chopps return(error);
1609 1.1 chopps }
1610 1.1 chopps
1611 1.1 chopps
1612 1.1 chopps /*
1613 1.1 chopps * Change the mode of the display.
1614 1.1 chopps * Return a UNIX error number or 0 for success.
1615 1.1 chopps */
1616 1.14 veego int
1617 1.1 chopps rh_mode(gp, cmd, arg, a2, a3)
1618 1.1 chopps register struct grf_softc *gp;
1619 1.14 veego u_long cmd;
1620 1.1 chopps void *arg;
1621 1.14 veego u_long a2;
1622 1.14 veego int a3;
1623 1.1 chopps {
1624 1.1 chopps switch (cmd) {
1625 1.17 veego case GM_GRFON:
1626 1.7 chopps rh_setvmode (gp, rh_default_gfx + 1, MT_GFXONLY);
1627 1.1 chopps return(0);
1628 1.1 chopps
1629 1.17 veego case GM_GRFOFF:
1630 1.7 chopps rh_setvmode (gp, rh_default_mon + 1, MT_TXTONLY);
1631 1.1 chopps return(0);
1632 1.1 chopps
1633 1.17 veego case GM_GRFCONFIG:
1634 1.1 chopps return(0);
1635 1.1 chopps
1636 1.17 veego case GM_GRFGETVMODE:
1637 1.1 chopps return(rh_getvmode (gp, (struct grfvideo_mode *) arg));
1638 1.1 chopps
1639 1.17 veego case GM_GRFSETVMODE:
1640 1.7 chopps return(rh_setvmode (gp, *(unsigned *) arg,
1641 1.7 chopps (gp->g_flags & GF_GRFON) ? MT_GFXONLY : MT_TXTONLY));
1642 1.1 chopps
1643 1.17 veego case GM_GRFGETNUMVM:
1644 1.1 chopps *(int *)arg = rh_mon_max;
1645 1.1 chopps return(0);
1646 1.1 chopps
1647 1.1 chopps #ifdef BANKEDDEVPAGER
1648 1.17 veego case GM_GRFGETBANK:
1649 1.17 veego case GM_GRFGETCURBANK:
1650 1.17 veego case GM_GRFSETBANK:
1651 1.1 chopps return(EINVAL);
1652 1.1 chopps #endif
1653 1.17 veego case GM_GRFIOCTL:
1654 1.14 veego return(rh_ioctl (gp, a2, arg));
1655 1.1 chopps
1656 1.17 veego default:
1657 1.1 chopps break;
1658 1.1 chopps }
1659 1.1 chopps
1660 1.1 chopps return(EINVAL);
1661 1.1 chopps }
1662 1.1 chopps
1663 1.1 chopps int
1664 1.1 chopps rh_ioctl (gp, cmd, data)
1665 1.1 chopps register struct grf_softc *gp;
1666 1.4 chopps u_long cmd;
1667 1.1 chopps void *data;
1668 1.1 chopps {
1669 1.1 chopps switch (cmd) {
1670 1.17 veego case GRFIOCGSPRITEPOS:
1671 1.1 chopps return(rh_getspritepos (gp, (struct grf_position *) data));
1672 1.1 chopps
1673 1.17 veego case GRFIOCSSPRITEPOS:
1674 1.1 chopps return(rh_setspritepos (gp, (struct grf_position *) data));
1675 1.1 chopps
1676 1.17 veego case GRFIOCSSPRITEINF:
1677 1.1 chopps return(rh_setspriteinfo (gp, (struct grf_spriteinfo *) data));
1678 1.1 chopps
1679 1.17 veego case GRFIOCGSPRITEINF:
1680 1.1 chopps return(rh_getspriteinfo (gp, (struct grf_spriteinfo *) data));
1681 1.1 chopps
1682 1.17 veego case GRFIOCGSPRITEMAX:
1683 1.1 chopps return(rh_getspritemax (gp, (struct grf_position *) data));
1684 1.1 chopps
1685 1.17 veego case GRFIOCGETCMAP:
1686 1.1 chopps return(rh_getcmap (gp, (struct grf_colormap *) data));
1687 1.1 chopps
1688 1.17 veego case GRFIOCPUTCMAP:
1689 1.1 chopps return(rh_putcmap (gp, (struct grf_colormap *) data));
1690 1.1 chopps
1691 1.17 veego case GRFIOCBITBLT:
1692 1.1 chopps return(rh_bitblt (gp, (struct grf_bitblt *) data));
1693 1.17 veego
1694 1.17 veego case GRFIOCBLANK:
1695 1.17 veego return (rh_blank(gp, (int *)data));
1696 1.1 chopps }
1697 1.1 chopps
1698 1.1 chopps return(EINVAL);
1699 1.1 chopps }
1700 1.1 chopps
1701 1.1 chopps
1702 1.1 chopps int
1703 1.1 chopps rh_getcmap (gfp, cmap)
1704 1.1 chopps struct grf_softc *gfp;
1705 1.1 chopps struct grf_colormap *cmap;
1706 1.1 chopps {
1707 1.1 chopps volatile unsigned char *ba;
1708 1.1 chopps u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1709 1.1 chopps short x;
1710 1.1 chopps int error;
1711 1.1 chopps
1712 1.1 chopps if (cmap->count == 0 || cmap->index >= 256)
1713 1.1 chopps return 0;
1714 1.1 chopps
1715 1.1 chopps if (cmap->index + cmap->count > 256)
1716 1.1 chopps cmap->count = 256 - cmap->index;
1717 1.1 chopps
1718 1.1 chopps ba = gfp->g_regkva;
1719 1.1 chopps /* first read colors out of the chip, then copyout to userspace */
1720 1.1 chopps vgaw (ba, VDAC_ADDRESS_W, cmap->index);
1721 1.1 chopps x = cmap->count - 1;
1722 1.1 chopps rp = red + cmap->index;
1723 1.1 chopps gp = green + cmap->index;
1724 1.1 chopps bp = blue + cmap->index;
1725 1.1 chopps do {
1726 1.1 chopps *rp++ = vgar (ba, VDAC_DATA) << 2;
1727 1.1 chopps *gp++ = vgar (ba, VDAC_DATA) << 2;
1728 1.1 chopps *bp++ = vgar (ba, VDAC_DATA) << 2;
1729 1.1 chopps } while (x-- > 0);
1730 1.1 chopps
1731 1.1 chopps if (!(error = copyout (red + cmap->index, cmap->red, cmap->count))
1732 1.1 chopps && !(error = copyout (green + cmap->index, cmap->green, cmap->count))
1733 1.1 chopps && !(error = copyout (blue + cmap->index, cmap->blue, cmap->count)))
1734 1.1 chopps return(0);
1735 1.1 chopps
1736 1.1 chopps return(error);
1737 1.1 chopps }
1738 1.1 chopps
1739 1.1 chopps int
1740 1.1 chopps rh_putcmap (gfp, cmap)
1741 1.1 chopps struct grf_softc *gfp;
1742 1.1 chopps struct grf_colormap *cmap;
1743 1.1 chopps {
1744 1.1 chopps volatile unsigned char *ba;
1745 1.1 chopps u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1746 1.1 chopps short x;
1747 1.1 chopps int error;
1748 1.1 chopps
1749 1.1 chopps if (cmap->count == 0 || cmap->index >= 256)
1750 1.1 chopps return(0);
1751 1.1 chopps
1752 1.1 chopps if (cmap->index + cmap->count > 256)
1753 1.1 chopps cmap->count = 256 - cmap->index;
1754 1.1 chopps
1755 1.1 chopps /* first copy the colors into kernelspace */
1756 1.1 chopps if (!(error = copyin (cmap->red, red + cmap->index, cmap->count))
1757 1.1 chopps && !(error = copyin (cmap->green, green + cmap->index, cmap->count))
1758 1.1 chopps && !(error = copyin (cmap->blue, blue + cmap->index, cmap->count))) {
1759 1.1 chopps /* argl.. LoadPalette wants a different format, so do it like with
1760 1.1 chopps * Retina2.. */
1761 1.1 chopps ba = gfp->g_regkva;
1762 1.1 chopps vgaw (ba, VDAC_ADDRESS_W, cmap->index);
1763 1.1 chopps x = cmap->count - 1;
1764 1.1 chopps rp = red + cmap->index;
1765 1.1 chopps gp = green + cmap->index;
1766 1.1 chopps bp = blue + cmap->index;
1767 1.1 chopps do {
1768 1.1 chopps vgaw (ba, VDAC_DATA, *rp++ >> 2);
1769 1.1 chopps vgaw (ba, VDAC_DATA, *gp++ >> 2);
1770 1.1 chopps vgaw (ba, VDAC_DATA, *bp++ >> 2);
1771 1.1 chopps } while (x-- > 0);
1772 1.1 chopps return(0);
1773 1.1 chopps }
1774 1.1 chopps else
1775 1.1 chopps return(error);
1776 1.1 chopps }
1777 1.1 chopps
1778 1.1 chopps int
1779 1.1 chopps rh_getspritepos (gp, pos)
1780 1.1 chopps struct grf_softc *gp;
1781 1.1 chopps struct grf_position *pos;
1782 1.1 chopps {
1783 1.1 chopps volatile unsigned char *acm = gp->g_regkva + ACM_OFFSET;
1784 1.1 chopps
1785 1.1 chopps pos->x = acm[ACM_CURSOR_POSITION + 0] +
1786 1.1 chopps (acm[ACM_CURSOR_POSITION + 1] << 8);
1787 1.1 chopps pos->y = acm[ACM_CURSOR_POSITION + 2] +
1788 1.1 chopps (acm[ACM_CURSOR_POSITION + 3] << 8);
1789 1.1 chopps
1790 1.1 chopps pos->x += xpan;
1791 1.1 chopps pos->y += ypan;
1792 1.1 chopps
1793 1.1 chopps return(0);
1794 1.1 chopps }
1795 1.1 chopps
1796 1.1 chopps int
1797 1.1 chopps rh_setspritepos (gp, pos)
1798 1.1 chopps struct grf_softc *gp;
1799 1.1 chopps struct grf_position *pos;
1800 1.1 chopps {
1801 1.1 chopps RZ3SetHWCloc (gp, pos->x, pos->y);
1802 1.1 chopps return(0);
1803 1.1 chopps }
1804 1.1 chopps
1805 1.1 chopps int
1806 1.1 chopps rh_getspriteinfo (gp, info)
1807 1.1 chopps struct grf_softc *gp;
1808 1.1 chopps struct grf_spriteinfo *info;
1809 1.1 chopps {
1810 1.1 chopps volatile unsigned char *ba, *fb;
1811 1.1 chopps
1812 1.1 chopps ba = gp->g_regkva;
1813 1.1 chopps fb = gp->g_fbkva;
1814 1.1 chopps if (info->set & GRFSPRSET_ENABLE)
1815 1.1 chopps info->enable = RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 0x01;
1816 1.1 chopps if (info->set & GRFSPRSET_POS)
1817 1.1 chopps rh_getspritepos (gp, &info->pos);
1818 1.1 chopps if (info->set & GRFSPRSET_HOT) {
1819 1.1 chopps info->hot.x = RSeq (ba, SEQ_ID_CURSOR_X_INDEX) & 0x3f;
1820 1.1 chopps info->hot.y = RSeq (ba, SEQ_ID_CURSOR_Y_INDEX) & 0x7f;
1821 1.1 chopps }
1822 1.1 chopps if (info->set & GRFSPRSET_CMAP) {
1823 1.1 chopps struct grf_colormap cmap;
1824 1.1 chopps int index;
1825 1.1 chopps cmap.index = 0;
1826 1.1 chopps cmap.count = 256;
1827 1.1 chopps rh_getcmap (gp, &cmap);
1828 1.1 chopps index = RSeq (ba, SEQ_ID_CURSOR_COLOR0);
1829 1.1 chopps info->cmap.red[0] = cmap.red[index];
1830 1.1 chopps info->cmap.green[0] = cmap.green[index];
1831 1.1 chopps info->cmap.blue[0] = cmap.blue[index];
1832 1.1 chopps index = RSeq (ba, SEQ_ID_CURSOR_COLOR1);
1833 1.1 chopps info->cmap.red[1] = cmap.red[index];
1834 1.1 chopps info->cmap.green[1] = cmap.green[index];
1835 1.1 chopps info->cmap.blue[1] = cmap.blue[index];
1836 1.1 chopps }
1837 1.1 chopps if (info->set & GRFSPRSET_SHAPE) {
1838 1.1 chopps u_char image[128], mask[128];
1839 1.1 chopps volatile u_long *hwp;
1840 1.1 chopps u_char *imp, *mp;
1841 1.1 chopps short row;
1842 1.1 chopps
1843 1.1 chopps /* sprite bitmap is WEIRD in this chip.. see grf_rhvar.h
1844 1.1 chopps * for an explanation. To convert to "our" format, the
1845 1.1 chopps * following holds:
1846 1.1 chopps * col2 = !image & mask
1847 1.1 chopps * col1 = image & mask
1848 1.1 chopps * transp = !mask
1849 1.1 chopps * and thus:
1850 1.1 chopps * image = col1
1851 1.1 chopps * mask = col1 | col2
1852 1.1 chopps * hope I got these bool-eqs right below..
1853 1.1 chopps */
1854 1.1 chopps
1855 1.9 chopps #ifdef RH_64BIT_SPRITE
1856 1.1 chopps info->size.x = 64;
1857 1.1 chopps info->size.y = 64;
1858 1.1 chopps for (row = 0, hwp = (u_long *)(ba + LM_OFFSET + HWC_MEM_OFF),
1859 1.1 chopps mp = mask, imp = image;
1860 1.1 chopps row < 64;
1861 1.1 chopps row++) {
1862 1.1 chopps u_long bp10, bp20, bp11, bp21;
1863 1.1 chopps bp10 = *hwp++;
1864 1.1 chopps bp20 = *hwp++;
1865 1.1 chopps bp11 = *hwp++;
1866 1.1 chopps bp21 = *hwp++;
1867 1.1 chopps M2I (bp10);
1868 1.1 chopps M2I (bp20);
1869 1.1 chopps M2I (bp11);
1870 1.1 chopps M2I (bp21);
1871 1.1 chopps *imp++ = (~bp10) & bp11;
1872 1.1 chopps *imp++ = (~bp20) & bp21;
1873 1.1 chopps *mp++ = (~bp10) | (bp10 & ~bp11);
1874 1.1 chopps *mp++ = (~bp20) & (bp20 & ~bp21);
1875 1.1 chopps }
1876 1.7 chopps #else
1877 1.7 chopps info->size.x = 32;
1878 1.7 chopps info->size.y = 32;
1879 1.7 chopps for (row = 0, hwp = (u_long *)(ba + LM_OFFSET + HWC_MEM_OFF),
1880 1.7 chopps mp = mask, imp = image;
1881 1.7 chopps row < 32;
1882 1.7 chopps row++) {
1883 1.7 chopps u_long bp10, bp11;
1884 1.7 chopps bp10 = *hwp++;
1885 1.7 chopps bp11 = *hwp++;
1886 1.7 chopps M2I (bp10);
1887 1.7 chopps M2I (bp11);
1888 1.7 chopps *imp++ = (~bp10) & bp11;
1889 1.7 chopps *mp++ = (~bp10) | (bp10 & ~bp11);
1890 1.7 chopps }
1891 1.7 chopps #endif
1892 1.1 chopps copyout (image, info->image, sizeof (image));
1893 1.1 chopps copyout (mask, info->mask, sizeof (mask));
1894 1.1 chopps }
1895 1.1 chopps return(0);
1896 1.1 chopps }
1897 1.1 chopps
1898 1.1 chopps int
1899 1.1 chopps rh_setspriteinfo (gp, info)
1900 1.1 chopps struct grf_softc *gp;
1901 1.1 chopps struct grf_spriteinfo *info;
1902 1.1 chopps {
1903 1.1 chopps volatile unsigned char *ba, *fb;
1904 1.14 veego #if 0
1905 1.1 chopps u_char control;
1906 1.14 veego #endif
1907 1.1 chopps
1908 1.1 chopps ba = gp->g_regkva;
1909 1.1 chopps fb = gp->g_fbkva;
1910 1.1 chopps
1911 1.1 chopps if (info->set & GRFSPRSET_SHAPE) {
1912 1.1 chopps /*
1913 1.1 chopps * For an explanation of these weird actions here, see above
1914 1.1 chopps * when reading the shape. We set the shape directly into
1915 1.1 chopps * the video memory, there's no reason to keep 1k on the
1916 1.1 chopps * kernel stack just as template
1917 1.1 chopps */
1918 1.1 chopps u_char *image, *mask;
1919 1.1 chopps volatile u_long *hwp;
1920 1.1 chopps u_char *imp, *mp;
1921 1.1 chopps short row;
1922 1.1 chopps
1923 1.9 chopps #ifdef RH_64BIT_SPRITE
1924 1.1 chopps if (info->size.y > 64)
1925 1.1 chopps info->size.y = 64;
1926 1.1 chopps if (info->size.x > 64)
1927 1.1 chopps info->size.x = 64;
1928 1.7 chopps #else
1929 1.7 chopps if (info->size.y > 32)
1930 1.7 chopps info->size.y = 32;
1931 1.7 chopps if (info->size.x > 32)
1932 1.7 chopps info->size.x = 32;
1933 1.7 chopps #endif
1934 1.1 chopps
1935 1.1 chopps if (info->size.x < 32)
1936 1.1 chopps info->size.x = 32;
1937 1.1 chopps
1938 1.1 chopps image = malloc(HWC_MEM_SIZE, M_TEMP, M_WAITOK);
1939 1.1 chopps mask = image + HWC_MEM_SIZE/2;
1940 1.1 chopps
1941 1.1 chopps copyin(info->image, image, info->size.y * info->size.x / 8);
1942 1.1 chopps copyin(info->mask, mask, info->size.y * info->size.x / 8);
1943 1.1 chopps
1944 1.1 chopps hwp = (u_long *)(ba + LM_OFFSET + HWC_MEM_OFF);
1945 1.1 chopps
1946 1.1 chopps /*
1947 1.1 chopps * setting it is slightly more difficult, because we can't
1948 1.1 chopps * force the application to not pass a *smaller* than
1949 1.1 chopps * supported bitmap
1950 1.1 chopps */
1951 1.1 chopps
1952 1.1 chopps for (row = 0, mp = mask, imp = image;
1953 1.1 chopps row < info->size.y;
1954 1.1 chopps row++) {
1955 1.1 chopps u_long im1, im2, m1, m2;
1956 1.1 chopps
1957 1.1 chopps im1 = *(unsigned long *)imp;
1958 1.1 chopps imp += 4;
1959 1.1 chopps m1 = *(unsigned long *)mp;
1960 1.1 chopps mp += 4;
1961 1.9 chopps #ifdef RH_64BIT_SPRITE
1962 1.1 chopps if (info->size.x > 32) {
1963 1.1 chopps im2 = *(unsigned long *)imp;
1964 1.1 chopps imp += 4;
1965 1.1 chopps m2 = *(unsigned long *)mp;
1966 1.1 chopps mp += 4;
1967 1.1 chopps }
1968 1.1 chopps else
1969 1.7 chopps #endif
1970 1.1 chopps im2 = m2 = 0;
1971 1.1 chopps
1972 1.1 chopps M2I(im1);
1973 1.1 chopps M2I(im2);
1974 1.1 chopps M2I(m1);
1975 1.1 chopps M2I(m2);
1976 1.1 chopps
1977 1.1 chopps *hwp++ = ~m1;
1978 1.9 chopps #ifdef RH_64BIT_SPRITE
1979 1.1 chopps *hwp++ = ~m2;
1980 1.7 chopps #endif
1981 1.1 chopps *hwp++ = m1 & im1;
1982 1.9 chopps #ifdef RH_64BIT_SPRITE
1983 1.1 chopps *hwp++ = m2 & im2;
1984 1.7 chopps #endif
1985 1.1 chopps }
1986 1.9 chopps #ifdef RH_64BIT_SPRITE
1987 1.1 chopps for (; row < 64; row++) {
1988 1.1 chopps *hwp++ = 0xffffffff;
1989 1.1 chopps *hwp++ = 0xffffffff;
1990 1.1 chopps *hwp++ = 0x00000000;
1991 1.1 chopps *hwp++ = 0x00000000;
1992 1.1 chopps }
1993 1.7 chopps #else
1994 1.7 chopps for (; row < 32; row++) {
1995 1.7 chopps *hwp++ = 0xffffffff;
1996 1.7 chopps *hwp++ = 0x00000000;
1997 1.7 chopps }
1998 1.7 chopps #endif
1999 1.1 chopps
2000 1.1 chopps free(image, M_TEMP);
2001 1.1 chopps RZ3SetupHWC(gp, 1, 0, 0, 0, 0);
2002 1.1 chopps }
2003 1.1 chopps if (info->set & GRFSPRSET_CMAP) {
2004 1.1 chopps /* hey cheat a bit here.. XXX */
2005 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR0, 0);
2006 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR1, 1);
2007 1.1 chopps }
2008 1.1 chopps if (info->set & GRFSPRSET_ENABLE) {
2009 1.7 chopps #if 0
2010 1.1 chopps if (info->enable)
2011 1.1 chopps control = 0x85;
2012 1.1 chopps else
2013 1.1 chopps control = 0;
2014 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, control);
2015 1.7 chopps #endif
2016 1.1 chopps }
2017 1.1 chopps if (info->set & GRFSPRSET_POS)
2018 1.1 chopps rh_setspritepos(gp, &info->pos);
2019 1.1 chopps if (info->set & GRFSPRSET_HOT) {
2020 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_INDEX, info->hot.x & 0x3f);
2021 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_INDEX, info->hot.y & 0x7f);
2022 1.1 chopps }
2023 1.1 chopps
2024 1.1 chopps return(0);
2025 1.1 chopps }
2026 1.1 chopps
2027 1.1 chopps int
2028 1.1 chopps rh_getspritemax (gp, pos)
2029 1.1 chopps struct grf_softc *gp;
2030 1.1 chopps struct grf_position *pos;
2031 1.1 chopps {
2032 1.9 chopps #ifdef RH_64BIT_SPRITE
2033 1.1 chopps pos->x = 64;
2034 1.1 chopps pos->y = 64;
2035 1.7 chopps #else
2036 1.7 chopps pos->x = 32;
2037 1.7 chopps pos->y = 32;
2038 1.7 chopps #endif
2039 1.1 chopps
2040 1.1 chopps return(0);
2041 1.1 chopps }
2042 1.1 chopps
2043 1.1 chopps
2044 1.1 chopps int
2045 1.1 chopps rh_bitblt (gp, bb)
2046 1.1 chopps struct grf_softc *gp;
2047 1.1 chopps struct grf_bitblt *bb;
2048 1.1 chopps {
2049 1.1 chopps struct MonDef *md = (struct MonDef *)gp->g_data;
2050 1.7 chopps if (md->DEP <= 8)
2051 1.1 chopps RZ3BitBlit(gp, bb);
2052 1.7 chopps else if (md->DEP <= 16)
2053 1.1 chopps RZ3BitBlit16(gp, bb);
2054 1.7 chopps else
2055 1.7 chopps RZ3BitBlit24(gp, bb);
2056 1.14 veego
2057 1.14 veego return(0);
2058 1.1 chopps }
2059 1.17 veego
2060 1.17 veego
2061 1.17 veego int
2062 1.17 veego rh_blank(gp, on)
2063 1.17 veego struct grf_softc *gp;
2064 1.17 veego int *on;
2065 1.17 veego {
2066 1.18 is struct MonDef *md = (struct MonDef *)gp->g_data;
2067 1.17 veego int r;
2068 1.17 veego
2069 1.18 is r = 0x01 | ((md->FLG & MDF_CLKDIV2)/ MDF_CLKDIV2 * 8);
2070 1.17 veego
2071 1.18 is WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on ? r : 0x21);
2072 1.17 veego
2073 1.17 veego return(0);
2074 1.17 veego }
2075 1.17 veego
2076 1.1 chopps #endif /* NGRF */
2077