grf_rh.c revision 1.32 1 1.32 aymeric /* $NetBSD: grf_rh.c,v 1.32 2002/01/26 13:40:54 aymeric Exp $ */
2 1.1 chopps
3 1.6 chopps /*
4 1.6 chopps * Copyright (c) 1994 Markus Wild
5 1.6 chopps * Copyright (c) 1994 Lutz Vieweg
6 1.6 chopps * All rights reserved.
7 1.6 chopps *
8 1.6 chopps * Redistribution and use in source and binary forms, with or without
9 1.6 chopps * modification, are permitted provided that the following conditions
10 1.6 chopps * are met:
11 1.6 chopps * 1. Redistributions of source code must retain the above copyright
12 1.6 chopps * notice, this list of conditions and the following disclaimer.
13 1.6 chopps * 2. Redistributions in binary form must reproduce the above copyright
14 1.6 chopps * notice, this list of conditions and the following disclaimer in the
15 1.6 chopps * documentation and/or other materials provided with the distribution.
16 1.6 chopps * 3. All advertising materials mentioning features or use of this software
17 1.6 chopps * must display the following acknowledgement:
18 1.6 chopps * This product includes software developed by Lutz Vieweg.
19 1.6 chopps * 4. The name of the author may not be used to endorse or promote products
20 1.6 chopps * derived from this software without specific prior written permission
21 1.6 chopps *
22 1.6 chopps * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.6 chopps * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.6 chopps * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.6 chopps * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.6 chopps * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.6 chopps * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.6 chopps * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.6 chopps * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.6 chopps * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.6 chopps * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.6 chopps */
33 1.29 is #include "opt_amigacons.h"
34 1.29 is #include "opt_retina.h"
35 1.2 chopps #include "grfrh.h"
36 1.2 chopps #if NGRFRH > 0
37 1.1 chopps
38 1.1 chopps /*
39 1.1 chopps * Graphics routines for the Retina BLT Z3 board,
40 1.1 chopps * using the NCR 77C32BLT VGA controller.
41 1.1 chopps */
42 1.1 chopps
43 1.1 chopps #include <sys/param.h>
44 1.14 veego #include <sys/systm.h>
45 1.1 chopps #include <sys/errno.h>
46 1.1 chopps #include <sys/ioctl.h>
47 1.1 chopps #include <sys/device.h>
48 1.1 chopps #include <sys/malloc.h>
49 1.1 chopps #include <machine/cpu.h>
50 1.1 chopps #include <amiga/amiga/device.h>
51 1.1 chopps #include <amiga/dev/grfioctl.h>
52 1.1 chopps #include <amiga/dev/grfvar.h>
53 1.1 chopps #include <amiga/dev/grf_rhreg.h>
54 1.5 chopps #include <amiga/dev/zbusvar.h>
55 1.1 chopps
56 1.7 chopps enum mode_type { MT_TXTONLY, MT_GFXONLY, MT_BOTH };
57 1.7 chopps
58 1.32 aymeric int rh_mondefok(struct MonDef *);
59 1.1 chopps
60 1.32 aymeric u_short rh_CompFQ(u_int fq);
61 1.32 aymeric int rh_load_mon(struct grf_softc *gp, struct MonDef *md);
62 1.32 aymeric int rh_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm);
63 1.32 aymeric int rh_setvmode(struct grf_softc *gp, unsigned int mode, enum mode_type type);
64 1.7 chopps
65 1.7 chopps /* make it patchable, and settable by kernel config option */
66 1.7 chopps #ifndef RH_MEMCLK
67 1.7 chopps #define RH_MEMCLK 61000000 /* this is the memory clock value, you shouldn't
68 1.32 aymeric set it to less than 61000000, higher values may
69 1.32 aymeric speed up blits a little bit, if you raise this
70 1.32 aymeric value too much, some trash will appear on your
71 1.32 aymeric screen. */
72 1.7 chopps #endif
73 1.7 chopps int rh_memclk = RH_MEMCLK;
74 1.1 chopps
75 1.1 chopps
76 1.1 chopps extern unsigned char kernel_font_8x8_width, kernel_font_8x8_height;
77 1.1 chopps extern unsigned char kernel_font_8x8_lo, kernel_font_8x8_hi;
78 1.1 chopps extern unsigned char kernel_font_8x8[];
79 1.2 chopps #ifdef KFONT_8X11
80 1.2 chopps extern unsigned char kernel_font_8x11_width, kernel_font_8x11_height;
81 1.2 chopps extern unsigned char kernel_font_8x11_lo, kernel_font_8x11_hi;
82 1.2 chopps extern unsigned char kernel_font_8x11[];
83 1.2 chopps #endif
84 1.1 chopps
85 1.1 chopps /*
86 1.6 chopps * This driver for the MacroSystem Retina board was only possible,
87 1.6 chopps * because MacroSystem provided information about the pecularities
88 1.6 chopps * of the board. THANKS! Competition in Europe among gfx board
89 1.6 chopps * manufacturers is rather tough, so Lutz Vieweg, who wrote the
90 1.6 chopps * initial driver, has made an agreement with MS not to document
91 1.6 chopps * the driver source (see also his comment below).
92 1.6 chopps * -> ALL comments after
93 1.14 veego * -> " -------------- START OF CODE -------------- "
94 1.6 chopps * -> have been added by myself (mw) from studying the publically
95 1.6 chopps * -> available "NCR 77C32BLT" Data Manual
96 1.1 chopps */
97 1.6 chopps /*
98 1.6 chopps * This code offers low-level routines to access the Retina BLT Z3
99 1.1 chopps * graphics-board manufactured by MS MacroSystem GmbH from within NetBSD
100 1.6 chopps * for the Amiga.
101 1.1 chopps *
102 1.30 wiz * Thanks to MacroSystem for providing me with the necessary information
103 1.1 chopps * to create theese routines. The sparse documentation of this code
104 1.1 chopps * results from the agreements between MS and me.
105 1.1 chopps */
106 1.1 chopps
107 1.1 chopps
108 1.1 chopps
109 1.1 chopps #define MDF_DBL 1
110 1.1 chopps #define MDF_LACE 2
111 1.1 chopps #define MDF_CLKDIV2 4
112 1.1 chopps
113 1.7 chopps /* set this as an option in your kernel config file! */
114 1.9 chopps /* #define RH_64BIT_SPRITE */
115 1.1 chopps
116 1.1 chopps /* -------------- START OF CODE -------------- */
117 1.1 chopps
118 1.1 chopps /* Convert big-endian long into little-endian long. */
119 1.1 chopps
120 1.1 chopps #define M2I(val) \
121 1.1 chopps asm volatile (" rorw #8,%0 ; \
122 1.32 aymeric swap %0 ; \
123 1.32 aymeric rorw #8,%0 ; " : "=d" (val) : "0" (val));
124 1.1 chopps
125 1.1 chopps #define M2INS(val) \
126 1.1 chopps asm volatile (" rorw #8,%0 ; \
127 1.32 aymeric swap %0 ; \
128 1.32 aymeric rorw #8,%0 ; \
129 1.1 chopps swap %0 ; " : "=d" (val) : "0" (val));
130 1.1 chopps
131 1.1 chopps #define ACM_OFFSET (0x00b00000)
132 1.1 chopps #define LM_OFFSET (0x00c00000)
133 1.1 chopps
134 1.1 chopps static unsigned char optab[] = {
135 1.1 chopps 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
136 1.1 chopps 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0
137 1.1 chopps };
138 1.1 chopps static char optabs[] = {
139 1.1 chopps 0, -1, -1, -1, -1, 0, -1, -1,
140 1.1 chopps -1, -1, 0, -1, -1, -1, -1, 0
141 1.1 chopps };
142 1.1 chopps
143 1.1 chopps void
144 1.32 aymeric RZ3DisableHWC(struct grf_softc *gp)
145 1.1 chopps {
146 1.1 chopps volatile void *ba = gp->g_regkva;
147 1.1 chopps
148 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_INDEX, 0x00);
149 1.1 chopps }
150 1.1 chopps
151 1.1 chopps void
152 1.32 aymeric RZ3SetupHWC(struct grf_softc *gp, unsigned char col1, unsigned col2,
153 1.32 aymeric unsigned char hsx, unsigned char hsy, const unsigned long *data)
154 1.1 chopps {
155 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
156 1.1 chopps unsigned long *c = (unsigned long *)(ba + LM_OFFSET + HWC_MEM_OFF);
157 1.1 chopps const unsigned long *s = data;
158 1.1 chopps struct MonDef *MonitorDef = (struct MonDef *) gp->g_data;
159 1.9 chopps #ifdef RH_64BIT_SPRITE
160 1.1 chopps short x = (HWC_MEM_SIZE / (4*4)) - 1;
161 1.7 chopps #else
162 1.32 aymeric short x = (HWC_MEM_SIZE / (4*4*2)) - 1;
163 1.7 chopps #endif
164 1.1 chopps /* copy only, if there is a data pointer. */
165 1.1 chopps if (data) do {
166 1.1 chopps *c++ = *s++;
167 1.1 chopps *c++ = *s++;
168 1.1 chopps *c++ = *s++;
169 1.1 chopps *c++ = *s++;
170 1.1 chopps } while (x-- > 0);
171 1.1 chopps
172 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR1, col1);
173 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR0, col2);
174 1.32 aymeric if (MonitorDef->DEP <= 8) {
175 1.9 chopps #ifdef RH_64BIT_SPRITE
176 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x85);
177 1.7 chopps #else
178 1.32 aymeric WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x03);
179 1.7 chopps #endif
180 1.32 aymeric }
181 1.32 aymeric else if (MonitorDef->DEP <= 16) {
182 1.9 chopps #ifdef RH_64BIT_SPRITE
183 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0xa5);
184 1.7 chopps #else
185 1.32 aymeric WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x23);
186 1.7 chopps #endif
187 1.32 aymeric }
188 1.32 aymeric else {
189 1.9 chopps #ifdef RH_64BIT_SPRITE
190 1.32 aymeric WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0xc5);
191 1.7 chopps #else
192 1.32 aymeric WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x43);
193 1.7 chopps #endif
194 1.32 aymeric }
195 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_LOC_HI, 0x00);
196 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_LOC_LO, 0x00);
197 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_LOC_HI, 0x00);
198 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_LOC_LO, 0x00);
199 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_INDEX, hsx);
200 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_INDEX, hsy);
201 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_STORE_HI, 0x00);
202 1.32 aymeric WSeq(ba, SEQ_ID_CURSOR_STORE_LO, ((HWC_MEM_OFF / 4) & 0x0000f));
203 1.32 aymeric WSeq(ba, SEQ_ID_CURSOR_ST_OFF_HI,
204 1.32 aymeric (((HWC_MEM_OFF / 4) & 0xff000) >> 12));
205 1.32 aymeric WSeq(ba, SEQ_ID_CURSOR_ST_OFF_LO,
206 1.32 aymeric (((HWC_MEM_OFF / 4) & 0x00ff0) >> 4));
207 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_PIXELMASK, 0xff);
208 1.1 chopps }
209 1.1 chopps
210 1.1 chopps void
211 1.32 aymeric RZ3AlphaErase(struct grf_softc *gp, unsigned short xd, unsigned short yd,
212 1.32 aymeric unsigned short w, unsigned short h)
213 1.1 chopps {
214 1.1 chopps const struct MonDef * md = (struct MonDef *) gp->g_data;
215 1.1 chopps RZ3AlphaCopy(gp, xd, yd+md->TY, xd, yd, w, h);
216 1.1 chopps }
217 1.1 chopps
218 1.1 chopps void
219 1.32 aymeric RZ3AlphaCopy(struct grf_softc *gp, unsigned short xs, unsigned short ys,
220 1.32 aymeric unsigned short xd, unsigned short yd, unsigned short w,
221 1.32 aymeric unsigned short h)
222 1.1 chopps {
223 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
224 1.1 chopps const struct MonDef *md = (struct MonDef *) gp->g_data;
225 1.1 chopps volatile unsigned long *acm = (unsigned long *) (ba + ACM_OFFSET);
226 1.1 chopps unsigned short mod;
227 1.1 chopps
228 1.1 chopps xs *= 4;
229 1.1 chopps ys *= 4;
230 1.1 chopps xd *= 4;
231 1.1 chopps yd *= 4;
232 1.1 chopps w *= 4;
233 1.1 chopps
234 1.1 chopps {
235 1.1 chopps /* anyone got Windoze GDI opcodes handy?... */
236 1.1 chopps unsigned long tmp = 0x0000ca00;
237 1.1 chopps *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
238 1.1 chopps }
239 1.1 chopps
240 1.1 chopps mod = 0xc0c2;
241 1.1 chopps
242 1.1 chopps {
243 1.1 chopps unsigned long pat = 8 * PAT_MEM_OFF;
244 1.1 chopps unsigned long dst = 8 * (xd + yd * md->TX);
245 1.1 chopps
246 1.1 chopps unsigned long src = 8 * (xs + ys * md->TX);
247 1.1 chopps
248 1.1 chopps if (xd > xs) {
249 1.1 chopps mod &= ~0x8000;
250 1.1 chopps src += 8 * (w - 1);
251 1.1 chopps dst += 8 * (w - 1);
252 1.1 chopps pat += 8 * 2;
253 1.1 chopps }
254 1.1 chopps if (yd > ys) {
255 1.1 chopps mod &= ~0x4000;
256 1.1 chopps src += 8 * (h - 1) * md->TX * 4;
257 1.1 chopps dst += 8 * (h - 1) * md->TX * 4;
258 1.1 chopps pat += 8 * 4;
259 1.1 chopps }
260 1.1 chopps
261 1.1 chopps M2I(src);
262 1.1 chopps *(acm + ACM_SOURCE/4) = src;
263 1.1 chopps
264 1.1 chopps M2I(pat);
265 1.1 chopps *(acm + ACM_PATTERN/4) = pat;
266 1.1 chopps
267 1.1 chopps M2I(dst);
268 1.1 chopps *(acm + ACM_DESTINATION/4) = dst;
269 1.1 chopps }
270 1.1 chopps {
271 1.1 chopps
272 1.1 chopps unsigned long tmp = mod << 16;
273 1.1 chopps *(acm + ACM_CONTROL/4) = tmp;
274 1.1 chopps }
275 1.1 chopps {
276 1.1 chopps
277 1.1 chopps unsigned long tmp = w | (h << 16);
278 1.1 chopps M2I(tmp);
279 1.1 chopps *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
280 1.1 chopps }
281 1.1 chopps
282 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
283 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
284 1.1 chopps
285 1.1 chopps while ((*(((volatile unsigned char *)acm) +
286 1.1 chopps (ACM_START_STATUS + 2)) & 1) == 0);
287 1.1 chopps }
288 1.1 chopps
289 1.1 chopps void
290 1.32 aymeric RZ3BitBlit(struct grf_softc *gp, struct grf_bitblt *gbb)
291 1.1 chopps {
292 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
293 1.1 chopps volatile unsigned char *lm = ba + LM_OFFSET;
294 1.1 chopps volatile unsigned long *acm = (unsigned long *) (ba + ACM_OFFSET);
295 1.1 chopps const struct MonDef *md = (struct MonDef *) gp->g_data;
296 1.1 chopps unsigned short mod;
297 1.1 chopps
298 1.1 chopps {
299 1.1 chopps unsigned long * pt = (unsigned long *) (lm + PAT_MEM_OFF);
300 1.32 aymeric unsigned long tmp =
301 1.32 aymeric gbb->mask | ((unsigned long) gbb->mask << 16);
302 1.1 chopps *pt++ = tmp;
303 1.1 chopps *pt = tmp;
304 1.1 chopps }
305 1.1 chopps
306 1.1 chopps {
307 1.1 chopps
308 1.1 chopps unsigned long tmp = optab[ gbb->op ] << 8;
309 1.1 chopps *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
310 1.1 chopps }
311 1.1 chopps
312 1.1 chopps mod = 0xc0c2;
313 1.1 chopps
314 1.1 chopps {
315 1.1 chopps unsigned long pat = 8 * PAT_MEM_OFF;
316 1.1 chopps unsigned long dst = 8 * (gbb->dst_x + gbb->dst_y * md->TX);
317 1.1 chopps
318 1.1 chopps if (optabs[gbb->op]) {
319 1.32 aymeric unsigned long src =
320 1.32 aymeric 8 * (gbb->src_x + gbb->src_y * md->TX);
321 1.1 chopps
322 1.1 chopps if (gbb->dst_x > gbb->src_x) {
323 1.1 chopps mod &= ~0x8000;
324 1.1 chopps src += 8 * (gbb->w - 1);
325 1.1 chopps dst += 8 * (gbb->w - 1);
326 1.1 chopps pat += 8 * 2;
327 1.1 chopps }
328 1.1 chopps if (gbb->dst_y > gbb->src_y) {
329 1.1 chopps mod &= ~0x4000;
330 1.1 chopps src += 8 * (gbb->h - 1) * md->TX;
331 1.1 chopps dst += 8 * (gbb->h - 1) * md->TX;
332 1.1 chopps pat += 8 * 4;
333 1.1 chopps }
334 1.1 chopps
335 1.1 chopps M2I(src);
336 1.1 chopps *(acm + ACM_SOURCE/4) = src;
337 1.1 chopps }
338 1.1 chopps
339 1.1 chopps M2I(pat);
340 1.1 chopps *(acm + ACM_PATTERN/4) = pat;
341 1.1 chopps
342 1.1 chopps M2I(dst);
343 1.1 chopps *(acm + ACM_DESTINATION/4) = dst;
344 1.1 chopps }
345 1.1 chopps {
346 1.1 chopps
347 1.1 chopps unsigned long tmp = mod << 16;
348 1.1 chopps *(acm + ACM_CONTROL/4) = tmp;
349 1.1 chopps }
350 1.1 chopps {
351 1.1 chopps unsigned long tmp = gbb->w | (gbb->h << 16);
352 1.1 chopps M2I(tmp);
353 1.1 chopps *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
354 1.1 chopps }
355 1.1 chopps
356 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
357 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
358 1.1 chopps
359 1.1 chopps while ((*(((volatile unsigned char *)acm) +
360 1.1 chopps (ACM_START_STATUS + 2)) & 1) == 0);
361 1.1 chopps }
362 1.1 chopps
363 1.1 chopps void
364 1.32 aymeric RZ3BitBlit16(struct grf_softc *gp, struct grf_bitblt *gbb)
365 1.1 chopps {
366 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
367 1.1 chopps volatile unsigned char *lm = ba + LM_OFFSET;
368 1.1 chopps volatile unsigned long * acm = (unsigned long *) (ba + ACM_OFFSET);
369 1.1 chopps const struct MonDef * md = (struct MonDef *) gp->g_data;
370 1.1 chopps unsigned short mod;
371 1.1 chopps
372 1.1 chopps {
373 1.1 chopps unsigned long * pt = (unsigned long *) (lm + PAT_MEM_OFF);
374 1.32 aymeric unsigned long tmp =
375 1.32 aymeric gbb->mask | ((unsigned long) gbb->mask << 16);
376 1.1 chopps *pt++ = tmp;
377 1.1 chopps *pt++ = tmp;
378 1.1 chopps *pt++ = tmp;
379 1.1 chopps *pt = tmp;
380 1.1 chopps }
381 1.1 chopps
382 1.1 chopps {
383 1.1 chopps
384 1.1 chopps unsigned long tmp = optab[ gbb->op ] << 8;
385 1.1 chopps *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
386 1.1 chopps }
387 1.1 chopps
388 1.1 chopps mod = 0xc0c2;
389 1.1 chopps
390 1.1 chopps {
391 1.1 chopps unsigned long pat = 8 * PAT_MEM_OFF;
392 1.1 chopps unsigned long dst = 8 * 2 * (gbb->dst_x + gbb->dst_y * md->TX);
393 1.1 chopps
394 1.1 chopps if (optabs[gbb->op]) {
395 1.32 aymeric unsigned long src =
396 1.32 aymeric 8 * 2 * (gbb->src_x + gbb->src_y * md->TX);
397 1.1 chopps
398 1.1 chopps if (gbb->dst_x > gbb->src_x) {
399 1.1 chopps mod &= ~0x8000;
400 1.1 chopps src += 8 * 2 * (gbb->w);
401 1.1 chopps dst += 8 * 2 * (gbb->w);
402 1.1 chopps pat += 8 * 2 * 2;
403 1.1 chopps }
404 1.1 chopps if (gbb->dst_y > gbb->src_y) {
405 1.1 chopps mod &= ~0x4000;
406 1.1 chopps src += 8 * 2 * (gbb->h - 1) * md->TX;
407 1.1 chopps dst += 8 * 2 * (gbb->h - 1) * md->TX;
408 1.1 chopps pat += 8 * 4 * 2;
409 1.1 chopps }
410 1.1 chopps
411 1.1 chopps M2I(src);
412 1.1 chopps *(acm + ACM_SOURCE/4) = src;
413 1.1 chopps }
414 1.1 chopps
415 1.1 chopps M2I(pat);
416 1.1 chopps *(acm + ACM_PATTERN/4) = pat;
417 1.1 chopps
418 1.1 chopps M2I(dst);
419 1.1 chopps *(acm + ACM_DESTINATION/4) = dst;
420 1.1 chopps }
421 1.1 chopps {
422 1.1 chopps
423 1.1 chopps unsigned long tmp = mod << 16;
424 1.1 chopps *(acm + ACM_CONTROL/4) = tmp;
425 1.1 chopps }
426 1.1 chopps {
427 1.1 chopps
428 1.1 chopps unsigned long tmp = gbb->w | (gbb->h << 16);
429 1.1 chopps M2I(tmp);
430 1.1 chopps *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
431 1.1 chopps }
432 1.1 chopps
433 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
434 1.1 chopps *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
435 1.1 chopps
436 1.1 chopps while ((*(((volatile unsigned char *)acm) +
437 1.1 chopps (ACM_START_STATUS+ 2)) & 1) == 0);
438 1.1 chopps }
439 1.1 chopps
440 1.1 chopps void
441 1.32 aymeric RZ3BitBlit24(struct grf_softc *gp, struct grf_bitblt *gbb)
442 1.32 aymeric {
443 1.32 aymeric volatile unsigned char *ba = gp->g_regkva;
444 1.32 aymeric volatile unsigned char *lm = ba + LM_OFFSET;
445 1.32 aymeric volatile unsigned long * acm = (unsigned long *) (ba + ACM_OFFSET);
446 1.32 aymeric const struct MonDef * md = (struct MonDef *) gp->g_data;
447 1.32 aymeric unsigned short mod;
448 1.32 aymeric
449 1.32 aymeric
450 1.32 aymeric {
451 1.32 aymeric unsigned long * pt = (unsigned long *) (lm + PAT_MEM_OFF);
452 1.32 aymeric unsigned long tmp =
453 1.32 aymeric gbb->mask | ((unsigned long) gbb->mask << 16);
454 1.32 aymeric *pt++ = tmp;
455 1.32 aymeric *pt++ = tmp;
456 1.32 aymeric *pt++ = tmp;
457 1.32 aymeric *pt++ = tmp;
458 1.32 aymeric *pt++ = tmp;
459 1.32 aymeric *pt = tmp;
460 1.32 aymeric }
461 1.32 aymeric
462 1.32 aymeric {
463 1.32 aymeric unsigned long tmp = optab[ gbb->op ] << 8;
464 1.32 aymeric *(acm + ACM_RASTEROP_ROTATION/4) = tmp;
465 1.32 aymeric }
466 1.32 aymeric
467 1.32 aymeric mod = 0xc0c2;
468 1.32 aymeric
469 1.32 aymeric {
470 1.32 aymeric unsigned long pat = 8 * PAT_MEM_OFF;
471 1.32 aymeric unsigned long dst = 8 * 3 * (gbb->dst_x + gbb->dst_y * md->TX);
472 1.32 aymeric
473 1.32 aymeric if (optabs[gbb->op]) {
474 1.32 aymeric unsigned long src =
475 1.32 aymeric 8 * 3 * (gbb->src_x + gbb->src_y * md->TX);
476 1.32 aymeric
477 1.32 aymeric if (gbb->dst_x > gbb->src_x ) {
478 1.32 aymeric mod &= ~0x8000;
479 1.32 aymeric src += 8 * 3 * (gbb->w);
480 1.32 aymeric dst += 8 * 3 * (gbb->w);
481 1.32 aymeric pat += 8 * 3 * 2;
482 1.32 aymeric }
483 1.32 aymeric if (gbb->dst_y > gbb->src_y) {
484 1.32 aymeric mod &= ~0x4000;
485 1.32 aymeric src += 8 * 3 * (gbb->h - 1) * md->TX;
486 1.32 aymeric dst += 8 * 3 * (gbb->h - 1) * md->TX;
487 1.32 aymeric pat += 8 * 4 * 3;
488 1.32 aymeric }
489 1.32 aymeric
490 1.32 aymeric M2I(src);
491 1.32 aymeric *(acm + ACM_SOURCE/4) = src;
492 1.32 aymeric }
493 1.32 aymeric
494 1.32 aymeric M2I(pat);
495 1.32 aymeric *(acm + ACM_PATTERN/4) = pat;
496 1.32 aymeric
497 1.32 aymeric M2I(dst);
498 1.32 aymeric *(acm + ACM_DESTINATION/4) = dst;
499 1.32 aymeric }
500 1.32 aymeric {
501 1.32 aymeric unsigned long tmp = mod << 16;
502 1.32 aymeric *(acm + ACM_CONTROL/4) = tmp;
503 1.32 aymeric }
504 1.32 aymeric {
505 1.32 aymeric unsigned long tmp = gbb->w | (gbb->h << 16);
506 1.32 aymeric M2I(tmp);
507 1.32 aymeric *(acm + ACM_BITMAP_DIMENSION/4) = tmp;
508 1.32 aymeric }
509 1.32 aymeric
510 1.32 aymeric *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00;
511 1.32 aymeric *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01;
512 1.32 aymeric
513 1.32 aymeric while ( (*(((volatile unsigned char *)acm)
514 1.32 aymeric + (ACM_START_STATUS+ 2)) & 1) == 0 ) {};
515 1.32 aymeric
516 1.7 chopps }
517 1.7 chopps
518 1.7 chopps
519 1.7 chopps void
520 1.32 aymeric RZ3SetCursorPos(struct grf_softc *gp, unsigned short pos)
521 1.1 chopps {
522 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
523 1.1 chopps
524 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_LOW, (unsigned char)pos);
525 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, (unsigned char)(pos >> 8));
526 1.1 chopps
527 1.1 chopps }
528 1.1 chopps
529 1.1 chopps void
530 1.32 aymeric RZ3LoadPalette(struct grf_softc *gp, unsigned char *pal,
531 1.32 aymeric unsigned char firstcol, unsigned char colors)
532 1.1 chopps {
533 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
534 1.1 chopps
535 1.1 chopps if (colors == 0)
536 1.1 chopps return;
537 1.1 chopps
538 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, firstcol);
539 1.1 chopps
540 1.1 chopps {
541 1.1 chopps
542 1.1 chopps short x = colors-1;
543 1.1 chopps const unsigned char * col = pal;
544 1.1 chopps do {
545 1.1 chopps
546 1.1 chopps vgaw(ba, VDAC_DATA, (*col++ >> 2));
547 1.1 chopps vgaw(ba, VDAC_DATA, (*col++ >> 2));
548 1.1 chopps vgaw(ba, VDAC_DATA, (*col++ >> 2));
549 1.1 chopps
550 1.1 chopps } while (x-- > 0);
551 1.1 chopps
552 1.1 chopps }
553 1.1 chopps }
554 1.1 chopps
555 1.1 chopps void
556 1.32 aymeric RZ3SetPalette(struct grf_softc *gp, unsigned char colornum, unsigned char red,
557 1.32 aymeric unsigned char green, unsigned char blue)
558 1.1 chopps {
559 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
560 1.1 chopps
561 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, colornum);
562 1.1 chopps
563 1.1 chopps vgaw(ba, VDAC_DATA, (red >> 2));
564 1.1 chopps vgaw(ba, VDAC_DATA, (green >> 2));
565 1.1 chopps vgaw(ba, VDAC_DATA, (blue >> 2));
566 1.1 chopps
567 1.1 chopps }
568 1.1 chopps
569 1.1 chopps void
570 1.32 aymeric RZ3SetPanning(struct grf_softc *gp, unsigned short xoff, unsigned short yoff)
571 1.1 chopps {
572 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
573 1.26 is struct grfinfo *gi = &gp->g_display;
574 1.1 chopps const struct MonDef * md = (struct MonDef *) gp->g_data;
575 1.1 chopps unsigned long off;
576 1.1 chopps
577 1.26 is gi->gd_fbx = xoff;
578 1.26 is gi->gd_fby = yoff;
579 1.1 chopps
580 1.32 aymeric if (md->DEP > 8 && md->DEP <= 16) xoff *= 2;
581 1.32 aymeric else if (md->DEP > 16) xoff *= 3;
582 1.1 chopps
583 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
584 1.1 chopps WAttr(ba, ACT_ID_HOR_PEL_PANNING, (unsigned char)((xoff << 1) & 0x07));
585 1.1 chopps /* have the color lookup function normally again */
586 1.1 chopps vgaw(ba, ACT_ADDRESS_W, 0x20);
587 1.1 chopps
588 1.1 chopps if (md->DEP == 8)
589 1.1 chopps off = ((yoff * md->TX)/ 4) + (xoff >> 2);
590 1.32 aymeric else if (md->DEP == 16)
591 1.1 chopps off = ((yoff * md->TX * 2)/ 4) + (xoff >> 2);
592 1.32 aymeric else
593 1.32 aymeric off = ((yoff * md->TX * 3)/ 4) + (xoff >> 2);
594 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_LOW, ((unsigned char)off));
595 1.1 chopps off >>= 8;
596 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_HIGH, ((unsigned char)off));
597 1.1 chopps off >>= 8;
598 1.1 chopps WCrt(ba, CRT_ID_EXT_START_ADDR,
599 1.1 chopps ((RCrt(ba, CRT_ID_EXT_START_ADDR) & 0xf0) | (off & 0x0f)));
600 1.1 chopps
601 1.1 chopps
602 1.1 chopps }
603 1.1 chopps
604 1.1 chopps void
605 1.32 aymeric RZ3SetHWCloc(struct grf_softc *gp, unsigned short x, unsigned short y)
606 1.1 chopps {
607 1.1 chopps volatile unsigned char *ba = gp->g_regkva;
608 1.1 chopps const struct MonDef *md = (struct MonDef *) gp->g_data;
609 1.26 is /*volatile unsigned char *acm = ba + ACM_OFFSET;*/
610 1.26 is struct grfinfo *gi = &gp->g_display;
611 1.1 chopps
612 1.26 is if (x < gi->gd_fbx)
613 1.26 is RZ3SetPanning(gp, x, gi->gd_fby);
614 1.1 chopps
615 1.26 is if (x >= (gi->gd_fbx+md->MW))
616 1.26 is RZ3SetPanning(gp, (1 + x - md->MW) , gi->gd_fby);
617 1.1 chopps
618 1.26 is if (y < gi->gd_fby)
619 1.26 is RZ3SetPanning(gp, gi->gd_fbx, y);
620 1.1 chopps
621 1.26 is if (y >= (gi->gd_fby+md->MH))
622 1.26 is RZ3SetPanning(gp, gi->gd_fbx, (1 + y - md->MH));
623 1.1 chopps
624 1.26 is x -= gi->gd_fbx;
625 1.26 is y -= gi->gd_fby;
626 1.1 chopps
627 1.26 is #if 1
628 1.26 is WSeq(ba, SEQ_ID_CURSOR_X_LOC_HI, x >> 8);
629 1.26 is WSeq(ba, SEQ_ID_CURSOR_X_LOC_LO, x & 0xff);
630 1.26 is WSeq(ba, SEQ_ID_CURSOR_Y_LOC_HI, y >> 8);
631 1.26 is WSeq(ba, SEQ_ID_CURSOR_Y_LOC_LO, y & 0xff);
632 1.26 is #else
633 1.26 is *(acm + (ACM_CURSOR_POSITION+1)) = x >> 8;
634 1.1 chopps *(acm + (ACM_CURSOR_POSITION+0)) = x & 0xff;
635 1.26 is *(acm + (ACM_CURSOR_POSITION+3)) = y >> 8;
636 1.1 chopps *(acm + (ACM_CURSOR_POSITION+2)) = y & 0xff;
637 1.26 is #endif
638 1.1 chopps }
639 1.1 chopps
640 1.1 chopps u_short
641 1.32 aymeric rh_CompFQ(u_int fq)
642 1.1 chopps {
643 1.1 chopps /* yuck... this sure could need some explanation.. */
644 1.1 chopps
645 1.1 chopps unsigned long f = fq;
646 1.1 chopps long n2 = 3;
647 1.1 chopps long abw = 0x7fffffff;
648 1.1 chopps long n1 = 3;
649 1.1 chopps unsigned long m;
650 1.1 chopps unsigned short erg = 0;
651 1.1 chopps
652 1.1 chopps f *= 8;
653 1.1 chopps
654 1.1 chopps do {
655 1.1 chopps
656 1.1 chopps if (f <= 250000000)
657 1.1 chopps break;
658 1.1 chopps f /= 2;
659 1.1 chopps
660 1.1 chopps } while (n2-- > 0);
661 1.1 chopps
662 1.1 chopps if (n2 < 0)
663 1.1 chopps return(0);
664 1.1 chopps
665 1.1 chopps
666 1.1 chopps do {
667 1.1 chopps long tmp;
668 1.1 chopps
669 1.1 chopps f = fq;
670 1.1 chopps f >>= 3;
671 1.1 chopps f <<= n2;
672 1.1 chopps f >>= 7;
673 1.1 chopps
674 1.1 chopps m = (f * n1) / (14318180/1024);
675 1.1 chopps
676 1.1 chopps if (m > 129)
677 1.1 chopps break;
678 1.1 chopps
679 1.1 chopps tmp = (((m * 14318180) >> n2) / n1) - fq;
680 1.1 chopps if (tmp < 0)
681 1.1 chopps tmp = -tmp;
682 1.1 chopps
683 1.1 chopps if (tmp < abw) {
684 1.1 chopps abw = tmp;
685 1.1 chopps erg = (((n2 << 5) | (n1-2)) << 8) | (m-2);
686 1.1 chopps }
687 1.1 chopps
688 1.1 chopps } while ( (++n1) <= 21);
689 1.1 chopps
690 1.1 chopps return(erg);
691 1.1 chopps }
692 1.1 chopps
693 1.1 chopps int
694 1.32 aymeric rh_mondefok(struct MonDef *mdp)
695 1.1 chopps {
696 1.1 chopps switch(mdp->DEP) {
697 1.17 veego case 8:
698 1.17 veego case 16:
699 1.32 aymeric case 24:
700 1.1 chopps return(1);
701 1.17 veego case 4:
702 1.1 chopps if (mdp->FX == 4 || (mdp->FX >= 7 && mdp->FX <= 16))
703 1.2 chopps return(1);
704 1.1 chopps /*FALLTHROUGH*/
705 1.17 veego default:
706 1.1 chopps return(0);
707 1.1 chopps }
708 1.1 chopps }
709 1.1 chopps
710 1.1 chopps
711 1.1 chopps int
712 1.32 aymeric rh_load_mon(struct grf_softc *gp, struct MonDef *md)
713 1.1 chopps {
714 1.1 chopps struct grfinfo *gi = &gp->g_display;
715 1.14 veego volatile caddr_t ba;
716 1.14 veego volatile caddr_t fb;
717 1.14 veego short FW, clksel, HDE = 0, VDE;
718 1.1 chopps unsigned short *c, z;
719 1.1 chopps const unsigned char *f;
720 1.1 chopps
721 1.1 chopps ba = gp->g_regkva;;
722 1.1 chopps fb = gp->g_fbkva;
723 1.1 chopps
724 1.1 chopps /* provide all needed information in grf device-independant
725 1.1 chopps * locations */
726 1.1 chopps gp->g_data = (caddr_t) md;
727 1.1 chopps gi->gd_regaddr = (caddr_t) kvtop (ba);
728 1.1 chopps gi->gd_regsize = LM_OFFSET;
729 1.1 chopps gi->gd_fbaddr = (caddr_t) kvtop (fb);
730 1.1 chopps gi->gd_fbsize = MEMSIZE *1024*1024;
731 1.1 chopps #ifdef BANKEDDEVPAGER
732 1.1 chopps /* we're not using banks NO MORE! */
733 1.1 chopps gi->gd_bank_size = 0;
734 1.1 chopps #endif
735 1.1 chopps gi->gd_colors = 1 << md->DEP;
736 1.1 chopps gi->gd_planes = md->DEP;
737 1.1 chopps
738 1.1 chopps if (md->DEP == 4) {
739 1.1 chopps gi->gd_fbwidth = md->MW;
740 1.1 chopps gi->gd_fbheight = md->MH;
741 1.1 chopps gi->gd_fbx = 0;
742 1.1 chopps gi->gd_fby = 0;
743 1.1 chopps gi->gd_dwidth = md->TX * md->FX;
744 1.1 chopps gi->gd_dheight = md->TY * md->FY;
745 1.1 chopps gi->gd_dx = 0;
746 1.1 chopps gi->gd_dy = 0;
747 1.1 chopps } else {
748 1.1 chopps gi->gd_fbwidth = md->TX;
749 1.1 chopps gi->gd_fbheight = md->TY;
750 1.1 chopps gi->gd_fbx = 0;
751 1.1 chopps gi->gd_fby = 0;
752 1.1 chopps gi->gd_dwidth = md->MW;
753 1.1 chopps gi->gd_dheight = md->MH;
754 1.1 chopps gi->gd_dx = 0;
755 1.1 chopps gi->gd_dy = 0;
756 1.1 chopps }
757 1.1 chopps
758 1.1 chopps FW =0;
759 1.1 chopps if (md->DEP == 4) { /* XXX some text-mode! */
760 1.1 chopps switch (md->FX) {
761 1.17 veego case 4:
762 1.1 chopps FW = 0;
763 1.1 chopps break;
764 1.17 veego case 7:
765 1.1 chopps FW = 1;
766 1.1 chopps break;
767 1.17 veego case 8:
768 1.1 chopps FW = 2;
769 1.1 chopps break;
770 1.17 veego case 9:
771 1.1 chopps FW = 3;
772 1.1 chopps break;
773 1.17 veego case 10:
774 1.1 chopps FW = 4;
775 1.1 chopps break;
776 1.17 veego case 11:
777 1.1 chopps FW = 5;
778 1.1 chopps break;
779 1.17 veego case 12:
780 1.1 chopps FW = 6;
781 1.1 chopps break;
782 1.17 veego case 13:
783 1.1 chopps FW = 7;
784 1.1 chopps break;
785 1.17 veego case 14:
786 1.1 chopps FW = 8;
787 1.1 chopps break;
788 1.17 veego case 15:
789 1.1 chopps FW = 9;
790 1.1 chopps break;
791 1.17 veego case 16:
792 1.1 chopps FW = 11;
793 1.1 chopps break;
794 1.17 veego default:
795 1.1 chopps return(0);
796 1.1 chopps break;
797 1.1 chopps }
798 1.1 chopps }
799 1.1 chopps
800 1.32 aymeric if (md->DEP == 4) HDE = (md->MW+md->FX-1)/md->FX;
801 1.32 aymeric else if (md->DEP == 8) HDE = (md->MW+3)/4;
802 1.32 aymeric else if (md->DEP == 16) HDE = (md->MW*2+3)/4;
803 1.32 aymeric else if (md->DEP == 24) HDE = (md->MW*3+3)/4;
804 1.1 chopps
805 1.1 chopps VDE = md->MH-1;
806 1.1 chopps
807 1.1 chopps clksel = 0;
808 1.1 chopps
809 1.1 chopps vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3 | ((clksel & 3) * 0x04));
810 1.1 chopps vgaw(ba, GREG_FEATURE_CONTROL_W, 0x00);
811 1.1 chopps
812 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x00);
813 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x03);
814 1.32 aymeric WSeq(ba, SEQ_ID_CLOCKING_MODE,
815 1.32 aymeric 0x01 | ((md->FLG & MDF_CLKDIV2) / MDF_CLKDIV2 * 8));
816 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
817 1.1 chopps WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
818 1.1 chopps WSeq(ba, SEQ_ID_MEMORY_MODE, 0x06);
819 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x01);
820 1.1 chopps WSeq(ba, SEQ_ID_RESET, 0x03);
821 1.1 chopps
822 1.1 chopps WSeq(ba, SEQ_ID_EXTENDED_ENABLE, 0x05);
823 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x00);
824 1.1 chopps WSeq(ba, SEQ_ID_PRIM_HOST_OFF_HI, 0x00);
825 1.1 chopps WSeq(ba, SEQ_ID_PRIM_HOST_OFF_HI, 0x00);
826 1.1 chopps WSeq(ba, SEQ_ID_LINEAR_0, 0x4a);
827 1.1 chopps WSeq(ba, SEQ_ID_LINEAR_1, 0x00);
828 1.1 chopps
829 1.1 chopps WSeq(ba, SEQ_ID_SEC_HOST_OFF_HI, 0x00);
830 1.1 chopps WSeq(ba, SEQ_ID_SEC_HOST_OFF_LO, 0x00);
831 1.1 chopps WSeq(ba, SEQ_ID_EXTENDED_MEM_ENA, 0x3 | 0x4 | 0x10 | 0x40);
832 1.1 chopps WSeq(ba, SEQ_ID_EXT_CLOCK_MODE, 0x10 | (FW & 0x0f));
833 1.1 chopps WSeq(ba, SEQ_ID_EXT_VIDEO_ADDR, 0x03);
834 1.1 chopps if (md->DEP == 4) {
835 1.1 chopps /* 8bit pixel, no gfx byte path */
836 1.1 chopps WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x00);
837 1.32 aymeric }
838 1.32 aymeric else if (md->DEP == 8) {
839 1.1 chopps /* 8bit pixel, gfx byte path */
840 1.1 chopps WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x01);
841 1.32 aymeric }
842 1.32 aymeric else if (md->DEP == 16) {
843 1.1 chopps /* 16bit pixel, gfx byte path */
844 1.1 chopps WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x11);
845 1.1 chopps }
846 1.32 aymeric else if (md->DEP == 24) {
847 1.32 aymeric /* 24bit pixel, gfx byte path */
848 1.32 aymeric WSeq(ba, SEQ_ID_EXT_PIXEL_CNTL, 0x21);
849 1.32 aymeric }
850 1.1 chopps WSeq(ba, SEQ_ID_BUS_WIDTH_FEEDB, 0x04);
851 1.1 chopps WSeq(ba, SEQ_ID_COLOR_EXP_WFG, 0x01);
852 1.1 chopps WSeq(ba, SEQ_ID_COLOR_EXP_WBG, 0x00);
853 1.1 chopps WSeq(ba, SEQ_ID_EXT_RW_CONTROL, 0x00);
854 1.1 chopps WSeq(ba, SEQ_ID_MISC_FEATURE_SEL, (0x51 | (clksel & 8)));
855 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_CNTL, 0x40);
856 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_MATCH0, 0x00);
857 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_MATCH1, 0x00);
858 1.1 chopps WSeq(ba, SEQ_ID_COLOR_KEY_MATCH2, 0x00);
859 1.1 chopps WSeq(ba, SEQ_ID_CRC_CONTROL, 0x00);
860 1.1 chopps WSeq(ba, SEQ_ID_PERF_SELECT, 0x10);
861 1.1 chopps WSeq(ba, SEQ_ID_ACM_APERTURE_1, 0x00);
862 1.1 chopps WSeq(ba, SEQ_ID_ACM_APERTURE_2, 0x30);
863 1.1 chopps WSeq(ba, SEQ_ID_ACM_APERTURE_3, 0x00);
864 1.26 is WSeq(ba, SEQ_ID_MEMORY_MAP_CNTL, 0x03); /* was 7, but stupid cursor */
865 1.1 chopps
866 1.1 chopps WCrt(ba, CRT_ID_END_VER_RETR, (md->VSE & 0xf) | 0x20);
867 1.1 chopps WCrt(ba, CRT_ID_HOR_TOTAL, md->HT & 0xff);
868 1.1 chopps WCrt(ba, CRT_ID_HOR_DISP_ENA_END, (HDE-1) & 0xff);
869 1.1 chopps WCrt(ba, CRT_ID_START_HOR_BLANK, md->HBS & 0xff);
870 1.1 chopps WCrt(ba, CRT_ID_END_HOR_BLANK, (md->HBE & 0x1f) | 0x80);
871 1.1 chopps
872 1.1 chopps WCrt(ba, CRT_ID_START_HOR_RETR, md->HSS & 0xff);
873 1.1 chopps WCrt(ba, CRT_ID_END_HOR_RETR,
874 1.1 chopps (md->HSE & 0x1f) |
875 1.1 chopps ((md->HBE & 0x20)/ 0x20 * 0x80));
876 1.1 chopps WCrt(ba, CRT_ID_VER_TOTAL, (md->VT & 0xff));
877 1.1 chopps WCrt(ba, CRT_ID_OVERFLOW,
878 1.1 chopps ((md->VSS & 0x200) / 0x200 * 0x80) |
879 1.1 chopps ((VDE & 0x200) / 0x200 * 0x40) |
880 1.1 chopps ((md->VT & 0x200) / 0x200 * 0x20) |
881 1.1 chopps 0x10 |
882 1.1 chopps ((md->VBS & 0x100) / 0x100 * 8) |
883 1.1 chopps ((md->VSS & 0x100) / 0x100 * 4) |
884 1.1 chopps ((VDE & 0x100) / 0x100 * 2) |
885 1.1 chopps ((md->VT & 0x100) / 0x100));
886 1.1 chopps WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
887 1.1 chopps
888 1.1 chopps if (md->DEP == 4) {
889 1.1 chopps WCrt(ba, CRT_ID_MAX_SCAN_LINE,
890 1.1 chopps ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80) |
891 1.1 chopps 0x40 |
892 1.1 chopps ((md->VBS & 0x200)/0x200*0x20) |
893 1.1 chopps ((md->FY-1) & 0x1f));
894 1.1 chopps } else {
895 1.1 chopps WCrt(ba, CRT_ID_MAX_SCAN_LINE,
896 1.1 chopps ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80) |
897 1.1 chopps 0x40 |
898 1.1 chopps ((md->VBS & 0x200)/0x200*0x20) |
899 1.1 chopps (0 & 0x1f));
900 1.1 chopps }
901 1.1 chopps
902 1.1 chopps /* I prefer "_" cursor to "block" cursor.. */
903 1.1 chopps #if 1
904 1.1 chopps WCrt(ba, CRT_ID_CURSOR_START, (md->FY & 0x1f) - 2);
905 1.1 chopps WCrt(ba, CRT_ID_CURSOR_END, (md->FY & 0x1f) - 1);
906 1.1 chopps #else
907 1.1 chopps WCrt(ba, CRT_ID_CURSOR_START, 0x00);
908 1.1 chopps WCrt(ba, CRT_ID_CURSOR_END, md->FY & 0x1f);
909 1.1 chopps #endif
910 1.1 chopps
911 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
912 1.1 chopps WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
913 1.1 chopps
914 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
915 1.1 chopps WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
916 1.1 chopps
917 1.1 chopps WCrt(ba, CRT_ID_START_VER_RETR, md->VSS & 0xff);
918 1.1 chopps WCrt(ba, CRT_ID_END_VER_RETR, (md->VSE & 0xf) | 0x80 | 0x20);
919 1.1 chopps WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE & 0xff);
920 1.1 chopps
921 1.32 aymeric if (md->DEP == 4) {
922 1.32 aymeric WCrt(ba, CRT_ID_OFFSET, (HDE / 2) & 0xff );
923 1.32 aymeric }
924 1.32 aymeric /* all gfx-modes are in byte-mode, means values are multiplied by 8 */
925 1.32 aymeric else if (md->DEP == 8) {
926 1.32 aymeric WCrt(ba, CRT_ID_OFFSET, (md->TX / 8) & 0xff );
927 1.32 aymeric } else if (md->DEP == 16) {
928 1.32 aymeric WCrt(ba, CRT_ID_OFFSET, (md->TX / 4) & 0xff );
929 1.32 aymeric } else {
930 1.32 aymeric WCrt(ba, CRT_ID_OFFSET, (md->TX * 3 / 8) & 0xff );
931 1.32 aymeric }
932 1.1 chopps
933 1.1 chopps WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->FY-1) & 0x1f);
934 1.1 chopps WCrt(ba, CRT_ID_START_VER_BLANK, md->VBS & 0xff);
935 1.1 chopps WCrt(ba, CRT_ID_END_VER_BLANK, md->VBE & 0xff);
936 1.1 chopps WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3);
937 1.1 chopps WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
938 1.1 chopps
939 1.1 chopps WCrt(ba, CRT_ID_EXT_HOR_TIMING1,
940 1.1 chopps 0 | 0x20 |
941 1.1 chopps ((md->FLG & MDF_LACE) / MDF_LACE * 0x10) |
942 1.1 chopps ((md->HT & 0x100) / 0x100) |
943 1.1 chopps (((HDE-1) & 0x100) / 0x100 * 2) |
944 1.1 chopps ((md->HBS & 0x100) / 0x100 * 4) |
945 1.1 chopps ((md->HSS & 0x100) / 0x100 * 8));
946 1.1 chopps
947 1.32 aymeric if (md->DEP == 4)
948 1.32 aymeric WCrt(ba, CRT_ID_EXT_START_ADDR,
949 1.32 aymeric (((HDE / 2) & 0x100)/0x100 * 16));
950 1.32 aymeric else if (md->DEP == 8)
951 1.32 aymeric WCrt(ba, CRT_ID_EXT_START_ADDR,
952 1.32 aymeric (((md->TX / 8) & 0x100)/0x100 * 16));
953 1.32 aymeric else if (md->DEP == 16)
954 1.32 aymeric WCrt(ba, CRT_ID_EXT_START_ADDR,
955 1.32 aymeric (((md->TX / 4) & 0x100)/0x100 * 16));
956 1.32 aymeric else
957 1.32 aymeric WCrt(ba, CRT_ID_EXT_START_ADDR,
958 1.32 aymeric (((md->TX * 3 / 8) & 0x100)/0x100 * 16));
959 1.1 chopps
960 1.1 chopps WCrt(ba, CRT_ID_EXT_HOR_TIMING2,
961 1.1 chopps ((md->HT & 0x200)/ 0x200) |
962 1.32 aymeric (((HDE-1) & 0x200)/ 0x200 * 2 ) |
963 1.32 aymeric ((md->HBS & 0x200)/ 0x200 * 4 ) |
964 1.32 aymeric ((md->HSS & 0x200)/ 0x200 * 8 ) |
965 1.32 aymeric ((md->HBE & 0xc0) / 0x40 * 16 ) |
966 1.32 aymeric ((md->HSE & 0x60) / 0x20 * 64));
967 1.1 chopps
968 1.1 chopps WCrt(ba, CRT_ID_EXT_VER_TIMING,
969 1.1 chopps ((md->VSE & 0x10) / 0x10 * 0x80 ) |
970 1.1 chopps ((md->VBE & 0x300)/ 0x100 * 0x20 ) |
971 1.1 chopps 0x10 |
972 1.1 chopps ((md->VSS & 0x400)/ 0x400 * 8 ) |
973 1.1 chopps ((md->VBS & 0x400)/ 0x400 * 4 ) |
974 1.1 chopps ((VDE & 0x400)/ 0x400 * 2 ) |
975 1.1 chopps ((md->VT & 0x400)/ 0x400));
976 1.1 chopps WCrt(ba, CRT_ID_MONITOR_POWER, 0x00);
977 1.1 chopps
978 1.1 chopps {
979 1.17 veego unsigned short tmp = rh_CompFQ(md->FQ);
980 1.1 chopps WPLL(ba, 2 , tmp);
981 1.32 aymeric tmp = rh_CompFQ(rh_memclk);
982 1.1 chopps WPLL(ba,10 , tmp);
983 1.1 chopps WPLL(ba,14 , 0x22);
984 1.1 chopps }
985 1.1 chopps
986 1.1 chopps WGfx(ba, GCT_ID_SET_RESET, 0x00);
987 1.1 chopps WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
988 1.1 chopps WGfx(ba, GCT_ID_COLOR_COMPARE, 0x00);
989 1.1 chopps WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
990 1.1 chopps WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
991 1.1 chopps WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
992 1.1 chopps if (md->DEP == 4)
993 1.1 chopps WGfx(ba, GCT_ID_MISC, 0x04);
994 1.1 chopps else
995 1.1 chopps WGfx(ba, GCT_ID_MISC, 0x05);
996 1.1 chopps WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
997 1.1 chopps WGfx(ba, GCT_ID_BITMASK, 0xff);
998 1.1 chopps
999 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
1000 1.1 chopps WAttr(ba, ACT_ID_PALETTE0 , 0x00);
1001 1.1 chopps WAttr(ba, ACT_ID_PALETTE1 , 0x01);
1002 1.1 chopps WAttr(ba, ACT_ID_PALETTE2 , 0x02);
1003 1.1 chopps WAttr(ba, ACT_ID_PALETTE3 , 0x03);
1004 1.1 chopps WAttr(ba, ACT_ID_PALETTE4 , 0x04);
1005 1.1 chopps WAttr(ba, ACT_ID_PALETTE5 , 0x05);
1006 1.1 chopps WAttr(ba, ACT_ID_PALETTE6 , 0x06);
1007 1.1 chopps WAttr(ba, ACT_ID_PALETTE7 , 0x07);
1008 1.1 chopps WAttr(ba, ACT_ID_PALETTE8 , 0x08);
1009 1.1 chopps WAttr(ba, ACT_ID_PALETTE9 , 0x09);
1010 1.1 chopps WAttr(ba, ACT_ID_PALETTE10, 0x0a);
1011 1.1 chopps WAttr(ba, ACT_ID_PALETTE11, 0x0b);
1012 1.1 chopps WAttr(ba, ACT_ID_PALETTE12, 0x0c);
1013 1.1 chopps WAttr(ba, ACT_ID_PALETTE13, 0x0d);
1014 1.1 chopps WAttr(ba, ACT_ID_PALETTE14, 0x0e);
1015 1.1 chopps WAttr(ba, ACT_ID_PALETTE15, 0x0f);
1016 1.1 chopps
1017 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
1018 1.1 chopps if (md->DEP == 4)
1019 1.1 chopps WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x08);
1020 1.1 chopps else
1021 1.1 chopps WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x09);
1022 1.1 chopps
1023 1.1 chopps WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
1024 1.1 chopps WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
1025 1.1 chopps WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
1026 1.1 chopps WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
1027 1.1 chopps
1028 1.1 chopps vgar(ba, ACT_ADDRESS_RESET);
1029 1.1 chopps vgaw(ba, ACT_ADDRESS_W, 0x20);
1030 1.1 chopps
1031 1.1 chopps vgaw(ba, VDAC_MASK, 0xff);
1032 1.32 aymeric /* probably some PLL timing stuff here. The value
1033 1.32 aymeric for 24bit was found by trial&error :-) */
1034 1.32 aymeric if (md->DEP < 16) {
1035 1.32 aymeric vgaw(ba, 0x83c6, ((0 & 7) << 5) );
1036 1.32 aymeric }
1037 1.32 aymeric else if (md->DEP == 16) {
1038 1.1 chopps /* well... */
1039 1.32 aymeric vgaw(ba, 0x83c6, ((3 & 7) << 5) );
1040 1.32 aymeric }
1041 1.32 aymeric else if (md->DEP == 24) {
1042 1.32 aymeric vgaw(ba, 0x83c6, 0xe0);
1043 1.32 aymeric }
1044 1.1 chopps vgaw(ba, VDAC_ADDRESS_W, 0x00);
1045 1.1 chopps
1046 1.1 chopps if (md->DEP < 16) {
1047 1.1 chopps short x = 256-17;
1048 1.1 chopps unsigned char cl = 16;
1049 1.1 chopps RZ3LoadPalette(gp, md->PAL, 0, 16);
1050 1.1 chopps do {
1051 1.1 chopps vgaw(ba, VDAC_DATA, (cl >> 2));
1052 1.1 chopps vgaw(ba, VDAC_DATA, (cl >> 2));
1053 1.1 chopps vgaw(ba, VDAC_DATA, (cl >> 2));
1054 1.1 chopps cl++;
1055 1.1 chopps } while (x-- > 0);
1056 1.1 chopps }
1057 1.1 chopps
1058 1.1 chopps if (md->DEP == 4) {
1059 1.1 chopps {
1060 1.1 chopps struct grf_bitblt bb = {
1061 1.1 chopps GRFBBOPset,
1062 1.1 chopps 0, 0,
1063 1.1 chopps 0, 0,
1064 1.1 chopps md->TX*4, 2*md->TY,
1065 1.1 chopps EMPTY_ALPHA
1066 1.1 chopps };
1067 1.1 chopps RZ3BitBlit(gp, &bb);
1068 1.1 chopps }
1069 1.1 chopps
1070 1.1 chopps c = (unsigned short *)(ba + LM_OFFSET);
1071 1.1 chopps c += 2 * md->FLo*32;
1072 1.1 chopps c += 1;
1073 1.1 chopps f = md->FData;
1074 1.1 chopps for (z = md->FLo; z <= md->FHi; z++) {
1075 1.1 chopps short y = md->FY-1;
1076 1.1 chopps if (md->FX > 8){
1077 1.1 chopps do {
1078 1.1 chopps *c = *((const unsigned short *)f);
1079 1.1 chopps c += 2;
1080 1.1 chopps f += 2;
1081 1.1 chopps } while (y-- > 0);
1082 1.1 chopps } else {
1083 1.1 chopps do {
1084 1.1 chopps *c = (*f++) << 8;
1085 1.1 chopps c += 2;
1086 1.1 chopps } while (y-- > 0);
1087 1.1 chopps }
1088 1.1 chopps
1089 1.1 chopps c += 2 * (32-md->FY);
1090 1.1 chopps }
1091 1.1 chopps {
1092 1.32 aymeric unsigned long *pt = (unsigned long *)
1093 1.32 aymeric (ba + LM_OFFSET + PAT_MEM_OFF);
1094 1.1 chopps unsigned long tmp = 0xffff0000;
1095 1.1 chopps *pt++ = tmp;
1096 1.1 chopps *pt = tmp;
1097 1.1 chopps }
1098 1.1 chopps
1099 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 3);
1100 1.1 chopps
1101 1.1 chopps c = (unsigned short *)(ba + LM_OFFSET);
1102 1.1 chopps c += (md->TX-6)*2;
1103 1.1 chopps {
1104 1.1 chopps /* it's show-time :-) */
1105 1.1 chopps static unsigned short init_msg[6] = {
1106 1.1 chopps 0x520a, 0x450b, 0x540c, 0x490d, 0x4e0e, 0x410f
1107 1.1 chopps };
1108 1.1 chopps unsigned short * m = init_msg;
1109 1.1 chopps short x = 5;
1110 1.1 chopps do {
1111 1.1 chopps *c = *m++;
1112 1.1 chopps c += 2;
1113 1.1 chopps } while (x-- > 0);
1114 1.1 chopps }
1115 1.1 chopps
1116 1.1 chopps return(1);
1117 1.1 chopps } else if (md->DEP == 8) {
1118 1.1 chopps struct grf_bitblt bb = {
1119 1.1 chopps GRFBBOPset,
1120 1.1 chopps 0, 0,
1121 1.1 chopps 0, 0,
1122 1.1 chopps md->TX, md->TY,
1123 1.1 chopps 0x0000
1124 1.1 chopps };
1125 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
1126 1.1 chopps
1127 1.1 chopps RZ3BitBlit(gp, &bb);
1128 1.1 chopps
1129 1.32 aymeric gi->gd_fbx = 0;
1130 1.32 aymeric gi->gd_fby = 0;
1131 1.32 aymeric
1132 1.1 chopps return(1);
1133 1.1 chopps } else if (md->DEP == 16) {
1134 1.1 chopps struct grf_bitblt bb = {
1135 1.1 chopps GRFBBOPset,
1136 1.1 chopps 0, 0,
1137 1.1 chopps 0, 0,
1138 1.1 chopps md->TX, md->TY,
1139 1.1 chopps 0x0000
1140 1.1 chopps };
1141 1.1 chopps WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
1142 1.1 chopps
1143 1.1 chopps RZ3BitBlit16(gp, &bb);
1144 1.1 chopps
1145 1.32 aymeric gi->gd_fbx = 0;
1146 1.32 aymeric gi->gd_fby = 0;
1147 1.32 aymeric
1148 1.1 chopps return(1);
1149 1.32 aymeric } else if (md->DEP == 24) {
1150 1.32 aymeric struct grf_bitblt bb = {
1151 1.32 aymeric GRFBBOPset,
1152 1.32 aymeric 0, 0,
1153 1.32 aymeric 0, 0,
1154 1.32 aymeric md->TX, md->TY,
1155 1.32 aymeric 0x0000
1156 1.32 aymeric };
1157 1.32 aymeric WSeq(ba, SEQ_ID_MAP_MASK, 0x0f );
1158 1.32 aymeric
1159 1.32 aymeric RZ3BitBlit24(gp, &bb );
1160 1.32 aymeric
1161 1.32 aymeric gi->gd_fbx = 0;
1162 1.32 aymeric gi->gd_fby = 0;
1163 1.32 aymeric
1164 1.32 aymeric return 1;
1165 1.1 chopps } else
1166 1.1 chopps return(0);
1167 1.1 chopps }
1168 1.1 chopps
1169 1.1 chopps /* standard-palette definition */
1170 1.1 chopps
1171 1.1 chopps unsigned char RZ3StdPalette[16*3] = {
1172 1.1 chopps /* R G B */
1173 1.1 chopps 0, 0, 0,
1174 1.1 chopps 192,192,192,
1175 1.1 chopps 128, 0, 0,
1176 1.1 chopps 0,128, 0,
1177 1.1 chopps 0, 0,128,
1178 1.1 chopps 128,128, 0,
1179 1.1 chopps 0,128,128,
1180 1.1 chopps 128, 0,128,
1181 1.1 chopps 64, 64, 64, /* the higher 8 colors have more intensity for */
1182 1.1 chopps 255,255,255, /* compatibility with standard attributes */
1183 1.1 chopps 255, 0, 0,
1184 1.1 chopps 0,255, 0,
1185 1.1 chopps 0, 0,255,
1186 1.1 chopps 255,255, 0,
1187 1.1 chopps 0,255,255,
1188 1.1 chopps 255, 0,255
1189 1.1 chopps };
1190 1.1 chopps
1191 1.1 chopps /*
1192 1.1 chopps * The following structures are examples for monitor-definitions. To make one
1193 1.1 chopps * of your own, first use "DefineMonitor" and create the 8-bit or 16-bit
1194 1.1 chopps * monitor-mode of your dreams. Then save it, and make a structure from the
1195 1.1 chopps * values provided in the file DefineMonitor stored - the labels in the comment
1196 1.1 chopps * above the structure definition show where to put what value.
1197 1.1 chopps *
1198 1.1 chopps * If you want to use your definition for the text-mode, you'll need to adapt
1199 1.1 chopps * your 8-bit monitor-definition to the font you want to use. Be FX the width of
1200 1.1 chopps * the font, then the following modifications have to be applied to your values:
1201 1.1 chopps *
1202 1.1 chopps * HBS = (HBS * 4) / FX
1203 1.1 chopps * HSS = (HSS * 4) / FX
1204 1.1 chopps * HSE = (HSE * 4) / FX
1205 1.1 chopps * HBE = (HBE * 4) / FX
1206 1.1 chopps * HT = (HT * 4) / FX
1207 1.1 chopps *
1208 1.1 chopps * Make sure your maximum width (MW) and height (MH) are even multiples of
1209 1.1 chopps * the fonts' width and height.
1210 1.1 chopps *
1211 1.1 chopps * You may use definitons created by the old DefineMonitor, but you'll get
1212 1.1 chopps * better results with the new DefineMonitor supplied along with the Retin Z3.
1213 1.1 chopps */
1214 1.1 chopps
1215 1.1 chopps /*
1216 1.1 chopps * FQ FLG MW MH HBS HSS HSE HBE HT VBS VSS VSE VBE VT
1217 1.1 chopps * Depth, PAL, TX, TY, XY,FontX, FontY, FontData, FLo, Fhi
1218 1.1 chopps */
1219 1.7 chopps #ifdef KFONT_8X11
1220 1.7 chopps #define KERNEL_FONT kernel_font_8x11
1221 1.7 chopps #define FY 11
1222 1.7 chopps #define FX 8
1223 1.7 chopps #else
1224 1.7 chopps #define KERNEL_FONT kernel_font_8x8
1225 1.7 chopps #define FY 8
1226 1.7 chopps #define FX 8
1227 1.7 chopps #endif
1228 1.7 chopps
1229 1.7 chopps
1230 1.1 chopps static struct MonDef monitor_defs[] = {
1231 1.1 chopps /* Text-mode definitions */
1232 1.1 chopps
1233 1.1 chopps /* horizontal 31.5 kHz */
1234 1.1 chopps { 50000000, 28, 640, 512, 81, 86, 93, 98, 95, 513, 513, 521, 535, 535,
1235 1.7 chopps 4, RZ3StdPalette, 80, 64, 5120, FX, FY, KERNEL_FONT, 32, 255},
1236 1.1 chopps
1237 1.1 chopps /* horizontal 38kHz */
1238 1.1 chopps { 75000000, 28, 768, 600, 97, 99,107,120,117, 601, 615, 625, 638, 638,
1239 1.7 chopps 4, RZ3StdPalette, 96, 75, 7200, FX, FY, KERNEL_FONT, 32, 255},
1240 1.1 chopps
1241 1.1 chopps /* horizontal 64kHz */
1242 1.1 chopps { 50000000, 24, 768, 600, 97,104,112,122,119, 601, 606, 616, 628, 628,
1243 1.7 chopps 4, RZ3StdPalette, 96, 75, 7200, FX, FY, KERNEL_FONT, 32, 255},
1244 1.1 chopps
1245 1.1 chopps /* 8-bit gfx-mode definitions */
1246 1.1 chopps
1247 1.7 chopps /* IMPORTANT: the "logical" screen size can be up to 2048x2048 pixels,
1248 1.7 chopps independent from the "physical" screen size. If your code does NOT
1249 1.7 chopps support panning, please adjust the "logical" screen sizes below to
1250 1.7 chopps match the physical ones
1251 1.1 chopps */
1252 1.1 chopps
1253 1.21 veego #ifdef RH_HARDWARECURSOR
1254 1.21 veego
1255 1.1 chopps /* 640 x 480, 8 Bit, 31862 Hz, 63 Hz */
1256 1.1 chopps { 26000000, 0, 640, 480, 161,175,188,200,199, 481, 483, 491, 502, 502,
1257 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1258 1.1 chopps /* This is the logical ^ ^ screen size */
1259 1.1 chopps
1260 1.1 chopps /* 640 x 480, 8 Bit, 38366 Hz, 76 Hz */
1261 1.1 chopps { 31000000, 0, 640, 480, 161,169,182,198,197, 481, 482, 490, 502, 502,
1262 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1263 1.1 chopps
1264 1.1 chopps /* 800 x 600, 8 Bit, 38537 Hz, 61 Hz */
1265 1.1 chopps { 39000000, 0, 800, 600, 201,211,227,249,248, 601, 603, 613, 628, 628,
1266 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1267 1.1 chopps
1268 1.1 chopps /* 1024 x 768, 8 Bit, 63862 Hz, 79 Hz */
1269 1.1 chopps { 82000000, 0, 1024, 768, 257,257,277,317,316, 769, 771, 784, 804, 804,
1270 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1271 1.1 chopps
1272 1.1 chopps /* 1120 x 896, 8 Bit, 64000 Hz, 69 Hz */
1273 1.1 chopps { 97000000, 0, 1120, 896, 281,283,306,369,368, 897, 898, 913, 938, 938,
1274 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1275 1.1 chopps
1276 1.1 chopps /* 1152 x 910, 8 Bit, 76177 Hz, 79 Hz */
1277 1.1 chopps {110000000, 0, 1152, 910, 289,310,333,357,356, 911, 923, 938, 953, 953,
1278 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1279 1.1 chopps
1280 1.1 chopps /* 1184 x 848, 8 Bit, 73529 Hz, 82 Hz */
1281 1.1 chopps {110000000, 0, 1184, 848, 297,319,342,370,369, 849, 852, 866, 888, 888,
1282 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1283 1.1 chopps
1284 1.1 chopps /* 1280 x 1024, 8 Bit, 64516 Hz, 60 Hz */
1285 1.1 chopps {104000000, 0, 1280,1024, 321,323,348,399,398,1025,1026,1043,1073,1073,
1286 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1287 1.1 chopps
1288 1.21 veego /*
1289 1.21 veego * WARNING: THE FOLLOWING MONITOR MODE EXCEEDS THE 110-MHz LIMIT THE PROCESSOR
1290 1.21 veego * HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
1291 1.21 veego * MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)!
1292 1.21 veego */
1293 1.1 chopps /* 1280 x 1024, 8 Bit, 75436 Hz, 70 Hz */
1294 1.1 chopps {121000000, 0, 1280,1024, 321,322,347,397,396,1025,1026,1043,1073,1073,
1295 1.7 chopps 8, RZ3StdPalette,1280,1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1296 1.1 chopps
1297 1.1 chopps
1298 1.1 chopps /* 16-bit gfx-mode definitions */
1299 1.1 chopps
1300 1.1 chopps /* 640 x 480, 16 Bit, 31795 Hz, 63 Hz */
1301 1.1 chopps { 51000000, 0, 640, 480, 321,344,369,397,396, 481, 482, 490, 502, 502,
1302 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1303 1.1 chopps
1304 1.1 chopps /* 800 x 600, 16 Bit, 38500 Hz, 61 Hz */
1305 1.1 chopps { 77000000, 0, 800, 600, 401,418,449,496,495, 601, 602, 612, 628, 628,
1306 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1307 1.1 chopps
1308 1.1 chopps /* 1024 x 768, 16 Bit, 42768 Hz, 53 Hz */
1309 1.1 chopps {110000000, 0, 1024, 768, 513,514,554,639,638, 769, 770, 783, 804, 804,
1310 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1311 1.1 chopps
1312 1.1 chopps /* 864 x 648, 16 Bit, 50369 Hz, 74 Hz */
1313 1.1 chopps {109000000, 0, 864, 648, 433,434,468,537,536, 649, 650, 661, 678, 678,
1314 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1315 1.1 chopps
1316 1.21 veego /*
1317 1.21 veego * WARNING: THE FOLLOWING MONITOR MODE EXCEEDS THE 110-MHz LIMIT THE PROCESSOR
1318 1.21 veego * HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
1319 1.21 veego * MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)!
1320 1.21 veego */
1321 1.1 chopps /* 1024 x 768, 16 Bit, 48437 Hz, 60 Hz */
1322 1.1 chopps {124000000, 0, 1024, 768, 513,537,577,636,635, 769, 770, 783, 804, 804,
1323 1.7 chopps 16, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1324 1.7 chopps
1325 1.7 chopps
1326 1.7 chopps /* 24-bit gfx-mode definitions */
1327 1.7 chopps
1328 1.7 chopps /* 320 x 200, 24 Bit, 35060 Hz, 83 Hz d */
1329 1.7 chopps { 46000000, 1, 320, 200, 241,268,287,324,323, 401, 405, 412, 418, 418,
1330 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1331 1.7 chopps
1332 1.7 chopps /* 640 x 400, 24 Bit, 31404 Hz, 75 Hz */
1333 1.7 chopps { 76000000, 0, 640, 400, 481,514,552,601,600, 401, 402, 409, 418, 418,
1334 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1335 1.7 chopps
1336 1.7 chopps /* 724 x 482, 24 Bit, 36969 Hz, 73 Hz */
1337 1.7 chopps {101000000, 0, 724, 482, 544,576,619,682,678, 483, 487, 495, 495, 504,
1338 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1339 1.7 chopps
1340 1.7 chopps /* 800 x 600, 24 Bit, 37826 Hz, 60 Hz */
1341 1.7 chopps {110000000, 0, 800, 600, 601,602,647,723,722, 601, 602, 612, 628, 628,
1342 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1343 1.7 chopps
1344 1.7 chopps /* 800 x 600, 24 Bit, 43824 Hz, 69 Hz */
1345 1.7 chopps {132000000, 0, 800, 600, 601,641,688,749,748, 601, 611, 621, 628, 628,
1346 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1347 1.7 chopps
1348 1.7 chopps /*1024 x 768, 24 Bit, 32051 Hz, 79 Hz i */
1349 1.7 chopps {110000000, 2, 1024, 768, 769,770,824,854,853, 385, 386, 392, 401, 401,
1350 1.7 chopps 24, 0,1280, 1024, 7200, FX, FY, KERNEL_FONT, 32, 255},
1351 1.21 veego
1352 1.21 veego #else /* RH_HARDWARECURSOR */
1353 1.21 veego
1354 1.21 veego /* 640 x 480, 8 Bit, 31862 Hz, 63 Hz */
1355 1.21 veego { 26000000, 0, 640, 480, 161,175,188,200,199, 481, 483, 491, 502, 502,
1356 1.21 veego 8, RZ3StdPalette, 640, 480, 5120, FX, FY, KERNEL_FONT, 32, 255},
1357 1.21 veego /* This is the logical ^ ^ screen size */
1358 1.21 veego
1359 1.21 veego /* 640 x 480, 8 Bit, 38366 Hz, 76 Hz */
1360 1.21 veego { 31000000, 0, 640, 480, 161,169,182,198,197, 481, 482, 490, 502, 502,
1361 1.21 veego 8, RZ3StdPalette, 640, 480, 5120, FX, FY, KERNEL_FONT, 32, 255},
1362 1.21 veego
1363 1.21 veego /* 800 x 600, 8 Bit, 38537 Hz, 61 Hz */
1364 1.21 veego { 39000000, 0, 800, 600, 201,211,227,249,248, 601, 603, 613, 628, 628,
1365 1.21 veego 8, RZ3StdPalette, 800, 600, 5120, FX, FY, KERNEL_FONT, 32, 255},
1366 1.21 veego
1367 1.21 veego /* 1024 x 768, 8 Bit, 63862 Hz, 79 Hz */
1368 1.21 veego { 82000000, 0, 1024, 768, 257,257,277,317,316, 769, 771, 784, 804, 804,
1369 1.21 veego 8, RZ3StdPalette, 1024, 768, 5120, FX, FY, KERNEL_FONT, 32, 255},
1370 1.21 veego
1371 1.21 veego /* 1120 x 896, 8 Bit, 64000 Hz, 69 Hz */
1372 1.21 veego { 97000000, 0, 1120, 896, 281,283,306,369,368, 897, 898, 913, 938, 938,
1373 1.21 veego 8, RZ3StdPalette, 1120, 896, 5120, FX, FY, KERNEL_FONT, 32, 255},
1374 1.21 veego
1375 1.21 veego /* 1152 x 910, 8 Bit, 76177 Hz, 79 Hz */
1376 1.21 veego {110000000, 0, 1152, 910, 289,310,333,357,356, 911, 923, 938, 953, 953,
1377 1.21 veego 8, RZ3StdPalette, 1152, 910, 5120, FX, FY, KERNEL_FONT, 32, 255},
1378 1.21 veego
1379 1.21 veego /* 1184 x 848, 8 Bit, 73529 Hz, 82 Hz */
1380 1.21 veego {110000000, 0, 1184, 848, 297,319,342,370,369, 849, 852, 866, 888, 888,
1381 1.21 veego 8, RZ3StdPalette, 1184, 848, 5120, FX, FY, KERNEL_FONT, 32, 255},
1382 1.21 veego
1383 1.21 veego /* 1280 x 1024, 8 Bit, 64516 Hz, 60 Hz */
1384 1.21 veego {104000000, 0, 1280,1024, 321,323,348,399,398,1025,1026,1043,1073,1073,
1385 1.21 veego 8, RZ3StdPalette, 1280, 1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1386 1.21 veego
1387 1.21 veego /*
1388 1.21 veego * WARNING: THE FOLLOWING MONITOR MODE EXCEEDS THE 110-MHz LIMIT THE PROCESSOR
1389 1.21 veego * HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
1390 1.21 veego * MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)!
1391 1.21 veego */
1392 1.21 veego /* 1280 x 1024, 8 Bit, 75436 Hz, 70 Hz */
1393 1.21 veego {121000000, 0, 1280,1024, 321,322,347,397,396,1025,1026,1043,1073,1073,
1394 1.21 veego 8, RZ3StdPalette, 1280, 1024, 5120, FX, FY, KERNEL_FONT, 32, 255},
1395 1.21 veego
1396 1.21 veego
1397 1.21 veego /* 16-bit gfx-mode definitions */
1398 1.21 veego
1399 1.21 veego /* 640 x 480, 16 Bit, 31795 Hz, 63 Hz */
1400 1.21 veego { 51000000, 0, 640, 480, 321,344,369,397,396, 481, 482, 490, 502, 502,
1401 1.21 veego 16, 0, 640, 480, 7200, FX, FY, KERNEL_FONT, 32, 255},
1402 1.21 veego
1403 1.21 veego /* 800 x 600, 16 Bit, 38500 Hz, 61 Hz */
1404 1.21 veego { 77000000, 0, 800, 600, 401,418,449,496,495, 601, 602, 612, 628, 628,
1405 1.21 veego 16, 0, 800, 600, 7200, FX, FY, KERNEL_FONT, 32, 255},
1406 1.21 veego
1407 1.21 veego /* 1024 x 768, 16 Bit, 42768 Hz, 53 Hz */
1408 1.21 veego {110000000, 0, 1024, 768, 513,514,554,639,638, 769, 770, 783, 804, 804,
1409 1.21 veego 16, 0, 1024, 768, 7200, FX, FY, KERNEL_FONT, 32, 255},
1410 1.21 veego
1411 1.21 veego /* 864 x 648, 16 Bit, 50369 Hz, 74 Hz */
1412 1.21 veego {109000000, 0, 864, 648, 433,434,468,537,536, 649, 650, 661, 678, 678,
1413 1.21 veego 16, 0, 864, 648, 7200, FX, FY, KERNEL_FONT, 32, 255},
1414 1.21 veego
1415 1.21 veego /*
1416 1.21 veego * WARNING: THE FOLLOWING MONITOR MODE EXCEEDS THE 110-MHz LIMIT THE PROCESSOR
1417 1.21 veego * HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT
1418 1.21 veego * MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)!
1419 1.21 veego */
1420 1.21 veego /* 1024 x 768, 16 Bit, 48437 Hz, 60 Hz */
1421 1.21 veego {124000000, 0, 1024, 768, 513,537,577,636,635, 769, 770, 783, 804, 804,
1422 1.21 veego 16, 0, 1024, 768, 7200, FX, FY, KERNEL_FONT, 32, 255},
1423 1.21 veego
1424 1.21 veego
1425 1.21 veego /* 24-bit gfx-mode definitions */
1426 1.21 veego
1427 1.21 veego /* 320 x 200, 24 Bit, 35060 Hz, 83 Hz d */
1428 1.21 veego { 46000000, 1, 320, 200, 241,268,287,324,323, 401, 405, 412, 418, 418,
1429 1.21 veego 24, 0, 320, 200, 7200, FX, FY, KERNEL_FONT, 32, 255},
1430 1.21 veego
1431 1.21 veego /* 640 x 400, 24 Bit, 31404 Hz, 75 Hz */
1432 1.21 veego { 76000000, 0, 640, 400, 481,514,552,601,600, 401, 402, 409, 418, 418,
1433 1.21 veego 24, 0, 640, 400, 7200, FX, FY, KERNEL_FONT, 32, 255},
1434 1.21 veego
1435 1.21 veego /* 724 x 482, 24 Bit, 36969 Hz, 73 Hz */
1436 1.21 veego {101000000, 0, 724, 482, 544,576,619,682,678, 483, 487, 495, 495, 504,
1437 1.21 veego 24, 0, 724, 482, 7200, FX, FY, KERNEL_FONT, 32, 255},
1438 1.21 veego
1439 1.21 veego /* 800 x 600, 24 Bit, 37826 Hz, 60 Hz */
1440 1.21 veego {110000000, 0, 800, 600, 601,602,647,723,722, 601, 602, 612, 628, 628,
1441 1.21 veego 24, 0, 800, 600, 7200, FX, FY, KERNEL_FONT, 32, 255},
1442 1.21 veego
1443 1.32 aymeric /* 800 x 600, 24 Bit, 43824 Hz, 69 Hz */
1444 1.32 aymeric {132000000, 0, 800, 600, 601,641,688,749,748, 601, 611, 621, 628, 628,
1445 1.21 veego 24, 0, 800, 600, 7200, FX, FY, KERNEL_FONT, 32, 255},
1446 1.21 veego
1447 1.21 veego /*1024 x 768, 24 Bit, 32051 Hz, 79 Hz i */
1448 1.21 veego {110000000, 2, 1024, 768, 769,770,824,854,853, 385, 386, 392, 401, 401,
1449 1.21 veego 24, 0, 1024, 768, 7200, FX, FY, KERNEL_FONT, 32, 255},
1450 1.21 veego
1451 1.21 veego #endif /* RH_HARDWARECURSOR */
1452 1.1 chopps };
1453 1.7 chopps #undef KERNEL_FONT
1454 1.7 chopps #undef FX
1455 1.7 chopps #undef FY
1456 1.1 chopps
1457 1.1 chopps static const char *monitor_descr[] = {
1458 1.2 chopps #ifdef KFONT_8X11
1459 1.2 chopps "80x46 (640x506) 31.5kHz",
1460 1.2 chopps "96x54 (768x594) 38kHz",
1461 1.2 chopps "96x54 (768x594) 64kHz",
1462 1.2 chopps #else
1463 1.1 chopps "80x64 (640x512) 31.5kHz",
1464 1.1 chopps "96x75 (768x600) 38kHz",
1465 1.1 chopps "96x75 (768x600) 64kHz",
1466 1.2 chopps #endif
1467 1.1 chopps
1468 1.1 chopps "GFX-8 (640x480) 31.5kHz",
1469 1.1 chopps "GFX-8 (640x480) 38kHz",
1470 1.1 chopps "GFX-8 (800x600) 38.5kHz",
1471 1.1 chopps "GFX-8 (1024x768) 64kHz",
1472 1.1 chopps "GFX-8 (1120x896) 64kHz",
1473 1.1 chopps "GFX-8 (1152x910) 76kHz",
1474 1.1 chopps "GFX-8 (1182x848) 73kHz",
1475 1.1 chopps "GFX-8 (1280x1024) 64.5kHz",
1476 1.1 chopps "GFX-8 (1280x1024) 75.5kHz ***EXCEEDS CHIP LIMIT!!!***",
1477 1.1 chopps
1478 1.1 chopps "GFX-16 (640x480) 31.8kHz",
1479 1.1 chopps "GFX-16 (800x600) 38.5kHz",
1480 1.1 chopps "GFX-16 (1024x768) 42.8kHz",
1481 1.1 chopps "GFX-16 (864x648) 50kHz",
1482 1.1 chopps "GFX-16 (1024x768) 48.5kHz ***EXCEEDS CHIP LIMIT!!!***",
1483 1.7 chopps
1484 1.7 chopps "GFX-24 (320x200 d) 35kHz",
1485 1.7 chopps "GFX-24 (640x400) 31.4kHz",
1486 1.7 chopps "GFX-24 (724x482) 37kHz",
1487 1.7 chopps "GFX-24 (800x600) 38kHz",
1488 1.7 chopps "GFX-24 (800x600) 44kHz ***EXCEEDS CHIP LIMIT!!!***",
1489 1.7 chopps "GFX-24 (1024x768) 32kHz-i",
1490 1.1 chopps };
1491 1.1 chopps
1492 1.1 chopps int rh_mon_max = sizeof (monitor_defs)/sizeof (monitor_defs[0]);
1493 1.1 chopps
1494 1.1 chopps /* patchable */
1495 1.8 chopps int rh_default_mon = 0;
1496 1.8 chopps int rh_default_gfx = 4;
1497 1.1 chopps
1498 1.18 is static struct MonDef *current_mon; /* EVIL */
1499 1.1 chopps
1500 1.32 aymeric int rh_mode(struct grf_softc *, u_long, void *, u_long, int);
1501 1.32 aymeric void grfrhattach(struct device *, struct device *, void *);
1502 1.32 aymeric int grfrhprint(void *, const char *);
1503 1.32 aymeric int grfrhmatch(struct device *, struct cfdata *, void *);
1504 1.1 chopps
1505 1.13 mhitch struct cfattach grfrh_ca = {
1506 1.12 thorpej sizeof(struct grf_softc), grfrhmatch, grfrhattach
1507 1.1 chopps };
1508 1.1 chopps
1509 1.1 chopps static struct cfdata *cfdata;
1510 1.1 chopps
1511 1.1 chopps int
1512 1.32 aymeric grfrhmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
1513 1.1 chopps {
1514 1.15 veego #ifdef RETINACONSOLE
1515 1.1 chopps static int rhconunit = -1;
1516 1.1 chopps #endif
1517 1.5 chopps struct zbus_args *zap;
1518 1.1 chopps
1519 1.1 chopps zap = auxp;
1520 1.1 chopps
1521 1.1 chopps if (amiga_realconfig == 0)
1522 1.1 chopps #ifdef RETINACONSOLE
1523 1.1 chopps if (rhconunit != -1)
1524 1.1 chopps #endif
1525 1.1 chopps return(0);
1526 1.32 aymeric if (zap->manid != 18260 ||
1527 1.14 veego ((zap->prodid != 16) && (zap->prodid != 19)))
1528 1.1 chopps return(0);
1529 1.1 chopps #ifdef RETINACONSOLE
1530 1.1 chopps if (amiga_realconfig == 0 || rhconunit != cfp->cf_unit) {
1531 1.1 chopps #endif
1532 1.1 chopps if ((unsigned)rh_default_mon >= rh_mon_max ||
1533 1.1 chopps monitor_defs[rh_default_mon].DEP == 8)
1534 1.1 chopps rh_default_mon = 0;
1535 1.1 chopps current_mon = monitor_defs + rh_default_mon;
1536 1.1 chopps if (rh_mondefok(current_mon) == 0)
1537 1.1 chopps return(0);
1538 1.1 chopps #ifdef RETINACONSOLE
1539 1.1 chopps if (amiga_realconfig == 0) {
1540 1.1 chopps rhconunit = cfp->cf_unit;
1541 1.1 chopps cfdata = cfp;
1542 1.1 chopps }
1543 1.1 chopps }
1544 1.1 chopps #endif
1545 1.1 chopps return(1);
1546 1.1 chopps }
1547 1.1 chopps
1548 1.1 chopps void
1549 1.32 aymeric grfrhattach(struct device *pdp, struct device *dp, void *auxp)
1550 1.1 chopps {
1551 1.1 chopps static struct grf_softc congrf;
1552 1.5 chopps struct zbus_args *zap;
1553 1.1 chopps struct grf_softc *gp;
1554 1.1 chopps
1555 1.1 chopps zap = auxp;
1556 1.1 chopps
1557 1.1 chopps if (dp == NULL)
1558 1.1 chopps gp = &congrf;
1559 1.1 chopps else
1560 1.1 chopps gp = (struct grf_softc *)dp;
1561 1.1 chopps if (dp != NULL && congrf.g_regkva != 0) {
1562 1.1 chopps /*
1563 1.1 chopps * inited earlier, just copy (not device struct)
1564 1.1 chopps */
1565 1.1 chopps bcopy(&congrf.g_display, &gp->g_display,
1566 1.1 chopps (char *)&gp[1] - (char *)&gp->g_display);
1567 1.1 chopps } else {
1568 1.1 chopps gp->g_regkva = (volatile caddr_t)zap->va;
1569 1.1 chopps gp->g_fbkva = (volatile caddr_t)zap->va + LM_OFFSET;
1570 1.1 chopps gp->g_unit = GRF_RETINAIII_UNIT;
1571 1.1 chopps gp->g_mode = rh_mode;
1572 1.1 chopps gp->g_conpri = grfrh_cnprobe();
1573 1.1 chopps gp->g_flags = GF_ALIVE;
1574 1.1 chopps grfrh_iteinit(gp);
1575 1.1 chopps (void)rh_load_mon(gp, current_mon);
1576 1.1 chopps }
1577 1.1 chopps if (dp != NULL)
1578 1.24 christos printf("\n");
1579 1.1 chopps /*
1580 1.1 chopps * attach grf
1581 1.1 chopps */
1582 1.1 chopps amiga_config_found(cfdata, &gp->g_device, gp, grfrhprint);
1583 1.1 chopps }
1584 1.1 chopps
1585 1.1 chopps int
1586 1.32 aymeric grfrhprint(void *auxp, const char *pnp)
1587 1.1 chopps {
1588 1.1 chopps if (pnp)
1589 1.24 christos printf("ite at %s", pnp);
1590 1.1 chopps return(UNCONF);
1591 1.1 chopps }
1592 1.1 chopps
1593 1.1 chopps int
1594 1.32 aymeric rh_getvmode(struct grf_softc *gp, struct grfvideo_mode *vm)
1595 1.1 chopps {
1596 1.1 chopps struct MonDef *md;
1597 1.27 veego int vmul;
1598 1.1 chopps
1599 1.1 chopps if (vm->mode_num && vm->mode_num > rh_mon_max)
1600 1.1 chopps return(EINVAL);
1601 1.1 chopps
1602 1.1 chopps if (! vm->mode_num)
1603 1.1 chopps vm->mode_num = (current_mon - monitor_defs) + 1;
1604 1.1 chopps
1605 1.1 chopps md = monitor_defs + (vm->mode_num - 1);
1606 1.14 veego strncpy (vm->mode_descr, monitor_descr[vm->mode_num - 1],
1607 1.1 chopps sizeof (vm->mode_descr));
1608 1.1 chopps vm->pixel_clock = md->FQ;
1609 1.32 aymeric vm->disp_width = (md->DEP == 4) ? md->MW : md->TX;
1610 1.32 aymeric vm->disp_height = (md->DEP == 4) ? md->MH : md->TY;
1611 1.1 chopps vm->depth = md->DEP;
1612 1.10 chopps
1613 1.32 aymeric /*
1614 1.10 chopps * From observation of the monitor definition table above, I guess
1615 1.32 aymeric * that the horizontal timings are in units of longwords. Hence, I
1616 1.10 chopps * get the pixels by multiplication with 32 and division by the depth.
1617 1.32 aymeric * The text modes, apparently marked by depth == 4, are even more
1618 1.32 aymeric * weird. According to a comment above, they are computed from a
1619 1.32 aymeric * depth==8 mode thats for us: * 32 / 8) by applying another factor
1620 1.10 chopps * of 4 / font width.
1621 1.32 aymeric * Reverse applying the latter formula most of the constants cancel
1622 1.10 chopps * themselves and we are left with a nice (* font width).
1623 1.32 aymeric * That is, internal timings are in units of longwords for graphics
1624 1.10 chopps * modes, or in units of characters widths for text modes.
1625 1.10 chopps * We better don't WRITE modes until this has been real live checked.
1626 1.10 chopps * - Ignatios Souvatzis
1627 1.10 chopps */
1628 1.32 aymeric
1629 1.27 veego if (md->DEP != 4) {
1630 1.10 chopps vm->hblank_start = md->HBS * 32 / md->DEP;
1631 1.32 aymeric vm->hsync_start = md->HSS * 32 / md->DEP;
1632 1.10 chopps vm->hsync_stop = md->HSE * 32 / md->DEP;
1633 1.10 chopps vm->htotal = md->HT * 32 / md->DEP;
1634 1.10 chopps } else {
1635 1.10 chopps vm->hblank_start = md->HBS * md->FX;
1636 1.10 chopps vm->hsync_start = md->HSS * md->FX;
1637 1.10 chopps vm->hsync_stop = md->HSE * md->FX;
1638 1.32 aymeric vm->htotal = md->HT * md->FX;
1639 1.10 chopps }
1640 1.10 chopps
1641 1.27 veego /* XXX move vm->disp_flags and vmul to rh_load_mon
1642 1.27 veego * if rh_setvmode can add new modes with grfconfig */
1643 1.27 veego vm->disp_flags = 0;
1644 1.27 veego vmul = 2;
1645 1.27 veego if (md->FLG & MDF_DBL) {
1646 1.27 veego vm->disp_flags |= GRF_FLAGS_DBLSCAN;
1647 1.27 veego vmul = 4;
1648 1.27 veego }
1649 1.27 veego if (md->FLG & MDF_LACE) {
1650 1.27 veego vm->disp_flags |= GRF_FLAGS_LACE;
1651 1.27 veego vmul = 1;
1652 1.27 veego }
1653 1.27 veego vm->vblank_start = md->VBS * vmul / 2;
1654 1.27 veego vm->vsync_start = md->VSS * vmul / 2;
1655 1.27 veego vm->vsync_stop = md->VSE * vmul / 2;
1656 1.27 veego vm->vtotal = md->VT * vmul / 2;
1657 1.1 chopps
1658 1.1 chopps return(0);
1659 1.1 chopps }
1660 1.1 chopps
1661 1.1 chopps
1662 1.1 chopps int
1663 1.32 aymeric rh_setvmode(struct grf_softc *gp, unsigned mode, enum mode_type type)
1664 1.1 chopps {
1665 1.1 chopps int error;
1666 1.1 chopps
1667 1.1 chopps if (!mode || mode > rh_mon_max)
1668 1.1 chopps return(EINVAL);
1669 1.1 chopps
1670 1.32 aymeric if ((type == MT_TXTONLY && monitor_defs[mode-1].DEP != 4)
1671 1.32 aymeric || (type == MT_GFXONLY && monitor_defs[mode-1].DEP == 4))
1672 1.1 chopps return(EINVAL);
1673 1.1 chopps
1674 1.1 chopps current_mon = monitor_defs + (mode - 1);
1675 1.1 chopps
1676 1.1 chopps error = rh_load_mon (gp, current_mon) ? 0 : EINVAL;
1677 1.1 chopps
1678 1.1 chopps return(error);
1679 1.1 chopps }
1680 1.1 chopps
1681 1.1 chopps
1682 1.1 chopps /*
1683 1.1 chopps * Change the mode of the display.
1684 1.1 chopps * Return a UNIX error number or 0 for success.
1685 1.1 chopps */
1686 1.14 veego int
1687 1.32 aymeric rh_mode(register struct grf_softc *gp, u_long cmd, void *arg, u_long a2,
1688 1.32 aymeric int a3)
1689 1.1 chopps {
1690 1.1 chopps switch (cmd) {
1691 1.17 veego case GM_GRFON:
1692 1.32 aymeric rh_setvmode (gp, rh_default_gfx + 1, MT_GFXONLY);
1693 1.1 chopps return(0);
1694 1.1 chopps
1695 1.17 veego case GM_GRFOFF:
1696 1.32 aymeric rh_setvmode (gp, rh_default_mon + 1, MT_TXTONLY);
1697 1.1 chopps return(0);
1698 1.1 chopps
1699 1.17 veego case GM_GRFCONFIG:
1700 1.1 chopps return(0);
1701 1.1 chopps
1702 1.17 veego case GM_GRFGETVMODE:
1703 1.1 chopps return(rh_getvmode (gp, (struct grfvideo_mode *) arg));
1704 1.1 chopps
1705 1.17 veego case GM_GRFSETVMODE:
1706 1.32 aymeric return(rh_setvmode(gp, *(unsigned *) arg,
1707 1.32 aymeric (gp->g_flags & GF_GRFON) ? MT_GFXONLY : MT_TXTONLY));
1708 1.1 chopps
1709 1.17 veego case GM_GRFGETNUMVM:
1710 1.1 chopps *(int *)arg = rh_mon_max;
1711 1.1 chopps return(0);
1712 1.1 chopps
1713 1.1 chopps #ifdef BANKEDDEVPAGER
1714 1.17 veego case GM_GRFGETBANK:
1715 1.17 veego case GM_GRFGETCURBANK:
1716 1.17 veego case GM_GRFSETBANK:
1717 1.1 chopps return(EINVAL);
1718 1.1 chopps #endif
1719 1.17 veego case GM_GRFIOCTL:
1720 1.14 veego return(rh_ioctl (gp, a2, arg));
1721 1.1 chopps
1722 1.17 veego default:
1723 1.1 chopps break;
1724 1.1 chopps }
1725 1.1 chopps
1726 1.1 chopps return(EINVAL);
1727 1.1 chopps }
1728 1.1 chopps
1729 1.1 chopps int
1730 1.32 aymeric rh_ioctl(register struct grf_softc *gp, u_long cmd, void *data)
1731 1.1 chopps {
1732 1.1 chopps switch (cmd) {
1733 1.21 veego #ifdef RH_HARDWARECURSOR
1734 1.17 veego case GRFIOCGSPRITEPOS:
1735 1.1 chopps return(rh_getspritepos (gp, (struct grf_position *) data));
1736 1.1 chopps
1737 1.17 veego case GRFIOCSSPRITEPOS:
1738 1.1 chopps return(rh_setspritepos (gp, (struct grf_position *) data));
1739 1.1 chopps
1740 1.17 veego case GRFIOCSSPRITEINF:
1741 1.1 chopps return(rh_setspriteinfo (gp, (struct grf_spriteinfo *) data));
1742 1.1 chopps
1743 1.17 veego case GRFIOCGSPRITEINF:
1744 1.1 chopps return(rh_getspriteinfo (gp, (struct grf_spriteinfo *) data));
1745 1.1 chopps
1746 1.17 veego case GRFIOCGSPRITEMAX:
1747 1.1 chopps return(rh_getspritemax (gp, (struct grf_position *) data));
1748 1.21 veego #else /* RH_HARDWARECURSOR */
1749 1.21 veego case GRFIOCGSPRITEPOS:
1750 1.21 veego case GRFIOCSSPRITEPOS:
1751 1.21 veego case GRFIOCSSPRITEINF:
1752 1.21 veego case GRFIOCGSPRITEMAX:
1753 1.21 veego break;
1754 1.21 veego #endif /* RH_HARDWARECURSOR */
1755 1.1 chopps
1756 1.17 veego case GRFIOCGETCMAP:
1757 1.1 chopps return(rh_getcmap (gp, (struct grf_colormap *) data));
1758 1.1 chopps
1759 1.17 veego case GRFIOCPUTCMAP:
1760 1.1 chopps return(rh_putcmap (gp, (struct grf_colormap *) data));
1761 1.1 chopps
1762 1.17 veego case GRFIOCBITBLT:
1763 1.1 chopps return(rh_bitblt (gp, (struct grf_bitblt *) data));
1764 1.17 veego
1765 1.17 veego case GRFIOCBLANK:
1766 1.17 veego return (rh_blank(gp, (int *)data));
1767 1.1 chopps }
1768 1.1 chopps
1769 1.1 chopps return(EINVAL);
1770 1.1 chopps }
1771 1.1 chopps
1772 1.1 chopps
1773 1.1 chopps int
1774 1.32 aymeric rh_getcmap(struct grf_softc *gfp, struct grf_colormap *cmap)
1775 1.1 chopps {
1776 1.1 chopps volatile unsigned char *ba;
1777 1.1 chopps u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1778 1.1 chopps short x;
1779 1.1 chopps int error;
1780 1.1 chopps
1781 1.1 chopps if (cmap->count == 0 || cmap->index >= 256)
1782 1.1 chopps return 0;
1783 1.1 chopps
1784 1.1 chopps if (cmap->index + cmap->count > 256)
1785 1.1 chopps cmap->count = 256 - cmap->index;
1786 1.1 chopps
1787 1.1 chopps ba = gfp->g_regkva;
1788 1.1 chopps /* first read colors out of the chip, then copyout to userspace */
1789 1.1 chopps vgaw (ba, VDAC_ADDRESS_W, cmap->index);
1790 1.1 chopps x = cmap->count - 1;
1791 1.1 chopps rp = red + cmap->index;
1792 1.1 chopps gp = green + cmap->index;
1793 1.1 chopps bp = blue + cmap->index;
1794 1.1 chopps do {
1795 1.1 chopps *rp++ = vgar (ba, VDAC_DATA) << 2;
1796 1.1 chopps *gp++ = vgar (ba, VDAC_DATA) << 2;
1797 1.1 chopps *bp++ = vgar (ba, VDAC_DATA) << 2;
1798 1.1 chopps } while (x-- > 0);
1799 1.1 chopps
1800 1.1 chopps if (!(error = copyout (red + cmap->index, cmap->red, cmap->count))
1801 1.1 chopps && !(error = copyout (green + cmap->index, cmap->green, cmap->count))
1802 1.1 chopps && !(error = copyout (blue + cmap->index, cmap->blue, cmap->count)))
1803 1.1 chopps return(0);
1804 1.1 chopps
1805 1.1 chopps return(error);
1806 1.1 chopps }
1807 1.1 chopps
1808 1.1 chopps int
1809 1.32 aymeric rh_putcmap(struct grf_softc *gfp, struct grf_colormap *cmap)
1810 1.1 chopps {
1811 1.1 chopps volatile unsigned char *ba;
1812 1.1 chopps u_char red[256], green[256], blue[256], *rp, *gp, *bp;
1813 1.1 chopps short x;
1814 1.1 chopps int error;
1815 1.1 chopps
1816 1.1 chopps if (cmap->count == 0 || cmap->index >= 256)
1817 1.1 chopps return(0);
1818 1.1 chopps
1819 1.1 chopps if (cmap->index + cmap->count > 256)
1820 1.1 chopps cmap->count = 256 - cmap->index;
1821 1.1 chopps
1822 1.1 chopps /* first copy the colors into kernelspace */
1823 1.1 chopps if (!(error = copyin (cmap->red, red + cmap->index, cmap->count))
1824 1.1 chopps && !(error = copyin (cmap->green, green + cmap->index, cmap->count))
1825 1.1 chopps && !(error = copyin (cmap->blue, blue + cmap->index, cmap->count))) {
1826 1.1 chopps /* argl.. LoadPalette wants a different format, so do it like with
1827 1.1 chopps * Retina2.. */
1828 1.1 chopps ba = gfp->g_regkva;
1829 1.1 chopps vgaw (ba, VDAC_ADDRESS_W, cmap->index);
1830 1.1 chopps x = cmap->count - 1;
1831 1.1 chopps rp = red + cmap->index;
1832 1.1 chopps gp = green + cmap->index;
1833 1.1 chopps bp = blue + cmap->index;
1834 1.1 chopps do {
1835 1.1 chopps vgaw (ba, VDAC_DATA, *rp++ >> 2);
1836 1.1 chopps vgaw (ba, VDAC_DATA, *gp++ >> 2);
1837 1.1 chopps vgaw (ba, VDAC_DATA, *bp++ >> 2);
1838 1.1 chopps } while (x-- > 0);
1839 1.1 chopps return(0);
1840 1.1 chopps }
1841 1.1 chopps else
1842 1.1 chopps return(error);
1843 1.1 chopps }
1844 1.1 chopps
1845 1.1 chopps int
1846 1.32 aymeric rh_getspritepos(struct grf_softc *gp, struct grf_position *pos)
1847 1.1 chopps {
1848 1.26 is struct grfinfo *gi = &gp->g_display;
1849 1.26 is #if 1
1850 1.26 is volatile unsigned char *ba = gp->g_regkva;
1851 1.26 is
1852 1.26 is pos->x = (RSeq(ba, SEQ_ID_CURSOR_X_LOC_HI) << 8) |
1853 1.26 is RSeq(ba, SEQ_ID_CURSOR_X_LOC_LO);
1854 1.26 is pos->y = (RSeq(ba, SEQ_ID_CURSOR_Y_LOC_HI) << 8) |
1855 1.26 is RSeq(ba, SEQ_ID_CURSOR_Y_LOC_LO);
1856 1.26 is #else
1857 1.1 chopps volatile unsigned char *acm = gp->g_regkva + ACM_OFFSET;
1858 1.1 chopps
1859 1.1 chopps pos->x = acm[ACM_CURSOR_POSITION + 0] +
1860 1.1 chopps (acm[ACM_CURSOR_POSITION + 1] << 8);
1861 1.1 chopps pos->y = acm[ACM_CURSOR_POSITION + 2] +
1862 1.1 chopps (acm[ACM_CURSOR_POSITION + 3] << 8);
1863 1.26 is #endif
1864 1.26 is pos->x += gi->gd_fbx;
1865 1.26 is pos->y += gi->gd_fby;
1866 1.1 chopps
1867 1.1 chopps return(0);
1868 1.1 chopps }
1869 1.1 chopps
1870 1.1 chopps int
1871 1.1 chopps rh_setspritepos (gp, pos)
1872 1.1 chopps struct grf_softc *gp;
1873 1.1 chopps struct grf_position *pos;
1874 1.1 chopps {
1875 1.1 chopps RZ3SetHWCloc (gp, pos->x, pos->y);
1876 1.1 chopps return(0);
1877 1.1 chopps }
1878 1.1 chopps
1879 1.1 chopps int
1880 1.32 aymeric rh_getspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *info)
1881 1.1 chopps {
1882 1.1 chopps volatile unsigned char *ba, *fb;
1883 1.1 chopps
1884 1.1 chopps ba = gp->g_regkva;
1885 1.1 chopps fb = gp->g_fbkva;
1886 1.1 chopps if (info->set & GRFSPRSET_ENABLE)
1887 1.1 chopps info->enable = RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 0x01;
1888 1.1 chopps if (info->set & GRFSPRSET_POS)
1889 1.1 chopps rh_getspritepos (gp, &info->pos);
1890 1.1 chopps if (info->set & GRFSPRSET_HOT) {
1891 1.1 chopps info->hot.x = RSeq (ba, SEQ_ID_CURSOR_X_INDEX) & 0x3f;
1892 1.1 chopps info->hot.y = RSeq (ba, SEQ_ID_CURSOR_Y_INDEX) & 0x7f;
1893 1.1 chopps }
1894 1.1 chopps if (info->set & GRFSPRSET_CMAP) {
1895 1.1 chopps struct grf_colormap cmap;
1896 1.1 chopps int index;
1897 1.1 chopps cmap.index = 0;
1898 1.1 chopps cmap.count = 256;
1899 1.1 chopps rh_getcmap (gp, &cmap);
1900 1.1 chopps index = RSeq (ba, SEQ_ID_CURSOR_COLOR0);
1901 1.1 chopps info->cmap.red[0] = cmap.red[index];
1902 1.1 chopps info->cmap.green[0] = cmap.green[index];
1903 1.1 chopps info->cmap.blue[0] = cmap.blue[index];
1904 1.1 chopps index = RSeq (ba, SEQ_ID_CURSOR_COLOR1);
1905 1.1 chopps info->cmap.red[1] = cmap.red[index];
1906 1.1 chopps info->cmap.green[1] = cmap.green[index];
1907 1.1 chopps info->cmap.blue[1] = cmap.blue[index];
1908 1.1 chopps }
1909 1.1 chopps if (info->set & GRFSPRSET_SHAPE) {
1910 1.1 chopps u_char image[128], mask[128];
1911 1.1 chopps volatile u_long *hwp;
1912 1.1 chopps u_char *imp, *mp;
1913 1.1 chopps short row;
1914 1.1 chopps
1915 1.1 chopps /* sprite bitmap is WEIRD in this chip.. see grf_rhvar.h
1916 1.1 chopps * for an explanation. To convert to "our" format, the
1917 1.1 chopps * following holds:
1918 1.1 chopps * col2 = !image & mask
1919 1.1 chopps * col1 = image & mask
1920 1.1 chopps * transp = !mask
1921 1.1 chopps * and thus:
1922 1.1 chopps * image = col1
1923 1.1 chopps * mask = col1 | col2
1924 1.1 chopps * hope I got these bool-eqs right below..
1925 1.1 chopps */
1926 1.1 chopps
1927 1.9 chopps #ifdef RH_64BIT_SPRITE
1928 1.1 chopps info->size.x = 64;
1929 1.1 chopps info->size.y = 64;
1930 1.1 chopps for (row = 0, hwp = (u_long *)(ba + LM_OFFSET + HWC_MEM_OFF),
1931 1.1 chopps mp = mask, imp = image;
1932 1.1 chopps row < 64;
1933 1.1 chopps row++) {
1934 1.1 chopps u_long bp10, bp20, bp11, bp21;
1935 1.1 chopps bp10 = *hwp++;
1936 1.1 chopps bp20 = *hwp++;
1937 1.1 chopps bp11 = *hwp++;
1938 1.1 chopps bp21 = *hwp++;
1939 1.1 chopps M2I (bp10);
1940 1.1 chopps M2I (bp20);
1941 1.1 chopps M2I (bp11);
1942 1.1 chopps M2I (bp21);
1943 1.1 chopps *imp++ = (~bp10) & bp11;
1944 1.1 chopps *imp++ = (~bp20) & bp21;
1945 1.1 chopps *mp++ = (~bp10) | (bp10 & ~bp11);
1946 1.1 chopps *mp++ = (~bp20) & (bp20 & ~bp21);
1947 1.1 chopps }
1948 1.7 chopps #else
1949 1.32 aymeric info->size.x = 32;
1950 1.32 aymeric info->size.y = 32;
1951 1.32 aymeric for (row = 0, hwp = (u_long *)(ba + LM_OFFSET + HWC_MEM_OFF),
1952 1.32 aymeric mp = mask, imp = image;
1953 1.32 aymeric row < 32;
1954 1.32 aymeric row++) {
1955 1.32 aymeric u_long bp10, bp11;
1956 1.32 aymeric bp10 = *hwp++;
1957 1.32 aymeric bp11 = *hwp++;
1958 1.32 aymeric M2I (bp10);
1959 1.32 aymeric M2I (bp11);
1960 1.32 aymeric *imp++ = (~bp10) & bp11;
1961 1.32 aymeric *mp++ = (~bp10) | (bp10 & ~bp11);
1962 1.32 aymeric }
1963 1.7 chopps #endif
1964 1.1 chopps copyout (image, info->image, sizeof (image));
1965 1.1 chopps copyout (mask, info->mask, sizeof (mask));
1966 1.1 chopps }
1967 1.1 chopps return(0);
1968 1.1 chopps }
1969 1.1 chopps
1970 1.1 chopps int
1971 1.32 aymeric rh_setspriteinfo(struct grf_softc *gp, struct grf_spriteinfo *info)
1972 1.1 chopps {
1973 1.1 chopps volatile unsigned char *ba, *fb;
1974 1.14 veego #if 0
1975 1.1 chopps u_char control;
1976 1.14 veego #endif
1977 1.1 chopps
1978 1.1 chopps ba = gp->g_regkva;
1979 1.1 chopps fb = gp->g_fbkva;
1980 1.1 chopps
1981 1.1 chopps if (info->set & GRFSPRSET_SHAPE) {
1982 1.1 chopps /*
1983 1.1 chopps * For an explanation of these weird actions here, see above
1984 1.1 chopps * when reading the shape. We set the shape directly into
1985 1.1 chopps * the video memory, there's no reason to keep 1k on the
1986 1.1 chopps * kernel stack just as template
1987 1.1 chopps */
1988 1.1 chopps u_char *image, *mask;
1989 1.1 chopps volatile u_long *hwp;
1990 1.1 chopps u_char *imp, *mp;
1991 1.1 chopps short row;
1992 1.1 chopps
1993 1.9 chopps #ifdef RH_64BIT_SPRITE
1994 1.1 chopps if (info->size.y > 64)
1995 1.1 chopps info->size.y = 64;
1996 1.1 chopps if (info->size.x > 64)
1997 1.1 chopps info->size.x = 64;
1998 1.7 chopps #else
1999 1.32 aymeric if (info->size.y > 32)
2000 1.32 aymeric info->size.y = 32;
2001 1.32 aymeric if (info->size.x > 32)
2002 1.32 aymeric info->size.x = 32;
2003 1.7 chopps #endif
2004 1.1 chopps
2005 1.1 chopps if (info->size.x < 32)
2006 1.1 chopps info->size.x = 32;
2007 1.1 chopps
2008 1.1 chopps image = malloc(HWC_MEM_SIZE, M_TEMP, M_WAITOK);
2009 1.1 chopps mask = image + HWC_MEM_SIZE/2;
2010 1.1 chopps
2011 1.1 chopps copyin(info->image, image, info->size.y * info->size.x / 8);
2012 1.1 chopps copyin(info->mask, mask, info->size.y * info->size.x / 8);
2013 1.1 chopps
2014 1.1 chopps hwp = (u_long *)(ba + LM_OFFSET + HWC_MEM_OFF);
2015 1.1 chopps
2016 1.1 chopps /*
2017 1.1 chopps * setting it is slightly more difficult, because we can't
2018 1.1 chopps * force the application to not pass a *smaller* than
2019 1.1 chopps * supported bitmap
2020 1.1 chopps */
2021 1.1 chopps
2022 1.1 chopps for (row = 0, mp = mask, imp = image;
2023 1.1 chopps row < info->size.y;
2024 1.1 chopps row++) {
2025 1.1 chopps u_long im1, im2, m1, m2;
2026 1.1 chopps
2027 1.1 chopps im1 = *(unsigned long *)imp;
2028 1.1 chopps imp += 4;
2029 1.1 chopps m1 = *(unsigned long *)mp;
2030 1.1 chopps mp += 4;
2031 1.9 chopps #ifdef RH_64BIT_SPRITE
2032 1.1 chopps if (info->size.x > 32) {
2033 1.1 chopps im2 = *(unsigned long *)imp;
2034 1.1 chopps imp += 4;
2035 1.1 chopps m2 = *(unsigned long *)mp;
2036 1.1 chopps mp += 4;
2037 1.1 chopps }
2038 1.1 chopps else
2039 1.7 chopps #endif
2040 1.1 chopps im2 = m2 = 0;
2041 1.1 chopps
2042 1.1 chopps M2I(im1);
2043 1.1 chopps M2I(im2);
2044 1.1 chopps M2I(m1);
2045 1.1 chopps M2I(m2);
2046 1.1 chopps
2047 1.1 chopps *hwp++ = ~m1;
2048 1.9 chopps #ifdef RH_64BIT_SPRITE
2049 1.1 chopps *hwp++ = ~m2;
2050 1.7 chopps #endif
2051 1.1 chopps *hwp++ = m1 & im1;
2052 1.9 chopps #ifdef RH_64BIT_SPRITE
2053 1.1 chopps *hwp++ = m2 & im2;
2054 1.7 chopps #endif
2055 1.1 chopps }
2056 1.9 chopps #ifdef RH_64BIT_SPRITE
2057 1.1 chopps for (; row < 64; row++) {
2058 1.1 chopps *hwp++ = 0xffffffff;
2059 1.1 chopps *hwp++ = 0xffffffff;
2060 1.1 chopps *hwp++ = 0x00000000;
2061 1.1 chopps *hwp++ = 0x00000000;
2062 1.1 chopps }
2063 1.7 chopps #else
2064 1.32 aymeric for (; row < 32; row++) {
2065 1.32 aymeric *hwp++ = 0xffffffff;
2066 1.32 aymeric *hwp++ = 0x00000000;
2067 1.32 aymeric }
2068 1.7 chopps #endif
2069 1.1 chopps
2070 1.1 chopps free(image, M_TEMP);
2071 1.1 chopps RZ3SetupHWC(gp, 1, 0, 0, 0, 0);
2072 1.1 chopps }
2073 1.1 chopps if (info->set & GRFSPRSET_CMAP) {
2074 1.1 chopps /* hey cheat a bit here.. XXX */
2075 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR0, 0);
2076 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_COLOR1, 1);
2077 1.1 chopps }
2078 1.1 chopps if (info->set & GRFSPRSET_ENABLE) {
2079 1.7 chopps #if 0
2080 1.1 chopps if (info->enable)
2081 1.1 chopps control = 0x85;
2082 1.1 chopps else
2083 1.1 chopps control = 0;
2084 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_CONTROL, control);
2085 1.7 chopps #endif
2086 1.1 chopps }
2087 1.1 chopps if (info->set & GRFSPRSET_POS)
2088 1.1 chopps rh_setspritepos(gp, &info->pos);
2089 1.1 chopps if (info->set & GRFSPRSET_HOT) {
2090 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_X_INDEX, info->hot.x & 0x3f);
2091 1.1 chopps WSeq(ba, SEQ_ID_CURSOR_Y_INDEX, info->hot.y & 0x7f);
2092 1.1 chopps }
2093 1.1 chopps
2094 1.1 chopps return(0);
2095 1.1 chopps }
2096 1.1 chopps
2097 1.1 chopps int
2098 1.32 aymeric rh_getspritemax(struct grf_softc *gp, struct grf_position *pos)
2099 1.1 chopps {
2100 1.9 chopps #ifdef RH_64BIT_SPRITE
2101 1.1 chopps pos->x = 64;
2102 1.1 chopps pos->y = 64;
2103 1.7 chopps #else
2104 1.32 aymeric pos->x = 32;
2105 1.32 aymeric pos->y = 32;
2106 1.7 chopps #endif
2107 1.1 chopps
2108 1.1 chopps return(0);
2109 1.1 chopps }
2110 1.1 chopps
2111 1.1 chopps
2112 1.1 chopps int
2113 1.32 aymeric rh_bitblt(struct grf_softc *gp, struct grf_bitblt *bb)
2114 1.1 chopps {
2115 1.1 chopps struct MonDef *md = (struct MonDef *)gp->g_data;
2116 1.32 aymeric if (md->DEP <= 8)
2117 1.1 chopps RZ3BitBlit(gp, bb);
2118 1.32 aymeric else if (md->DEP <= 16)
2119 1.1 chopps RZ3BitBlit16(gp, bb);
2120 1.32 aymeric else
2121 1.32 aymeric RZ3BitBlit24(gp, bb);
2122 1.14 veego
2123 1.14 veego return(0);
2124 1.1 chopps }
2125 1.17 veego
2126 1.17 veego
2127 1.17 veego int
2128 1.32 aymeric rh_blank(struct grf_softc *gp, int *on)
2129 1.17 veego {
2130 1.18 is struct MonDef *md = (struct MonDef *)gp->g_data;
2131 1.17 veego int r;
2132 1.17 veego
2133 1.18 is r = 0x01 | ((md->FLG & MDF_CLKDIV2)/ MDF_CLKDIV2 * 8);
2134 1.17 veego
2135 1.20 is WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? r : 0x21);
2136 1.17 veego
2137 1.17 veego return(0);
2138 1.17 veego }
2139 1.17 veego
2140 1.1 chopps #endif /* NGRF */
2141