grf_rhreg.h revision 1.1
1 /* 2 * $Id: grf_rhreg.h,v 1.1 1994/06/05 07:48:45 chopps Exp $ 3 */ 4 5 #ifndef _GRF_RHREG_H 6 #define _GRF_RHREG_H 7 8 /* 9 * Written & Copyright by Lutz Vieweg. As for missing comments: see 10 * grf_rt.* 11 * 12 * Lutz provided these sources in C++, I tried to keep as much of it when 13 * converting to C. -mw- 14 */ 15 16 #define EMPTY_ALPHA 0x2010 /* this is the char and the attribute 17 that AlphaErase will fill into the 18 text-screen */ 19 20 #define MEMCLK 65000000 /* this is the memory clock value, you shouldn't 21 set it to less than 65000000, higher values may 22 speed up blits a little bit, if you raise this 23 value too much, some trash will appear on your 24 screen. */ 25 26 #define MEMSIZE 4 /* Set this to 1 or 4 (MB), according to the 27 RAM on your Retina BLT Z3 board */ 28 /* 29 * The following definitions are places in the frame-buffer memory 30 * which are used for special purposes. While the displayed screen 31 * itself is always beginning at the start of the frame-buffer 32 * memory, the following special places are located at the end 33 * of the memory to keep free as much space as possible for the 34 * screen - the user might want to use monitor-definitions with 35 * huge logical dimensions (e.g. 2048x2000 ?). This way of defining 36 * special locations in the frame-buffer memory is far from being 37 * elegant - you may want to use you own, real memory-management... 38 * but remember that some routines in RZ3_BSD.cc REALLY NEED those 39 * memory locations to function properly, so if you manage the 40 * frame-buffer memory on your own, make sure to change those 41 * definitions appropriately. 42 */ 43 44 /* reserve some space for one pattern line */ 45 #define PAT_MEM_SIZE 16*3 46 #define PAT_MEM_OFF (MEMSIZE*1024*1024 - PAT_MEM_SIZE) 47 48 /* reserve some space for the hardware cursor (up to 64x64 pixels) */ 49 #define HWC_MEM_SIZE 1024 50 #define HWC_MEM_OFF ((PAT_MEM_OFF - HWC_MEM_SIZE) & 0xffffff00) 51 52 /* 53 * The following structure is passed to RZ3Init() and holds the 54 * monitor-definition. You may either use one of the ready-made 55 * definitions in RZ3_monitors.cc or you can define them on your 56 * own, take a look at RZ3_monitors.cc for more information. 57 */ 58 struct MonDef { 59 60 /* first the general monitor characteristics */ 61 62 unsigned long FQ; 63 unsigned char FLG; 64 65 unsigned short MW; /* physical screen width in pixels */ 66 /* has to be at least a multiple of 8 */ 67 unsigned short MH; /* physical screen height in pixels */ 68 69 unsigned short HBS; 70 unsigned short HSS; 71 unsigned short HSE; 72 unsigned short HBE; 73 unsigned short HT; 74 unsigned short VBS; 75 unsigned short VSS; 76 unsigned short VSE; 77 unsigned short VBE; 78 unsigned short VT; 79 80 unsigned short DEP; /* Color-depth, 4 enables text-mode */ 81 /* 8 enables 256-color graphics-mode, */ 82 /* 16 and 24bit gfx not supported yet */ 83 84 unsigned char * PAL; /* points to 16*3 byte RGB-palette data */ 85 /* use LoadPalette() to set colors 0..255 */ 86 /* in 256-color-gfx mode */ 87 88 /* 89 * all following entries are font-specific in 90 * text-mode. Make sure your monitor 91 * parameters are calculated for the 92 * appropriate font width and height! 93 */ 94 95 unsigned short TX; /* Text-mode (DEP=4): */ 96 /* screen-width in characters */ 97 98 /* Gfx-mode (DEP > 4) */ 99 /* "logical" screen-width, */ 100 /* use values > MW to allow */ 101 /* hardware-panning */ 102 103 unsigned short TY; /* Text-mode: */ 104 /* screen-height in characters */ 105 106 /* Gfx-mode: "logical" screen */ 107 /* height for panning */ 108 109 /* the following values are currently unused for gfx-mode */ 110 111 unsigned short XY; /* TX*TY (speeds up some calcs.) */ 112 113 unsigned short FX; /* font-width (valid values: 4,7-16) */ 114 unsigned short FY; /* font-height (valid range: 1-32) */ 115 unsigned char * FData; /* pointer to the font-data */ 116 117 /* 118 * The font data is simply an array of bytes defining 119 * the chars in ascending order, line by line. If your 120 * font is wider than 8 pixel, FData has to be an 121 * array of words. 122 */ 123 124 unsigned short FLo; /* lowest character defined */ 125 unsigned short FHi; /* highest char. defined */ 126 127 }; 128 129 130 /* 131 * The following are the prototypes for the low-level 132 * routines you may want to call. 133 */ 134 135 #if 0 136 137 #ifdef __GNUG__ 138 139 /* The prototypes for C++, prototypes for C (with explanations) below */ 140 141 "C" unsigned char * RZ3Init (volatile void * HardWareAdress, struct MonDef * md); 142 "C" void RZ3SetCursorPos (unsigned short pos); 143 "C" void RZ3AlphaErase (unsigned short xd, unsigned short yd, 144 unsigned short w, unsigned short h ); 145 "C" void RZ3AlphaCopy (unsigned short xs, unsigned short ys, 146 unsigned short xd, unsigned short yd, 147 unsigned short w, unsigned short h ); 148 "C" void RZ3BitBlit (struct grf_bitblt * gbb ); 149 "C" void RZ3BitBlit16 (struct grf_bitblt * gbb ); 150 "C" void RZ3LoadPalette (unsigned char * pal, unsigned char firstcol, unsigned char colors); 151 "C" void RZ3SetPalette (unsigned char colornum, unsigned char red, unsigned char green, unsigned char blue); 152 "C" void RZ3SetPanning (unsigned short xoff, unsigned short yoff); 153 "C" void RZ3SetupHWC (unsigned char col1, unsigned col2, 154 unsigned char hsx, unsigned char hsy, 155 const unsigned long * data); 156 "C" void RZ3DisableHWC (void); 157 "C" void RZ3SetHWCloc (unsigned short x, unsigned short y); 158 #else 159 160 /* The prototypes for C */ 161 /* with a little explanation */ 162 163 unsigned char * RZ3Init(volatile void * BoardAdress, struct MonDef * md); 164 165 /* 166 * This routine initialises the Retina Z3 hardware, opens a 167 * text- or gfx-mode screen, depending on the the value of 168 * MonDef.DEP, and sets the cursor to position 0. 169 * It takes as arguments a pointer to the hardware-base 170 * address as it is denoted in the DevConf structure 171 * of the AmigaDOS, and a pointer to a struct MonDef 172 * which describes the screen-mode parameters. 173 * 174 * The routine returns 0 if it was unable to open the screen, 175 * or an unsigned char * to the display memory when it 176 * succeeded. 177 * 178 * The organisation of the display memory in text-mode is a 179 * little strange (Intel-typically...) : 180 * 181 * Byte 00 01 02 03 04 05 06 etc. 182 * Char0 Attr0 -- -- Char1 Attr1 -- etc. 183 * 184 * You may set a character and its associated attribute byte 185 * with a single word-access, or you may perform to byte writes 186 * for the char and attribute. Each 2. word has no meaning, 187 * and writes to theese locations are ignored. 188 * 189 * The attribute byte for each character has the following 190 * structure: 191 * 192 * Bit 7 6 5 4 3 2 1 0 193 * BLINK BACK2 BACK1 BACK0 FORE3 FORE2 FORE1 FORE0 194 * 195 * Were FORE is the foreground-color index (0-15) and 196 * BACK is the background color index (0-7). BLINK 197 * enables blinking for the associated character. 198 * The higher 8 colors in the standard palette are 199 * lighter than the lower 8, so you may see FORE3 as 200 * an intensity bit. If FORE == 1 or FORE == 9 and 201 * BACK == 0 the character is underlined. Since I don't 202 * think this looks good, it will probably change in a 203 * future release. 204 * 205 * There's no routine "SetChar" or "SetAttr" provided, 206 * because I think it's so trivial... a function call 207 * would be pure overhead. As an example, a routine 208 * to set the char code and attribute at position x,y: 209 * (assumed the value returned by RZ3Init was stored 210 * into "DispMem", the actual MonDef struct * is hold 211 * in "MDef") 212 * 213 * void SetChar(unsigned char chr, unsigned char attr, 214 * unsigned short x, unsigned short y) { 215 * 216 * unsigned struct MonDef * md = MDef; 217 * unsigned char * c = DispMem + x*4 + y*md->TX*4; 218 * 219 * *c++ = chr; 220 * *c = attr; 221 * 222 * } 223 * 224 * In gfx-mode, the memory organisation is rather simple, 225 * 1 byte per pixel in 256-color mode, one pixel after 226 * each other, line by line. 227 * 228 * When 16-bits per pixel are used, each two bytes represent 229 * one pixel. The meaning of the bits is the following: 230 * 231 * Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 232 * Component g2 g1 g0 b4 b3 b2 b1 b0 r4 r3 r2 r1 r0 g5 g4 g3 233 * 234 * Please note that the memory layout in gfx-mode depends 235 * on the logical screen-size, panning does only affect 236 * the appearance of the physical screen. 237 * 238 * Currently, RZ3Init() disables the Retina Z3 VBLANK IRQ, 239 * but beware: When running the Retina WB-Emu under 240 * AmigaDOS, the VBLANK IRQ is ENABLED... 241 * 242 */ 243 244 void RZ3LoadPalette(unsigned char * pal, unsigned char firstcol, unsigned char colors); 245 246 /* 247 * Loads the palette-registers. "pal" points to an array of unsigned char 248 * triplets, for the red, green and blue component. "firstcol" determines the 249 * number of the first palette-register to load (256 available). "colors" is 250 * the number of colors you want to put in the palette registers. 251 */ 252 253 void RZ3SetPalette(unsigned char colornum, unsigned char red, unsigned char green, unsigned char blue); 254 255 /* 256 * Allows you to set a single color in the palette, "colornum" is the number 257 * of the palette entry (256 available), "red", "green" and "blue" are the 258 * three components. 259 */ 260 261 void RZ3SetCursorPos(unsigned short pos); 262 263 /* 264 * This routine sets the text-mode hardware-cursor position to the screen 265 * location pos. pos can be calculated as (x + y * md->TY). 266 * Text-mode only! 267 */ 268 269 void RZ3AlphaCopy (unsigned short xs, unsigned short ys, 270 unsigned short xd, unsigned short yd, 271 unsigned short w, unsigned short h ); 272 273 /* 274 * This Routine utilizes the blitter to perform fast copies 275 * in the text-display. The paramters are: 276 * xs - source x-coordinate 277 * ys - source y-coordinate 278 * xd - destination x-coordinate 279 * yd - destination y-coordinate 280 * w - the width of the area to copy 281 * h - the height of the area to copy 282 * All coordinates are in characters. RZ3AlphaCopy does not 283 * check for boundaries - you've got to make sure that the 284 * parameters have sensible values. Text-mode only! 285 */ 286 287 288 void RZ3AlphaErase (unsigned short xd, unsigned short yd, 289 unsigned short w, unsigned short h ); 290 291 /* 292 * RZ3AlphaErase utilizes the blitter to erase portions of 293 * the text-display. The parameters are: 294 * xd - destination x-coordinate 295 * yd - destination y-coordinate 296 * w - the width of the area to erase 297 * h - the height of the area to erase 298 * All coordinates are in characters. RZ3AlphaCopy does not 299 * check for boundaries - you've got to make sure that the 300 * parameters have sensible values. Text-mode only! 301 * 302 * Since the blitter is unable to use a mask-pattern and a 303 * certain fill-value at the same time, this routine uses 304 * a simple trick: RZ3Init() clears a memory area twice as 305 * large as the text-display needs, and RZ3AlphaErase then 306 * simply uses RZ3AlphaCopy to copy the desired area from 307 * the empty text-screen to the actually displayed screen. 308 */ 309 310 void RZ3BitBlit (struct grf_bitblt * gbb ); 311 312 /* 313 * RZ3BitBlit utilizes the blitter to perform one of 16 314 * available logical operations on the display memory, 315 * among them ordinary fill- and copy operations. 316 * The only parameter is a pointer to a struct grf_bitblt: 317 * 318 * struct grf_bitblt { 319 * unsigned short op; see above definitions of GRFBBOPxxx 320 * unsigned short src_x, src_y; upper left corner of source-region 321 * unsigned short dst_x, dst_y; upper left corner of dest-region 322 * unsigned short w, h; width, height of region 323 * unsigned short mask; bitmask to apply 324 * }; 325 * 326 * All coordinates are in pixels. RZ3BitBlit does not 327 * check for boundaries - you've got to make sure that the 328 * parameters have sensible values. 8 bit gfx-mode only! 329 * 330 * The blitter has a lot more capabilities, which aren't 331 * currently used by theese routines, among them color-expanded 332 * and text-blits, which can speed up GUIs like X11 a lot. 333 * If you've got any idea how to make use of them within 334 * your routines, contact me, and I'll implement the necessary 335 * blit-operations. 336 */ 337 338 void RZ3BitBlit16( struct grf_bitblt * gbb ); 339 340 /* Does the same as RZ3BitBlit(), but for 16-bit screens */ 341 342 void RZ3SetPanning(unsigned short xoff, unsigned short yoff); 343 344 /* 345 * Moves the logical coordinate (xoff, yoff) to the upper left corner 346 * of your screen. Of course, you shouldn't specify excess values that would 347 * show garbage in the lower right area of your screen... SetPanning() 348 * does NOT check for boundaries. 349 * Please read the documentation of RZ3SetHWCloc, too. 350 */ 351 352 void RZ3SetupHWC (unsigned char col1, unsigned col2, 353 unsigned char hsx, unsigned char hsy, 354 const unsigned long * data); 355 356 /* 357 * Initializes and switches on the hardware-cursor sprite. 358 * The parameters are: 359 * col1 - the first color 360 * col2 - the second color 361 * hsx - hot-spot location offset x 362 * hsy - hot-spot location offset y 363 * data - a pointer to the bitmap data to be used for the sprite 364 * 365 * The organization of the data is - as always with MSDOS related 366 * products - rather strange: The first and the second long-word 367 * represent bitplane0 for the first 64 pixels. The following two 368 * long-words represent bitplane1 for the first 64 pixels. But 369 * the long-words are organized in Intel-fashion, beginning with 370 * the least significant byte, ending with the most significant 371 * one. The most significant bit of each byte is the leftmost, 372 * as one would expect it. Now the weird color-assignments: 373 * 374 * bitplane0 bitplane1 result 375 * 0 0 col2 376 * 0 1 col1 377 * 1 0 transparent 378 * 1 1 background-color XOR 0xff 379 * 380 * The size of the data has to be 64*64*2/8 = 1024 byte, 381 * obviously, the size of the sprite is 64x64 pixels. 382 */ 383 384 385 void RZ3DisableHWC (void); 386 387 /* simply disables the hardware-cursor sprite */ 388 389 void RZ3SetHWCloc (unsigned short x, unsigned short y); 390 391 /* 392 * sets the location of the hardwar-cursor sprite to x,y 393 * relative to the logical screen beginning. 394 * IMPORTANT: If you use RZ3SetHWCloc() to set the position 395 * of the hardware-cursor sprite, all necessary panning is 396 * done automatically - you can treat the display without 397 * even knowing about the physical screen size that is 398 * displayed. 399 */ 400 401 #endif 402 403 #endif /* RZ3_BSD_h */ 404 405 406 /* -------------- START OF CODE -------------- */ 407 408 /* read VGA register */ 409 #define vgar(ba, reg) (*(((volatile unsigned char *)ba)+reg)) 410 411 /* write VGA register */ 412 #define vgaw(ba, reg, val) \ 413 *(((volatile unsigned char *)ba)+reg) = val 414 415 /* 416 * defines for the used register addresses (mw) 417 * 418 * NOTE: there are some registers that have different addresses when 419 * in mono or color mode. We only support color mode, and thus 420 * some addresses won't work in mono-mode! 421 */ 422 423 /* General Registers: */ 424 #define GREG_STATUS0_R 0x03C2 425 #define GREG_STATUS1_R 0x03DA 426 #define GREG_MISC_OUTPUT_R 0x03CC 427 #define GREG_MISC_OUTPUT_W 0x03C2 428 #define GREG_FEATURE_CONTROL_R 0x03CA 429 #define GREG_FEATURE_CONTROL_W 0x03DA 430 #define GREG_POS 0x0102 431 432 /* Attribute Controller: */ 433 #define ACT_ADDRESS 0x03C0 434 #define ACT_ADDRESS_R 0x03C0 435 #define ACT_ADDRESS_W 0x03C0 436 #define ACT_ADDRESS_RESET 0x03DA 437 #define ACT_ID_PALETTE0 0x00 438 #define ACT_ID_PALETTE1 0x01 439 #define ACT_ID_PALETTE2 0x02 440 #define ACT_ID_PALETTE3 0x03 441 #define ACT_ID_PALETTE4 0x04 442 #define ACT_ID_PALETTE5 0x05 443 #define ACT_ID_PALETTE6 0x06 444 #define ACT_ID_PALETTE7 0x07 445 #define ACT_ID_PALETTE8 0x08 446 #define ACT_ID_PALETTE9 0x09 447 #define ACT_ID_PALETTE10 0x0A 448 #define ACT_ID_PALETTE11 0x0B 449 #define ACT_ID_PALETTE12 0x0C 450 #define ACT_ID_PALETTE13 0x0D 451 #define ACT_ID_PALETTE14 0x0E 452 #define ACT_ID_PALETTE15 0x0F 453 #define ACT_ID_ATTR_MODE_CNTL 0x10 454 #define ACT_ID_OVERSCAN_COLOR 0x11 455 #define ACT_ID_COLOR_PLANE_ENA 0x12 456 #define ACT_ID_HOR_PEL_PANNING 0x13 457 #define ACT_ID_COLOR_SELECT 0x14 458 459 /* Graphics Controller: */ 460 #define GCT_ADDRESS 0x03CE 461 #define GCT_ADDRESS_R 0x03CE 462 #define GCT_ADDRESS_W 0x03CF 463 #define GCT_ID_SET_RESET 0x00 464 #define GCT_ID_ENABLE_SET_RESET 0x01 465 #define GCT_ID_COLOR_COMPARE 0x02 466 #define GCT_ID_DATA_ROTATE 0x03 467 #define GCT_ID_READ_MAP_SELECT 0x04 468 #define GCT_ID_GRAPHICS_MODE 0x05 469 #define GCT_ID_MISC 0x06 470 #define GCT_ID_COLOR_XCARE 0x07 471 #define GCT_ID_BITMASK 0x08 472 473 /* Sequencer: */ 474 #define SEQ_ADDRESS 0x03C4 475 #define SEQ_ADDRESS_R 0x03C4 476 #define SEQ_ADDRESS_W 0x03C5 477 #define SEQ_ID_RESET 0x00 478 #define SEQ_ID_CLOCKING_MODE 0x01 479 #define SEQ_ID_MAP_MASK 0x02 480 #define SEQ_ID_CHAR_MAP_SELECT 0x03 481 #define SEQ_ID_MEMORY_MODE 0x04 482 #define SEQ_ID_EXTENDED_ENABLE 0x05 /* down from here, all seq registers are NCR extensions */ 483 #define SEQ_ID_UNKNOWN1 0x06 484 #define SEQ_ID_UNKNOWN2 0x07 485 #define SEQ_ID_CHIP_ID 0x08 486 #define SEQ_ID_UNKNOWN3 0x09 487 #define SEQ_ID_CURSOR_COLOR1 0x0A 488 #define SEQ_ID_CURSOR_COLOR0 0x0B 489 #define SEQ_ID_CURSOR_CONTROL 0x0C 490 #define SEQ_ID_CURSOR_X_LOC_HI 0x0D 491 #define SEQ_ID_CURSOR_X_LOC_LO 0x0E 492 #define SEQ_ID_CURSOR_Y_LOC_HI 0x0F 493 #define SEQ_ID_CURSOR_Y_LOC_LO 0x10 494 #define SEQ_ID_CURSOR_X_INDEX 0x11 495 #define SEQ_ID_CURSOR_Y_INDEX 0x12 496 #define SEQ_ID_CURSOR_STORE_HI 0x13 /* manual still wrong here.. argl! */ 497 #define SEQ_ID_CURSOR_STORE_LO 0x14 /* downto 0x16 */ 498 #define SEQ_ID_CURSOR_ST_OFF_HI 0x15 499 #define SEQ_ID_CURSOR_ST_OFF_LO 0x16 500 #define SEQ_ID_CURSOR_PIXELMASK 0x17 501 #define SEQ_ID_PRIM_HOST_OFF_HI 0x18 502 #define SEQ_ID_PRIM_HOST_OFF_LO 0x19 503 #define SEQ_ID_LINEAR_0 0x1A 504 #define SEQ_ID_LINEAR_1 0x1B 505 #define SEQ_ID_SEC_HOST_OFF_HI 0x1C 506 #define SEQ_ID_SEC_HOST_OFF_LO 0x1D 507 #define SEQ_ID_EXTENDED_MEM_ENA 0x1E 508 #define SEQ_ID_EXT_CLOCK_MODE 0x1F 509 #define SEQ_ID_EXT_VIDEO_ADDR 0x20 510 #define SEQ_ID_EXT_PIXEL_CNTL 0x21 511 #define SEQ_ID_BUS_WIDTH_FEEDB 0x22 512 #define SEQ_ID_PERF_SELECT 0x23 513 #define SEQ_ID_COLOR_EXP_WFG 0x24 514 #define SEQ_ID_COLOR_EXP_WBG 0x25 515 #define SEQ_ID_EXT_RW_CONTROL 0x26 516 #define SEQ_ID_MISC_FEATURE_SEL 0x27 517 #define SEQ_ID_COLOR_KEY_CNTL 0x28 518 #define SEQ_ID_COLOR_KEY_MATCH0 0x29 519 #define SEQ_ID_COLOR_KEY_MATCH1 0x2A 520 #define SEQ_ID_COLOR_KEY_MATCH2 0x2B 521 #define SEQ_ID_UNKNOWN6 0x2C 522 #define SEQ_ID_CRC_CONTROL 0x2D 523 #define SEQ_ID_CRC_DATA_LOW 0x2E 524 #define SEQ_ID_CRC_DATA_HIGH 0x2F 525 #define SEQ_ID_MEMORY_MAP_CNTL 0x30 526 #define SEQ_ID_ACM_APERTURE_1 0x31 527 #define SEQ_ID_ACM_APERTURE_2 0x32 528 #define SEQ_ID_ACM_APERTURE_3 0x33 529 #define SEQ_ID_BIOS_UTILITY_0 0x3e 530 #define SEQ_ID_BIOS_UTILITY_1 0x3f 531 532 /* CRT Controller: */ 533 #define CRT_ADDRESS 0x03D4 534 #define CRT_ADDRESS_R 0x03D5 535 #define CRT_ADDRESS_W 0x03D5 536 #define CRT_ID_HOR_TOTAL 0x00 537 #define CRT_ID_HOR_DISP_ENA_END 0x01 538 #define CRT_ID_START_HOR_BLANK 0x02 539 #define CRT_ID_END_HOR_BLANK 0x03 540 #define CRT_ID_START_HOR_RETR 0x04 541 #define CRT_ID_END_HOR_RETR 0x05 542 #define CRT_ID_VER_TOTAL 0x06 543 #define CRT_ID_OVERFLOW 0x07 544 #define CRT_ID_PRESET_ROW_SCAN 0x08 545 #define CRT_ID_MAX_SCAN_LINE 0x09 546 #define CRT_ID_CURSOR_START 0x0A 547 #define CRT_ID_CURSOR_END 0x0B 548 #define CRT_ID_START_ADDR_HIGH 0x0C 549 #define CRT_ID_START_ADDR_LOW 0x0D 550 #define CRT_ID_CURSOR_LOC_HIGH 0x0E 551 #define CRT_ID_CURSOR_LOC_LOW 0x0F 552 #define CRT_ID_START_VER_RETR 0x10 553 #define CRT_ID_END_VER_RETR 0x11 554 #define CRT_ID_VER_DISP_ENA_END 0x12 555 #define CRT_ID_OFFSET 0x13 556 #define CRT_ID_UNDERLINE_LOC 0x14 557 #define CRT_ID_START_VER_BLANK 0x15 558 #define CRT_ID_END_VER_BLANK 0x16 559 #define CRT_ID_MODE_CONTROL 0x17 560 #define CRT_ID_LINE_COMPARE 0x18 561 #define CRT_ID_UNKNOWN1 0x19 /* are these register really void ? */ 562 #define CRT_ID_UNKNOWN2 0x1A 563 #define CRT_ID_UNKNOWN3 0x1B 564 #define CRT_ID_UNKNOWN4 0x1C 565 #define CRT_ID_UNKNOWN5 0x1D 566 #define CRT_ID_UNKNOWN6 0x1E 567 #define CRT_ID_UNKNOWN7 0x1F 568 #define CRT_ID_UNKNOWN8 0x20 569 #define CRT_ID_UNKNOWN9 0x21 570 #define CRT_ID_UNKNOWN10 0x22 571 #define CRT_ID_UNKNOWN11 0x23 572 #define CRT_ID_UNKNOWN12 0x24 573 #define CRT_ID_UNKNOWN13 0x25 574 #define CRT_ID_UNKNOWN14 0x26 575 #define CRT_ID_UNKNOWN15 0x27 576 #define CRT_ID_UNKNOWN16 0x28 577 #define CRT_ID_UNKNOWN17 0x29 578 #define CRT_ID_UNKNOWN18 0x2A 579 #define CRT_ID_UNKNOWN19 0x2B 580 #define CRT_ID_UNKNOWN20 0x2C 581 #define CRT_ID_UNKNOWN21 0x2D 582 #define CRT_ID_UNKNOWN22 0x2E 583 #define CRT_ID_UNKNOWN23 0x2F 584 #define CRT_ID_EXT_HOR_TIMING1 0x30 /* down from here, all crt registers are NCR extensions */ 585 #define CRT_ID_EXT_START_ADDR 0x31 586 #define CRT_ID_EXT_HOR_TIMING2 0x32 587 #define CRT_ID_EXT_VER_TIMING 0x33 588 #define CRT_ID_MONITOR_POWER 0x34 589 590 /* PLL chip (clock frequency synthesizer) I'm guessing here... */ 591 #define PLL_ADDRESS 0x83c8 592 #define PLL_ADDRESS_W 0x83c9 593 594 595 /* Video DAC */ 596 #define VDAC_ADDRESS 0x03c8 597 #define VDAC_ADDRESS_W 0x03c8 598 #define VDAC_ADDRESS_R 0x03c7 599 #define VDAC_STATE 0x03c7 600 #define VDAC_DATA 0x03c9 601 #define VDAC_MASK 0x03c6 602 603 604 /* Accelerator Control Menu (memory mapped registers, includes blitter) */ 605 #define ACM_PRIMARY_OFFSET 0x00 606 #define ACM_SECONDARY_OFFSET 0x04 607 #define ACM_MODE_CONTROL 0x08 608 #define ACM_CURSOR_POSITION 0x0c 609 #define ACM_START_STATUS 0x30 610 #define ACM_CONTROL 0x34 611 #define ACM_RASTEROP_ROTATION 0x38 612 #define ACM_BITMAP_DIMENSION 0x3c 613 #define ACM_DESTINATION 0x40 614 #define ACM_SOURCE 0x44 615 #define ACM_PATTERN 0x48 616 #define ACM_FOREGROUND 0x4c 617 #define ACM_BACKGROUND 0x50 618 619 620 #define WGfx(ba, idx, val) \ 621 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 622 623 #define WSeq(ba, idx, val) \ 624 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 625 626 #define WCrt(ba, idx, val) \ 627 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 628 629 #define WAttr(ba, idx, val) \ 630 do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0) 631 632 #define Map(m) \ 633 do { WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 ); WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); } while (0) 634 635 #define WPLL(ba, idx, val) \ 636 do { vgaw(ba, PLL_ADDRESS, idx);\ 637 vgaw(ba, PLL_ADDRESS_W, (val & 0xff));\ 638 vgaw(ba, PLL_ADDRESS_W, (val >> 8)); } while (0) 639 640 641 static inline unsigned char RAttr(volatile void * ba, short idx) { 642 vgaw (ba, ACT_ADDRESS, idx); 643 return vgar (ba, ACT_ADDRESS_R); 644 } 645 646 static inline unsigned char RSeq(volatile void * ba, short idx) { 647 vgaw (ba, SEQ_ADDRESS, idx); 648 return vgar (ba, SEQ_ADDRESS_R); 649 } 650 651 static inline unsigned char RCrt(volatile void * ba, short idx) { 652 vgaw (ba, CRT_ADDRESS, idx); 653 return vgar (ba, CRT_ADDRESS_R); 654 } 655 656 static inline unsigned char RGfx(volatile void * ba, short idx) { 657 vgaw(ba, GCT_ADDRESS, idx); 658 return vgar (ba, GCT_ADDRESS_R); 659 } 660 661 void RZ3DisableHWC __P((struct grf_softc *gp)); 662 void RZ3SetupHWC __P((struct grf_softc *gp, unsigned char col1, unsigned int col2, unsigned char hsx, unsigned char hsy, const long unsigned int *data)); 663 void RZ3AlphaErase __P((struct grf_softc *gp, short unsigned int xd, short unsigned int yd, short unsigned int w, short unsigned int h)); 664 void RZ3AlphaCopy __P((struct grf_softc *gp, short unsigned int xs, short unsigned int ys, short unsigned int xd, short unsigned int yd, short unsigned int w, short unsigned int h)); 665 void RZ3BitBlit __P((struct grf_softc *gp, struct grf_bitblt *gbb)); 666 void RZ3BitBlit16 __P((struct grf_softc *gp, struct grf_bitblt *gbb)); 667 void RZ3SetCursorPos __P((struct grf_softc *gp, short unsigned int pos)); 668 void RZ3LoadPalette __P((struct grf_softc *gp, unsigned char *pal, unsigned char firstcol, unsigned char colors)); 669 void RZ3SetPalette __P((struct grf_softc *gp, unsigned char colornum, unsigned char red, unsigned char green, unsigned char blue)); 670 void RZ3SetPanning __P((struct grf_softc *gp, short unsigned int xoff, short unsigned int yoff)); 671 void RZ3SetHWCloc __P((struct grf_softc *gp, short unsigned int x, short unsigned int y)); 672 int rh_mode __P((register struct grf_softc *gp, int cmd, void *arg, int a2, int a3)); 673 int rh_ioctl __P((register struct grf_softc *gp, int cmd, void *data)); 674 int rh_getcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap)); 675 int rh_putcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap)); 676 int rh_getspritepos __P((struct grf_softc *gp, struct grf_position *pos)); 677 int rh_setspritepos __P((struct grf_softc *gp, struct grf_position *pos)); 678 int rh_getspriteinfo __P((struct grf_softc *gp, struct grf_spriteinfo *info)); 679 int rh_setspriteinfo __P((struct grf_softc *gp, struct grf_spriteinfo *info)); 680 int rh_getspritemax __P((struct grf_softc *gp, struct grf_position *pos)); 681 int rh_bitblt __P((struct grf_softc *gp, struct grf_bitblt *bb)); 682 683 684 struct ite_softc; 685 void rh_init __P((struct ite_softc *)); 686 void rh_cursor __P((struct ite_softc *, int)); 687 void rh_deinit __P((struct ite_softc *)); 688 void rh_putc __P((struct ite_softc *, int, int, int, int)); 689 void rh_clear __P((struct ite_softc *, int, int, int, int)); 690 void rh_scroll __P((struct ite_softc *, int, int, int, int)); 691 692 #endif /* _GRF_RHREG_H */ 693
Indexes created Thu Sep 25 16:09:42 GMT 2025