grf_rhreg.h revision 1.3
1 /* $NetBSD: grf_rhreg.h,v 1.3 1994/12/01 17:25:07 chopps Exp $ */ 2 3 #ifndef _GRF_RHREG_H 4 #define _GRF_RHREG_H 5 6 /* 7 * Written & Copyright by Lutz Vieweg. As for missing comments: see 8 * grf_rt.* 9 * 10 * Lutz provided these sources in C++, I tried to keep as much of it when 11 * converting to C. -mw- 12 */ 13 14 #define EMPTY_ALPHA 0x2010 /* this is the char and the attribute 15 that AlphaErase will fill into the 16 text-screen */ 17 18 #define MEMCLK 65000000 /* this is the memory clock value, you shouldn't 19 set it to less than 65000000, higher values may 20 speed up blits a little bit, if you raise this 21 value too much, some trash will appear on your 22 screen. */ 23 24 #define MEMSIZE 4 /* Set this to 1 or 4 (MB), according to the 25 RAM on your Retina BLT Z3 board */ 26 /* 27 * The following definitions are places in the frame-buffer memory 28 * which are used for special purposes. While the displayed screen 29 * itself is always beginning at the start of the frame-buffer 30 * memory, the following special places are located at the end 31 * of the memory to keep free as much space as possible for the 32 * screen - the user might want to use monitor-definitions with 33 * huge logical dimensions (e.g. 2048x2000 ?). This way of defining 34 * special locations in the frame-buffer memory is far from being 35 * elegant - you may want to use you own, real memory-management... 36 * but remember that some routines in RZ3_BSD.cc REALLY NEED those 37 * memory locations to function properly, so if you manage the 38 * frame-buffer memory on your own, make sure to change those 39 * definitions appropriately. 40 */ 41 42 /* reserve some space for one pattern line */ 43 #define PAT_MEM_SIZE 16*3 44 #define PAT_MEM_OFF (MEMSIZE*1024*1024 - PAT_MEM_SIZE) 45 46 /* reserve some space for the hardware cursor (up to 64x64 pixels) */ 47 #define HWC_MEM_SIZE 1024 48 #define HWC_MEM_OFF ((PAT_MEM_OFF - HWC_MEM_SIZE) & 0xffffff00) 49 50 /* 51 * The following structure is passed to RZ3Init() and holds the 52 * monitor-definition. You may either use one of the ready-made 53 * definitions in RZ3_monitors.cc or you can define them on your 54 * own, take a look at RZ3_monitors.cc for more information. 55 */ 56 struct MonDef { 57 58 /* first the general monitor characteristics */ 59 60 unsigned long FQ; 61 unsigned char FLG; 62 63 unsigned short MW; /* physical screen width in pixels */ 64 /* has to be at least a multiple of 8 */ 65 unsigned short MH; /* physical screen height in pixels */ 66 67 unsigned short HBS; 68 unsigned short HSS; 69 unsigned short HSE; 70 unsigned short HBE; 71 unsigned short HT; 72 unsigned short VBS; 73 unsigned short VSS; 74 unsigned short VSE; 75 unsigned short VBE; 76 unsigned short VT; 77 78 unsigned short DEP; /* Color-depth, 4 enables text-mode */ 79 /* 8 enables 256-color graphics-mode, */ 80 /* 16 and 24bit gfx not supported yet */ 81 82 unsigned char * PAL; /* points to 16*3 byte RGB-palette data */ 83 /* use LoadPalette() to set colors 0..255 */ 84 /* in 256-color-gfx mode */ 85 86 /* 87 * all following entries are font-specific in 88 * text-mode. Make sure your monitor 89 * parameters are calculated for the 90 * appropriate font width and height! 91 */ 92 93 unsigned short TX; /* Text-mode (DEP=4): */ 94 /* screen-width in characters */ 95 96 /* Gfx-mode (DEP > 4) */ 97 /* "logical" screen-width, */ 98 /* use values > MW to allow */ 99 /* hardware-panning */ 100 101 unsigned short TY; /* Text-mode: */ 102 /* screen-height in characters */ 103 104 /* Gfx-mode: "logical" screen */ 105 /* height for panning */ 106 107 /* the following values are currently unused for gfx-mode */ 108 109 unsigned short XY; /* TX*TY (speeds up some calcs.) */ 110 111 unsigned short FX; /* font-width (valid values: 4,7-16) */ 112 unsigned short FY; /* font-height (valid range: 1-32) */ 113 unsigned char * FData; /* pointer to the font-data */ 114 115 /* 116 * The font data is simply an array of bytes defining 117 * the chars in ascending order, line by line. If your 118 * font is wider than 8 pixel, FData has to be an 119 * array of words. 120 */ 121 122 unsigned short FLo; /* lowest character defined */ 123 unsigned short FHi; /* highest char. defined */ 124 125 }; 126 127 128 /* 129 * The following are the prototypes for the low-level 130 * routines you may want to call. 131 */ 132 133 #if 0 134 135 #ifdef __GNUG__ 136 137 /* The prototypes for C++, prototypes for C (with explanations) below */ 138 139 "C" unsigned char * RZ3Init (volatile void * HardWareAdress, struct MonDef * md); 140 "C" void RZ3SetCursorPos (unsigned short pos); 141 "C" void RZ3AlphaErase (unsigned short xd, unsigned short yd, 142 unsigned short w, unsigned short h ); 143 "C" void RZ3AlphaCopy (unsigned short xs, unsigned short ys, 144 unsigned short xd, unsigned short yd, 145 unsigned short w, unsigned short h ); 146 "C" void RZ3BitBlit (struct grf_bitblt * gbb ); 147 "C" void RZ3BitBlit16 (struct grf_bitblt * gbb ); 148 "C" void RZ3LoadPalette (unsigned char * pal, unsigned char firstcol, unsigned char colors); 149 "C" void RZ3SetPalette (unsigned char colornum, unsigned char red, unsigned char green, unsigned char blue); 150 "C" void RZ3SetPanning (unsigned short xoff, unsigned short yoff); 151 "C" void RZ3SetupHWC (unsigned char col1, unsigned col2, 152 unsigned char hsx, unsigned char hsy, 153 const unsigned long * data); 154 "C" void RZ3DisableHWC (void); 155 "C" void RZ3SetHWCloc (unsigned short x, unsigned short y); 156 #else 157 158 /* The prototypes for C */ 159 /* with a little explanation */ 160 161 unsigned char * RZ3Init(volatile void * BoardAdress, struct MonDef * md); 162 163 /* 164 * This routine initialises the Retina Z3 hardware, opens a 165 * text- or gfx-mode screen, depending on the the value of 166 * MonDef.DEP, and sets the cursor to position 0. 167 * It takes as arguments a pointer to the hardware-base 168 * address as it is denoted in the DevConf structure 169 * of the AmigaDOS, and a pointer to a struct MonDef 170 * which describes the screen-mode parameters. 171 * 172 * The routine returns 0 if it was unable to open the screen, 173 * or an unsigned char * to the display memory when it 174 * succeeded. 175 * 176 * The organisation of the display memory in text-mode is a 177 * little strange (Intel-typically...) : 178 * 179 * Byte 00 01 02 03 04 05 06 etc. 180 * Char0 Attr0 -- -- Char1 Attr1 -- etc. 181 * 182 * You may set a character and its associated attribute byte 183 * with a single word-access, or you may perform to byte writes 184 * for the char and attribute. Each 2. word has no meaning, 185 * and writes to theese locations are ignored. 186 * 187 * The attribute byte for each character has the following 188 * structure: 189 * 190 * Bit 7 6 5 4 3 2 1 0 191 * BLINK BACK2 BACK1 BACK0 FORE3 FORE2 FORE1 FORE0 192 * 193 * Were FORE is the foreground-color index (0-15) and 194 * BACK is the background color index (0-7). BLINK 195 * enables blinking for the associated character. 196 * The higher 8 colors in the standard palette are 197 * lighter than the lower 8, so you may see FORE3 as 198 * an intensity bit. If FORE == 1 or FORE == 9 and 199 * BACK == 0 the character is underlined. Since I don't 200 * think this looks good, it will probably change in a 201 * future release. 202 * 203 * There's no routine "SetChar" or "SetAttr" provided, 204 * because I think it's so trivial... a function call 205 * would be pure overhead. As an example, a routine 206 * to set the char code and attribute at position x,y: 207 * (assumed the value returned by RZ3Init was stored 208 * into "DispMem", the actual MonDef struct * is hold 209 * in "MDef") 210 * 211 * void SetChar(unsigned char chr, unsigned char attr, 212 * unsigned short x, unsigned short y) { 213 * 214 * unsigned struct MonDef * md = MDef; 215 * unsigned char * c = DispMem + x*4 + y*md->TX*4; 216 * 217 * *c++ = chr; 218 * *c = attr; 219 * 220 * } 221 * 222 * In gfx-mode, the memory organisation is rather simple, 223 * 1 byte per pixel in 256-color mode, one pixel after 224 * each other, line by line. 225 * 226 * When 16-bits per pixel are used, each two bytes represent 227 * one pixel. The meaning of the bits is the following: 228 * 229 * Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 230 * Component g2 g1 g0 b4 b3 b2 b1 b0 r4 r3 r2 r1 r0 g5 g4 g3 231 * 232 * Please note that the memory layout in gfx-mode depends 233 * on the logical screen-size, panning does only affect 234 * the appearance of the physical screen. 235 * 236 * Currently, RZ3Init() disables the Retina Z3 VBLANK IRQ, 237 * but beware: When running the Retina WB-Emu under 238 * AmigaDOS, the VBLANK IRQ is ENABLED... 239 * 240 */ 241 242 void RZ3LoadPalette(unsigned char * pal, unsigned char firstcol, unsigned char colors); 243 244 /* 245 * Loads the palette-registers. "pal" points to an array of unsigned char 246 * triplets, for the red, green and blue component. "firstcol" determines the 247 * number of the first palette-register to load (256 available). "colors" is 248 * the number of colors you want to put in the palette registers. 249 */ 250 251 void RZ3SetPalette(unsigned char colornum, unsigned char red, unsigned char green, unsigned char blue); 252 253 /* 254 * Allows you to set a single color in the palette, "colornum" is the number 255 * of the palette entry (256 available), "red", "green" and "blue" are the 256 * three components. 257 */ 258 259 void RZ3SetCursorPos(unsigned short pos); 260 261 /* 262 * This routine sets the text-mode hardware-cursor position to the screen 263 * location pos. pos can be calculated as (x + y * md->TY). 264 * Text-mode only! 265 */ 266 267 void RZ3AlphaCopy (unsigned short xs, unsigned short ys, 268 unsigned short xd, unsigned short yd, 269 unsigned short w, unsigned short h ); 270 271 /* 272 * This Routine utilizes the blitter to perform fast copies 273 * in the text-display. The paramters are: 274 * xs - source x-coordinate 275 * ys - source y-coordinate 276 * xd - destination x-coordinate 277 * yd - destination y-coordinate 278 * w - the width of the area to copy 279 * h - the height of the area to copy 280 * All coordinates are in characters. RZ3AlphaCopy does not 281 * check for boundaries - you've got to make sure that the 282 * parameters have sensible values. Text-mode only! 283 */ 284 285 286 void RZ3AlphaErase (unsigned short xd, unsigned short yd, 287 unsigned short w, unsigned short h ); 288 289 /* 290 * RZ3AlphaErase utilizes the blitter to erase portions of 291 * the text-display. The parameters are: 292 * xd - destination x-coordinate 293 * yd - destination y-coordinate 294 * w - the width of the area to erase 295 * h - the height of the area to erase 296 * All coordinates are in characters. RZ3AlphaCopy does not 297 * check for boundaries - you've got to make sure that the 298 * parameters have sensible values. Text-mode only! 299 * 300 * Since the blitter is unable to use a mask-pattern and a 301 * certain fill-value at the same time, this routine uses 302 * a simple trick: RZ3Init() clears a memory area twice as 303 * large as the text-display needs, and RZ3AlphaErase then 304 * simply uses RZ3AlphaCopy to copy the desired area from 305 * the empty text-screen to the actually displayed screen. 306 */ 307 308 void RZ3BitBlit (struct grf_bitblt * gbb ); 309 310 /* 311 * RZ3BitBlit utilizes the blitter to perform one of 16 312 * available logical operations on the display memory, 313 * among them ordinary fill- and copy operations. 314 * The only parameter is a pointer to a struct grf_bitblt: 315 * 316 * struct grf_bitblt { 317 * unsigned short op; see above definitions of GRFBBOPxxx 318 * unsigned short src_x, src_y; upper left corner of source-region 319 * unsigned short dst_x, dst_y; upper left corner of dest-region 320 * unsigned short w, h; width, height of region 321 * unsigned short mask; bitmask to apply 322 * }; 323 * 324 * All coordinates are in pixels. RZ3BitBlit does not 325 * check for boundaries - you've got to make sure that the 326 * parameters have sensible values. 8 bit gfx-mode only! 327 * 328 * The blitter has a lot more capabilities, which aren't 329 * currently used by theese routines, among them color-expanded 330 * and text-blits, which can speed up GUIs like X11 a lot. 331 * If you've got any idea how to make use of them within 332 * your routines, contact me, and I'll implement the necessary 333 * blit-operations. 334 */ 335 336 void RZ3BitBlit16( struct grf_bitblt * gbb ); 337 338 /* Does the same as RZ3BitBlit(), but for 16-bit screens */ 339 340 void RZ3SetPanning(unsigned short xoff, unsigned short yoff); 341 342 /* 343 * Moves the logical coordinate (xoff, yoff) to the upper left corner 344 * of your screen. Of course, you shouldn't specify excess values that would 345 * show garbage in the lower right area of your screen... SetPanning() 346 * does NOT check for boundaries. 347 * Please read the documentation of RZ3SetHWCloc, too. 348 */ 349 350 void RZ3SetupHWC (unsigned char col1, unsigned col2, 351 unsigned char hsx, unsigned char hsy, 352 const unsigned long * data); 353 354 /* 355 * Initializes and switches on the hardware-cursor sprite. 356 * The parameters are: 357 * col1 - the first color 358 * col2 - the second color 359 * hsx - hot-spot location offset x 360 * hsy - hot-spot location offset y 361 * data - a pointer to the bitmap data to be used for the sprite 362 * 363 * The organization of the data is - as always with MSDOS related 364 * products - rather strange: The first and the second long-word 365 * represent bitplane0 for the first 64 pixels. The following two 366 * long-words represent bitplane1 for the first 64 pixels. But 367 * the long-words are organized in Intel-fashion, beginning with 368 * the least significant byte, ending with the most significant 369 * one. The most significant bit of each byte is the leftmost, 370 * as one would expect it. Now the weird color-assignments: 371 * 372 * bitplane0 bitplane1 result 373 * 0 0 col2 374 * 0 1 col1 375 * 1 0 transparent 376 * 1 1 background-color XOR 0xff 377 * 378 * The size of the data has to be 64*64*2/8 = 1024 byte, 379 * obviously, the size of the sprite is 64x64 pixels. 380 */ 381 382 383 void RZ3DisableHWC (void); 384 385 /* simply disables the hardware-cursor sprite */ 386 387 void RZ3SetHWCloc (unsigned short x, unsigned short y); 388 389 /* 390 * sets the location of the hardwar-cursor sprite to x,y 391 * relative to the logical screen beginning. 392 * IMPORTANT: If you use RZ3SetHWCloc() to set the position 393 * of the hardware-cursor sprite, all necessary panning is 394 * done automatically - you can treat the display without 395 * even knowing about the physical screen size that is 396 * displayed. 397 */ 398 399 #endif 400 401 #endif /* RZ3_BSD_h */ 402 403 404 /* -------------- START OF CODE -------------- */ 405 406 /* read VGA register */ 407 #define vgar(ba, reg) (*(((volatile unsigned char *)ba)+reg)) 408 409 /* write VGA register */ 410 #define vgaw(ba, reg, val) \ 411 *(((volatile unsigned char *)ba)+reg) = val 412 413 /* 414 * defines for the used register addresses (mw) 415 * 416 * NOTE: there are some registers that have different addresses when 417 * in mono or color mode. We only support color mode, and thus 418 * some addresses won't work in mono-mode! 419 */ 420 421 /* General Registers: */ 422 #define GREG_STATUS0_R 0x03C2 423 #define GREG_STATUS1_R 0x03DA 424 #define GREG_MISC_OUTPUT_R 0x03CC 425 #define GREG_MISC_OUTPUT_W 0x03C2 426 #define GREG_FEATURE_CONTROL_R 0x03CA 427 #define GREG_FEATURE_CONTROL_W 0x03DA 428 #define GREG_POS 0x0102 429 430 /* Attribute Controller: */ 431 #define ACT_ADDRESS 0x03C0 432 #define ACT_ADDRESS_R 0x03C0 433 #define ACT_ADDRESS_W 0x03C0 434 #define ACT_ADDRESS_RESET 0x03DA 435 #define ACT_ID_PALETTE0 0x00 436 #define ACT_ID_PALETTE1 0x01 437 #define ACT_ID_PALETTE2 0x02 438 #define ACT_ID_PALETTE3 0x03 439 #define ACT_ID_PALETTE4 0x04 440 #define ACT_ID_PALETTE5 0x05 441 #define ACT_ID_PALETTE6 0x06 442 #define ACT_ID_PALETTE7 0x07 443 #define ACT_ID_PALETTE8 0x08 444 #define ACT_ID_PALETTE9 0x09 445 #define ACT_ID_PALETTE10 0x0A 446 #define ACT_ID_PALETTE11 0x0B 447 #define ACT_ID_PALETTE12 0x0C 448 #define ACT_ID_PALETTE13 0x0D 449 #define ACT_ID_PALETTE14 0x0E 450 #define ACT_ID_PALETTE15 0x0F 451 #define ACT_ID_ATTR_MODE_CNTL 0x10 452 #define ACT_ID_OVERSCAN_COLOR 0x11 453 #define ACT_ID_COLOR_PLANE_ENA 0x12 454 #define ACT_ID_HOR_PEL_PANNING 0x13 455 #define ACT_ID_COLOR_SELECT 0x14 456 457 /* Graphics Controller: */ 458 #define GCT_ADDRESS 0x03CE 459 #define GCT_ADDRESS_R 0x03CE 460 #define GCT_ADDRESS_W 0x03CF 461 #define GCT_ID_SET_RESET 0x00 462 #define GCT_ID_ENABLE_SET_RESET 0x01 463 #define GCT_ID_COLOR_COMPARE 0x02 464 #define GCT_ID_DATA_ROTATE 0x03 465 #define GCT_ID_READ_MAP_SELECT 0x04 466 #define GCT_ID_GRAPHICS_MODE 0x05 467 #define GCT_ID_MISC 0x06 468 #define GCT_ID_COLOR_XCARE 0x07 469 #define GCT_ID_BITMASK 0x08 470 471 /* Sequencer: */ 472 #define SEQ_ADDRESS 0x03C4 473 #define SEQ_ADDRESS_R 0x03C4 474 #define SEQ_ADDRESS_W 0x03C5 475 #define SEQ_ID_RESET 0x00 476 #define SEQ_ID_CLOCKING_MODE 0x01 477 #define SEQ_ID_MAP_MASK 0x02 478 #define SEQ_ID_CHAR_MAP_SELECT 0x03 479 #define SEQ_ID_MEMORY_MODE 0x04 480 #define SEQ_ID_EXTENDED_ENABLE 0x05 /* down from here, all seq registers are NCR extensions */ 481 #define SEQ_ID_UNKNOWN1 0x06 482 #define SEQ_ID_UNKNOWN2 0x07 483 #define SEQ_ID_CHIP_ID 0x08 484 #define SEQ_ID_UNKNOWN3 0x09 485 #define SEQ_ID_CURSOR_COLOR1 0x0A 486 #define SEQ_ID_CURSOR_COLOR0 0x0B 487 #define SEQ_ID_CURSOR_CONTROL 0x0C 488 #define SEQ_ID_CURSOR_X_LOC_HI 0x0D 489 #define SEQ_ID_CURSOR_X_LOC_LO 0x0E 490 #define SEQ_ID_CURSOR_Y_LOC_HI 0x0F 491 #define SEQ_ID_CURSOR_Y_LOC_LO 0x10 492 #define SEQ_ID_CURSOR_X_INDEX 0x11 493 #define SEQ_ID_CURSOR_Y_INDEX 0x12 494 #define SEQ_ID_CURSOR_STORE_HI 0x13 /* manual still wrong here.. argl! */ 495 #define SEQ_ID_CURSOR_STORE_LO 0x14 /* downto 0x16 */ 496 #define SEQ_ID_CURSOR_ST_OFF_HI 0x15 497 #define SEQ_ID_CURSOR_ST_OFF_LO 0x16 498 #define SEQ_ID_CURSOR_PIXELMASK 0x17 499 #define SEQ_ID_PRIM_HOST_OFF_HI 0x18 500 #define SEQ_ID_PRIM_HOST_OFF_LO 0x19 501 #define SEQ_ID_LINEAR_0 0x1A 502 #define SEQ_ID_LINEAR_1 0x1B 503 #define SEQ_ID_SEC_HOST_OFF_HI 0x1C 504 #define SEQ_ID_SEC_HOST_OFF_LO 0x1D 505 #define SEQ_ID_EXTENDED_MEM_ENA 0x1E 506 #define SEQ_ID_EXT_CLOCK_MODE 0x1F 507 #define SEQ_ID_EXT_VIDEO_ADDR 0x20 508 #define SEQ_ID_EXT_PIXEL_CNTL 0x21 509 #define SEQ_ID_BUS_WIDTH_FEEDB 0x22 510 #define SEQ_ID_PERF_SELECT 0x23 511 #define SEQ_ID_COLOR_EXP_WFG 0x24 512 #define SEQ_ID_COLOR_EXP_WBG 0x25 513 #define SEQ_ID_EXT_RW_CONTROL 0x26 514 #define SEQ_ID_MISC_FEATURE_SEL 0x27 515 #define SEQ_ID_COLOR_KEY_CNTL 0x28 516 #define SEQ_ID_COLOR_KEY_MATCH0 0x29 517 #define SEQ_ID_COLOR_KEY_MATCH1 0x2A 518 #define SEQ_ID_COLOR_KEY_MATCH2 0x2B 519 #define SEQ_ID_UNKNOWN6 0x2C 520 #define SEQ_ID_CRC_CONTROL 0x2D 521 #define SEQ_ID_CRC_DATA_LOW 0x2E 522 #define SEQ_ID_CRC_DATA_HIGH 0x2F 523 #define SEQ_ID_MEMORY_MAP_CNTL 0x30 524 #define SEQ_ID_ACM_APERTURE_1 0x31 525 #define SEQ_ID_ACM_APERTURE_2 0x32 526 #define SEQ_ID_ACM_APERTURE_3 0x33 527 #define SEQ_ID_BIOS_UTILITY_0 0x3e 528 #define SEQ_ID_BIOS_UTILITY_1 0x3f 529 530 /* CRT Controller: */ 531 #define CRT_ADDRESS 0x03D4 532 #define CRT_ADDRESS_R 0x03D5 533 #define CRT_ADDRESS_W 0x03D5 534 #define CRT_ID_HOR_TOTAL 0x00 535 #define CRT_ID_HOR_DISP_ENA_END 0x01 536 #define CRT_ID_START_HOR_BLANK 0x02 537 #define CRT_ID_END_HOR_BLANK 0x03 538 #define CRT_ID_START_HOR_RETR 0x04 539 #define CRT_ID_END_HOR_RETR 0x05 540 #define CRT_ID_VER_TOTAL 0x06 541 #define CRT_ID_OVERFLOW 0x07 542 #define CRT_ID_PRESET_ROW_SCAN 0x08 543 #define CRT_ID_MAX_SCAN_LINE 0x09 544 #define CRT_ID_CURSOR_START 0x0A 545 #define CRT_ID_CURSOR_END 0x0B 546 #define CRT_ID_START_ADDR_HIGH 0x0C 547 #define CRT_ID_START_ADDR_LOW 0x0D 548 #define CRT_ID_CURSOR_LOC_HIGH 0x0E 549 #define CRT_ID_CURSOR_LOC_LOW 0x0F 550 #define CRT_ID_START_VER_RETR 0x10 551 #define CRT_ID_END_VER_RETR 0x11 552 #define CRT_ID_VER_DISP_ENA_END 0x12 553 #define CRT_ID_OFFSET 0x13 554 #define CRT_ID_UNDERLINE_LOC 0x14 555 #define CRT_ID_START_VER_BLANK 0x15 556 #define CRT_ID_END_VER_BLANK 0x16 557 #define CRT_ID_MODE_CONTROL 0x17 558 #define CRT_ID_LINE_COMPARE 0x18 559 #define CRT_ID_UNKNOWN1 0x19 /* are these register really void ? */ 560 #define CRT_ID_UNKNOWN2 0x1A 561 #define CRT_ID_UNKNOWN3 0x1B 562 #define CRT_ID_UNKNOWN4 0x1C 563 #define CRT_ID_UNKNOWN5 0x1D 564 #define CRT_ID_UNKNOWN6 0x1E 565 #define CRT_ID_UNKNOWN7 0x1F 566 #define CRT_ID_UNKNOWN8 0x20 567 #define CRT_ID_UNKNOWN9 0x21 568 #define CRT_ID_UNKNOWN10 0x22 569 #define CRT_ID_UNKNOWN11 0x23 570 #define CRT_ID_UNKNOWN12 0x24 571 #define CRT_ID_UNKNOWN13 0x25 572 #define CRT_ID_UNKNOWN14 0x26 573 #define CRT_ID_UNKNOWN15 0x27 574 #define CRT_ID_UNKNOWN16 0x28 575 #define CRT_ID_UNKNOWN17 0x29 576 #define CRT_ID_UNKNOWN18 0x2A 577 #define CRT_ID_UNKNOWN19 0x2B 578 #define CRT_ID_UNKNOWN20 0x2C 579 #define CRT_ID_UNKNOWN21 0x2D 580 #define CRT_ID_UNKNOWN22 0x2E 581 #define CRT_ID_UNKNOWN23 0x2F 582 #define CRT_ID_EXT_HOR_TIMING1 0x30 /* down from here, all crt registers are NCR extensions */ 583 #define CRT_ID_EXT_START_ADDR 0x31 584 #define CRT_ID_EXT_HOR_TIMING2 0x32 585 #define CRT_ID_EXT_VER_TIMING 0x33 586 #define CRT_ID_MONITOR_POWER 0x34 587 588 /* PLL chip (clock frequency synthesizer) I'm guessing here... */ 589 #define PLL_ADDRESS 0x83c8 590 #define PLL_ADDRESS_W 0x83c9 591 592 593 /* Video DAC */ 594 #define VDAC_ADDRESS 0x03c8 595 #define VDAC_ADDRESS_W 0x03c8 596 #define VDAC_ADDRESS_R 0x03c7 597 #define VDAC_STATE 0x03c7 598 #define VDAC_DATA 0x03c9 599 #define VDAC_MASK 0x03c6 600 601 602 /* Accelerator Control Menu (memory mapped registers, includes blitter) */ 603 #define ACM_PRIMARY_OFFSET 0x00 604 #define ACM_SECONDARY_OFFSET 0x04 605 #define ACM_MODE_CONTROL 0x08 606 #define ACM_CURSOR_POSITION 0x0c 607 #define ACM_START_STATUS 0x30 608 #define ACM_CONTROL 0x34 609 #define ACM_RASTEROP_ROTATION 0x38 610 #define ACM_BITMAP_DIMENSION 0x3c 611 #define ACM_DESTINATION 0x40 612 #define ACM_SOURCE 0x44 613 #define ACM_PATTERN 0x48 614 #define ACM_FOREGROUND 0x4c 615 #define ACM_BACKGROUND 0x50 616 617 618 #define WGfx(ba, idx, val) \ 619 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 620 621 #define WSeq(ba, idx, val) \ 622 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 623 624 #define WCrt(ba, idx, val) \ 625 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 626 627 #define WAttr(ba, idx, val) \ 628 do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0) 629 630 #define Map(m) \ 631 do { WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 ); WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); } while (0) 632 633 #define WPLL(ba, idx, val) \ 634 do { vgaw(ba, PLL_ADDRESS, idx);\ 635 vgaw(ba, PLL_ADDRESS_W, (val & 0xff));\ 636 vgaw(ba, PLL_ADDRESS_W, (val >> 8)); } while (0) 637 638 639 static inline unsigned char RAttr(volatile void * ba, short idx) { 640 vgaw (ba, ACT_ADDRESS, idx); 641 return vgar (ba, ACT_ADDRESS_R); 642 } 643 644 static inline unsigned char RSeq(volatile void * ba, short idx) { 645 vgaw (ba, SEQ_ADDRESS, idx); 646 return vgar (ba, SEQ_ADDRESS_R); 647 } 648 649 static inline unsigned char RCrt(volatile void * ba, short idx) { 650 vgaw (ba, CRT_ADDRESS, idx); 651 return vgar (ba, CRT_ADDRESS_R); 652 } 653 654 static inline unsigned char RGfx(volatile void * ba, short idx) { 655 vgaw(ba, GCT_ADDRESS, idx); 656 return vgar (ba, GCT_ADDRESS_R); 657 } 658 659 void RZ3DisableHWC __P((struct grf_softc *gp)); 660 void RZ3SetupHWC __P((struct grf_softc *gp, unsigned char col1, unsigned int col2, unsigned char hsx, unsigned char hsy, const long unsigned int *data)); 661 void RZ3AlphaErase __P((struct grf_softc *gp, short unsigned int xd, short unsigned int yd, short unsigned int w, short unsigned int h)); 662 void RZ3AlphaCopy __P((struct grf_softc *gp, short unsigned int xs, short unsigned int ys, short unsigned int xd, short unsigned int yd, short unsigned int w, short unsigned int h)); 663 void RZ3BitBlit __P((struct grf_softc *gp, struct grf_bitblt *gbb)); 664 void RZ3BitBlit16 __P((struct grf_softc *gp, struct grf_bitblt *gbb)); 665 void RZ3SetCursorPos __P((struct grf_softc *gp, short unsigned int pos)); 666 void RZ3LoadPalette __P((struct grf_softc *gp, unsigned char *pal, unsigned char firstcol, unsigned char colors)); 667 void RZ3SetPalette __P((struct grf_softc *gp, unsigned char colornum, unsigned char red, unsigned char green, unsigned char blue)); 668 void RZ3SetPanning __P((struct grf_softc *gp, short unsigned int xoff, short unsigned int yoff)); 669 void RZ3SetHWCloc __P((struct grf_softc *gp, short unsigned int x, short unsigned int y)); 670 int rh_mode __P((register struct grf_softc *gp, int cmd, void *arg, int a2, int a3)); 671 int rh_ioctl __P((register struct grf_softc *gp, u_long cmd, void *data)); 672 int rh_getcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap)); 673 int rh_putcmap __P((struct grf_softc *gfp, struct grf_colormap *cmap)); 674 int rh_getspritepos __P((struct grf_softc *gp, struct grf_position *pos)); 675 int rh_setspritepos __P((struct grf_softc *gp, struct grf_position *pos)); 676 int rh_getspriteinfo __P((struct grf_softc *gp, struct grf_spriteinfo *info)); 677 int rh_setspriteinfo __P((struct grf_softc *gp, struct grf_spriteinfo *info)); 678 int rh_getspritemax __P((struct grf_softc *gp, struct grf_position *pos)); 679 int rh_bitblt __P((struct grf_softc *gp, struct grf_bitblt *bb)); 680 681 682 struct ite_softc; 683 void rh_init __P((struct ite_softc *)); 684 void rh_cursor __P((struct ite_softc *, int)); 685 void rh_deinit __P((struct ite_softc *)); 686 void rh_putc __P((struct ite_softc *, int, int, int, int)); 687 void rh_clear __P((struct ite_softc *, int, int, int, int)); 688 void rh_scroll __P((struct ite_softc *, int, int, int, int)); 689 690 #endif /* _GRF_RHREG_H */ 691
Indexes created Sat Sep 27 22:09:54 GMT 2025