grf_rtreg.h revision 1.3
1 1.3 chopps /* 2 1.3 chopps * $Id: grf_rtreg.h,v 1.3 1994/02/11 07:01:42 chopps Exp $ 3 1.3 chopps */ 4 1.3 chopps 5 1.1 mw #ifndef _GRF_RTREG_H 6 1.1 mw #define _GRF_RTREG_H 7 1.1 mw 8 1.1 mw /* NOTE: this driver for the MacroSystem Retina board was only possible, 9 1.1 mw because MacroSystem provided information about the pecularities 10 1.1 mw of the board. THANKS! Competition in Europe among gfx board 11 1.1 mw manufacturers is rather tough, so Lutz Vieweg, who wrote the 12 1.1 mw initial driver, has made an agreement with MS not to document 13 1.1 mw the driver source (see also his Copyright disclaimer at the 14 1.1 mw beginning of grf_rt.cc and ite_rt.cc). 15 1.1 mw -> ALL comments and register defines after 16 1.1 mw -> "/* -------------- START OF CODE -------------- * /" 17 1.1 mw -> have been added by myself (mw) from studying the publically 18 1.1 mw -> available "NCR 77C22E+" Data Manual 19 1.1 mw 20 1.1 mw Lutz' original driver source (without any of my comments) is 21 1.1 mw available on request. */ 22 1.1 mw 23 1.1 mw 24 1.1 mw #if 0 25 1.1 mw /* these are in dev/devices.h */ 26 1.1 mw 27 1.1 mw /* definitions to find the autoconfig-board under 28 1.1 mw AmigaDOS */ 29 1.1 mw 30 1.1 mw #define RETINA_MANUFACTURER 0x4754 31 1.1 mw #define RETINA_PRODUCT 6 32 1.1 mw #define RETINA_SERIALNUMBER 1 33 1.1 mw #endif 34 1.1 mw 35 1.1 mw 36 1.1 mw /* 37 1.1 mw For more information on the structure entries take a look at 38 1.1 mw grf_rt.cc and ite_rt.cc. 39 1.1 mw */ 40 1.1 mw 41 1.1 mw struct MonDef { 42 1.1 mw 43 1.1 mw /* first the general monitor characteristics */ 44 1.1 mw 45 1.1 mw unsigned long FQ; 46 1.1 mw unsigned char FLG; 47 1.1 mw 48 1.1 mw unsigned short MW; /* screen width in pixels */ 49 1.2 mw /* has to be at least a multiple of 8, */ 50 1.2 mw /* has to be a multiple of 64 in 256-color mode */ 51 1.2 mw /* if you want to use some great tricks */ 52 1.2 mw /* to speed up the vertical scrolling */ 53 1.1 mw unsigned short MH; /* screen height in pixels */ 54 1.1 mw 55 1.1 mw unsigned short HBS; 56 1.1 mw unsigned short HSS; 57 1.1 mw unsigned short HSE; 58 1.1 mw unsigned short HBE; 59 1.1 mw unsigned short HT; 60 1.1 mw unsigned short VBS; 61 1.1 mw unsigned short VSS; 62 1.1 mw unsigned short VSE; 63 1.1 mw unsigned short VBE; 64 1.1 mw unsigned short VT; 65 1.1 mw 66 1.1 mw unsigned short DEP; /* Color-depth, 4 for text-mode */ 67 1.2 mw /* 8 enables 256-color graphics-mode, */ 68 1.2 mw /* 16 and 24bit gfx not supported yet */ 69 1.1 mw 70 1.2 mw unsigned char * PAL; /* points to 16*3 byte RGB-palette data */ 71 1.2 mw /* use LoadPalette() to set colors 0..255 */ 72 1.2 mw /* in 256-color-gfx mode */ 73 1.1 mw 74 1.2 mw /* all following entries are font-specific in 75 1.2 mw text mode. Make sure your monitor 76 1.1 mw parameters are calculated for the 77 1.1 mw appropriate font width and height! 78 1.1 mw */ 79 1.1 mw 80 1.2 mw unsigned short TX; /* Text-mode (DEP=4): */ 81 1.2 mw /* screen-width in characters */ 82 1.2 mw /* currently, TX has to be a */ 83 1.2 mw /* multiple of 16! */ 84 1.2 mw 85 1.2 mw /* Gfx-mode (DEP > 4) */ 86 1.2 mw /* "logical" screen-width, */ 87 1.2 mw /* use values > MW to allow */ 88 1.2 mw /* hardware-panning */ 89 1.2 mw /* has to be a multiple of 8 */ 90 1.2 mw 91 1.2 mw unsigned short TY; /* Text-mode: */ 92 1.2 mw /* screen-height in characters */ 93 1.2 mw 94 1.2 mw /* Gfx-mode: "logical" screen */ 95 1.2 mw /* height for panning */ 96 1.2 mw 97 1.2 mw /* the following values are currently unused for gfx-mode */ 98 1.2 mw 99 1.1 mw unsigned short XY; /* TX*TY (speeds up some calcs.) */ 100 1.1 mw 101 1.1 mw unsigned short FX; /* font-width (valid values: 4,7-16) */ 102 1.1 mw unsigned short FY; /* font-height (valid range: 1-32) */ 103 1.1 mw unsigned char * FData; /* pointer to the font-data */ 104 1.1 mw 105 1.1 mw /* The font data is simply an array of bytes defining 106 1.1 mw the chars in ascending order, line by line. If your 107 1.1 mw font is wider than 8 pixel, FData has to be an 108 1.1 mw array of words. */ 109 1.1 mw 110 1.1 mw unsigned short FLo; /* lowest character defined */ 111 1.1 mw unsigned short FHi; /* highest char. defined */ 112 1.1 mw 113 1.1 mw }; 114 1.1 mw 115 1.1 mw 116 1.1 mw #if 0 117 1.1 mw /* Some ready-made MonDef structures are available in grf_rt.cc */ 118 1.1 mw 119 1.1 mw extern struct MonDef MON_640_512_60; 120 1.1 mw extern struct MonDef MON_768_600_60; 121 1.1 mw extern struct MonDef MON_768_600_80; 122 1.1 mw 123 1.1 mw /* text-screen resolutions wider than 1024 are currently damaged. 124 1.1 mw The VRAM access seems to become unstable at higher resolutions. 125 1.1 mw This may hopefully be subject of change. 126 1.1 mw */ 127 1.1 mw 128 1.1 mw extern struct MonDef MON_1024_768_80; 129 1.1 mw extern struct MonDef MON_1024_1024_59; 130 1.1 mw 131 1.1 mw /* WARNING: THE FOLLOWING MONITOR MODES EXCEED THE 90-MHz LIMIT THE PROCESSOR 132 1.1 mw HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT 133 1.1 mw MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)! */ 134 1.1 mw extern struct MonDef MON_1280_1024_60; 135 1.1 mw extern struct MonDef MON_1280_1024_69; 136 1.1 mw 137 1.1 mw /* Default monitor (change if this is too much for your monitor :-)) */ 138 1.1 mw #define DEFAULT_MONDEF MON_768_600_80 139 1.1 mw 140 1.1 mw #else 141 1.1 mw 142 1.1 mw /* nothing exported for now... */ 143 1.1 mw 144 1.1 mw #endif 145 1.1 mw 146 1.1 mw /* a standard 16-color palette is available in grf_rt.cc 147 1.1 mw and used by the standard monitor-definitions above */ 148 1.1 mw extern unsigned char NCRStdPalette[]; 149 1.1 mw 150 1.2 mw /* The prototypes for C 151 1.1 mw with a little explanation 152 1.1 mw 153 1.1 mw unsigned char * InitNCR(volatile void * BoardAdress, struct MonDef * md = &MON_640_512_60); 154 1.1 mw 155 1.1 mw This routine initialises the Retina hardware, opens a 156 1.2 mw text- or gfx-mode screen, depending on the the value of MonDef.DEP, 157 1.2 mw and sets the cursor to position 0. 158 1.2 mw It takes as arguments a pointer to the hardware-base 159 1.2 mw address as it is denoted in the DevConf structure 160 1.2 mw of the AmigaDOS, and a pointer to a struct MonDef 161 1.2 mw which describes the screen-mode parameters. 162 1.2 mw 163 1.1 mw The routine returns 0 if it was unable to open the screen, 164 1.1 mw or an unsigned char * to the display/attribute memory 165 1.1 mw when it succeeded. The organisation of the display memory 166 1.2 mw is a little strange in text-mode (Intel-typically...) : 167 1.1 mw 168 1.1 mw Byte 00 01 02 03 04 05 06 etc. 169 1.1 mw Char0 Attr0 -- -- Char1 Attr1 -- etc. 170 1.1 mw 171 1.1 mw You may set a character and its associated attribute byte 172 1.1 mw with a single word-access, or you may perform to byte writes 173 1.1 mw for the char and attribute. Each 2. word has no meaning, 174 1.1 mw and writes to theese locations are ignored. 175 1.1 mw 176 1.1 mw The attribute byte for each character has the following 177 1.1 mw structure: 178 1.1 mw 179 1.1 mw Bit 7 6 5 4 3 2 1 0 180 1.1 mw BLINK BACK2 BACK1 BACK0 FORE3 FORE2 FORE1 FORE0 181 1.1 mw 182 1.1 mw Were FORE is the foreground-color index (0-15) and 183 1.1 mw BACK is the background color index (0-7). BLINK 184 1.1 mw enables blinking for the associated character. 185 1.1 mw The higher 8 colors in the standard palette are 186 1.1 mw lighter than the lower 8, so you may see FORE3 as 187 1.1 mw an intensity bit. If FORE == 1 or FORE == 9 and 188 1.1 mw BACK == 0 the character is underlined. Since I don't 189 1.1 mw think this looks good, it will probably change in a 190 1.1 mw future release. 191 1.1 mw 192 1.1 mw There's no routine "SetChar" or "SetAttr" provided, 193 1.1 mw because I think it's so trivial... a function call 194 1.1 mw would be pure overhead. As an example, a routine 195 1.1 mw to set the char code and attribute at position x,y: 196 1.1 mw (assumed the value returned by InitNCR was stored 197 1.1 mw into "DispMem", the actual MonDef struct * is hold 198 1.1 mw in "MDef") 199 1.1 mw 200 1.1 mw void SetChar(unsigned char chr, unsigned char attr, 201 1.1 mw unsigned short x, unsigned short y) { 202 1.1 mw 203 1.1 mw unsigned struct MonDef * md = MDef; 204 1.1 mw unsigned char * c = DispMem + x*4 + y*md->TX*4; 205 1.1 mw 206 1.1 mw *c++ = chr; 207 1.2 mw *c = attr; 208 1.2 mw 209 1.1 mw } 210 1.1 mw 211 1.2 mw In Gfx-mode, the memory organisation is rather simple, 212 1.2 mw 1 byte per pixel in 256-color mode, one pixel after 213 1.2 mw each other, line by line. 214 1.2 mw 215 1.1 mw Currently, InitNCR() disables the Retina VBLANK IRQ, 216 1.1 mw but beware: When running the Retina WB-Emu under 217 1.1 mw AmigaDOS, the VBLANK IRQ is ENABLED. 218 1.1 mw 219 1.1 mw void SetCursorPos(unsigned short pos); 220 1.1 mw 221 1.1 mw This routine sets the hardware-cursor position 222 1.1 mw to the screen location pos. pos can be calculated 223 1.1 mw as (x + y * md->TY). 224 1.2 mw Text-mode only! 225 1.1 mw 226 1.1 mw void ScreenUp(void); 227 1.1 mw 228 1.1 mw A somewhat optimized routine that scrolls the whole 229 1.1 mw screen up one row. A good idea to compile this piece 230 1.1 mw of code with optimization enabled. 231 1.2 mw Text-mode only! 232 1.1 mw 233 1.1 mw void ScreenDown(void); 234 1.1 mw 235 1.1 mw A somewhat optimized routine that scrolls the whole 236 1.1 mw screen down one row. A good idea to compile this piece 237 1.1 mw of code with optimization enabled. 238 1.2 mw Text-mode only! 239 1.2 mw 240 1.2 mw unsigned char * SetSegmentPtr(unsigned long adress); 241 1.2 mw 242 1.2 mw Sets the beginning of the 64k-memory segment to the 243 1.2 mw adress specified by the unsigned long. If adress MOD 64 244 1.2 mw is != 0, the return value will point to the segments 245 1.2 mw start in the Amiga adress space + (adress MOD 64). 246 1.2 mw Don't use more than (65536-64) bytes in the segment 247 1.2 mw you set if you aren't sure that (adress MOD 64) == 0. 248 1.2 mw See retina.doc from MS for further information. 249 1.2 mw 250 1.2 mw void ClearScreen(unsigned char color); 251 1.2 mw 252 1.2 mw Fills the whole screen with "color" - 256-color mode only! 253 1.2 mw 254 1.2 mw void LoadPalette(unsigned char * pal, unsigned char firstcol, 255 1.2 mw unsigned char colors); 256 1.2 mw 257 1.2 mw Loads the palette-registers. "pal" points to an array of unsigned char 258 1.2 mw triplets, for the red, green and blue component. "firstcol" determines the 259 1.2 mw number of the first palette-register to load (256 available). "colors" 260 1.2 mw is the number of colors you want to put in the palette registers. 261 1.2 mw 262 1.2 mw void SetPalette(unsigned char colornum, unsigned char red, 263 1.2 mw unsigned char green, unsigned char blue); 264 1.2 mw 265 1.2 mw Allows you to set a single color in the palette, "colornum" is the number 266 1.2 mw of the palette entry (256 available), "red", "green" and "blue" are the 267 1.2 mw three components. 268 1.2 mw 269 1.2 mw void SetPanning(unsigned short xoff, unsigned short yoff); 270 1.2 mw 271 1.2 mw Moves the logical coordinate (xoff, yoff) to the upper left corner 272 1.2 mw of your screen. Of course, you shouldn't specify excess values that would 273 1.2 mw show garbage in the lower right area of your screen... SetPanning() 274 1.2 mw does NOT check for boundaries. 275 1.1 mw */ 276 1.1 mw 277 1.1 mw /* -------------- START OF CODE -------------- */ 278 1.1 mw 279 1.1 mw /* read VGA register */ 280 1.1 mw #define vgar(ba, reg) (*(((volatile unsigned char *)ba)+reg)) 281 1.1 mw 282 1.1 mw /* write VGA register */ 283 1.1 mw #define vgaw(ba, reg, val) \ 284 1.1 mw *(((volatile unsigned char *)ba)+reg) = val 285 1.1 mw 286 1.1 mw /* defines for the used register addresses (mw) 287 1.1 mw 288 1.1 mw NOTE: there are some registers that have different addresses when 289 1.1 mw in mono or color mode. We only support color mode, and thus 290 1.1 mw some addresses won't work in mono-mode! */ 291 1.1 mw 292 1.1 mw /* General Registers: */ 293 1.1 mw #define GREG_STATUS0_R 0x43C2 294 1.1 mw #define GREG_STATUS1_R 0x43DA 295 1.1 mw #define GREG_MISC_OUTPUT_R 0x43CC 296 1.1 mw #define GREG_MISC_OUTPUT_W 0x43C2 297 1.1 mw #define GREG_FEATURE_CONTROL_R 0x43CA 298 1.1 mw #define GREG_FEATURE_CONTROL_W 0x43DA 299 1.1 mw #define GREG_POS 0x4102 300 1.1 mw 301 1.1 mw /* Attribute Controller: */ 302 1.1 mw #define ACT_ADDRESS 0x43C0 303 1.1 mw #define ACT_ADDRESS_R 0x03C0 304 1.1 mw #define ACT_ADDRESS_W 0x43C0 305 1.1 mw #define ACT_ID_PALETTE0 0x00 306 1.1 mw #define ACT_ID_PALETTE1 0x01 307 1.1 mw #define ACT_ID_PALETTE2 0x02 308 1.1 mw #define ACT_ID_PALETTE3 0x03 309 1.1 mw #define ACT_ID_PALETTE4 0x04 310 1.1 mw #define ACT_ID_PALETTE5 0x05 311 1.1 mw #define ACT_ID_PALETTE6 0x06 312 1.1 mw #define ACT_ID_PALETTE7 0x07 313 1.1 mw #define ACT_ID_PALETTE8 0x08 314 1.1 mw #define ACT_ID_PALETTE9 0x09 315 1.1 mw #define ACT_ID_PALETTE10 0x0A 316 1.1 mw #define ACT_ID_PALETTE11 0x0B 317 1.1 mw #define ACT_ID_PALETTE12 0x0C 318 1.1 mw #define ACT_ID_PALETTE13 0x0D 319 1.1 mw #define ACT_ID_PALETTE14 0x0E 320 1.1 mw #define ACT_ID_PALETTE15 0x0F 321 1.1 mw #define ACT_ID_ATTR_MODE_CNTL 0x10 322 1.1 mw #define ACT_ID_OVERSCAN_COLOR 0x11 323 1.1 mw #define ACT_ID_COLOR_PLANE_ENA 0x12 324 1.1 mw #define ACT_ID_HOR_PEL_PANNING 0x13 325 1.1 mw #define ACT_ID_COLOR_SELECT 0x14 326 1.1 mw 327 1.1 mw /* Graphics Controller: */ 328 1.1 mw #define GCT_ADDRESS 0x43CE 329 1.1 mw #define GCT_ADDRESS_R 0x03CE 330 1.1 mw #define GCT_ADDRESS_W 0x03CE 331 1.1 mw #define GCT_ID_SET_RESET 0x00 332 1.1 mw #define GCT_ID_ENABLE_SET_RESET 0x01 333 1.1 mw #define GCT_ID_COLOR_COMPARE 0x02 334 1.1 mw #define GCT_ID_DATA_ROTATE 0x03 335 1.1 mw #define GCT_ID_READ_MAP_SELECT 0x04 336 1.1 mw #define GCT_ID_GRAPHICS_MODE 0x05 337 1.1 mw #define GCT_ID_MISC 0x06 338 1.1 mw #define GCT_ID_COLOR_XCARE 0x07 339 1.1 mw #define GCT_ID_BITMASK 0x08 340 1.1 mw 341 1.1 mw /* Sequencer: */ 342 1.1 mw #define SEQ_ADDRESS 0x43C4 343 1.1 mw #define SEQ_ADDRESS_R 0x03C4 344 1.1 mw #define SEQ_ADDRESS_W 0x03C4 345 1.1 mw #define SEQ_ID_RESET 0x00 346 1.1 mw #define SEQ_ID_CLOCKING_MODE 0x01 347 1.1 mw #define SEQ_ID_MAP_MASK 0x02 348 1.1 mw #define SEQ_ID_CHAR_MAP_SELECT 0x03 349 1.1 mw #define SEQ_ID_MEMORY_MODE 0x04 350 1.1 mw #define SEQ_ID_EXTENDED_ENABLE 0x05 /* down from here, all seq registers are NCR extensions */ 351 1.2 mw #define SEQ_ID_UNKNOWN1 0x06 /* it does exist so it's probably usefull */ 352 1.2 mw #define SEQ_ID_UNKNOWN2 0x07 /* it does exist so it's probably usefull */ 353 1.1 mw #define SEQ_ID_CHIP_ID 0x08 354 1.2 mw #define SEQ_ID_UNKNOWN3 0x09 /* it does exist so it's probably usefull */ 355 1.1 mw #define SEQ_ID_CURSOR_COLOR1 0x0A 356 1.1 mw #define SEQ_ID_CURSOR_COLOR0 0x0B 357 1.1 mw #define SEQ_ID_CURSOR_CONTROL 0x0C 358 1.1 mw #define SEQ_ID_CURSOR_X_LOC_HI 0x0D 359 1.1 mw #define SEQ_ID_CURSOR_X_LOC_LO 0x0E 360 1.1 mw #define SEQ_ID_CURSOR_Y_LOC_HI 0x0F 361 1.1 mw #define SEQ_ID_CURSOR_Y_LOC_LO 0x10 362 1.1 mw #define SEQ_ID_CURSOR_X_INDEX 0x11 363 1.1 mw #define SEQ_ID_CURSOR_Y_INDEX 0x12 364 1.2 mw #define SEQ_ID_CURSOR_STORE_HI 0x13 /* printed manual is wrong about these.. */ 365 1.1 mw #define SEQ_ID_CURSOR_STORE_LO 0x14 366 1.2 mw #define SEQ_ID_CURSOR_ST_OFF_HI 0x15 367 1.2 mw #define SEQ_ID_CURSOR_ST_OFF_LO 0x16 368 1.1 mw #define SEQ_ID_CURSOR_PIXELMASK 0x17 369 1.1 mw #define SEQ_ID_PRIM_HOST_OFF_HI 0x18 370 1.1 mw #define SEQ_ID_PRIM_HOST_OFF_LO 0x19 371 1.2 mw #define SEQ_ID_DISP_OFF_HI 0x1A 372 1.2 mw #define SEQ_ID_DISP_OFF_LO 0x1B 373 1.1 mw #define SEQ_ID_SEC_HOST_OFF_HI 0x1C 374 1.1 mw #define SEQ_ID_SEC_HOST_OFF_LO 0x1D 375 1.1 mw #define SEQ_ID_EXTENDED_MEM_ENA 0x1E 376 1.1 mw #define SEQ_ID_EXT_CLOCK_MODE 0x1F 377 1.1 mw #define SEQ_ID_EXT_VIDEO_ADDR 0x20 378 1.1 mw #define SEQ_ID_EXT_PIXEL_CNTL 0x21 379 1.1 mw #define SEQ_ID_BUS_WIDTH_FEEDB 0x22 380 1.1 mw #define SEQ_ID_PERF_SELECT 0x23 381 1.1 mw #define SEQ_ID_COLOR_EXP_WFG 0x24 382 1.1 mw #define SEQ_ID_COLOR_EXP_WBG 0x25 383 1.1 mw #define SEQ_ID_EXT_RW_CONTROL 0x26 384 1.1 mw #define SEQ_ID_MISC_FEATURE_SEL 0x27 385 1.1 mw #define SEQ_ID_COLOR_KEY_CNTL 0x28 386 1.1 mw #define SEQ_ID_COLOR_KEY_MATCH 0x29 387 1.2 mw #define SEQ_ID_UNKNOWN4 0x2A 388 1.2 mw #define SEQ_ID_UNKNOWN5 0x2B 389 1.2 mw #define SEQ_ID_UNKNOWN6 0x2C 390 1.1 mw #define SEQ_ID_CRC_CONTROL 0x2D 391 1.1 mw #define SEQ_ID_CRC_DATA_LOW 0x2E 392 1.1 mw #define SEQ_ID_CRC_DATA_HIGH 0x2F 393 1.1 mw 394 1.1 mw /* CRT Controller: */ 395 1.1 mw #define CRT_ADDRESS 0x43D4 396 1.1 mw #define CRT_ADDRESS_R 0x03D4 397 1.1 mw #define CRT_ADDRESS_W 0x03D4 398 1.1 mw #define CRT_ID_HOR_TOTAL 0x00 399 1.1 mw #define CRT_ID_HOR_DISP_ENA_END 0x01 400 1.1 mw #define CRT_ID_START_HOR_BLANK 0x02 401 1.1 mw #define CRT_ID_END_HOR_BLANK 0x03 402 1.1 mw #define CRT_ID_START_HOR_RETR 0x04 403 1.1 mw #define CRT_ID_END_HOR_RETR 0x05 404 1.1 mw #define CRT_ID_VER_TOTAL 0x06 405 1.1 mw #define CRT_ID_OVERFLOW 0x07 406 1.1 mw #define CRT_ID_PRESET_ROW_SCAN 0x08 407 1.1 mw #define CRT_ID_MAX_SCAN_LINE 0x09 408 1.1 mw #define CRT_ID_CURSOR_START 0x0A 409 1.1 mw #define CRT_ID_CURSOR_END 0x0B 410 1.1 mw #define CRT_ID_START_ADDR_HIGH 0x0C 411 1.1 mw #define CRT_ID_START_ADDR_LOW 0x0D 412 1.1 mw #define CRT_ID_CURSOR_LOC_HIGH 0x0E 413 1.1 mw #define CRT_ID_CURSOR_LOC_LOW 0x0F 414 1.1 mw #define CRT_ID_START_VER_RETR 0x10 415 1.1 mw #define CRT_ID_END_VER_RETR 0x11 416 1.1 mw #define CRT_ID_VER_DISP_ENA_END 0x12 417 1.1 mw #define CRT_ID_OFFSET 0x13 418 1.1 mw #define CRT_ID_UNDERLINE_LOC 0x14 419 1.1 mw #define CRT_ID_START_VER_BLANK 0x15 420 1.1 mw #define CRT_ID_END_VER_BLANK 0x16 421 1.1 mw #define CRT_ID_MODE_CONTROL 0x17 422 1.1 mw #define CRT_ID_LINE_COMPARE 0x18 423 1.2 mw #define CRT_ID_UNKNOWN1 0x19 /* are these register really void ? */ 424 1.2 mw #define CRT_ID_UNKNOWN2 0x1A 425 1.2 mw #define CRT_ID_UNKNOWN3 0x1B 426 1.2 mw #define CRT_ID_UNKNOWN4 0x1C 427 1.2 mw #define CRT_ID_UNKNOWN5 0x1D 428 1.2 mw #define CRT_ID_UNKNOWN6 0x1E 429 1.2 mw #define CRT_ID_UNKNOWN7 0x1F 430 1.2 mw #define CRT_ID_UNKNOWN8 0x20 431 1.2 mw #define CRT_ID_UNKNOWN9 0x21 432 1.2 mw #define CRT_ID_UNKNOWN10 0x22 433 1.2 mw #define CRT_ID_UNKNOWN11 0x23 434 1.2 mw #define CRT_ID_UNKNOWN12 0x24 435 1.2 mw #define CRT_ID_UNKNOWN13 0x25 436 1.2 mw #define CRT_ID_UNKNOWN14 0x26 437 1.2 mw #define CRT_ID_UNKNOWN15 0x27 438 1.2 mw #define CRT_ID_UNKNOWN16 0x28 439 1.2 mw #define CRT_ID_UNKNOWN17 0x29 440 1.2 mw #define CRT_ID_UNKNOWN18 0x2A 441 1.2 mw #define CRT_ID_UNKNOWN19 0x2B 442 1.2 mw #define CRT_ID_UNKNOWN20 0x2C 443 1.2 mw #define CRT_ID_UNKNOWN21 0x2D 444 1.2 mw #define CRT_ID_UNKNOWN22 0x2E 445 1.2 mw #define CRT_ID_UNKNOWN23 0x2F 446 1.1 mw #define CRT_ID_EXT_HOR_TIMING1 0x30 /* down from here, all crt registers are NCR extensions */ 447 1.1 mw #define CRT_ID_EXT_START_ADDR 0x31 448 1.1 mw #define CRT_ID_EXT_HOR_TIMING2 0x32 449 1.1 mw #define CRT_ID_EXT_VER_TIMING 0x33 450 1.1 mw 451 1.1 mw /* Video DAC (these are *pure* guesses from the usage of these registers, 452 1.1 mw I don't have a data sheet for this chip:-/) */ 453 1.1 mw #define VDAC_REG_D 0x800d /* well.. */ 454 1.1 mw #define VDAC_REG_SELECT 0x8001 /* perhaps.. */ 455 1.1 mw #define VDAC_REG_DATA 0x8003 /* dito.. */ 456 1.1 mw 457 1.1 mw #define WGfx(ba, idx, val) \ 458 1.2 mw do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 459 1.2 mw 460 1.2 mw #define WSeq(ba, idx, val) \ 461 1.2 mw do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 462 1.2 mw 463 1.2 mw #define WCrt(ba, idx, val) \ 464 1.2 mw do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 465 1.2 mw 466 1.2 mw #define WAttr(ba, idx, val) \ 467 1.2 mw do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0) 468 1.1 mw 469 1.2 mw #define Map(m) \ 470 1.2 mw do { WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 ); WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); } while (0) 471 1.1 mw 472 1.1 mw static inline unsigned char RAttr(volatile void * ba, short idx) { 473 1.1 mw vgaw (ba, ACT_ADDRESS, idx); 474 1.1 mw return vgar (ba, ACT_ADDRESS_R); 475 1.1 mw } 476 1.1 mw 477 1.1 mw static inline unsigned char RSeq(volatile void * ba, short idx) { 478 1.1 mw vgaw (ba, SEQ_ADDRESS, idx); 479 1.1 mw return vgar (ba, SEQ_ADDRESS_R); 480 1.1 mw } 481 1.1 mw 482 1.1 mw static inline unsigned char RCrt(volatile void * ba, short idx) { 483 1.1 mw vgaw (ba, CRT_ADDRESS, idx); 484 1.1 mw return vgar (ba, CRT_ADDRESS_R); 485 1.1 mw } 486 1.1 mw 487 1.1 mw static inline unsigned char RGfx(volatile void * ba, short idx) { 488 1.1 mw vgaw(ba, GCT_ADDRESS, idx); 489 1.1 mw return vgar (ba, GCT_ADDRESS_R); 490 1.1 mw } 491 1.1 mw 492 1.1 mw /* yes I know they don't belong here... */ 493 1.1 mw struct ite_softc; 494 1.1 mw extern void retina_init (struct ite_softc *ip); 495 1.1 mw extern void retina_cursor (struct ite_softc *ip, int flag); 496 1.1 mw extern void retina_deinit (struct ite_softc *ip); 497 1.1 mw extern void retina_putc (struct ite_softc *ip, int c, int dy, int dx, int mode); 498 1.1 mw extern void retina_clear (struct ite_softc *ip, int sy, int sx, int h, int w); 499 1.1 mw extern void retina_scroll (struct ite_softc *ip, int sy, int sx, int count, int dir); 500 1.1 mw 501 1.1 mw #endif /* _GRF_RTREG_H */ 502
Indexes created Mon Sep 29 18:09:42 GMT 2025