grf_rtreg.h revision 1.1
1 #ifndef _GRF_RTREG_H 2 #define _GRF_RTREG_H 3 4 /* NOTE: this driver for the MacroSystem Retina board was only possible, 5 because MacroSystem provided information about the pecularities 6 of the board. THANKS! Competition in Europe among gfx board 7 manufacturers is rather tough, so Lutz Vieweg, who wrote the 8 initial driver, has made an agreement with MS not to document 9 the driver source (see also his Copyright disclaimer at the 10 beginning of grf_rt.cc and ite_rt.cc). 11 -> ALL comments and register defines after 12 -> "/* -------------- START OF CODE -------------- * /" 13 -> have been added by myself (mw) from studying the publically 14 -> available "NCR 77C22E+" Data Manual 15 16 Lutz' original driver source (without any of my comments) is 17 available on request. */ 18 19 20 #if 0 21 /* these are in dev/devices.h */ 22 23 /* definitions to find the autoconfig-board under 24 AmigaDOS */ 25 26 #define RETINA_MANUFACTURER 0x4754 27 #define RETINA_PRODUCT 6 28 #define RETINA_SERIALNUMBER 1 29 #endif 30 31 32 /* 33 For more information on the structure entries take a look at 34 grf_rt.cc and ite_rt.cc. 35 */ 36 37 struct MonDef { 38 39 /* first the general monitor characteristics */ 40 41 unsigned long FQ; 42 unsigned char FLG; 43 44 unsigned short MW; /* screen width in pixels */ 45 unsigned short MH; /* screen height in pixels */ 46 47 unsigned short HBS; 48 unsigned short HSS; 49 unsigned short HSE; 50 unsigned short HBE; 51 unsigned short HT; 52 unsigned short VBS; 53 unsigned short VSS; 54 unsigned short VSE; 55 unsigned short VBE; 56 unsigned short VT; 57 58 unsigned short DEP; /* Color-depth, 4 for text-mode */ 59 /* values != 4 currently not supported */ 60 61 unsigned char * PAL; /* points to n*3 byte RGB-palette data */ 62 /* n=16 for the text-mode */ 63 64 /* all following entries are text-specific in 65 any way. Make sure your monitor 66 parameters are calculated for the 67 appropriate font width and height! 68 */ 69 70 unsigned short TX; /* screen-width in characters */ 71 /* currently, TX has to be a */ 72 /* multiple of 16! */ 73 unsigned short TY; /* screen-height in characters */ 74 unsigned short XY; /* TX*TY (speeds up some calcs.) */ 75 76 unsigned short FX; /* font-width (valid values: 4,7-16) */ 77 unsigned short FY; /* font-height (valid range: 1-32) */ 78 unsigned char * FData; /* pointer to the font-data */ 79 80 /* The font data is simply an array of bytes defining 81 the chars in ascending order, line by line. If your 82 font is wider than 8 pixel, FData has to be an 83 array of words. */ 84 85 unsigned short FLo; /* lowest character defined */ 86 unsigned short FHi; /* highest char. defined */ 87 88 }; 89 90 91 #if 0 92 /* Some ready-made MonDef structures are available in grf_rt.cc */ 93 94 extern struct MonDef MON_640_512_60; 95 extern struct MonDef MON_768_600_60; 96 extern struct MonDef MON_768_600_80; 97 98 /* text-screen resolutions wider than 1024 are currently damaged. 99 The VRAM access seems to become unstable at higher resolutions. 100 This may hopefully be subject of change. 101 */ 102 103 extern struct MonDef MON_1024_768_80; 104 extern struct MonDef MON_1024_1024_59; 105 106 /* WARNING: THE FOLLOWING MONITOR MODES EXCEED THE 90-MHz LIMIT THE PROCESSOR 107 HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT 108 MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)! */ 109 extern struct MonDef MON_1280_1024_60; 110 extern struct MonDef MON_1280_1024_69; 111 112 /* Default monitor (change if this is too much for your monitor :-)) */ 113 #define DEFAULT_MONDEF MON_768_600_80 114 115 #else 116 117 /* nothing exported for now... */ 118 119 #endif 120 121 /* a standard 16-color palette is available in grf_rt.cc 122 and used by the standard monitor-definitions above */ 123 extern unsigned char NCRStdPalette[]; 124 125 /* The prototypes for C 126 with a little explanation 127 128 unsigned char * InitNCR(volatile void * BoardAdress, struct MonDef * md = &MON_640_512_60); 129 130 This routine initialises the Retina hardware, opens a 131 text-mode screen, and sets the cursor to position 0. 132 The routine returns 0 if it was unable to open the screen, 133 or an unsigned char * to the display/attribute memory 134 when it succeeded. The organisation of the display memory 135 is a little strange (Intel-typically...) : 136 137 Byte 00 01 02 03 04 05 06 etc. 138 Char0 Attr0 -- -- Char1 Attr1 -- etc. 139 140 You may set a character and its associated attribute byte 141 with a single word-access, or you may perform to byte writes 142 for the char and attribute. Each 2. word has no meaning, 143 and writes to theese locations are ignored. 144 145 The attribute byte for each character has the following 146 structure: 147 148 Bit 7 6 5 4 3 2 1 0 149 BLINK BACK2 BACK1 BACK0 FORE3 FORE2 FORE1 FORE0 150 151 Were FORE is the foreground-color index (0-15) and 152 BACK is the background color index (0-7). BLINK 153 enables blinking for the associated character. 154 The higher 8 colors in the standard palette are 155 lighter than the lower 8, so you may see FORE3 as 156 an intensity bit. If FORE == 1 or FORE == 9 and 157 BACK == 0 the character is underlined. Since I don't 158 think this looks good, it will probably change in a 159 future release. 160 161 There's no routine "SetChar" or "SetAttr" provided, 162 because I think it's so trivial... a function call 163 would be pure overhead. As an example, a routine 164 to set the char code and attribute at position x,y: 165 (assumed the value returned by InitNCR was stored 166 into "DispMem", the actual MonDef struct * is hold 167 in "MDef") 168 169 void SetChar(unsigned char chr, unsigned char attr, 170 unsigned short x, unsigned short y) { 171 172 unsigned struct MonDef * md = MDef; 173 unsigned char * c = DispMem + x*4 + y*md->TX*4; 174 175 *c++ = chr; 176 *c++ = attr; 177 } 178 179 Currently, InitNCR() disables the Retina VBLANK IRQ, 180 but beware: When running the Retina WB-Emu under 181 AmigaDOS, the VBLANK IRQ is ENABLED. 182 183 184 185 void SetCursorPos(unsigned short pos); 186 187 This routine sets the hardware-cursor position 188 to the screen location pos. pos can be calculated 189 as (x + y * md->TY). 190 191 192 void ScreenUp(void); 193 194 A somewhat optimized routine that scrolls the whole 195 screen up one row. A good idea to compile this piece 196 of code with optimization enabled. 197 198 199 void ScreenDown(void); 200 201 A somewhat optimized routine that scrolls the whole 202 screen down one row. A good idea to compile this piece 203 of code with optimization enabled. 204 */ 205 206 /* -------------- START OF CODE -------------- */ 207 208 /* read VGA register */ 209 #define vgar(ba, reg) (*(((volatile unsigned char *)ba)+reg)) 210 211 /* write VGA register */ 212 #define vgaw(ba, reg, val) \ 213 *(((volatile unsigned char *)ba)+reg) = val 214 215 /* defines for the used register addresses (mw) 216 217 NOTE: there are some registers that have different addresses when 218 in mono or color mode. We only support color mode, and thus 219 some addresses won't work in mono-mode! */ 220 221 /* General Registers: */ 222 #define GREG_STATUS0_R 0x43C2 223 #define GREG_STATUS1_R 0x43DA 224 #define GREG_MISC_OUTPUT_R 0x43CC 225 #define GREG_MISC_OUTPUT_W 0x43C2 226 #define GREG_FEATURE_CONTROL_R 0x43CA 227 #define GREG_FEATURE_CONTROL_W 0x43DA 228 #define GREG_POS 0x4102 229 230 /* Attribute Controller: */ 231 #define ACT_ADDRESS 0x43C0 232 #define ACT_ADDRESS_R 0x03C0 233 #define ACT_ADDRESS_W 0x43C0 234 #define ACT_ID_PALETTE0 0x00 235 #define ACT_ID_PALETTE1 0x01 236 #define ACT_ID_PALETTE2 0x02 237 #define ACT_ID_PALETTE3 0x03 238 #define ACT_ID_PALETTE4 0x04 239 #define ACT_ID_PALETTE5 0x05 240 #define ACT_ID_PALETTE6 0x06 241 #define ACT_ID_PALETTE7 0x07 242 #define ACT_ID_PALETTE8 0x08 243 #define ACT_ID_PALETTE9 0x09 244 #define ACT_ID_PALETTE10 0x0A 245 #define ACT_ID_PALETTE11 0x0B 246 #define ACT_ID_PALETTE12 0x0C 247 #define ACT_ID_PALETTE13 0x0D 248 #define ACT_ID_PALETTE14 0x0E 249 #define ACT_ID_PALETTE15 0x0F 250 #define ACT_ID_ATTR_MODE_CNTL 0x10 251 #define ACT_ID_OVERSCAN_COLOR 0x11 252 #define ACT_ID_COLOR_PLANE_ENA 0x12 253 #define ACT_ID_HOR_PEL_PANNING 0x13 254 #define ACT_ID_COLOR_SELECT 0x14 255 256 /* Graphics Controller: */ 257 #define GCT_ADDRESS 0x43CE 258 #define GCT_ADDRESS_R 0x03CE 259 #define GCT_ADDRESS_W 0x03CE 260 #define GCT_ID_SET_RESET 0x00 261 #define GCT_ID_ENABLE_SET_RESET 0x01 262 #define GCT_ID_COLOR_COMPARE 0x02 263 #define GCT_ID_DATA_ROTATE 0x03 264 #define GCT_ID_READ_MAP_SELECT 0x04 265 #define GCT_ID_GRAPHICS_MODE 0x05 266 #define GCT_ID_MISC 0x06 267 #define GCT_ID_COLOR_XCARE 0x07 268 #define GCT_ID_BITMASK 0x08 269 270 /* Sequencer: */ 271 #define SEQ_ADDRESS 0x43C4 272 #define SEQ_ADDRESS_R 0x03C4 273 #define SEQ_ADDRESS_W 0x03C4 274 #define SEQ_ID_RESET 0x00 275 #define SEQ_ID_CLOCKING_MODE 0x01 276 #define SEQ_ID_MAP_MASK 0x02 277 #define SEQ_ID_CHAR_MAP_SELECT 0x03 278 #define SEQ_ID_MEMORY_MODE 0x04 279 #define SEQ_ID_EXTENDED_ENABLE 0x05 /* down from here, all seq registers are NCR extensions */ 280 #define SEQ_ID_CHIP_ID 0x08 281 #define SEQ_ID_CURSOR_COLOR1 0x0A 282 #define SEQ_ID_CURSOR_COLOR0 0x0B 283 #define SEQ_ID_CURSOR_CONTROL 0x0C 284 #define SEQ_ID_CURSOR_X_LOC_HI 0x0D 285 #define SEQ_ID_CURSOR_X_LOC_LO 0x0E 286 #define SEQ_ID_CURSOR_Y_LOC_HI 0x0F 287 #define SEQ_ID_CURSOR_Y_LOC_LO 0x10 288 #define SEQ_ID_CURSOR_X_INDEX 0x11 289 #define SEQ_ID_CURSOR_Y_INDEX 0x12 290 #define SEQ_ID_CURSOR_STORE_LO 0x14 291 #define SEQ_ID_CURSOR_STORE_HI 0x15 292 #define SEQ_ID_CURSOR_STORE_MID 0x16 293 #define SEQ_ID_CURSOR_PIXELMASK 0x17 294 #define SEQ_ID_PRIM_HOST_OFF_HI 0x18 295 #define SEQ_ID_PRIM_HOST_OFF_LO 0x19 296 #define SEQ_ID_SEC_HOST_OFF_HI 0x1C 297 #define SEQ_ID_SEC_HOST_OFF_LO 0x1D 298 #define SEQ_ID_EXTENDED_MEM_ENA 0x1E 299 #define SEQ_ID_EXT_CLOCK_MODE 0x1F 300 #define SEQ_ID_EXT_VIDEO_ADDR 0x20 301 #define SEQ_ID_EXT_PIXEL_CNTL 0x21 302 #define SEQ_ID_BUS_WIDTH_FEEDB 0x22 303 #define SEQ_ID_PERF_SELECT 0x23 304 #define SEQ_ID_COLOR_EXP_WFG 0x24 305 #define SEQ_ID_COLOR_EXP_WBG 0x25 306 #define SEQ_ID_EXT_RW_CONTROL 0x26 307 #define SEQ_ID_MISC_FEATURE_SEL 0x27 308 #define SEQ_ID_COLOR_KEY_CNTL 0x28 309 #define SEQ_ID_COLOR_KEY_MATCH 0x29 310 #define SEQ_ID_CRC_CONTROL 0x2D 311 #define SEQ_ID_CRC_DATA_LOW 0x2E 312 #define SEQ_ID_CRC_DATA_HIGH 0x2F 313 314 /* CRT Controller: */ 315 #define CRT_ADDRESS 0x43D4 316 #define CRT_ADDRESS_R 0x03D4 317 #define CRT_ADDRESS_W 0x03D4 318 #define CRT_ID_HOR_TOTAL 0x00 319 #define CRT_ID_HOR_DISP_ENA_END 0x01 320 #define CRT_ID_START_HOR_BLANK 0x02 321 #define CRT_ID_END_HOR_BLANK 0x03 322 #define CRT_ID_START_HOR_RETR 0x04 323 #define CRT_ID_END_HOR_RETR 0x05 324 #define CRT_ID_VER_TOTAL 0x06 325 #define CRT_ID_OVERFLOW 0x07 326 #define CRT_ID_PRESET_ROW_SCAN 0x08 327 #define CRT_ID_MAX_SCAN_LINE 0x09 328 #define CRT_ID_CURSOR_START 0x0A 329 #define CRT_ID_CURSOR_END 0x0B 330 #define CRT_ID_START_ADDR_HIGH 0x0C 331 #define CRT_ID_START_ADDR_LOW 0x0D 332 #define CRT_ID_CURSOR_LOC_HIGH 0x0E 333 #define CRT_ID_CURSOR_LOC_LOW 0x0F 334 #define CRT_ID_START_VER_RETR 0x10 335 #define CRT_ID_END_VER_RETR 0x11 336 #define CRT_ID_VER_DISP_ENA_END 0x12 337 #define CRT_ID_OFFSET 0x13 338 #define CRT_ID_UNDERLINE_LOC 0x14 339 #define CRT_ID_START_VER_BLANK 0x15 340 #define CRT_ID_END_VER_BLANK 0x16 341 #define CRT_ID_MODE_CONTROL 0x17 342 #define CRT_ID_LINE_COMPARE 0x18 343 #define CRT_ID_EXT_HOR_TIMING1 0x30 /* down from here, all crt registers are NCR extensions */ 344 #define CRT_ID_EXT_START_ADDR 0x31 345 #define CRT_ID_EXT_HOR_TIMING2 0x32 346 #define CRT_ID_EXT_VER_TIMING 0x33 347 348 /* Video DAC (these are *pure* guesses from the usage of these registers, 349 I don't have a data sheet for this chip:-/) */ 350 #define VDAC_REG_D 0x800d /* well.. */ 351 #define VDAC_REG_SELECT 0x8001 /* perhaps.. */ 352 #define VDAC_REG_DATA 0x8003 /* dito.. */ 353 354 #define WGfx(ba, idx, val) \ 355 vgaw(ba, GCT_ADDRESS, idx);\ 356 vgaw(ba, GCT_ADDRESS_W , val)\ 357 358 #define WSeq(ba, idx, val)\ 359 vgaw(ba, SEQ_ADDRESS, idx);\ 360 vgaw(ba, SEQ_ADDRESS_W , val) 361 362 #define WCrt(ba, idx, val)\ 363 vgaw(ba, CRT_ADDRESS, idx);\ 364 vgaw(ba, CRT_ADDRESS_W , val) 365 366 #define WAttr(ba, idx, val)\ 367 vgaw(ba, ACT_ADDRESS, idx);\ 368 vgaw(ba, ACT_ADDRESS_W, val) 369 370 #define Map(m)\ 371 WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\ 372 WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)))\ 373 374 static inline unsigned char RAttr(volatile void * ba, short idx) { 375 vgaw (ba, ACT_ADDRESS, idx); 376 return vgar (ba, ACT_ADDRESS_R); 377 } 378 379 static inline unsigned char RSeq(volatile void * ba, short idx) { 380 vgaw (ba, SEQ_ADDRESS, idx); 381 return vgar (ba, SEQ_ADDRESS_R); 382 } 383 384 static inline unsigned char RCrt(volatile void * ba, short idx) { 385 vgaw (ba, CRT_ADDRESS, idx); 386 return vgar (ba, CRT_ADDRESS_R); 387 } 388 389 static inline unsigned char RGfx(volatile void * ba, short idx) { 390 vgaw(ba, GCT_ADDRESS, idx); 391 return vgar (ba, GCT_ADDRESS_R); 392 } 393 394 /* yes I know they don't belong here... */ 395 struct ite_softc; 396 extern void retina_init (struct ite_softc *ip); 397 extern void retina_cursor (struct ite_softc *ip, int flag); 398 extern void retina_deinit (struct ite_softc *ip); 399 extern void retina_putc (struct ite_softc *ip, int c, int dy, int dx, int mode); 400 extern void retina_clear (struct ite_softc *ip, int sy, int sx, int h, int w); 401 extern void retina_scroll (struct ite_softc *ip, int sy, int sx, int count, int dir); 402 403 #endif /* _GRF_RTREG_H */ 404
Indexes created Mon Sep 29 21:09:56 GMT 2025