grf_rtreg.h revision 1.3
1 /* 2 * $Id: grf_rtreg.h,v 1.3 1994/02/11 07:01:42 chopps Exp $ 3 */ 4 5 #ifndef _GRF_RTREG_H 6 #define _GRF_RTREG_H 7 8 /* NOTE: this driver for the MacroSystem Retina board was only possible, 9 because MacroSystem provided information about the pecularities 10 of the board. THANKS! Competition in Europe among gfx board 11 manufacturers is rather tough, so Lutz Vieweg, who wrote the 12 initial driver, has made an agreement with MS not to document 13 the driver source (see also his Copyright disclaimer at the 14 beginning of grf_rt.cc and ite_rt.cc). 15 -> ALL comments and register defines after 16 -> "/* -------------- START OF CODE -------------- * /" 17 -> have been added by myself (mw) from studying the publically 18 -> available "NCR 77C22E+" Data Manual 19 20 Lutz' original driver source (without any of my comments) is 21 available on request. */ 22 23 24 #if 0 25 /* these are in dev/devices.h */ 26 27 /* definitions to find the autoconfig-board under 28 AmigaDOS */ 29 30 #define RETINA_MANUFACTURER 0x4754 31 #define RETINA_PRODUCT 6 32 #define RETINA_SERIALNUMBER 1 33 #endif 34 35 36 /* 37 For more information on the structure entries take a look at 38 grf_rt.cc and ite_rt.cc. 39 */ 40 41 struct MonDef { 42 43 /* first the general monitor characteristics */ 44 45 unsigned long FQ; 46 unsigned char FLG; 47 48 unsigned short MW; /* screen width in pixels */ 49 /* has to be at least a multiple of 8, */ 50 /* has to be a multiple of 64 in 256-color mode */ 51 /* if you want to use some great tricks */ 52 /* to speed up the vertical scrolling */ 53 unsigned short MH; /* screen height in pixels */ 54 55 unsigned short HBS; 56 unsigned short HSS; 57 unsigned short HSE; 58 unsigned short HBE; 59 unsigned short HT; 60 unsigned short VBS; 61 unsigned short VSS; 62 unsigned short VSE; 63 unsigned short VBE; 64 unsigned short VT; 65 66 unsigned short DEP; /* Color-depth, 4 for text-mode */ 67 /* 8 enables 256-color graphics-mode, */ 68 /* 16 and 24bit gfx not supported yet */ 69 70 unsigned char * PAL; /* points to 16*3 byte RGB-palette data */ 71 /* use LoadPalette() to set colors 0..255 */ 72 /* in 256-color-gfx mode */ 73 74 /* all following entries are font-specific in 75 text mode. Make sure your monitor 76 parameters are calculated for the 77 appropriate font width and height! 78 */ 79 80 unsigned short TX; /* Text-mode (DEP=4): */ 81 /* screen-width in characters */ 82 /* currently, TX has to be a */ 83 /* multiple of 16! */ 84 85 /* Gfx-mode (DEP > 4) */ 86 /* "logical" screen-width, */ 87 /* use values > MW to allow */ 88 /* hardware-panning */ 89 /* has to be a multiple of 8 */ 90 91 unsigned short TY; /* Text-mode: */ 92 /* screen-height in characters */ 93 94 /* Gfx-mode: "logical" screen */ 95 /* height for panning */ 96 97 /* the following values are currently unused for gfx-mode */ 98 99 unsigned short XY; /* TX*TY (speeds up some calcs.) */ 100 101 unsigned short FX; /* font-width (valid values: 4,7-16) */ 102 unsigned short FY; /* font-height (valid range: 1-32) */ 103 unsigned char * FData; /* pointer to the font-data */ 104 105 /* The font data is simply an array of bytes defining 106 the chars in ascending order, line by line. If your 107 font is wider than 8 pixel, FData has to be an 108 array of words. */ 109 110 unsigned short FLo; /* lowest character defined */ 111 unsigned short FHi; /* highest char. defined */ 112 113 }; 114 115 116 #if 0 117 /* Some ready-made MonDef structures are available in grf_rt.cc */ 118 119 extern struct MonDef MON_640_512_60; 120 extern struct MonDef MON_768_600_60; 121 extern struct MonDef MON_768_600_80; 122 123 /* text-screen resolutions wider than 1024 are currently damaged. 124 The VRAM access seems to become unstable at higher resolutions. 125 This may hopefully be subject of change. 126 */ 127 128 extern struct MonDef MON_1024_768_80; 129 extern struct MonDef MON_1024_1024_59; 130 131 /* WARNING: THE FOLLOWING MONITOR MODES EXCEED THE 90-MHz LIMIT THE PROCESSOR 132 HAS BEEN SPECIFIED FOR. USE AT YOUR OWN RISK (AND THINK ABOUT 133 MOUNTING SOME COOLING DEVICE AT THE PROCESSOR AND RAMDAC)! */ 134 extern struct MonDef MON_1280_1024_60; 135 extern struct MonDef MON_1280_1024_69; 136 137 /* Default monitor (change if this is too much for your monitor :-)) */ 138 #define DEFAULT_MONDEF MON_768_600_80 139 140 #else 141 142 /* nothing exported for now... */ 143 144 #endif 145 146 /* a standard 16-color palette is available in grf_rt.cc 147 and used by the standard monitor-definitions above */ 148 extern unsigned char NCRStdPalette[]; 149 150 /* The prototypes for C 151 with a little explanation 152 153 unsigned char * InitNCR(volatile void * BoardAdress, struct MonDef * md = &MON_640_512_60); 154 155 This routine initialises the Retina hardware, opens a 156 text- or gfx-mode screen, depending on the the value of MonDef.DEP, 157 and sets the cursor to position 0. 158 It takes as arguments a pointer to the hardware-base 159 address as it is denoted in the DevConf structure 160 of the AmigaDOS, and a pointer to a struct MonDef 161 which describes the screen-mode parameters. 162 163 The routine returns 0 if it was unable to open the screen, 164 or an unsigned char * to the display/attribute memory 165 when it succeeded. The organisation of the display memory 166 is a little strange in text-mode (Intel-typically...) : 167 168 Byte 00 01 02 03 04 05 06 etc. 169 Char0 Attr0 -- -- Char1 Attr1 -- etc. 170 171 You may set a character and its associated attribute byte 172 with a single word-access, or you may perform to byte writes 173 for the char and attribute. Each 2. word has no meaning, 174 and writes to theese locations are ignored. 175 176 The attribute byte for each character has the following 177 structure: 178 179 Bit 7 6 5 4 3 2 1 0 180 BLINK BACK2 BACK1 BACK0 FORE3 FORE2 FORE1 FORE0 181 182 Were FORE is the foreground-color index (0-15) and 183 BACK is the background color index (0-7). BLINK 184 enables blinking for the associated character. 185 The higher 8 colors in the standard palette are 186 lighter than the lower 8, so you may see FORE3 as 187 an intensity bit. If FORE == 1 or FORE == 9 and 188 BACK == 0 the character is underlined. Since I don't 189 think this looks good, it will probably change in a 190 future release. 191 192 There's no routine "SetChar" or "SetAttr" provided, 193 because I think it's so trivial... a function call 194 would be pure overhead. As an example, a routine 195 to set the char code and attribute at position x,y: 196 (assumed the value returned by InitNCR was stored 197 into "DispMem", the actual MonDef struct * is hold 198 in "MDef") 199 200 void SetChar(unsigned char chr, unsigned char attr, 201 unsigned short x, unsigned short y) { 202 203 unsigned struct MonDef * md = MDef; 204 unsigned char * c = DispMem + x*4 + y*md->TX*4; 205 206 *c++ = chr; 207 *c = attr; 208 209 } 210 211 In Gfx-mode, the memory organisation is rather simple, 212 1 byte per pixel in 256-color mode, one pixel after 213 each other, line by line. 214 215 Currently, InitNCR() disables the Retina VBLANK IRQ, 216 but beware: When running the Retina WB-Emu under 217 AmigaDOS, the VBLANK IRQ is ENABLED. 218 219 void SetCursorPos(unsigned short pos); 220 221 This routine sets the hardware-cursor position 222 to the screen location pos. pos can be calculated 223 as (x + y * md->TY). 224 Text-mode only! 225 226 void ScreenUp(void); 227 228 A somewhat optimized routine that scrolls the whole 229 screen up one row. A good idea to compile this piece 230 of code with optimization enabled. 231 Text-mode only! 232 233 void ScreenDown(void); 234 235 A somewhat optimized routine that scrolls the whole 236 screen down one row. A good idea to compile this piece 237 of code with optimization enabled. 238 Text-mode only! 239 240 unsigned char * SetSegmentPtr(unsigned long adress); 241 242 Sets the beginning of the 64k-memory segment to the 243 adress specified by the unsigned long. If adress MOD 64 244 is != 0, the return value will point to the segments 245 start in the Amiga adress space + (adress MOD 64). 246 Don't use more than (65536-64) bytes in the segment 247 you set if you aren't sure that (adress MOD 64) == 0. 248 See retina.doc from MS for further information. 249 250 void ClearScreen(unsigned char color); 251 252 Fills the whole screen with "color" - 256-color mode only! 253 254 void LoadPalette(unsigned char * pal, unsigned char firstcol, 255 unsigned char colors); 256 257 Loads the palette-registers. "pal" points to an array of unsigned char 258 triplets, for the red, green and blue component. "firstcol" determines the 259 number of the first palette-register to load (256 available). "colors" 260 is the number of colors you want to put in the palette registers. 261 262 void SetPalette(unsigned char colornum, unsigned char red, 263 unsigned char green, unsigned char blue); 264 265 Allows you to set a single color in the palette, "colornum" is the number 266 of the palette entry (256 available), "red", "green" and "blue" are the 267 three components. 268 269 void SetPanning(unsigned short xoff, unsigned short yoff); 270 271 Moves the logical coordinate (xoff, yoff) to the upper left corner 272 of your screen. Of course, you shouldn't specify excess values that would 273 show garbage in the lower right area of your screen... SetPanning() 274 does NOT check for boundaries. 275 */ 276 277 /* -------------- START OF CODE -------------- */ 278 279 /* read VGA register */ 280 #define vgar(ba, reg) (*(((volatile unsigned char *)ba)+reg)) 281 282 /* write VGA register */ 283 #define vgaw(ba, reg, val) \ 284 *(((volatile unsigned char *)ba)+reg) = val 285 286 /* defines for the used register addresses (mw) 287 288 NOTE: there are some registers that have different addresses when 289 in mono or color mode. We only support color mode, and thus 290 some addresses won't work in mono-mode! */ 291 292 /* General Registers: */ 293 #define GREG_STATUS0_R 0x43C2 294 #define GREG_STATUS1_R 0x43DA 295 #define GREG_MISC_OUTPUT_R 0x43CC 296 #define GREG_MISC_OUTPUT_W 0x43C2 297 #define GREG_FEATURE_CONTROL_R 0x43CA 298 #define GREG_FEATURE_CONTROL_W 0x43DA 299 #define GREG_POS 0x4102 300 301 /* Attribute Controller: */ 302 #define ACT_ADDRESS 0x43C0 303 #define ACT_ADDRESS_R 0x03C0 304 #define ACT_ADDRESS_W 0x43C0 305 #define ACT_ID_PALETTE0 0x00 306 #define ACT_ID_PALETTE1 0x01 307 #define ACT_ID_PALETTE2 0x02 308 #define ACT_ID_PALETTE3 0x03 309 #define ACT_ID_PALETTE4 0x04 310 #define ACT_ID_PALETTE5 0x05 311 #define ACT_ID_PALETTE6 0x06 312 #define ACT_ID_PALETTE7 0x07 313 #define ACT_ID_PALETTE8 0x08 314 #define ACT_ID_PALETTE9 0x09 315 #define ACT_ID_PALETTE10 0x0A 316 #define ACT_ID_PALETTE11 0x0B 317 #define ACT_ID_PALETTE12 0x0C 318 #define ACT_ID_PALETTE13 0x0D 319 #define ACT_ID_PALETTE14 0x0E 320 #define ACT_ID_PALETTE15 0x0F 321 #define ACT_ID_ATTR_MODE_CNTL 0x10 322 #define ACT_ID_OVERSCAN_COLOR 0x11 323 #define ACT_ID_COLOR_PLANE_ENA 0x12 324 #define ACT_ID_HOR_PEL_PANNING 0x13 325 #define ACT_ID_COLOR_SELECT 0x14 326 327 /* Graphics Controller: */ 328 #define GCT_ADDRESS 0x43CE 329 #define GCT_ADDRESS_R 0x03CE 330 #define GCT_ADDRESS_W 0x03CE 331 #define GCT_ID_SET_RESET 0x00 332 #define GCT_ID_ENABLE_SET_RESET 0x01 333 #define GCT_ID_COLOR_COMPARE 0x02 334 #define GCT_ID_DATA_ROTATE 0x03 335 #define GCT_ID_READ_MAP_SELECT 0x04 336 #define GCT_ID_GRAPHICS_MODE 0x05 337 #define GCT_ID_MISC 0x06 338 #define GCT_ID_COLOR_XCARE 0x07 339 #define GCT_ID_BITMASK 0x08 340 341 /* Sequencer: */ 342 #define SEQ_ADDRESS 0x43C4 343 #define SEQ_ADDRESS_R 0x03C4 344 #define SEQ_ADDRESS_W 0x03C4 345 #define SEQ_ID_RESET 0x00 346 #define SEQ_ID_CLOCKING_MODE 0x01 347 #define SEQ_ID_MAP_MASK 0x02 348 #define SEQ_ID_CHAR_MAP_SELECT 0x03 349 #define SEQ_ID_MEMORY_MODE 0x04 350 #define SEQ_ID_EXTENDED_ENABLE 0x05 /* down from here, all seq registers are NCR extensions */ 351 #define SEQ_ID_UNKNOWN1 0x06 /* it does exist so it's probably usefull */ 352 #define SEQ_ID_UNKNOWN2 0x07 /* it does exist so it's probably usefull */ 353 #define SEQ_ID_CHIP_ID 0x08 354 #define SEQ_ID_UNKNOWN3 0x09 /* it does exist so it's probably usefull */ 355 #define SEQ_ID_CURSOR_COLOR1 0x0A 356 #define SEQ_ID_CURSOR_COLOR0 0x0B 357 #define SEQ_ID_CURSOR_CONTROL 0x0C 358 #define SEQ_ID_CURSOR_X_LOC_HI 0x0D 359 #define SEQ_ID_CURSOR_X_LOC_LO 0x0E 360 #define SEQ_ID_CURSOR_Y_LOC_HI 0x0F 361 #define SEQ_ID_CURSOR_Y_LOC_LO 0x10 362 #define SEQ_ID_CURSOR_X_INDEX 0x11 363 #define SEQ_ID_CURSOR_Y_INDEX 0x12 364 #define SEQ_ID_CURSOR_STORE_HI 0x13 /* printed manual is wrong about these.. */ 365 #define SEQ_ID_CURSOR_STORE_LO 0x14 366 #define SEQ_ID_CURSOR_ST_OFF_HI 0x15 367 #define SEQ_ID_CURSOR_ST_OFF_LO 0x16 368 #define SEQ_ID_CURSOR_PIXELMASK 0x17 369 #define SEQ_ID_PRIM_HOST_OFF_HI 0x18 370 #define SEQ_ID_PRIM_HOST_OFF_LO 0x19 371 #define SEQ_ID_DISP_OFF_HI 0x1A 372 #define SEQ_ID_DISP_OFF_LO 0x1B 373 #define SEQ_ID_SEC_HOST_OFF_HI 0x1C 374 #define SEQ_ID_SEC_HOST_OFF_LO 0x1D 375 #define SEQ_ID_EXTENDED_MEM_ENA 0x1E 376 #define SEQ_ID_EXT_CLOCK_MODE 0x1F 377 #define SEQ_ID_EXT_VIDEO_ADDR 0x20 378 #define SEQ_ID_EXT_PIXEL_CNTL 0x21 379 #define SEQ_ID_BUS_WIDTH_FEEDB 0x22 380 #define SEQ_ID_PERF_SELECT 0x23 381 #define SEQ_ID_COLOR_EXP_WFG 0x24 382 #define SEQ_ID_COLOR_EXP_WBG 0x25 383 #define SEQ_ID_EXT_RW_CONTROL 0x26 384 #define SEQ_ID_MISC_FEATURE_SEL 0x27 385 #define SEQ_ID_COLOR_KEY_CNTL 0x28 386 #define SEQ_ID_COLOR_KEY_MATCH 0x29 387 #define SEQ_ID_UNKNOWN4 0x2A 388 #define SEQ_ID_UNKNOWN5 0x2B 389 #define SEQ_ID_UNKNOWN6 0x2C 390 #define SEQ_ID_CRC_CONTROL 0x2D 391 #define SEQ_ID_CRC_DATA_LOW 0x2E 392 #define SEQ_ID_CRC_DATA_HIGH 0x2F 393 394 /* CRT Controller: */ 395 #define CRT_ADDRESS 0x43D4 396 #define CRT_ADDRESS_R 0x03D4 397 #define CRT_ADDRESS_W 0x03D4 398 #define CRT_ID_HOR_TOTAL 0x00 399 #define CRT_ID_HOR_DISP_ENA_END 0x01 400 #define CRT_ID_START_HOR_BLANK 0x02 401 #define CRT_ID_END_HOR_BLANK 0x03 402 #define CRT_ID_START_HOR_RETR 0x04 403 #define CRT_ID_END_HOR_RETR 0x05 404 #define CRT_ID_VER_TOTAL 0x06 405 #define CRT_ID_OVERFLOW 0x07 406 #define CRT_ID_PRESET_ROW_SCAN 0x08 407 #define CRT_ID_MAX_SCAN_LINE 0x09 408 #define CRT_ID_CURSOR_START 0x0A 409 #define CRT_ID_CURSOR_END 0x0B 410 #define CRT_ID_START_ADDR_HIGH 0x0C 411 #define CRT_ID_START_ADDR_LOW 0x0D 412 #define CRT_ID_CURSOR_LOC_HIGH 0x0E 413 #define CRT_ID_CURSOR_LOC_LOW 0x0F 414 #define CRT_ID_START_VER_RETR 0x10 415 #define CRT_ID_END_VER_RETR 0x11 416 #define CRT_ID_VER_DISP_ENA_END 0x12 417 #define CRT_ID_OFFSET 0x13 418 #define CRT_ID_UNDERLINE_LOC 0x14 419 #define CRT_ID_START_VER_BLANK 0x15 420 #define CRT_ID_END_VER_BLANK 0x16 421 #define CRT_ID_MODE_CONTROL 0x17 422 #define CRT_ID_LINE_COMPARE 0x18 423 #define CRT_ID_UNKNOWN1 0x19 /* are these register really void ? */ 424 #define CRT_ID_UNKNOWN2 0x1A 425 #define CRT_ID_UNKNOWN3 0x1B 426 #define CRT_ID_UNKNOWN4 0x1C 427 #define CRT_ID_UNKNOWN5 0x1D 428 #define CRT_ID_UNKNOWN6 0x1E 429 #define CRT_ID_UNKNOWN7 0x1F 430 #define CRT_ID_UNKNOWN8 0x20 431 #define CRT_ID_UNKNOWN9 0x21 432 #define CRT_ID_UNKNOWN10 0x22 433 #define CRT_ID_UNKNOWN11 0x23 434 #define CRT_ID_UNKNOWN12 0x24 435 #define CRT_ID_UNKNOWN13 0x25 436 #define CRT_ID_UNKNOWN14 0x26 437 #define CRT_ID_UNKNOWN15 0x27 438 #define CRT_ID_UNKNOWN16 0x28 439 #define CRT_ID_UNKNOWN17 0x29 440 #define CRT_ID_UNKNOWN18 0x2A 441 #define CRT_ID_UNKNOWN19 0x2B 442 #define CRT_ID_UNKNOWN20 0x2C 443 #define CRT_ID_UNKNOWN21 0x2D 444 #define CRT_ID_UNKNOWN22 0x2E 445 #define CRT_ID_UNKNOWN23 0x2F 446 #define CRT_ID_EXT_HOR_TIMING1 0x30 /* down from here, all crt registers are NCR extensions */ 447 #define CRT_ID_EXT_START_ADDR 0x31 448 #define CRT_ID_EXT_HOR_TIMING2 0x32 449 #define CRT_ID_EXT_VER_TIMING 0x33 450 451 /* Video DAC (these are *pure* guesses from the usage of these registers, 452 I don't have a data sheet for this chip:-/) */ 453 #define VDAC_REG_D 0x800d /* well.. */ 454 #define VDAC_REG_SELECT 0x8001 /* perhaps.. */ 455 #define VDAC_REG_DATA 0x8003 /* dito.. */ 456 457 #define WGfx(ba, idx, val) \ 458 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0) 459 460 #define WSeq(ba, idx, val) \ 461 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0) 462 463 #define WCrt(ba, idx, val) \ 464 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0) 465 466 #define WAttr(ba, idx, val) \ 467 do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0) 468 469 #define Map(m) \ 470 do { WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 ); WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); } while (0) 471 472 static inline unsigned char RAttr(volatile void * ba, short idx) { 473 vgaw (ba, ACT_ADDRESS, idx); 474 return vgar (ba, ACT_ADDRESS_R); 475 } 476 477 static inline unsigned char RSeq(volatile void * ba, short idx) { 478 vgaw (ba, SEQ_ADDRESS, idx); 479 return vgar (ba, SEQ_ADDRESS_R); 480 } 481 482 static inline unsigned char RCrt(volatile void * ba, short idx) { 483 vgaw (ba, CRT_ADDRESS, idx); 484 return vgar (ba, CRT_ADDRESS_R); 485 } 486 487 static inline unsigned char RGfx(volatile void * ba, short idx) { 488 vgaw(ba, GCT_ADDRESS, idx); 489 return vgar (ba, GCT_ADDRESS_R); 490 } 491 492 /* yes I know they don't belong here... */ 493 struct ite_softc; 494 extern void retina_init (struct ite_softc *ip); 495 extern void retina_cursor (struct ite_softc *ip, int flag); 496 extern void retina_deinit (struct ite_softc *ip); 497 extern void retina_putc (struct ite_softc *ip, int c, int dy, int dx, int mode); 498 extern void retina_clear (struct ite_softc *ip, int sy, int sx, int h, int w); 499 extern void retina_scroll (struct ite_softc *ip, int sy, int sx, int count, int dir); 500 501 #endif /* _GRF_RTREG_H */ 502
Indexes created Mon Sep 29 21:09:56 GMT 2025