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gtsc.c revision 1.28.8.2
      1  1.28.8.2  nathanw /*	$NetBSD: gtsc.c,v 1.28.8.2 2002/02/28 04:06:45 nathanw Exp $ */
      2  1.28.8.2  nathanw 
      3  1.28.8.2  nathanw /*
      4  1.28.8.2  nathanw  * Copyright (c) 1994 Christian E. Hopps
      5  1.28.8.2  nathanw  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6  1.28.8.2  nathanw  * All rights reserved.
      7  1.28.8.2  nathanw  *
      8  1.28.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
      9  1.28.8.2  nathanw  * modification, are permitted provided that the following conditions
     10  1.28.8.2  nathanw  * are met:
     11  1.28.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     12  1.28.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     13  1.28.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.28.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     15  1.28.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     16  1.28.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     17  1.28.8.2  nathanw  *    must display the following acknowledgement:
     18  1.28.8.2  nathanw  *	This product includes software developed by the University of
     19  1.28.8.2  nathanw  *	California, Berkeley and its contributors.
     20  1.28.8.2  nathanw  * 4. Neither the name of the University nor the names of its contributors
     21  1.28.8.2  nathanw  *    may be used to endorse or promote products derived from this software
     22  1.28.8.2  nathanw  *    without specific prior written permission.
     23  1.28.8.2  nathanw  *
     24  1.28.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  1.28.8.2  nathanw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  1.28.8.2  nathanw  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  1.28.8.2  nathanw  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  1.28.8.2  nathanw  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  1.28.8.2  nathanw  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  1.28.8.2  nathanw  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  1.28.8.2  nathanw  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  1.28.8.2  nathanw  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  1.28.8.2  nathanw  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  1.28.8.2  nathanw  * SUCH DAMAGE.
     35  1.28.8.2  nathanw  *
     36  1.28.8.2  nathanw  *	@(#)dma.c
     37  1.28.8.2  nathanw  */
     38  1.28.8.2  nathanw 
     39  1.28.8.2  nathanw #include <sys/cdefs.h>
     40  1.28.8.2  nathanw __KERNEL_RCSID(0, "$NetBSD: gtsc.c,v 1.28.8.2 2002/02/28 04:06:45 nathanw Exp $");
     41  1.28.8.2  nathanw 
     42  1.28.8.2  nathanw #include <sys/param.h>
     43  1.28.8.2  nathanw #include <sys/systm.h>
     44  1.28.8.2  nathanw #include <sys/kernel.h>
     45  1.28.8.2  nathanw #include <sys/device.h>
     46  1.28.8.2  nathanw #include <dev/scsipi/scsi_all.h>
     47  1.28.8.2  nathanw #include <dev/scsipi/scsipi_all.h>
     48  1.28.8.2  nathanw #include <dev/scsipi/scsiconf.h>
     49  1.28.8.2  nathanw #include <amiga/amiga/custom.h>
     50  1.28.8.2  nathanw #include <amiga/amiga/cc.h>
     51  1.28.8.2  nathanw #include <amiga/amiga/device.h>
     52  1.28.8.2  nathanw #include <amiga/amiga/isr.h>
     53  1.28.8.2  nathanw #include <amiga/dev/dmavar.h>
     54  1.28.8.2  nathanw #include <amiga/dev/sbicreg.h>
     55  1.28.8.2  nathanw #include <amiga/dev/sbicvar.h>
     56  1.28.8.2  nathanw #include <amiga/dev/gtscreg.h>
     57  1.28.8.2  nathanw #include <amiga/dev/zbusvar.h>
     58  1.28.8.2  nathanw #include <amiga/dev/gvpbusvar.h>
     59  1.28.8.2  nathanw 
     60  1.28.8.2  nathanw void gtscattach(struct device *, struct device *, void *);
     61  1.28.8.2  nathanw int gtscmatch(struct device *, struct cfdata *, void *);
     62  1.28.8.2  nathanw 
     63  1.28.8.2  nathanw void gtsc_enintr(struct sbic_softc *);
     64  1.28.8.2  nathanw void gtsc_dmastop(struct sbic_softc *);
     65  1.28.8.2  nathanw int gtsc_dmanext(struct sbic_softc *);
     66  1.28.8.2  nathanw int gtsc_dmaintr(void *);
     67  1.28.8.2  nathanw int gtsc_dmago(struct sbic_softc *, char *, int, int);
     68  1.28.8.2  nathanw 
     69  1.28.8.2  nathanw #ifdef DEBUG
     70  1.28.8.2  nathanw void gtsc_dump(void);
     71  1.28.8.2  nathanw #endif
     72  1.28.8.2  nathanw 
     73  1.28.8.2  nathanw int gtsc_maxdma = 0;	/* Maximum size per DMA transfer */
     74  1.28.8.2  nathanw int gtsc_dmamask = 0;
     75  1.28.8.2  nathanw int gtsc_dmabounce = 0;
     76  1.28.8.2  nathanw int gtsc_clock_override = 0;
     77  1.28.8.2  nathanw 
     78  1.28.8.2  nathanw #ifdef DEBUG
     79  1.28.8.2  nathanw int gtsc_debug = 0;
     80  1.28.8.2  nathanw #endif
     81  1.28.8.2  nathanw 
     82  1.28.8.2  nathanw struct cfattach gtsc_ca = {
     83  1.28.8.2  nathanw 	sizeof(struct sbic_softc), gtscmatch, gtscattach
     84  1.28.8.2  nathanw };
     85  1.28.8.2  nathanw 
     86  1.28.8.2  nathanw int
     87  1.28.8.2  nathanw gtscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
     88  1.28.8.2  nathanw {
     89  1.28.8.2  nathanw 	struct gvpbus_args *gap;
     90  1.28.8.2  nathanw 
     91  1.28.8.2  nathanw 	gap = auxp;
     92  1.28.8.2  nathanw 	if (gap->flags & GVP_SCSI)
     93  1.28.8.2  nathanw 		return(1);
     94  1.28.8.2  nathanw 	return(0);
     95  1.28.8.2  nathanw }
     96  1.28.8.2  nathanw 
     97  1.28.8.2  nathanw /*
     98  1.28.8.2  nathanw  * attach all devices on our board.
     99  1.28.8.2  nathanw  */
    100  1.28.8.2  nathanw void
    101  1.28.8.2  nathanw gtscattach(struct device *pdp, struct device *dp, void *auxp)
    102  1.28.8.2  nathanw {
    103  1.28.8.2  nathanw 	volatile struct sdmac *rp;
    104  1.28.8.2  nathanw 	struct gvpbus_args *gap;
    105  1.28.8.2  nathanw 	struct sbic_softc *sc = (struct sbic_softc *)dp;
    106  1.28.8.2  nathanw 	struct scsipi_adapter *adapt = &sc->sc_adapter;
    107  1.28.8.2  nathanw 	struct scsipi_channel *chan = &sc->sc_channel;
    108  1.28.8.2  nathanw 
    109  1.28.8.2  nathanw 	gap = auxp;
    110  1.28.8.2  nathanw 	sc->sc_cregs = rp = gap->zargs.va;
    111  1.28.8.2  nathanw 
    112  1.28.8.2  nathanw 	/*
    113  1.28.8.2  nathanw 	 * disable ints and reset bank register
    114  1.28.8.2  nathanw 	 */
    115  1.28.8.2  nathanw 	rp->CNTR = 0;
    116  1.28.8.2  nathanw 	if ((gap->flags & GVP_NOBANK) == 0)
    117  1.28.8.2  nathanw 		rp->bank = 0;
    118  1.28.8.2  nathanw 
    119  1.28.8.2  nathanw 	sc->sc_dmago =  gtsc_dmago;
    120  1.28.8.2  nathanw 	sc->sc_enintr = gtsc_enintr;
    121  1.28.8.2  nathanw 	sc->sc_dmanext = gtsc_dmanext;
    122  1.28.8.2  nathanw 	sc->sc_dmastop = gtsc_dmastop;
    123  1.28.8.2  nathanw 	sc->sc_dmacmd = 0;
    124  1.28.8.2  nathanw 
    125  1.28.8.2  nathanw 	sc->sc_flags |= SBICF_BADDMA;
    126  1.28.8.2  nathanw 	if (gtsc_dmamask)
    127  1.28.8.2  nathanw 		sc->sc_dmamask = gtsc_dmamask;
    128  1.28.8.2  nathanw 	else if (gap->flags & GVP_24BITDMA)
    129  1.28.8.2  nathanw 		sc->sc_dmamask = ~0x00ffffff;
    130  1.28.8.2  nathanw 	else if (gap->flags & GVP_25BITDMA)
    131  1.28.8.2  nathanw 		sc->sc_dmamask = ~0x01ffffff;
    132  1.28.8.2  nathanw 	else
    133  1.28.8.2  nathanw 		sc->sc_dmamask = ~0x07ffffff;
    134  1.28.8.2  nathanw 	printf(": dmamask 0x%lx", ~sc->sc_dmamask);
    135  1.28.8.2  nathanw 
    136  1.28.8.2  nathanw 	if ((gap->flags & GVP_NOBANK) == 0)
    137  1.28.8.2  nathanw 		sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0;
    138  1.28.8.2  nathanw 
    139  1.28.8.2  nathanw #if 0
    140  1.28.8.2  nathanw 	/*
    141  1.28.8.2  nathanw 	 * if the user requests a bounce buffer or
    142  1.28.8.2  nathanw 	 * the users kva space is not ztwo and dma needs it
    143  1.28.8.2  nathanw 	 * try and allocate a bounce buffer.  If we allocate
    144  1.28.8.2  nathanw 	 * one and it is in ztwo space leave maxdma to user
    145  1.28.8.2  nathanw 	 * setting or default to MAXPHYS else the address must
    146  1.28.8.2  nathanw 	 * be on the chip bus so decrease it to either the users
    147  1.28.8.2  nathanw 	 * setting or 1024 bytes.
    148  1.28.8.2  nathanw 	 *
    149  1.28.8.2  nathanw 	 * XXX this needs to change if we move to multiple memory segments.
    150  1.28.8.2  nathanw 	 */
    151  1.28.8.2  nathanw 	if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) {
    152  1.28.8.2  nathanw 		sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS * 8); /* XXX */
    153  1.28.8.2  nathanw 		if (isztwomem(sc->sc_dmabuffer))
    154  1.28.8.2  nathanw 			printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer));
    155  1.28.8.2  nathanw 		else if (gtsc_maxdma == 0) {
    156  1.28.8.2  nathanw 			gtsc_maxdma = 1024;
    157  1.28.8.2  nathanw 			printf(" bounce pa 0x%x",
    158  1.28.8.2  nathanw 			    PREP_DMA_MEM(sc->sc_dmabuffer));
    159  1.28.8.2  nathanw 		}
    160  1.28.8.2  nathanw 	}
    161  1.28.8.2  nathanw #endif
    162  1.28.8.2  nathanw 	if (gtsc_maxdma == 0)
    163  1.28.8.2  nathanw 		gtsc_maxdma = MAXPHYS;
    164  1.28.8.2  nathanw 
    165  1.28.8.2  nathanw 	printf(" flags %x", gap->flags);
    166  1.28.8.2  nathanw 	printf(" maxdma %d\n", gtsc_maxdma);
    167  1.28.8.2  nathanw 
    168  1.28.8.2  nathanw 	sc->sc_sbic.sbic_asr_p = (volatile unsigned char *)rp + 0x61;
    169  1.28.8.2  nathanw 	sc->sc_sbic.sbic_value_p = (volatile unsigned char *)rp + 0x63;
    170  1.28.8.2  nathanw 
    171  1.28.8.2  nathanw 	sc->sc_clkfreq = gtsc_clock_override ? gtsc_clock_override :
    172  1.28.8.2  nathanw 	    ((gap->flags & GVP_14MHZ) ? 143 : 72);
    173  1.28.8.2  nathanw 	printf("sc_clkfreg: %ld.%ldMhz\n", sc->sc_clkfreq / 10, sc->sc_clkfreq % 10);
    174  1.28.8.2  nathanw 
    175  1.28.8.2  nathanw 	/*
    176  1.28.8.2  nathanw 	 * Fill in the scsipi_adapter.
    177  1.28.8.2  nathanw 	 */
    178  1.28.8.2  nathanw 	memset(adapt, 0, sizeof(*adapt));
    179  1.28.8.2  nathanw 	adapt->adapt_dev = &sc->sc_dev;
    180  1.28.8.2  nathanw 	adapt->adapt_nchannels = 1;
    181  1.28.8.2  nathanw 	adapt->adapt_openings = 7;
    182  1.28.8.2  nathanw 	adapt->adapt_max_periph = 1;
    183  1.28.8.2  nathanw 	adapt->adapt_request = sbic_scsipi_request;
    184  1.28.8.2  nathanw 	adapt->adapt_minphys = sbic_minphys;
    185  1.28.8.2  nathanw 
    186  1.28.8.2  nathanw 	/*
    187  1.28.8.2  nathanw 	 * Fill in the scsipi_channel.
    188  1.28.8.2  nathanw 	 */
    189  1.28.8.2  nathanw 	memset(chan, 0, sizeof(*chan));
    190  1.28.8.2  nathanw 	chan->chan_adapter = adapt;
    191  1.28.8.2  nathanw 	chan->chan_bustype = &scsi_bustype;
    192  1.28.8.2  nathanw 	chan->chan_channel = 0;
    193  1.28.8.2  nathanw 	chan->chan_ntargets = 8;
    194  1.28.8.2  nathanw 	chan->chan_nluns = 8;
    195  1.28.8.2  nathanw 	chan->chan_id = 7;
    196  1.28.8.2  nathanw 
    197  1.28.8.2  nathanw 	sbicinit(sc);
    198  1.28.8.2  nathanw 
    199  1.28.8.2  nathanw 	sc->sc_isr.isr_intr = gtsc_dmaintr;
    200  1.28.8.2  nathanw 	sc->sc_isr.isr_arg = sc;
    201  1.28.8.2  nathanw 	sc->sc_isr.isr_ipl = 2;
    202  1.28.8.2  nathanw 	add_isr(&sc->sc_isr);
    203  1.28.8.2  nathanw 
    204  1.28.8.2  nathanw 	/*
    205  1.28.8.2  nathanw 	 * attach all scsi units on us
    206  1.28.8.2  nathanw 	 */
    207  1.28.8.2  nathanw 	config_found(dp, chan, scsiprint);
    208  1.28.8.2  nathanw }
    209  1.28.8.2  nathanw 
    210  1.28.8.2  nathanw void
    211  1.28.8.2  nathanw gtsc_enintr(struct sbic_softc *dev)
    212  1.28.8.2  nathanw {
    213  1.28.8.2  nathanw 	volatile struct sdmac *sdp;
    214  1.28.8.2  nathanw 
    215  1.28.8.2  nathanw 	sdp = dev->sc_cregs;
    216  1.28.8.2  nathanw 
    217  1.28.8.2  nathanw 	dev->sc_flags |= SBICF_INTR;
    218  1.28.8.2  nathanw 	sdp->CNTR = GVP_CNTR_INTEN;
    219  1.28.8.2  nathanw }
    220  1.28.8.2  nathanw 
    221  1.28.8.2  nathanw int
    222  1.28.8.2  nathanw gtsc_dmago(struct sbic_softc *dev, char *addr, int count, int flags)
    223  1.28.8.2  nathanw {
    224  1.28.8.2  nathanw 	volatile struct sdmac *sdp;
    225  1.28.8.2  nathanw 
    226  1.28.8.2  nathanw 	sdp = dev->sc_cregs;
    227  1.28.8.2  nathanw 	/*
    228  1.28.8.2  nathanw 	 * Set up the command word based on flags
    229  1.28.8.2  nathanw 	 */
    230  1.28.8.2  nathanw 	dev->sc_dmacmd = GVP_CNTR_INTEN;
    231  1.28.8.2  nathanw 	if ((flags & DMAGO_READ) == 0)
    232  1.28.8.2  nathanw 		dev->sc_dmacmd |= GVP_CNTR_DDIR;
    233  1.28.8.2  nathanw 
    234  1.28.8.2  nathanw #ifdef DEBUG
    235  1.28.8.2  nathanw 	if (gtsc_debug & DDB_IO)
    236  1.28.8.2  nathanw 		printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd);
    237  1.28.8.2  nathanw #endif
    238  1.28.8.2  nathanw 	dev->sc_flags |= SBICF_INTR;
    239  1.28.8.2  nathanw 	sdp->CNTR = dev->sc_dmacmd;
    240  1.28.8.2  nathanw 	if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask) {
    241  1.28.8.2  nathanw #if 1
    242  1.28.8.2  nathanw 		printf("gtsc_dmago: pa %p->%lx dmacmd %x",
    243  1.28.8.2  nathanw 		    dev->sc_cur->dc_addr,
    244  1.28.8.2  nathanw 		    (u_int)dev->sc_cur->dc_addr & ~dev->sc_dmamask,
    245  1.28.8.2  nathanw 		     dev->sc_dmacmd);
    246  1.28.8.2  nathanw #endif
    247  1.28.8.2  nathanw 		sdp->ACR = 0x00f80000;	/***********************************/
    248  1.28.8.2  nathanw 	} else
    249  1.28.8.2  nathanw 		sdp->ACR = (u_int) dev->sc_cur->dc_addr;
    250  1.28.8.2  nathanw 	if (dev->gtsc_bankmask)
    251  1.28.8.2  nathanw 		sdp->bank =
    252  1.28.8.2  nathanw 		    dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18);
    253  1.28.8.2  nathanw 	sdp->ST_DMA = 1;
    254  1.28.8.2  nathanw 
    255  1.28.8.2  nathanw 	/*
    256  1.28.8.2  nathanw 	 * restrict transfer count to maximum
    257  1.28.8.2  nathanw 	 */
    258  1.28.8.2  nathanw 	if (dev->sc_tcnt > gtsc_maxdma)
    259  1.28.8.2  nathanw 		dev->sc_tcnt = gtsc_maxdma;
    260  1.28.8.2  nathanw #if 1
    261  1.28.8.2  nathanw 	if((u_int)dev->sc_cur->dc_addr & dev->sc_dmamask)
    262  1.28.8.2  nathanw 		printf(" tcnt %ld\n", dev->sc_tcnt);
    263  1.28.8.2  nathanw #endif
    264  1.28.8.2  nathanw 	return(dev->sc_tcnt);
    265  1.28.8.2  nathanw }
    266  1.28.8.2  nathanw 
    267  1.28.8.2  nathanw void
    268  1.28.8.2  nathanw gtsc_dmastop(struct sbic_softc *dev)
    269  1.28.8.2  nathanw {
    270  1.28.8.2  nathanw 	volatile struct sdmac *sdp;
    271  1.28.8.2  nathanw 	int s;
    272  1.28.8.2  nathanw 
    273  1.28.8.2  nathanw 	sdp = dev->sc_cregs;
    274  1.28.8.2  nathanw 
    275  1.28.8.2  nathanw #ifdef DEBUG
    276  1.28.8.2  nathanw 	if (gtsc_debug & DDB_FOLLOW)
    277  1.28.8.2  nathanw 		printf("gtsc_dmastop()\n");
    278  1.28.8.2  nathanw #endif
    279  1.28.8.2  nathanw 	if (dev->sc_dmacmd) {
    280  1.28.8.2  nathanw 		/*
    281  1.28.8.2  nathanw 		 * clear possible interrupt and stop dma
    282  1.28.8.2  nathanw 		 */
    283  1.28.8.2  nathanw 		s = splbio();
    284  1.28.8.2  nathanw 		sdp->CNTR &= ~GVP_CNTR_INT_P;
    285  1.28.8.2  nathanw 		sdp->SP_DMA = 1;
    286  1.28.8.2  nathanw 		dev->sc_dmacmd = 0;
    287  1.28.8.2  nathanw 		splx(s);
    288  1.28.8.2  nathanw 	}
    289  1.28.8.2  nathanw }
    290  1.28.8.2  nathanw 
    291  1.28.8.2  nathanw int
    292  1.28.8.2  nathanw gtsc_dmaintr(void *arg)
    293  1.28.8.2  nathanw {
    294  1.28.8.2  nathanw 	struct sbic_softc *dev = arg;
    295  1.28.8.2  nathanw 	volatile struct sdmac *sdp;
    296  1.28.8.2  nathanw 	int stat;
    297  1.28.8.2  nathanw 
    298  1.28.8.2  nathanw 	sdp = dev->sc_cregs;
    299  1.28.8.2  nathanw 	stat = sdp->CNTR;
    300  1.28.8.2  nathanw 	if ((stat & GVP_CNTR_INT_P) == 0)
    301  1.28.8.2  nathanw 		return (0);
    302  1.28.8.2  nathanw #ifdef DEBUG
    303  1.28.8.2  nathanw 	if (gtsc_debug & DDB_FOLLOW)
    304  1.28.8.2  nathanw 		printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat);
    305  1.28.8.2  nathanw #endif
    306  1.28.8.2  nathanw 	if (dev->sc_flags & SBICF_INTR)
    307  1.28.8.2  nathanw 		if (sbicintr(dev))
    308  1.28.8.2  nathanw 			return (1);
    309  1.28.8.2  nathanw 	return(0);
    310  1.28.8.2  nathanw }
    311  1.28.8.2  nathanw 
    312  1.28.8.2  nathanw 
    313  1.28.8.2  nathanw int
    314  1.28.8.2  nathanw gtsc_dmanext(struct sbic_softc *dev)
    315  1.28.8.2  nathanw {
    316  1.28.8.2  nathanw 	volatile struct sdmac *sdp;
    317  1.28.8.2  nathanw 
    318  1.28.8.2  nathanw 	sdp = dev->sc_cregs;
    319  1.28.8.2  nathanw 
    320  1.28.8.2  nathanw 	if (dev->sc_cur > dev->sc_last) {
    321  1.28.8.2  nathanw 		/* shouldn't happen !! */
    322  1.28.8.2  nathanw 		printf("gtsc_dmanext at end !!!\n");
    323  1.28.8.2  nathanw 		gtsc_dmastop(dev);
    324  1.28.8.2  nathanw 		return(0);
    325  1.28.8.2  nathanw 	}
    326  1.28.8.2  nathanw 	/*
    327  1.28.8.2  nathanw 	 * clear possible interrupt and stop dma
    328  1.28.8.2  nathanw 	 */
    329  1.28.8.2  nathanw 	sdp->CNTR &= ~GVP_CNTR_INT_P;
    330  1.28.8.2  nathanw 	sdp->SP_DMA = 1;
    331  1.28.8.2  nathanw 
    332  1.28.8.2  nathanw 	sdp->CNTR = dev->sc_dmacmd;
    333  1.28.8.2  nathanw 	sdp->ACR = (u_int) dev->sc_cur->dc_addr;
    334  1.28.8.2  nathanw 	if (dev->gtsc_bankmask)
    335  1.28.8.2  nathanw 		sdp->bank =
    336  1.28.8.2  nathanw 		    dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18);
    337  1.28.8.2  nathanw 	sdp->ST_DMA = 1;
    338  1.28.8.2  nathanw 
    339  1.28.8.2  nathanw 	dev->sc_tcnt = dev->sc_cur->dc_count << 1;
    340  1.28.8.2  nathanw 	if (dev->sc_tcnt > gtsc_maxdma)
    341  1.28.8.2  nathanw 		dev->sc_tcnt = gtsc_maxdma;
    342  1.28.8.2  nathanw #ifdef DEBUG
    343  1.28.8.2  nathanw 	if (gtsc_debug & DDB_FOLLOW)
    344  1.28.8.2  nathanw 		printf("gtsc_dmanext ret: %ld\n", dev->sc_tcnt);
    345  1.28.8.2  nathanw #endif
    346  1.28.8.2  nathanw 	return(dev->sc_tcnt);
    347  1.28.8.2  nathanw }
    348  1.28.8.2  nathanw 
    349  1.28.8.2  nathanw #ifdef DEBUG
    350  1.28.8.2  nathanw void
    351  1.28.8.2  nathanw gtsc_dump(void)
    352  1.28.8.2  nathanw {
    353  1.28.8.2  nathanw 	extern struct cfdriver gtsc_cd;
    354  1.28.8.2  nathanw 	int i;
    355  1.28.8.2  nathanw 
    356  1.28.8.2  nathanw 	for (i = 0; i < gtsc_cd.cd_ndevs; ++i)
    357  1.28.8.2  nathanw 		if (gtsc_cd.cd_devs[i])
    358  1.28.8.2  nathanw 			sbic_dump(gtsc_cd.cd_devs[i]);
    359  1.28.8.2  nathanw }
    360  1.28.8.2  nathanw #endif
    361