gtsc.c revision 1.10
1 /* $NetBSD: gtsc.c,v 1.10 1995/01/05 07:22:35 chopps Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/cc.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/dev/dmavar.h> 48 #include <amiga/dev/sbicreg.h> 49 #include <amiga/dev/sbicvar.h> 50 #include <amiga/dev/gtscreg.h> 51 #include <amiga/dev/zbusvar.h> 52 #include <amiga/dev/gvpbusvar.h> 53 54 void gtscattach __P((struct device *, struct device *, void *)); 55 int gtscmatch __P((struct device *, struct cfdata *, void *)); 56 int gtscprint __P((void *auxp, char *)); 57 58 void gtsc_dmafree __P((struct sbic_softc *)); 59 void gtsc_dmastop __P((struct sbic_softc *)); 60 int gtsc_dmanext __P((struct sbic_softc *)); 61 int gtsc_dmaintr __P((void)); 62 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 63 64 struct scsi_adapter gtsc_scsiswitch = { 65 sbic_scsicmd, 66 sbic_minphys, 67 0, /* no lun support */ 68 0, /* no lun support */ 69 }; 70 71 struct scsi_device gtsc_scsidev = { 72 NULL, /* use default error handler */ 73 NULL, /* have a queue served by this ??? */ 74 NULL, /* have no async handler ??? */ 75 NULL, /* Use default done routine */ 76 }; 77 78 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 79 int gtsc_dmamask = 0; 80 int gtsc_dmabounce = 0; 81 82 #ifdef DEBUG 83 void gtsc_dmatimeout __P((void *)); 84 int gtsc_debug = 0; 85 #endif 86 87 struct cfdriver gtsccd = { 88 NULL, "gtsc", (cfmatch_t)gtscmatch, gtscattach, 89 DV_DULL, sizeof(struct sbic_softc), NULL, 0 }; 90 91 int 92 gtscmatch(pdp, cdp, auxp) 93 struct device *pdp; 94 struct cfdata *cdp; 95 void *auxp; 96 { 97 struct gvpbus_args *gap; 98 99 gap = auxp; 100 if (gap->flags & GVP_SCSI) 101 return(1); 102 return(0); 103 } 104 105 /* 106 * attach all devices on our board. 107 */ 108 void 109 gtscattach(pdp, dp, auxp) 110 struct device *pdp, *dp; 111 void *auxp; 112 { 113 volatile struct sdmac *rp; 114 struct gvpbus_args *gap; 115 struct sbic_softc *sc; 116 117 gap = auxp; 118 sc = (struct sbic_softc *)dp; 119 sc->sc_cregs = rp = gap->zargs.va; 120 121 /* 122 * disable ints and reset bank register 123 */ 124 rp->CNTR = 0; 125 if ((gap->flags & GVP_NOBANK) == 0) 126 rp->bank = 0; 127 128 sc->sc_dmago = gtsc_dmago; 129 sc->sc_dmafree = gtsc_dmafree; 130 sc->sc_dmanext = gtsc_dmanext; 131 sc->sc_dmastop = gtsc_dmastop; 132 sc->sc_dmacmd = 0; 133 134 #ifdef DEBUG 135 /* make sure timeout is really not needed */ 136 timeout((void *)gtsc_dmatimeout, 0, 30 * hz); 137 #endif 138 139 sc->sc_flags |= SBICF_BADDMA; 140 if (gtsc_dmamask) 141 sc->sc_dmamask = gtsc_dmamask; 142 else if (gap->flags & GVP_24BITDMA) 143 sc->sc_dmamask = ~0x00ffffff; 144 else if (gap->flags & GVP_25BITDMA) 145 sc->sc_dmamask = ~0x01ffffff; 146 else 147 sc->sc_dmamask = ~0x07ffffff; 148 printf(": dmamask 0x%x", ~sc->sc_dmamask); 149 150 if ((gap->flags & GVP_NOBANK) == 0) 151 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 152 153 154 /* 155 * if the user requests a bounce buffer or 156 * the users kva space is not ztwo and dma needs it 157 * try and allocate a bounce buffer. If we allocate 158 * one and it is in ztwo space leave maxdma to user 159 * setting or default to MAXPHYS else the address must 160 * be on the chip bus so decrease it to either the users 161 * setting or 1024 bytes. 162 * 163 * XXX this needs to change if we move to multiple memory segments. 164 */ 165 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 166 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS); 167 if (isztwomem(sc->sc_dmabuffer)) 168 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 169 else if (gtsc_maxdma == 0) { 170 gtsc_maxdma = 1024; 171 printf(" bounce pa 0x%x", 172 PREP_DMA_MEM(sc->sc_dmabuffer)); 173 } 174 } 175 if (gtsc_maxdma == 0) 176 gtsc_maxdma = MAXPHYS; 177 178 printf(" maxdma %d\n", gtsc_maxdma); 179 180 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61); 181 sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77; 182 183 sbicreset(sc); 184 185 sc->sc_link.adapter_softc = sc; 186 sc->sc_link.adapter_target = 7; 187 sc->sc_link.adapter = >sc_scsiswitch; 188 sc->sc_link.device = >sc_scsidev; 189 sc->sc_link.openings = 1; 190 TAILQ_INIT(&sc->sc_xslist); 191 192 custom.intreq = INTF_PORTS; 193 custom.intena = INTF_SETCLR | INTF_PORTS; 194 195 /* 196 * attach all scsi units on us 197 */ 198 config_found(dp, &sc->sc_link, gtscprint); 199 } 200 201 /* 202 * print diag if pnp is NULL else just extra 203 */ 204 int 205 gtscprint(auxp, pnp) 206 void *auxp; 207 char *pnp; 208 { 209 if (pnp == NULL) 210 return(UNCONF); 211 return(QUIET); 212 } 213 214 void 215 gtsc_dmafree(dev) 216 struct sbic_softc *dev; 217 { 218 volatile struct sdmac *sdp; 219 int s; 220 221 sdp = dev->sc_cregs; 222 223 s = splbio(); 224 #ifdef DEBUG 225 dev->sc_dmatimo = 0; 226 #endif 227 if (dev->sc_dmacmd) { 228 /* 229 * clear possible interrupt and stop dma 230 */ 231 sdp->CNTR &= ~GVP_CNTR_INT_P; 232 sdp->SP_DMA = 1; 233 dev->sc_dmacmd = 0; 234 } 235 #ifdef DEBUG 236 if (gtsc_debug & (DDB_IO | DDB_FOLLOW)) 237 printf("gtsc_dmafree\n"); 238 #endif 239 /* 240 * disable interrupts 241 */ 242 sdp->CNTR = 0; /* disable interrupts from dma/sbic */ 243 dev->sc_flags &= ~SBICF_INTR; 244 splx(s); 245 } 246 247 int 248 gtsc_dmago(dev, addr, count, flags) 249 struct sbic_softc *dev; 250 char *addr; 251 int count, flags; 252 { 253 volatile struct sdmac *sdp; 254 255 sdp = dev->sc_cregs; 256 /* 257 * Set up the command word based on flags 258 */ 259 dev->sc_dmacmd = GVP_CNTR_INTEN; 260 if ((flags & DMAGO_READ) == 0) 261 dev->sc_dmacmd |= GVP_CNTR_DDIR; 262 263 #ifdef DEBUG 264 if (gtsc_debug & DDB_IO) 265 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 266 dev->sc_dmatimo = 1; 267 #endif 268 dev->sc_flags |= SBICF_INTR; 269 sdp->CNTR = dev->sc_dmacmd; 270 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 271 if (dev->gtsc_bankmask) 272 sdp->bank = 273 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 274 sdp->ST_DMA = 1; 275 276 /* 277 * restrict transfer count to maximum 278 */ 279 if (dev->sc_tcnt > gtsc_maxdma) 280 dev->sc_tcnt = gtsc_maxdma; 281 return(dev->sc_tcnt); 282 } 283 284 void 285 gtsc_dmastop(dev) 286 struct sbic_softc *dev; 287 { 288 volatile struct sdmac *sdp; 289 int s; 290 291 sdp = dev->sc_cregs; 292 293 #ifdef DEBUG 294 if (gtsc_debug & DDB_FOLLOW) 295 printf("gtsc_dmastop()\n"); 296 dev->sc_dmatimo = 0; 297 #endif 298 if (dev->sc_dmacmd) { 299 /* 300 * clear possible interrupt and stop dma 301 */ 302 s = splbio(); 303 sdp->CNTR &= ~GVP_CNTR_INT_P; 304 sdp->SP_DMA = 1; 305 dev->sc_dmacmd = 0; 306 splx(s); 307 } 308 } 309 310 int 311 gtsc_dmaintr() 312 { 313 volatile struct sdmac *sdp; 314 struct sbic_softc *dev; 315 int i, stat, found; 316 317 found = 0; 318 for (i = 0; i < gtsccd.cd_ndevs; i++) { 319 dev = gtsccd.cd_devs[i]; 320 if (dev == NULL) 321 continue; 322 sdp = dev->sc_cregs; 323 stat = sdp->CNTR; 324 if ((stat & GVP_CNTR_INT_P) == 0) 325 continue; 326 #ifdef DEBUG 327 if (gtsc_debug & DDB_FOLLOW) 328 printf("gtsc_dmaintr(%d, 0x%x) ", i, stat); 329 #endif 330 if (dev->sc_flags & SBICF_INTR) 331 found += sbicintr(dev); 332 } 333 return(found); 334 } 335 336 337 int 338 gtsc_dmanext(dev) 339 struct sbic_softc *dev; 340 { 341 volatile struct sdmac *sdp; 342 int i, stat; 343 344 sdp = dev->sc_cregs; 345 346 if (dev->sc_cur > dev->sc_last) { 347 /* shouldn't happen !! */ 348 printf("gtsc_dmanext at end !!!\n"); 349 gtsc_dmastop(dev); 350 return(0); 351 } 352 #ifdef DEBUG 353 dev->sc_dmatimo = 1; 354 #endif 355 /* 356 * clear possible interrupt and stop dma 357 */ 358 sdp->CNTR &= ~GVP_CNTR_INT_P; 359 sdp->SP_DMA = 1; 360 361 sdp->CNTR = dev->sc_dmacmd; 362 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 363 if (dev->gtsc_bankmask) 364 sdp->bank = 365 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 366 sdp->ST_DMA = 1; 367 368 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 369 if (dev->sc_tcnt > gtsc_maxdma) 370 dev->sc_tcnt = gtsc_maxdma; 371 #ifdef DEBUG 372 if (gtsc_debug & DDB_FOLLOW) 373 printf("gtsc_dmanext ret: %d\n", dev->sc_tcnt); 374 #endif 375 return(dev->sc_tcnt); 376 } 377 378 #ifdef DEBUG 379 void 380 gtsc_dmatimeout(arg) 381 void *arg; 382 { 383 struct sbic_softc *dev; 384 int i, s; 385 386 for (i = 0; i < gtsccd.cd_ndevs; i++) { 387 dev = gtsccd.cd_devs[i]; 388 if (dev == NULL) 389 continue; 390 s = splbio(); 391 if (dev->sc_dmatimo) { 392 if (dev->sc_dmatimo > 1) 393 printf("gtsc_dma%d: timeout #%d\n", 394 dev->sc_dev.dv_unit, dev->sc_dmatimo - 1); 395 dev->sc_dmatimo++; 396 } 397 splx(s); 398 } 399 timeout(gtsc_dmatimeout, 0, 30 * hz); 400 } 401 #endif 402
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