gtsc.c revision 1.11
1 /* $NetBSD: gtsc.c,v 1.11 1995/02/12 19:19:07 chopps Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/cc.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/amiga/isr.h> 48 #include <amiga/dev/dmavar.h> 49 #include <amiga/dev/sbicreg.h> 50 #include <amiga/dev/sbicvar.h> 51 #include <amiga/dev/gtscreg.h> 52 #include <amiga/dev/zbusvar.h> 53 #include <amiga/dev/gvpbusvar.h> 54 55 void gtscattach __P((struct device *, struct device *, void *)); 56 int gtscmatch __P((struct device *, struct cfdata *, void *)); 57 int gtscprint __P((void *auxp, char *)); 58 59 void gtsc_dmafree __P((struct sbic_softc *)); 60 void gtsc_dmastop __P((struct sbic_softc *)); 61 int gtsc_dmanext __P((struct sbic_softc *)); 62 int gtsc_dmaintr __P((struct sbic_softc *)); 63 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 64 65 struct scsi_adapter gtsc_scsiswitch = { 66 sbic_scsicmd, 67 sbic_minphys, 68 0, /* no lun support */ 69 0, /* no lun support */ 70 }; 71 72 struct scsi_device gtsc_scsidev = { 73 NULL, /* use default error handler */ 74 NULL, /* have a queue served by this ??? */ 75 NULL, /* have no async handler ??? */ 76 NULL, /* Use default done routine */ 77 }; 78 79 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 80 int gtsc_dmamask = 0; 81 int gtsc_dmabounce = 0; 82 83 #ifdef DEBUG 84 void gtsc_dmatimeout __P((void *)); 85 int gtsc_debug = 0; 86 #endif 87 88 struct cfdriver gtsccd = { 89 NULL, "gtsc", (cfmatch_t)gtscmatch, gtscattach, 90 DV_DULL, sizeof(struct sbic_softc), NULL, 0 }; 91 92 int 93 gtscmatch(pdp, cdp, auxp) 94 struct device *pdp; 95 struct cfdata *cdp; 96 void *auxp; 97 { 98 struct gvpbus_args *gap; 99 100 gap = auxp; 101 if (gap->flags & GVP_SCSI) 102 return(1); 103 return(0); 104 } 105 106 /* 107 * attach all devices on our board. 108 */ 109 void 110 gtscattach(pdp, dp, auxp) 111 struct device *pdp, *dp; 112 void *auxp; 113 { 114 volatile struct sdmac *rp; 115 struct gvpbus_args *gap; 116 struct sbic_softc *sc; 117 118 gap = auxp; 119 sc = (struct sbic_softc *)dp; 120 sc->sc_cregs = rp = gap->zargs.va; 121 122 /* 123 * disable ints and reset bank register 124 */ 125 rp->CNTR = 0; 126 if ((gap->flags & GVP_NOBANK) == 0) 127 rp->bank = 0; 128 129 sc->sc_dmago = gtsc_dmago; 130 sc->sc_dmafree = gtsc_dmafree; 131 sc->sc_dmanext = gtsc_dmanext; 132 sc->sc_dmastop = gtsc_dmastop; 133 sc->sc_dmacmd = 0; 134 135 #ifdef DEBUG 136 /* make sure timeout is really not needed */ 137 timeout((void *)gtsc_dmatimeout, 0, 30 * hz); 138 #endif 139 140 sc->sc_flags |= SBICF_BADDMA; 141 if (gtsc_dmamask) 142 sc->sc_dmamask = gtsc_dmamask; 143 else if (gap->flags & GVP_24BITDMA) 144 sc->sc_dmamask = ~0x00ffffff; 145 else if (gap->flags & GVP_25BITDMA) 146 sc->sc_dmamask = ~0x01ffffff; 147 else 148 sc->sc_dmamask = ~0x07ffffff; 149 printf(": dmamask 0x%x", ~sc->sc_dmamask); 150 151 if ((gap->flags & GVP_NOBANK) == 0) 152 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 153 154 155 /* 156 * if the user requests a bounce buffer or 157 * the users kva space is not ztwo and dma needs it 158 * try and allocate a bounce buffer. If we allocate 159 * one and it is in ztwo space leave maxdma to user 160 * setting or default to MAXPHYS else the address must 161 * be on the chip bus so decrease it to either the users 162 * setting or 1024 bytes. 163 * 164 * XXX this needs to change if we move to multiple memory segments. 165 */ 166 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 167 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS); 168 if (isztwomem(sc->sc_dmabuffer)) 169 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 170 else if (gtsc_maxdma == 0) { 171 gtsc_maxdma = 1024; 172 printf(" bounce pa 0x%x", 173 PREP_DMA_MEM(sc->sc_dmabuffer)); 174 } 175 } 176 if (gtsc_maxdma == 0) 177 gtsc_maxdma = MAXPHYS; 178 179 printf(" maxdma %d\n", gtsc_maxdma); 180 181 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61); 182 sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77; 183 184 sbicreset(sc); 185 186 sc->sc_link.adapter_softc = sc; 187 sc->sc_link.adapter_target = 7; 188 sc->sc_link.adapter = >sc_scsiswitch; 189 sc->sc_link.device = >sc_scsidev; 190 sc->sc_link.openings = 1; 191 TAILQ_INIT(&sc->sc_xslist); 192 193 sc->sc_isr.isr_intr = gtsc_dmaintr; 194 sc->sc_isr.isr_arg = sc; 195 sc->sc_isr.isr_ipl = 2; 196 add_isr(&sc->sc_isr); 197 198 /* 199 * attach all scsi units on us 200 */ 201 config_found(dp, &sc->sc_link, gtscprint); 202 } 203 204 /* 205 * print diag if pnp is NULL else just extra 206 */ 207 int 208 gtscprint(auxp, pnp) 209 void *auxp; 210 char *pnp; 211 { 212 if (pnp == NULL) 213 return(UNCONF); 214 return(QUIET); 215 } 216 217 void 218 gtsc_dmafree(dev) 219 struct sbic_softc *dev; 220 { 221 volatile struct sdmac *sdp; 222 int s; 223 224 sdp = dev->sc_cregs; 225 226 s = splbio(); 227 #ifdef DEBUG 228 dev->sc_dmatimo = 0; 229 #endif 230 if (dev->sc_dmacmd) { 231 /* 232 * clear possible interrupt and stop dma 233 */ 234 sdp->CNTR &= ~GVP_CNTR_INT_P; 235 sdp->SP_DMA = 1; 236 dev->sc_dmacmd = 0; 237 } 238 #ifdef DEBUG 239 if (gtsc_debug & (DDB_IO | DDB_FOLLOW)) 240 printf("gtsc_dmafree\n"); 241 #endif 242 /* 243 * disable interrupts 244 */ 245 sdp->CNTR = 0; /* disable interrupts from dma/sbic */ 246 dev->sc_flags &= ~SBICF_INTR; 247 splx(s); 248 } 249 250 int 251 gtsc_dmago(dev, addr, count, flags) 252 struct sbic_softc *dev; 253 char *addr; 254 int count, flags; 255 { 256 volatile struct sdmac *sdp; 257 258 sdp = dev->sc_cregs; 259 /* 260 * Set up the command word based on flags 261 */ 262 dev->sc_dmacmd = GVP_CNTR_INTEN; 263 if ((flags & DMAGO_READ) == 0) 264 dev->sc_dmacmd |= GVP_CNTR_DDIR; 265 266 #ifdef DEBUG 267 if (gtsc_debug & DDB_IO) 268 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 269 dev->sc_dmatimo = 1; 270 #endif 271 dev->sc_flags |= SBICF_INTR; 272 sdp->CNTR = dev->sc_dmacmd; 273 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 274 if (dev->gtsc_bankmask) 275 sdp->bank = 276 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 277 sdp->ST_DMA = 1; 278 279 /* 280 * restrict transfer count to maximum 281 */ 282 if (dev->sc_tcnt > gtsc_maxdma) 283 dev->sc_tcnt = gtsc_maxdma; 284 return(dev->sc_tcnt); 285 } 286 287 void 288 gtsc_dmastop(dev) 289 struct sbic_softc *dev; 290 { 291 volatile struct sdmac *sdp; 292 int s; 293 294 sdp = dev->sc_cregs; 295 296 #ifdef DEBUG 297 if (gtsc_debug & DDB_FOLLOW) 298 printf("gtsc_dmastop()\n"); 299 dev->sc_dmatimo = 0; 300 #endif 301 if (dev->sc_dmacmd) { 302 /* 303 * clear possible interrupt and stop dma 304 */ 305 s = splbio(); 306 sdp->CNTR &= ~GVP_CNTR_INT_P; 307 sdp->SP_DMA = 1; 308 dev->sc_dmacmd = 0; 309 splx(s); 310 } 311 } 312 313 int 314 gtsc_dmaintr(dev) 315 struct sbic_softc *dev; 316 { 317 volatile struct sdmac *sdp; 318 int stat; 319 320 sdp = dev->sc_cregs; 321 stat = sdp->CNTR; 322 if ((stat & GVP_CNTR_INT_P) == 0) 323 return (0); 324 #ifdef DEBUG 325 if (gtsc_debug & DDB_FOLLOW) 326 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat); 327 #endif 328 if (dev->sc_flags & SBICF_INTR) 329 if (sbicintr(dev)) 330 return (1); 331 return(0); 332 } 333 334 335 int 336 gtsc_dmanext(dev) 337 struct sbic_softc *dev; 338 { 339 volatile struct sdmac *sdp; 340 int i, stat; 341 342 sdp = dev->sc_cregs; 343 344 if (dev->sc_cur > dev->sc_last) { 345 /* shouldn't happen !! */ 346 printf("gtsc_dmanext at end !!!\n"); 347 gtsc_dmastop(dev); 348 return(0); 349 } 350 #ifdef DEBUG 351 dev->sc_dmatimo = 1; 352 #endif 353 /* 354 * clear possible interrupt and stop dma 355 */ 356 sdp->CNTR &= ~GVP_CNTR_INT_P; 357 sdp->SP_DMA = 1; 358 359 sdp->CNTR = dev->sc_dmacmd; 360 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 361 if (dev->gtsc_bankmask) 362 sdp->bank = 363 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 364 sdp->ST_DMA = 1; 365 366 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 367 if (dev->sc_tcnt > gtsc_maxdma) 368 dev->sc_tcnt = gtsc_maxdma; 369 #ifdef DEBUG 370 if (gtsc_debug & DDB_FOLLOW) 371 printf("gtsc_dmanext ret: %d\n", dev->sc_tcnt); 372 #endif 373 return(dev->sc_tcnt); 374 } 375 376 #ifdef DEBUG 377 void 378 gtsc_dmatimeout(arg) 379 void *arg; 380 { 381 struct sbic_softc *dev; 382 int i, s; 383 384 for (i = 0; i < gtsccd.cd_ndevs; i++) { 385 dev = gtsccd.cd_devs[i]; 386 if (dev == NULL) 387 continue; 388 s = splbio(); 389 if (dev->sc_dmatimo) { 390 if (dev->sc_dmatimo > 1) 391 printf("gtsc_dma%d: timeout #%d\n", 392 dev->sc_dev.dv_unit, dev->sc_dmatimo - 1); 393 dev->sc_dmatimo++; 394 } 395 splx(s); 396 } 397 timeout(gtsc_dmatimeout, 0, 30 * hz); 398 } 399 #endif 400
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