gtsc.c revision 1.12
1 /* $NetBSD: gtsc.c,v 1.12 1995/08/18 15:27:53 chopps Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Christian E. Hopps 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)dma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/cc.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/amiga/isr.h> 48 #include <amiga/dev/dmavar.h> 49 #include <amiga/dev/sbicreg.h> 50 #include <amiga/dev/sbicvar.h> 51 #include <amiga/dev/gtscreg.h> 52 #include <amiga/dev/zbusvar.h> 53 #include <amiga/dev/gvpbusvar.h> 54 55 void gtscattach __P((struct device *, struct device *, void *)); 56 int gtscmatch __P((struct device *, struct cfdata *, void *)); 57 int gtscprint __P((void *auxp, char *)); 58 59 void gtsc_dmafree __P((struct sbic_softc *)); 60 void gtsc_dmastop __P((struct sbic_softc *)); 61 int gtsc_dmanext __P((struct sbic_softc *)); 62 int gtsc_dmaintr __P((struct sbic_softc *)); 63 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 64 65 struct scsi_adapter gtsc_scsiswitch = { 66 sbic_scsicmd, 67 sbic_minphys, 68 0, /* no lun support */ 69 0, /* no lun support */ 70 }; 71 72 struct scsi_device gtsc_scsidev = { 73 NULL, /* use default error handler */ 74 NULL, /* have a queue served by this ??? */ 75 NULL, /* have no async handler ??? */ 76 NULL, /* Use default done routine */ 77 }; 78 79 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 80 int gtsc_dmamask = 0; 81 int gtsc_dmabounce = 0; 82 int gtsc_clock_override = 0; 83 84 #ifdef DEBUG 85 void gtsc_dmatimeout __P((struct sbic_softc *)); 86 int gtsc_debug = 0; 87 #endif 88 89 struct cfdriver gtsccd = { 90 NULL, "gtsc", (cfmatch_t)gtscmatch, gtscattach, 91 DV_DULL, sizeof(struct sbic_softc), NULL, 0 }; 92 93 int 94 gtscmatch(pdp, cdp, auxp) 95 struct device *pdp; 96 struct cfdata *cdp; 97 void *auxp; 98 { 99 struct gvpbus_args *gap; 100 101 gap = auxp; 102 if (gap->flags & GVP_SCSI) 103 return(1); 104 return(0); 105 } 106 107 /* 108 * attach all devices on our board. 109 */ 110 void 111 gtscattach(pdp, dp, auxp) 112 struct device *pdp, *dp; 113 void *auxp; 114 { 115 volatile struct sdmac *rp; 116 struct gvpbus_args *gap; 117 struct sbic_softc *sc; 118 119 gap = auxp; 120 sc = (struct sbic_softc *)dp; 121 sc->sc_cregs = rp = gap->zargs.va; 122 123 /* 124 * disable ints and reset bank register 125 */ 126 rp->CNTR = 0; 127 if ((gap->flags & GVP_NOBANK) == 0) 128 rp->bank = 0; 129 130 sc->sc_dmago = gtsc_dmago; 131 sc->sc_dmafree = gtsc_dmafree; 132 sc->sc_dmanext = gtsc_dmanext; 133 sc->sc_dmastop = gtsc_dmastop; 134 sc->sc_dmacmd = 0; 135 136 #ifdef DEBUG 137 /* make sure timeout is really not needed */ 138 timeout((void *)gtsc_dmatimeout, sc, 30 * hz); 139 #endif 140 141 sc->sc_flags |= SBICF_BADDMA; 142 if (gtsc_dmamask) 143 sc->sc_dmamask = gtsc_dmamask; 144 else if (gap->flags & GVP_24BITDMA) 145 sc->sc_dmamask = ~0x00ffffff; 146 else if (gap->flags & GVP_25BITDMA) 147 sc->sc_dmamask = ~0x01ffffff; 148 else 149 sc->sc_dmamask = ~0x07ffffff; 150 printf(": dmamask 0x%x", ~sc->sc_dmamask); 151 152 if ((gap->flags & GVP_NOBANK) == 0) 153 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 154 155 #if 0 156 /* 157 * if the user requests a bounce buffer or 158 * the users kva space is not ztwo and dma needs it 159 * try and allocate a bounce buffer. If we allocate 160 * one and it is in ztwo space leave maxdma to user 161 * setting or default to MAXPHYS else the address must 162 * be on the chip bus so decrease it to either the users 163 * setting or 1024 bytes. 164 * 165 * XXX this needs to change if we move to multiple memory segments. 166 */ 167 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 168 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS * 8); /* XXX */ 169 if (isztwomem(sc->sc_dmabuffer)) 170 printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer)); 171 else if (gtsc_maxdma == 0) { 172 gtsc_maxdma = 1024; 173 printf(" bounce pa 0x%x", 174 PREP_DMA_MEM(sc->sc_dmabuffer)); 175 } 176 } 177 #endif 178 if (gtsc_maxdma == 0) 179 gtsc_maxdma = MAXPHYS; 180 181 printf(" flags %x", gap->flags); 182 printf(" maxdma %d\n", gtsc_maxdma); 183 184 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61); 185 sc->sc_clkfreq = gtsc_clock_override ? gtsc_clock_override : 186 ((gap->flags & GVP_14MHZ) ? 143 : 72); 187 printf("sc_clkfreg: %d.%dMhz\n", sc->sc_clkfreq / 10, sc->sc_clkfreq % 10); 188 189 sc->sc_link.adapter_softc = sc; 190 sc->sc_link.adapter_target = 7; 191 sc->sc_link.adapter = >sc_scsiswitch; 192 sc->sc_link.device = >sc_scsidev; 193 sc->sc_link.openings = 2; 194 195 sbicinit(sc); 196 197 sc->sc_isr.isr_intr = gtsc_dmaintr; 198 sc->sc_isr.isr_arg = sc; 199 sc->sc_isr.isr_ipl = 2; 200 add_isr(&sc->sc_isr); 201 202 /* 203 * attach all scsi units on us 204 */ 205 config_found(dp, &sc->sc_link, gtscprint); 206 } 207 208 /* 209 * print diag if pnp is NULL else just extra 210 */ 211 int 212 gtscprint(auxp, pnp) 213 void *auxp; 214 char *pnp; 215 { 216 if (pnp == NULL) 217 return(UNCONF); 218 return(QUIET); 219 } 220 221 void 222 gtsc_dmafree(dev) 223 struct sbic_softc *dev; 224 { 225 volatile struct sdmac *sdp; 226 int s; 227 228 sdp = dev->sc_cregs; 229 230 s = splbio(); 231 #ifdef DEBUG 232 dev->sc_dmatimo = 0; 233 #endif 234 if (dev->sc_dmacmd) { 235 /* 236 * clear possible interrupt and stop dma 237 */ 238 sdp->CNTR &= ~GVP_CNTR_INT_P; 239 sdp->SP_DMA = 1; 240 dev->sc_dmacmd = 0; 241 } 242 #ifdef DEBUG 243 if (gtsc_debug & (DDB_IO | DDB_FOLLOW)) 244 printf("gtsc_dmafree\n"); 245 #endif 246 /* 247 * disable interrupts 248 */ 249 sdp->CNTR = 0; /* disable interrupts from dma/sbic */ 250 dev->sc_flags &= ~SBICF_INTR; 251 splx(s); 252 } 253 254 int 255 gtsc_dmago(dev, addr, count, flags) 256 struct sbic_softc *dev; 257 char *addr; 258 int count, flags; 259 { 260 volatile struct sdmac *sdp; 261 262 sdp = dev->sc_cregs; 263 /* 264 * Set up the command word based on flags 265 */ 266 dev->sc_dmacmd = GVP_CNTR_INTEN; 267 if ((flags & DMAGO_READ) == 0) 268 dev->sc_dmacmd |= GVP_CNTR_DDIR; 269 270 #ifdef DEBUG 271 if (gtsc_debug & DDB_IO) 272 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 273 dev->sc_dmatimo = 1; 274 #endif 275 dev->sc_flags |= SBICF_INTR; 276 sdp->CNTR = dev->sc_dmacmd; 277 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 278 if (dev->gtsc_bankmask) 279 sdp->bank = 280 dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18); 281 sdp->ST_DMA = 1; 282 283 /* 284 * restrict transfer count to maximum 285 */ 286 if (dev->sc_tcnt > gtsc_maxdma) 287 dev->sc_tcnt = gtsc_maxdma; 288 return(dev->sc_tcnt); 289 } 290 291 void 292 gtsc_dmastop(dev) 293 struct sbic_softc *dev; 294 { 295 volatile struct sdmac *sdp; 296 int s; 297 298 sdp = dev->sc_cregs; 299 300 #ifdef DEBUG 301 if (gtsc_debug & DDB_FOLLOW) 302 printf("gtsc_dmastop()\n"); 303 dev->sc_dmatimo = 0; 304 #endif 305 if (dev->sc_dmacmd) { 306 /* 307 * clear possible interrupt and stop dma 308 */ 309 s = splbio(); 310 sdp->CNTR &= ~GVP_CNTR_INT_P; 311 sdp->SP_DMA = 1; 312 dev->sc_dmacmd = 0; 313 splx(s); 314 } 315 } 316 317 int 318 gtsc_dmaintr(dev) 319 struct sbic_softc *dev; 320 { 321 volatile struct sdmac *sdp; 322 int stat; 323 324 sdp = dev->sc_cregs; 325 stat = sdp->CNTR; 326 if ((stat & GVP_CNTR_INT_P) == 0) 327 return (0); 328 #ifdef DEBUG 329 if (gtsc_debug & DDB_FOLLOW) 330 printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat); 331 #endif 332 if (dev->sc_flags & SBICF_INTR) 333 if (sbicintr(dev)) 334 return (1); 335 return(0); 336 } 337 338 339 int 340 gtsc_dmanext(dev) 341 struct sbic_softc *dev; 342 { 343 volatile struct sdmac *sdp; 344 int i, stat; 345 346 sdp = dev->sc_cregs; 347 348 if (dev->sc_cur > dev->sc_last) { 349 /* shouldn't happen !! */ 350 printf("gtsc_dmanext at end !!!\n"); 351 gtsc_dmastop(dev); 352 return(0); 353 } 354 #ifdef DEBUG 355 dev->sc_dmatimo = 1; 356 #endif 357 /* 358 * clear possible interrupt and stop dma 359 */ 360 sdp->CNTR &= ~GVP_CNTR_INT_P; 361 sdp->SP_DMA = 1; 362 363 sdp->CNTR = dev->sc_dmacmd; 364 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 365 if (dev->gtsc_bankmask) 366 sdp->bank = 367 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 368 sdp->ST_DMA = 1; 369 370 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 371 if (dev->sc_tcnt > gtsc_maxdma) 372 dev->sc_tcnt = gtsc_maxdma; 373 #ifdef DEBUG 374 if (gtsc_debug & DDB_FOLLOW) 375 printf("gtsc_dmanext ret: %d\n", dev->sc_tcnt); 376 #endif 377 return(dev->sc_tcnt); 378 } 379 380 #ifdef DEBUG 381 void 382 gtsc_dmatimeout(sc) 383 struct sbic_softc *sc; 384 { 385 int s; 386 387 s = splbio(); 388 if (sc->sc_dmatimo) { 389 if (sc->sc_dmatimo > 1) 390 printf("%s: dma timeout #%d\n", 391 sc->sc_dev.dv_xname, sc->sc_dmatimo - 1); 392 sc->sc_dmatimo++; 393 } 394 splx(s); 395 timeout((void *)gtsc_dmatimeout, sc, 30 * hz); 396 } 397 #endif 398
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